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Added current STM32 standandard libraries in version independend folder structure
author Ideenmodellierer
date Sun, 17 Feb 2019 21:12:22 +0100
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127:1369f8660eaa 128:c78bcbd5deda
1 /**
2 ******************************************************************************
3 * @file stm32f4xx_hal_cryp.c
4 * @author MCD Application Team
5 * @brief CRYP HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Cryptography (CRYP) peripheral:
8 * + Initialization and de-initialization functions
9 * + AES processing functions
10 * + DES processing functions
11 * + TDES processing functions
12 * + DMA callback functions
13 * + CRYP IRQ handler management
14 * + Peripheral State functions
15 *
16 @verbatim
17 ==============================================================================
18 ##### How to use this driver #####
19 ==============================================================================
20 [..]
21 The CRYP HAL driver can be used as follows:
22
23 (#)Initialize the CRYP low level resources by implementing the HAL_CRYP_MspInit():
24 (##) Enable the CRYP interface clock using __HAL_RCC_CRYP_CLK_ENABLE()
25 (##) In case of using interrupts (e.g. HAL_CRYP_AESECB_Encrypt_IT())
26 (+++) Configure the CRYP interrupt priority using HAL_NVIC_SetPriority()
27 (+++) Enable the CRYP IRQ handler using HAL_NVIC_EnableIRQ()
28 (+++) In CRYP IRQ handler, call HAL_CRYP_IRQHandler()
29 (##) In case of using DMA to control data transfer (e.g. HAL_CRYP_AESECB_Encrypt_DMA())
30 (+++) Enable the DMAx interface clock using __DMAx_CLK_ENABLE()
31 (+++) Configure and enable two DMA streams one for managing data transfer from
32 memory to peripheral (input stream) and another stream for managing data
33 transfer from peripheral to memory (output stream)
34 (+++) Associate the initialized DMA handle to the CRYP DMA handle
35 using __HAL_LINKDMA()
36 (+++) Configure the priority and enable the NVIC for the transfer complete
37 interrupt on the two DMA Streams. The output stream should have higher
38 priority than the input stream HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ()
39
40 (#)Initialize the CRYP HAL using HAL_CRYP_Init(). This function configures mainly:
41 (##) The data type: 1-bit, 8-bit, 16-bit and 32-bit
42 (##) The key size: 128, 192 and 256. This parameter is relevant only for AES
43 (##) The encryption/decryption key. It's size depends on the algorithm
44 used for encryption/decryption
45 (##) The initialization vector (counter). It is not used ECB mode.
46
47 (#)Three processing (encryption/decryption) functions are available:
48 (##) Polling mode: encryption and decryption APIs are blocking functions
49 i.e. they process the data and wait till the processing is finished,
50 e.g. HAL_CRYP_AESCBC_Encrypt()
51 (##) Interrupt mode: encryption and decryption APIs are not blocking functions
52 i.e. they process the data under interrupt,
53 e.g. HAL_CRYP_AESCBC_Encrypt_IT()
54 (##) DMA mode: encryption and decryption APIs are not blocking functions
55 i.e. the data transfer is ensured by DMA,
56 e.g. HAL_CRYP_AESCBC_Encrypt_DMA()
57
58 (#)When the processing function is called at first time after HAL_CRYP_Init()
59 the CRYP peripheral is initialized and processes the buffer in input.
60 At second call, the processing function performs an append of the already
61 processed buffer.
62 When a new data block is to be processed, call HAL_CRYP_Init() then the
63 processing function.
64
65 (#)Call HAL_CRYP_DeInit() to deinitialize the CRYP peripheral.
66
67 @endverbatim
68 ******************************************************************************
69 * @attention
70 *
71 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
72 *
73 * Redistribution and use in source and binary forms, with or without modification,
74 * are permitted provided that the following conditions are met:
75 * 1. Redistributions of source code must retain the above copyright notice,
76 * this list of conditions and the following disclaimer.
77 * 2. Redistributions in binary form must reproduce the above copyright notice,
78 * this list of conditions and the following disclaimer in the documentation
79 * and/or other materials provided with the distribution.
80 * 3. Neither the name of STMicroelectronics nor the names of its contributors
81 * may be used to endorse or promote products derived from this software
82 * without specific prior written permission.
83 *
84 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
85 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
86 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
87 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
88 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
89 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
90 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
91 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
92 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
93 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
94 *
95 ******************************************************************************
96 */
97
98 /* Includes ------------------------------------------------------------------*/
99 #include "stm32f4xx_hal.h"
100
101 /** @addtogroup STM32F4xx_HAL_Driver
102 * @{
103 */
104
105 #ifdef HAL_CRYP_MODULE_ENABLED
106
107 #if defined(CRYP)
108
109 /** @defgroup CRYP CRYP
110 * @brief CRYP HAL module driver.
111 * @{
112 */
113
114 /* Private typedef -----------------------------------------------------------*/
115 /* Private define ------------------------------------------------------------*/
116 /** @addtogroup CRYP_Private_define
117 * @{
118 */
119 #define CRYP_TIMEOUT_VALUE 1U
120 /**
121 * @}
122 */
123
124 /* Private macro -------------------------------------------------------------*/
125 /* Private variables ---------------------------------------------------------*/
126 /* Private function prototypes -----------------------------------------------*/
127 /** @addtogroup CRYP_Private_Functions_prototypes
128 * @{
129 */
130 static void CRYP_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector, uint32_t IVSize);
131 static void CRYP_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key, uint32_t KeySize);
132 static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout);
133 static HAL_StatusTypeDef CRYP_ProcessData2Words(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout);
134 static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma);
135 static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma);
136 static void CRYP_DMAError(DMA_HandleTypeDef *hdma);
137 static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr);
138 static void CRYP_SetTDESECBMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction);
139 static void CRYP_SetTDESCBCMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction);
140 static void CRYP_SetDESECBMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction);
141 static void CRYP_SetDESCBCMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction);
142 /**
143 * @}
144 */
145
146
147 /* Private functions ---------------------------------------------------------*/
148
149 /** @addtogroup CRYP_Private_Functions
150 * @{
151 */
152
153
154 /**
155 * @brief DMA CRYP Input Data process complete callback.
156 * @param hdma DMA handle
157 * @retval None
158 */
159 static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma)
160 {
161 CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
162
163 /* Disable the DMA transfer for input FIFO request by resetting the DIEN bit
164 in the DMACR register */
165 hcryp->Instance->DMACR &= (uint32_t)(~CRYP_DMACR_DIEN);
166
167 /* Call input data transfer complete callback */
168 HAL_CRYP_InCpltCallback(hcryp);
169 }
170
171 /**
172 * @brief DMA CRYP Output Data process complete callback.
173 * @param hdma DMA handle
174 * @retval None
175 */
176 static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma)
177 {
178 CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
179
180 /* Disable the DMA transfer for output FIFO request by resetting the DOEN bit
181 in the DMACR register */
182 hcryp->Instance->DMACR &= (uint32_t)(~CRYP_DMACR_DOEN);
183
184 /* Disable CRYP */
185 __HAL_CRYP_DISABLE(hcryp);
186
187 /* Change the CRYP state to ready */
188 hcryp->State = HAL_CRYP_STATE_READY;
189
190 /* Call output data transfer complete callback */
191 HAL_CRYP_OutCpltCallback(hcryp);
192 }
193
194 /**
195 * @brief DMA CRYP communication error callback.
196 * @param hdma DMA handle
197 * @retval None
198 */
199 static void CRYP_DMAError(DMA_HandleTypeDef *hdma)
200 {
201 CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
202 hcryp->State= HAL_CRYP_STATE_READY;
203 HAL_CRYP_ErrorCallback(hcryp);
204 }
205
206 /**
207 * @brief Writes the Key in Key registers.
208 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
209 * the configuration information for CRYP module
210 * @param Key Pointer to Key buffer
211 * @param KeySize Size of Key
212 * @retval None
213 */
214 static void CRYP_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key, uint32_t KeySize)
215 {
216 uint32_t keyaddr = (uint32_t)Key;
217
218 switch(KeySize)
219 {
220 case CRYP_KEYSIZE_256B:
221 /* Key Initialisation */
222 hcryp->Instance->K0LR = __REV(*(uint32_t*)(keyaddr));
223 keyaddr+=4U;
224 hcryp->Instance->K0RR = __REV(*(uint32_t*)(keyaddr));
225 keyaddr+=4U;
226 hcryp->Instance->K1LR = __REV(*(uint32_t*)(keyaddr));
227 keyaddr+=4U;
228 hcryp->Instance->K1RR = __REV(*(uint32_t*)(keyaddr));
229 keyaddr+=4U;
230 hcryp->Instance->K2LR = __REV(*(uint32_t*)(keyaddr));
231 keyaddr+=4U;
232 hcryp->Instance->K2RR = __REV(*(uint32_t*)(keyaddr));
233 keyaddr+=4U;
234 hcryp->Instance->K3LR = __REV(*(uint32_t*)(keyaddr));
235 keyaddr+=4U;
236 hcryp->Instance->K3RR = __REV(*(uint32_t*)(keyaddr));
237 break;
238 case CRYP_KEYSIZE_192B:
239 hcryp->Instance->K1LR = __REV(*(uint32_t*)(keyaddr));
240 keyaddr+=4U;
241 hcryp->Instance->K1RR = __REV(*(uint32_t*)(keyaddr));
242 keyaddr+=4U;
243 hcryp->Instance->K2LR = __REV(*(uint32_t*)(keyaddr));
244 keyaddr+=4U;
245 hcryp->Instance->K2RR = __REV(*(uint32_t*)(keyaddr));
246 keyaddr+=4U;
247 hcryp->Instance->K3LR = __REV(*(uint32_t*)(keyaddr));
248 keyaddr+=4U;
249 hcryp->Instance->K3RR = __REV(*(uint32_t*)(keyaddr));
250 break;
251 case CRYP_KEYSIZE_128B:
252 hcryp->Instance->K2LR = __REV(*(uint32_t*)(keyaddr));
253 keyaddr+=4U;
254 hcryp->Instance->K2RR = __REV(*(uint32_t*)(keyaddr));
255 keyaddr+=4U;
256 hcryp->Instance->K3LR = __REV(*(uint32_t*)(keyaddr));
257 keyaddr+=4U;
258 hcryp->Instance->K3RR = __REV(*(uint32_t*)(keyaddr));
259 break;
260 default:
261 break;
262 }
263 }
264
265 /**
266 * @brief Writes the InitVector/InitCounter in IV registers.
267 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
268 * the configuration information for CRYP module
269 * @param InitVector Pointer to InitVector/InitCounter buffer
270 * @param IVSize Size of the InitVector/InitCounter
271 * @retval None
272 */
273 static void CRYP_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector, uint32_t IVSize)
274 {
275 uint32_t ivaddr = (uint32_t)InitVector;
276
277 switch(IVSize)
278 {
279 case CRYP_KEYSIZE_128B:
280 hcryp->Instance->IV0LR = __REV(*(uint32_t*)(ivaddr));
281 ivaddr+=4U;
282 hcryp->Instance->IV0RR = __REV(*(uint32_t*)(ivaddr));
283 ivaddr+=4U;
284 hcryp->Instance->IV1LR = __REV(*(uint32_t*)(ivaddr));
285 ivaddr+=4U;
286 hcryp->Instance->IV1RR = __REV(*(uint32_t*)(ivaddr));
287 break;
288 /* Whatever key size 192 or 256, Init vector is written in IV0LR and IV0RR */
289 case CRYP_KEYSIZE_192B:
290 hcryp->Instance->IV0LR = __REV(*(uint32_t*)(ivaddr));
291 ivaddr+=4U;
292 hcryp->Instance->IV0RR = __REV(*(uint32_t*)(ivaddr));
293 break;
294 case CRYP_KEYSIZE_256B:
295 hcryp->Instance->IV0LR = __REV(*(uint32_t*)(ivaddr));
296 ivaddr+=4U;
297 hcryp->Instance->IV0RR = __REV(*(uint32_t*)(ivaddr));
298 break;
299 default:
300 break;
301 }
302 }
303
304 /**
305 * @brief Process Data: Writes Input data in polling mode and read the output data
306 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
307 * the configuration information for CRYP module
308 * @param Input Pointer to the Input buffer
309 * @param Ilength Length of the Input buffer, must be a multiple of 16.
310 * @param Output Pointer to the returned buffer
311 * @param Timeout Timeout value
312 * @retval None
313 */
314 static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout)
315 {
316 uint32_t tickstart = 0U;
317
318 uint32_t i = 0U;
319 uint32_t inputaddr = (uint32_t)Input;
320 uint32_t outputaddr = (uint32_t)Output;
321
322 for(i=0U; (i < Ilength); i+=16U)
323 {
324 /* Write the Input block in the IN FIFO */
325 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
326 inputaddr+=4U;
327 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
328 inputaddr+=4U;
329 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
330 inputaddr+=4U;
331 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
332 inputaddr+=4U;
333
334 /* Get tick */
335 tickstart = HAL_GetTick();
336
337 while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_OFNE))
338 {
339 /* Check for the Timeout */
340 if(Timeout != HAL_MAX_DELAY)
341 {
342 if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
343 {
344 /* Change state */
345 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
346
347 /* Process Unlocked */
348 __HAL_UNLOCK(hcryp);
349
350 return HAL_TIMEOUT;
351 }
352 }
353 }
354 /* Read the Output block from the Output FIFO */
355 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
356 outputaddr+=4U;
357 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
358 outputaddr+=4U;
359 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
360 outputaddr+=4U;
361 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
362 outputaddr+=4U;
363 }
364 /* Return function status */
365 return HAL_OK;
366 }
367
368 /**
369 * @brief Process Data: Write Input data in polling mode.
370 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
371 * the configuration information for CRYP module
372 * @param Input Pointer to the Input buffer
373 * @param Ilength Length of the Input buffer, must be a multiple of 8
374 * @param Output Pointer to the returned buffer
375 * @param Timeout Specify Timeout value
376 * @retval None
377 */
378 static HAL_StatusTypeDef CRYP_ProcessData2Words(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout)
379 {
380 uint32_t tickstart = 0U;
381
382 uint32_t i = 0U;
383 uint32_t inputaddr = (uint32_t)Input;
384 uint32_t outputaddr = (uint32_t)Output;
385
386 for(i=0U; (i < Ilength); i+=8U)
387 {
388 /* Write the Input block in the IN FIFO */
389 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
390 inputaddr+=4U;
391 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
392 inputaddr+=4U;
393
394 /* Get tick */
395 tickstart = HAL_GetTick();
396
397 while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_OFNE))
398 {
399 /* Check for the Timeout */
400 if(Timeout != HAL_MAX_DELAY)
401 {
402 if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
403 {
404 /* Change state */
405 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
406
407 /* Process Unlocked */
408 __HAL_UNLOCK(hcryp);
409
410 return HAL_TIMEOUT;
411 }
412 }
413 }
414 /* Read the Output block from the Output FIFO */
415 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
416 outputaddr+=4U;
417 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
418 outputaddr+=4U;
419 }
420 /* Return function status */
421 return HAL_OK;
422 }
423
424 /**
425 * @brief Set the DMA configuration and start the DMA transfer
426 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
427 * the configuration information for CRYP module
428 * @param inputaddr address of the Input buffer
429 * @param Size Size of the Input buffer, must be a multiple of 16.
430 * @param outputaddr address of the Output buffer
431 * @retval None
432 */
433 static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr)
434 {
435 /* Set the CRYP DMA transfer complete callback */
436 hcryp->hdmain->XferCpltCallback = CRYP_DMAInCplt;
437 /* Set the DMA error callback */
438 hcryp->hdmain->XferErrorCallback = CRYP_DMAError;
439
440 /* Set the CRYP DMA transfer complete callback */
441 hcryp->hdmaout->XferCpltCallback = CRYP_DMAOutCplt;
442 /* Set the DMA error callback */
443 hcryp->hdmaout->XferErrorCallback = CRYP_DMAError;
444
445 /* Enable CRYP */
446 __HAL_CRYP_ENABLE(hcryp);
447
448 /* Enable the DMA In DMA Stream */
449 HAL_DMA_Start_IT(hcryp->hdmain, inputaddr, (uint32_t)&hcryp->Instance->DR, Size/4U);
450
451 /* Enable In DMA request */
452 hcryp->Instance->DMACR = (CRYP_DMACR_DIEN);
453
454 /* Enable the DMA Out DMA Stream */
455 HAL_DMA_Start_IT(hcryp->hdmaout, (uint32_t)&hcryp->Instance->DOUT, outputaddr, Size/4U);
456
457 /* Enable Out DMA request */
458 hcryp->Instance->DMACR |= CRYP_DMACR_DOEN;
459
460 }
461
462 /**
463 * @brief Sets the CRYP peripheral in DES ECB mode.
464 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
465 * the configuration information for CRYP module
466 * @param Direction Encryption or decryption
467 * @retval None
468 */
469 static void CRYP_SetDESECBMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction)
470 {
471 /* Check if initialization phase has already been performed */
472 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
473 {
474 /* Set the CRYP peripheral in AES ECB mode */
475 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_DES_ECB | Direction);
476
477 /* Set the key */
478 hcryp->Instance->K1LR = __REV(*(uint32_t*)(hcryp->Init.pKey));
479 hcryp->Instance->K1RR = __REV(*(uint32_t*)(hcryp->Init.pKey+4U));
480
481 /* Flush FIFO */
482 __HAL_CRYP_FIFO_FLUSH(hcryp);
483
484 /* Set the phase */
485 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
486 }
487 }
488
489 /**
490 * @brief Sets the CRYP peripheral in DES CBC mode.
491 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
492 * the configuration information for CRYP module
493 * @param Direction Encryption or decryption
494 * @retval None
495 */
496 static void CRYP_SetDESCBCMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction)
497 {
498 /* Check if initialization phase has already been performed */
499 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
500 {
501 /* Set the CRYP peripheral in AES ECB mode */
502 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_DES_CBC | Direction);
503
504 /* Set the key */
505 hcryp->Instance->K1LR = __REV(*(uint32_t*)(hcryp->Init.pKey));
506 hcryp->Instance->K1RR = __REV(*(uint32_t*)(hcryp->Init.pKey+4U));
507
508 /* Set the Initialization Vector */
509 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_256B);
510
511 /* Flush FIFO */
512 __HAL_CRYP_FIFO_FLUSH(hcryp);
513
514 /* Set the phase */
515 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
516 }
517 }
518
519 /**
520 * @brief Sets the CRYP peripheral in TDES ECB mode.
521 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
522 * the configuration information for CRYP module
523 * @param Direction Encryption or decryption
524 * @retval None
525 */
526 static void CRYP_SetTDESECBMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction)
527 {
528 /* Check if initialization phase has already been performed */
529 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
530 {
531 /* Set the CRYP peripheral in AES ECB mode */
532 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_TDES_ECB | Direction);
533
534 /* Set the key */
535 CRYP_SetKey(hcryp, hcryp->Init.pKey, CRYP_KEYSIZE_192B);
536
537 /* Flush FIFO */
538 __HAL_CRYP_FIFO_FLUSH(hcryp);
539
540 /* Set the phase */
541 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
542 }
543 }
544
545 /**
546 * @brief Sets the CRYP peripheral in TDES CBC mode
547 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
548 * the configuration information for CRYP module
549 * @param Direction Encryption or decryption
550 * @retval None
551 */
552 static void CRYP_SetTDESCBCMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction)
553 {
554 /* Check if initialization phase has already been performed */
555 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
556 {
557 /* Set the CRYP peripheral in AES CBC mode */
558 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_TDES_CBC | Direction);
559
560 /* Set the key */
561 CRYP_SetKey(hcryp, hcryp->Init.pKey, CRYP_KEYSIZE_192B);
562
563 /* Set the Initialization Vector */
564 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_256B);
565
566 /* Flush FIFO */
567 __HAL_CRYP_FIFO_FLUSH(hcryp);
568
569 /* Set the phase */
570 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
571 }
572 }
573
574 /**
575 * @}
576 */
577
578 /* Exported functions --------------------------------------------------------*/
579 /** @addtogroup CRYP_Exported_Functions
580 * @{
581 */
582
583 /** @defgroup CRYP_Exported_Functions_Group1 Initialization and de-initialization functions
584 * @brief Initialization and Configuration functions.
585 *
586 @verbatim
587 ==============================================================================
588 ##### Initialization and de-initialization functions #####
589 ==============================================================================
590 [..] This section provides functions allowing to:
591 (+) Initialize the CRYP according to the specified parameters
592 in the CRYP_InitTypeDef and creates the associated handle
593 (+) DeInitialize the CRYP peripheral
594 (+) Initialize the CRYP MSP
595 (+) DeInitialize CRYP MSP
596
597 @endverbatim
598 * @{
599 */
600
601 /**
602 * @brief Initializes the CRYP according to the specified
603 * parameters in the CRYP_InitTypeDef and creates the associated handle.
604 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
605 * the configuration information for CRYP module
606 * @retval HAL status
607 */
608 HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp)
609 {
610 /* Check the CRYP handle allocation */
611 if(hcryp == NULL)
612 {
613 return HAL_ERROR;
614 }
615
616 /* Check the parameters */
617 assert_param(IS_CRYP_KEYSIZE(hcryp->Init.KeySize));
618 assert_param(IS_CRYP_DATATYPE(hcryp->Init.DataType));
619
620 if(hcryp->State == HAL_CRYP_STATE_RESET)
621 {
622 /* Allocate lock resource and initialize it */
623 hcryp->Lock = HAL_UNLOCKED;
624 /* Init the low level hardware */
625 HAL_CRYP_MspInit(hcryp);
626 }
627
628 /* Change the CRYP state */
629 hcryp->State = HAL_CRYP_STATE_BUSY;
630
631 /* Set the key size and data type*/
632 CRYP->CR = (uint32_t) (hcryp->Init.KeySize | hcryp->Init.DataType);
633
634 /* Reset CrypInCount and CrypOutCount */
635 hcryp->CrypInCount = 0U;
636 hcryp->CrypOutCount = 0U;
637
638 /* Change the CRYP state */
639 hcryp->State = HAL_CRYP_STATE_READY;
640
641 /* Set the default CRYP phase */
642 hcryp->Phase = HAL_CRYP_PHASE_READY;
643
644 /* Return function status */
645 return HAL_OK;
646 }
647
648 /**
649 * @brief DeInitializes the CRYP peripheral.
650 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
651 * the configuration information for CRYP module
652 * @retval HAL status
653 */
654 HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp)
655 {
656 /* Check the CRYP handle allocation */
657 if(hcryp == NULL)
658 {
659 return HAL_ERROR;
660 }
661
662 /* Change the CRYP state */
663 hcryp->State = HAL_CRYP_STATE_BUSY;
664
665 /* Set the default CRYP phase */
666 hcryp->Phase = HAL_CRYP_PHASE_READY;
667
668 /* Reset CrypInCount and CrypOutCount */
669 hcryp->CrypInCount = 0U;
670 hcryp->CrypOutCount = 0U;
671
672 /* Disable the CRYP Peripheral Clock */
673 __HAL_CRYP_DISABLE(hcryp);
674
675 /* DeInit the low level hardware: CLOCK, NVIC.*/
676 HAL_CRYP_MspDeInit(hcryp);
677
678 /* Change the CRYP state */
679 hcryp->State = HAL_CRYP_STATE_RESET;
680
681 /* Release Lock */
682 __HAL_UNLOCK(hcryp);
683
684 /* Return function status */
685 return HAL_OK;
686 }
687
688 /**
689 * @brief Initializes the CRYP MSP.
690 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
691 * the configuration information for CRYP module
692 * @retval None
693 */
694 __weak void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp)
695 {
696 /* Prevent unused argument(s) compilation warning */
697 UNUSED(hcryp);
698 /* NOTE : This function Should not be modified, when the callback is needed,
699 the HAL_CRYP_MspInit could be implemented in the user file
700 */
701 }
702
703 /**
704 * @brief DeInitializes CRYP MSP.
705 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
706 * the configuration information for CRYP module
707 * @retval None
708 */
709 __weak void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp)
710 {
711 /* Prevent unused argument(s) compilation warning */
712 UNUSED(hcryp);
713 /* NOTE : This function Should not be modified, when the callback is needed,
714 the HAL_CRYP_MspDeInit could be implemented in the user file
715 */
716 }
717
718 /**
719 * @}
720 */
721
722 /** @defgroup CRYP_Exported_Functions_Group2 AES processing functions
723 * @brief processing functions.
724 *
725 @verbatim
726 ==============================================================================
727 ##### AES processing functions #####
728 ==============================================================================
729 [..] This section provides functions allowing to:
730 (+) Encrypt plaintext using AES-128/192/256 using chaining modes
731 (+) Decrypt cyphertext using AES-128/192/256 using chaining modes
732 [..] Three processing functions are available:
733 (+) Polling mode
734 (+) Interrupt mode
735 (+) DMA mode
736
737 @endverbatim
738 * @{
739 */
740
741 /**
742 * @brief Initializes the CRYP peripheral in AES ECB encryption mode
743 * then encrypt pPlainData. The cypher data are available in pCypherData
744 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
745 * the configuration information for CRYP module
746 * @param pPlainData Pointer to the plaintext buffer
747 * @param Size Length of the plaintext buffer, must be a multiple of 16.
748 * @param pCypherData Pointer to the cyphertext buffer
749 * @param Timeout Specify Timeout value
750 * @retval HAL status
751 */
752 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
753 {
754 /* Process Locked */
755 __HAL_LOCK(hcryp);
756
757 /* Change the CRYP state */
758 hcryp->State = HAL_CRYP_STATE_BUSY;
759
760 /* Check if initialization phase has already been performed */
761 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
762 {
763 /* Set the key */
764 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
765
766 /* Set the CRYP peripheral in AES ECB mode */
767 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB);
768
769 /* Flush FIFO */
770 __HAL_CRYP_FIFO_FLUSH(hcryp);
771
772 /* Enable CRYP */
773 __HAL_CRYP_ENABLE(hcryp);
774
775 /* Set the phase */
776 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
777 }
778
779 /* Write Plain Data and Get Cypher Data */
780 if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
781 {
782 return HAL_TIMEOUT;
783 }
784
785 /* Change the CRYP state */
786 hcryp->State = HAL_CRYP_STATE_READY;
787
788 /* Process Unlocked */
789 __HAL_UNLOCK(hcryp);
790
791 /* Return function status */
792 return HAL_OK;
793 }
794
795 /**
796 * @brief Initializes the CRYP peripheral in AES CBC encryption mode
797 * then encrypt pPlainData. The cypher data are available in pCypherData
798 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
799 * the configuration information for CRYP module
800 * @param pPlainData Pointer to the plaintext buffer
801 * @param Size Length of the plaintext buffer, must be a multiple of 16.
802 * @param pCypherData Pointer to the cyphertext buffer
803 * @param Timeout Specify Timeout value
804 * @retval HAL status
805 */
806 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
807 {
808 /* Process Locked */
809 __HAL_LOCK(hcryp);
810
811 /* Change the CRYP state */
812 hcryp->State = HAL_CRYP_STATE_BUSY;
813
814 /* Check if initialization phase has already been performed */
815 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
816 {
817 /* Set the key */
818 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
819
820 /* Set the CRYP peripheral in AES ECB mode */
821 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC);
822
823 /* Set the Initialization Vector */
824 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
825
826 /* Flush FIFO */
827 __HAL_CRYP_FIFO_FLUSH(hcryp);
828
829 /* Enable CRYP */
830 __HAL_CRYP_ENABLE(hcryp);
831
832 /* Set the phase */
833 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
834 }
835
836 /* Write Plain Data and Get Cypher Data */
837 if(CRYP_ProcessData(hcryp,pPlainData, Size, pCypherData, Timeout) != HAL_OK)
838 {
839 return HAL_TIMEOUT;
840 }
841
842 /* Change the CRYP state */
843 hcryp->State = HAL_CRYP_STATE_READY;
844
845 /* Process Unlocked */
846 __HAL_UNLOCK(hcryp);
847
848 /* Return function status */
849 return HAL_OK;
850 }
851
852 /**
853 * @brief Initializes the CRYP peripheral in AES CTR encryption mode
854 * then encrypt pPlainData. The cypher data are available in pCypherData
855 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
856 * the configuration information for CRYP module
857 * @param pPlainData Pointer to the plaintext buffer
858 * @param Size Length of the plaintext buffer, must be a multiple of 16.
859 * @param pCypherData Pointer to the cyphertext buffer
860 * @param Timeout Specify Timeout value
861 * @retval HAL status
862 */
863 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
864 {
865 /* Process Locked */
866 __HAL_LOCK(hcryp);
867
868 /* Change the CRYP state */
869 hcryp->State = HAL_CRYP_STATE_BUSY;
870
871 /* Check if initialization phase has already been performed */
872 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
873 {
874 /* Set the key */
875 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
876
877 /* Set the CRYP peripheral in AES ECB mode */
878 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR);
879
880 /* Set the Initialization Vector */
881 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
882
883 /* Flush FIFO */
884 __HAL_CRYP_FIFO_FLUSH(hcryp);
885
886 /* Enable CRYP */
887 __HAL_CRYP_ENABLE(hcryp);
888
889 /* Set the phase */
890 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
891 }
892
893 /* Write Plain Data and Get Cypher Data */
894 if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
895 {
896 return HAL_TIMEOUT;
897 }
898
899 /* Change the CRYP state */
900 hcryp->State = HAL_CRYP_STATE_READY;
901
902 /* Process Unlocked */
903 __HAL_UNLOCK(hcryp);
904
905 /* Return function status */
906 return HAL_OK;
907 }
908
909
910
911 /**
912 * @brief Initializes the CRYP peripheral in AES ECB decryption mode
913 * then decrypted pCypherData. The cypher data are available in pPlainData
914 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
915 * the configuration information for CRYP module
916 * @param pCypherData Pointer to the cyphertext buffer
917 * @param Size Length of the plaintext buffer, must be a multiple of 16.
918 * @param pPlainData Pointer to the plaintext buffer
919 * @param Timeout Specify Timeout value
920 * @retval HAL status
921 */
922 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
923 {
924 uint32_t tickstart = 0U;
925
926 /* Process Locked */
927 __HAL_LOCK(hcryp);
928
929 /* Change the CRYP state */
930 hcryp->State = HAL_CRYP_STATE_BUSY;
931
932 /* Check if initialization phase has already been performed */
933 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
934 {
935 /* Set the key */
936 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
937
938 /* Set the CRYP peripheral in AES Key mode */
939 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR);
940
941 /* Enable CRYP */
942 __HAL_CRYP_ENABLE(hcryp);
943
944 /* Get tick */
945 tickstart = HAL_GetTick();
946
947 while(HAL_IS_BIT_SET(hcryp->Instance->SR, CRYP_FLAG_BUSY))
948 {
949 /* Check for the Timeout */
950 if(Timeout != HAL_MAX_DELAY)
951 {
952 if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
953 {
954 /* Change state */
955 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
956
957 /* Process Unlocked */
958 __HAL_UNLOCK(hcryp);
959
960 return HAL_TIMEOUT;
961 }
962 }
963 }
964
965 /* Disable CRYP */
966 __HAL_CRYP_DISABLE(hcryp);
967
968 /* Reset the ALGOMODE bits*/
969 CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE);
970
971 /* Set the CRYP peripheral in AES ECB decryption mode */
972 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB | CRYP_CR_ALGODIR);
973 /* Flush FIFO */
974 __HAL_CRYP_FIFO_FLUSH(hcryp);
975
976 /* Enable CRYP */
977 __HAL_CRYP_ENABLE(hcryp);
978
979 /* Set the phase */
980 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
981 }
982
983 /* Write Plain Data and Get Cypher Data */
984 if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
985 {
986 return HAL_TIMEOUT;
987 }
988
989 /* Change the CRYP state */
990 hcryp->State = HAL_CRYP_STATE_READY;
991
992 /* Process Unlocked */
993 __HAL_UNLOCK(hcryp);
994
995 /* Return function status */
996 return HAL_OK;
997 }
998
999 /**
1000 * @brief Initializes the CRYP peripheral in AES ECB decryption mode
1001 * then decrypted pCypherData. The cypher data are available in pPlainData
1002 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
1003 * the configuration information for CRYP module
1004 * @param pCypherData Pointer to the cyphertext buffer
1005 * @param Size Length of the plaintext buffer, must be a multiple of 16.
1006 * @param pPlainData Pointer to the plaintext buffer
1007 * @param Timeout Specify Timeout value
1008 * @retval HAL status
1009 */
1010 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
1011 {
1012 uint32_t tickstart = 0U;
1013
1014 /* Process Locked */
1015 __HAL_LOCK(hcryp);
1016
1017 /* Change the CRYP state */
1018 hcryp->State = HAL_CRYP_STATE_BUSY;
1019
1020 /* Check if initialization phase has already been performed */
1021 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1022 {
1023 /* Set the key */
1024 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1025
1026 /* Set the CRYP peripheral in AES Key mode */
1027 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR);
1028
1029 /* Enable CRYP */
1030 __HAL_CRYP_ENABLE(hcryp);
1031
1032 /* Get tick */
1033 tickstart = HAL_GetTick();
1034
1035 while(HAL_IS_BIT_SET(hcryp->Instance->SR, CRYP_FLAG_BUSY))
1036 {
1037 /* Check for the Timeout */
1038 if(Timeout != HAL_MAX_DELAY)
1039 {
1040 if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
1041 {
1042 /* Change state */
1043 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
1044
1045 /* Process Unlocked */
1046 __HAL_UNLOCK(hcryp);
1047
1048 return HAL_TIMEOUT;
1049 }
1050 }
1051 }
1052
1053 /* Reset the ALGOMODE bits*/
1054 CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE);
1055
1056 /* Set the CRYP peripheral in AES CBC decryption mode */
1057 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC | CRYP_CR_ALGODIR);
1058
1059 /* Set the Initialization Vector */
1060 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1061
1062 /* Flush FIFO */
1063 __HAL_CRYP_FIFO_FLUSH(hcryp);
1064
1065 /* Enable CRYP */
1066 __HAL_CRYP_ENABLE(hcryp);
1067
1068 /* Set the phase */
1069 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1070 }
1071
1072 /* Write Plain Data and Get Cypher Data */
1073 if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
1074 {
1075 return HAL_TIMEOUT;
1076 }
1077
1078 /* Change the CRYP state */
1079 hcryp->State = HAL_CRYP_STATE_READY;
1080
1081 /* Process Unlocked */
1082 __HAL_UNLOCK(hcryp);
1083
1084 /* Return function status */
1085 return HAL_OK;
1086 }
1087
1088 /**
1089 * @brief Initializes the CRYP peripheral in AES CTR decryption mode
1090 * then decrypted pCypherData. The cypher data are available in pPlainData
1091 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
1092 * the configuration information for CRYP module
1093 * @param pCypherData Pointer to the cyphertext buffer
1094 * @param Size Length of the plaintext buffer, must be a multiple of 16.
1095 * @param pPlainData Pointer to the plaintext buffer
1096 * @param Timeout Specify Timeout value
1097 * @retval HAL status
1098 */
1099 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
1100 {
1101 /* Process Locked */
1102 __HAL_LOCK(hcryp);
1103
1104 /* Check if initialization phase has already been performed */
1105 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1106 {
1107 /* Change the CRYP state */
1108 hcryp->State = HAL_CRYP_STATE_BUSY;
1109
1110 /* Set the key */
1111 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1112
1113 /* Set the CRYP peripheral in AES CTR mode */
1114 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR | CRYP_CR_ALGODIR);
1115
1116 /* Set the Initialization Vector */
1117 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1118
1119 /* Flush FIFO */
1120 __HAL_CRYP_FIFO_FLUSH(hcryp);
1121
1122 /* Enable CRYP */
1123 __HAL_CRYP_ENABLE(hcryp);
1124
1125 /* Set the phase */
1126 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1127 }
1128
1129 /* Write Plain Data and Get Cypher Data */
1130 if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
1131 {
1132 return HAL_TIMEOUT;
1133 }
1134
1135 /* Change the CRYP state */
1136 hcryp->State = HAL_CRYP_STATE_READY;
1137
1138 /* Process Unlocked */
1139 __HAL_UNLOCK(hcryp);
1140
1141 /* Return function status */
1142 return HAL_OK;
1143 }
1144
1145 /**
1146 * @brief Initializes the CRYP peripheral in AES ECB encryption mode using Interrupt.
1147 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
1148 * the configuration information for CRYP module
1149 * @param pPlainData Pointer to the plaintext buffer
1150 * @param Size Length of the plaintext buffer, must be a multiple of 16 bytes
1151 * @param pCypherData Pointer to the cyphertext buffer
1152 * @retval HAL status
1153 */
1154 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1155 {
1156 uint32_t inputaddr;
1157 uint32_t outputaddr;
1158
1159 if(hcryp->State == HAL_CRYP_STATE_READY)
1160 {
1161 /* Process Locked */
1162 __HAL_LOCK(hcryp);
1163
1164 hcryp->CrypInCount = Size;
1165 hcryp->pCrypInBuffPtr = pPlainData;
1166 hcryp->pCrypOutBuffPtr = pCypherData;
1167 hcryp->CrypOutCount = Size;
1168
1169 /* Change the CRYP state */
1170 hcryp->State = HAL_CRYP_STATE_BUSY;
1171
1172 /* Check if initialization phase has already been performed */
1173 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1174 {
1175 /* Set the key */
1176 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1177
1178 /* Set the CRYP peripheral in AES ECB mode */
1179 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB);
1180
1181 /* Flush FIFO */
1182 __HAL_CRYP_FIFO_FLUSH(hcryp);
1183
1184 /* Set the phase */
1185 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1186 }
1187
1188 /* Enable Interrupts */
1189 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
1190
1191 /* Enable CRYP */
1192 __HAL_CRYP_ENABLE(hcryp);
1193
1194 /* Return function status */
1195 return HAL_OK;
1196 }
1197 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
1198 {
1199 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1200 /* Write the Input block in the IN FIFO */
1201 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1202 inputaddr+=4U;
1203 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1204 inputaddr+=4U;
1205 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1206 inputaddr+=4U;
1207 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1208 hcryp->pCrypInBuffPtr += 16U;
1209 hcryp->CrypInCount -= 16U;
1210 if(hcryp->CrypInCount == 0U)
1211 {
1212 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
1213 /* Call the Input data transfer complete callback */
1214 HAL_CRYP_InCpltCallback(hcryp);
1215 }
1216 }
1217 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
1218 {
1219 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
1220 /* Read the Output block from the Output FIFO */
1221 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1222 outputaddr+=4U;
1223 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1224 outputaddr+=4U;
1225 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1226 outputaddr+=4U;
1227 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1228 hcryp->pCrypOutBuffPtr += 16U;
1229 hcryp->CrypOutCount -= 16U;
1230 if(hcryp->CrypOutCount == 0U)
1231 {
1232 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
1233 /* Process Locked */
1234 __HAL_UNLOCK(hcryp);
1235 /* Change the CRYP state */
1236 hcryp->State = HAL_CRYP_STATE_READY;
1237 /* Call Input transfer complete callback */
1238 HAL_CRYP_OutCpltCallback(hcryp);
1239 }
1240 }
1241
1242 /* Return function status */
1243 return HAL_OK;
1244 }
1245
1246 /**
1247 * @brief Initializes the CRYP peripheral in AES CBC encryption mode using Interrupt.
1248 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
1249 * the configuration information for CRYP module
1250 * @param pPlainData Pointer to the plaintext buffer
1251 * @param Size Length of the plaintext buffer, must be a multiple of 16 bytes
1252 * @param pCypherData Pointer to the cyphertext buffer
1253 * @retval HAL status
1254 */
1255 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1256 {
1257 uint32_t inputaddr;
1258 uint32_t outputaddr;
1259
1260 if(hcryp->State == HAL_CRYP_STATE_READY)
1261 {
1262 /* Process Locked */
1263 __HAL_LOCK(hcryp);
1264
1265 hcryp->CrypInCount = Size;
1266 hcryp->pCrypInBuffPtr = pPlainData;
1267 hcryp->pCrypOutBuffPtr = pCypherData;
1268 hcryp->CrypOutCount = Size;
1269
1270 /* Change the CRYP state */
1271 hcryp->State = HAL_CRYP_STATE_BUSY;
1272
1273 /* Check if initialization phase has already been performed */
1274 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1275 {
1276 /* Set the key */
1277 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1278
1279 /* Set the CRYP peripheral in AES CBC mode */
1280 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC);
1281
1282 /* Set the Initialization Vector */
1283 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1284
1285 /* Flush FIFO */
1286 __HAL_CRYP_FIFO_FLUSH(hcryp);
1287
1288 /* Set the phase */
1289 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1290 }
1291 /* Enable Interrupts */
1292 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
1293
1294 /* Enable CRYP */
1295 __HAL_CRYP_ENABLE(hcryp);
1296
1297 /* Return function status */
1298 return HAL_OK;
1299 }
1300 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
1301 {
1302 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1303 /* Write the Input block in the IN FIFO */
1304 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1305 inputaddr+=4U;
1306 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1307 inputaddr+=4U;
1308 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1309 inputaddr+=4U;
1310 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1311 hcryp->pCrypInBuffPtr += 16U;
1312 hcryp->CrypInCount -= 16U;
1313 if(hcryp->CrypInCount == 0U)
1314 {
1315 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
1316 /* Call the Input data transfer complete callback */
1317 HAL_CRYP_InCpltCallback(hcryp);
1318 }
1319 }
1320 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
1321 {
1322 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
1323 /* Read the Output block from the Output FIFO */
1324 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1325 outputaddr+=4U;
1326 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1327 outputaddr+=4U;
1328 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1329 outputaddr+=4U;
1330 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1331 hcryp->pCrypOutBuffPtr += 16U;
1332 hcryp->CrypOutCount -= 16U;
1333 if(hcryp->CrypOutCount == 0U)
1334 {
1335 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
1336 /* Process Locked */
1337 __HAL_UNLOCK(hcryp);
1338 /* Change the CRYP state */
1339 hcryp->State = HAL_CRYP_STATE_READY;
1340 /* Call Input transfer complete callback */
1341 HAL_CRYP_OutCpltCallback(hcryp);
1342 }
1343 }
1344
1345 /* Return function status */
1346 return HAL_OK;
1347 }
1348
1349 /**
1350 * @brief Initializes the CRYP peripheral in AES CTR encryption mode using Interrupt.
1351 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
1352 * the configuration information for CRYP module
1353 * @param pPlainData Pointer to the plaintext buffer
1354 * @param Size Length of the plaintext buffer, must be a multiple of 16 bytes
1355 * @param pCypherData Pointer to the cyphertext buffer
1356 * @retval HAL status
1357 */
1358 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1359 {
1360 uint32_t inputaddr;
1361 uint32_t outputaddr;
1362
1363 if(hcryp->State == HAL_CRYP_STATE_READY)
1364 {
1365 /* Process Locked */
1366 __HAL_LOCK(hcryp);
1367
1368 hcryp->CrypInCount = Size;
1369 hcryp->pCrypInBuffPtr = pPlainData;
1370 hcryp->pCrypOutBuffPtr = pCypherData;
1371 hcryp->CrypOutCount = Size;
1372
1373 /* Change the CRYP state */
1374 hcryp->State = HAL_CRYP_STATE_BUSY;
1375
1376 /* Check if initialization phase has already been performed */
1377 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1378 {
1379 /* Set the key */
1380 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1381
1382 /* Set the CRYP peripheral in AES CTR mode */
1383 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR);
1384
1385 /* Set the Initialization Vector */
1386 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1387
1388 /* Flush FIFO */
1389 __HAL_CRYP_FIFO_FLUSH(hcryp);
1390
1391 /* Set the phase */
1392 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1393 }
1394 /* Enable Interrupts */
1395 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
1396
1397 /* Enable CRYP */
1398 __HAL_CRYP_ENABLE(hcryp);
1399
1400 /* Return function status */
1401 return HAL_OK;
1402 }
1403 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
1404 {
1405 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1406 /* Write the Input block in the IN FIFO */
1407 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1408 inputaddr+=4U;
1409 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1410 inputaddr+=4U;
1411 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1412 inputaddr+=4U;
1413 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1414 hcryp->pCrypInBuffPtr += 16U;
1415 hcryp->CrypInCount -= 16U;
1416 if(hcryp->CrypInCount == 0U)
1417 {
1418 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
1419 /* Call the Input data transfer complete callback */
1420 HAL_CRYP_InCpltCallback(hcryp);
1421 }
1422 }
1423 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
1424 {
1425 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
1426 /* Read the Output block from the Output FIFO */
1427 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1428 outputaddr+=4U;
1429 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1430 outputaddr+=4U;
1431 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1432 outputaddr+=4U;
1433 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1434 hcryp->pCrypOutBuffPtr += 16U;
1435 hcryp->CrypOutCount -= 16U;
1436 if(hcryp->CrypOutCount == 0U)
1437 {
1438 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
1439 /* Process Unlocked */
1440 __HAL_UNLOCK(hcryp);
1441 /* Change the CRYP state */
1442 hcryp->State = HAL_CRYP_STATE_READY;
1443 /* Call Input transfer complete callback */
1444 HAL_CRYP_OutCpltCallback(hcryp);
1445 }
1446 }
1447
1448 /* Return function status */
1449 return HAL_OK;
1450 }
1451
1452
1453 /**
1454 * @brief Initializes the CRYP peripheral in AES ECB decryption mode using Interrupt.
1455 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
1456 * the configuration information for CRYP module
1457 * @param pCypherData Pointer to the cyphertext buffer
1458 * @param Size Length of the plaintext buffer, must be a multiple of 16.
1459 * @param pPlainData Pointer to the plaintext buffer
1460 * @retval HAL status
1461 */
1462 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
1463 {
1464 uint32_t tickstart = 0U;
1465
1466 uint32_t inputaddr;
1467 uint32_t outputaddr;
1468
1469 if(hcryp->State == HAL_CRYP_STATE_READY)
1470 {
1471 /* Process Locked */
1472 __HAL_LOCK(hcryp);
1473
1474 hcryp->CrypInCount = Size;
1475 hcryp->pCrypInBuffPtr = pCypherData;
1476 hcryp->pCrypOutBuffPtr = pPlainData;
1477 hcryp->CrypOutCount = Size;
1478
1479 /* Change the CRYP state */
1480 hcryp->State = HAL_CRYP_STATE_BUSY;
1481
1482 /* Check if initialization phase has already been performed */
1483 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1484 {
1485 /* Set the key */
1486 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1487
1488 /* Set the CRYP peripheral in AES Key mode */
1489 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR);
1490 /* Enable CRYP */
1491 __HAL_CRYP_ENABLE(hcryp);
1492
1493 /* Get tick */
1494 tickstart = HAL_GetTick();
1495
1496 while(HAL_IS_BIT_SET(hcryp->Instance->SR, CRYP_FLAG_BUSY))
1497 {
1498 /* Check for the Timeout */
1499 if((HAL_GetTick() - tickstart ) > CRYP_TIMEOUT_VALUE)
1500 {
1501 /* Change state */
1502 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
1503
1504 /* Process Unlocked */
1505 __HAL_UNLOCK(hcryp);
1506
1507 return HAL_TIMEOUT;
1508 }
1509 }
1510
1511 /* Reset the ALGOMODE bits*/
1512 CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE);
1513
1514 /* Set the CRYP peripheral in AES ECB decryption mode */
1515 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB | CRYP_CR_ALGODIR);
1516
1517 /* Flush FIFO */
1518 __HAL_CRYP_FIFO_FLUSH(hcryp);
1519
1520 /* Set the phase */
1521 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1522 }
1523
1524 /* Enable Interrupts */
1525 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
1526
1527 /* Enable CRYP */
1528 __HAL_CRYP_ENABLE(hcryp);
1529
1530 /* Return function status */
1531 return HAL_OK;
1532 }
1533 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
1534 {
1535 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1536 /* Write the Input block in the IN FIFO */
1537 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1538 inputaddr+=4U;
1539 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1540 inputaddr+=4U;
1541 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1542 inputaddr+=4U;
1543 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1544 hcryp->pCrypInBuffPtr += 16U;
1545 hcryp->CrypInCount -= 16U;
1546 if(hcryp->CrypInCount == 0U)
1547 {
1548 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
1549 /* Call the Input data transfer complete callback */
1550 HAL_CRYP_InCpltCallback(hcryp);
1551 }
1552 }
1553 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
1554 {
1555 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
1556 /* Read the Output block from the Output FIFO */
1557 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1558 outputaddr+=4U;
1559 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1560 outputaddr+=4U;
1561 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1562 outputaddr+=4U;
1563 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1564 hcryp->pCrypOutBuffPtr += 16U;
1565 hcryp->CrypOutCount -= 16U;
1566 if(hcryp->CrypOutCount == 0U)
1567 {
1568 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
1569 /* Process Unlocked */
1570 __HAL_UNLOCK(hcryp);
1571 /* Change the CRYP state */
1572 hcryp->State = HAL_CRYP_STATE_READY;
1573 /* Call Input transfer complete callback */
1574 HAL_CRYP_OutCpltCallback(hcryp);
1575 }
1576 }
1577
1578 /* Return function status */
1579 return HAL_OK;
1580 }
1581
1582 /**
1583 * @brief Initializes the CRYP peripheral in AES CBC decryption mode using IT.
1584 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
1585 * the configuration information for CRYP module
1586 * @param pCypherData Pointer to the cyphertext buffer
1587 * @param Size Length of the plaintext buffer, must be a multiple of 16
1588 * @param pPlainData Pointer to the plaintext buffer
1589 * @retval HAL status
1590 */
1591 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
1592 {
1593
1594 uint32_t tickstart = 0U;
1595 uint32_t inputaddr;
1596 uint32_t outputaddr;
1597
1598 if(hcryp->State == HAL_CRYP_STATE_READY)
1599 {
1600 /* Process Locked */
1601 __HAL_LOCK(hcryp);
1602
1603 /* Get the buffer addresses and sizes */
1604 hcryp->CrypInCount = Size;
1605 hcryp->pCrypInBuffPtr = pCypherData;
1606 hcryp->pCrypOutBuffPtr = pPlainData;
1607 hcryp->CrypOutCount = Size;
1608
1609 /* Change the CRYP state */
1610 hcryp->State = HAL_CRYP_STATE_BUSY;
1611
1612 /* Check if initialization phase has already been performed */
1613 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1614 {
1615 /* Set the key */
1616 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1617
1618 /* Set the CRYP peripheral in AES Key mode */
1619 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR);
1620
1621 /* Enable CRYP */
1622 __HAL_CRYP_ENABLE(hcryp);
1623
1624 /* Get tick */
1625 tickstart = HAL_GetTick();
1626
1627 while(HAL_IS_BIT_SET(hcryp->Instance->SR, CRYP_FLAG_BUSY))
1628 {
1629 /* Check for the Timeout */
1630 if((HAL_GetTick() - tickstart ) > CRYP_TIMEOUT_VALUE)
1631 {
1632 /* Change state */
1633 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
1634
1635 /* Process Unlocked */
1636 __HAL_UNLOCK(hcryp);
1637
1638 return HAL_TIMEOUT;
1639 }
1640 }
1641
1642 /* Reset the ALGOMODE bits*/
1643 CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE);
1644
1645 /* Set the CRYP peripheral in AES CBC decryption mode */
1646 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC | CRYP_CR_ALGODIR);
1647
1648 /* Set the Initialization Vector */
1649 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1650
1651 /* Flush FIFO */
1652 __HAL_CRYP_FIFO_FLUSH(hcryp);
1653
1654 /* Enable CRYP */
1655 __HAL_CRYP_ENABLE(hcryp);
1656
1657 /* Set the phase */
1658 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1659 }
1660
1661 /* Enable Interrupts */
1662 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
1663
1664 /* Enable CRYP */
1665 __HAL_CRYP_ENABLE(hcryp);
1666
1667 /* Return function status */
1668 return HAL_OK;
1669 }
1670 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
1671 {
1672 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1673 /* Write the Input block in the IN FIFO */
1674 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1675 inputaddr+=4U;
1676 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1677 inputaddr+=4U;
1678 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1679 inputaddr+=4U;
1680 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1681 hcryp->pCrypInBuffPtr += 16U;
1682 hcryp->CrypInCount -= 16U;
1683 if(hcryp->CrypInCount == 0U)
1684 {
1685 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
1686 /* Call the Input data transfer complete callback */
1687 HAL_CRYP_InCpltCallback(hcryp);
1688 }
1689 }
1690 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
1691 {
1692 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
1693 /* Read the Output block from the Output FIFO */
1694 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1695 outputaddr+=4U;
1696 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1697 outputaddr+=4U;
1698 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1699 outputaddr+=4U;
1700 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1701 hcryp->pCrypOutBuffPtr += 16U;
1702 hcryp->CrypOutCount -= 16U;
1703 if(hcryp->CrypOutCount == 0U)
1704 {
1705 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
1706 /* Process Unlocked */
1707 __HAL_UNLOCK(hcryp);
1708 /* Change the CRYP state */
1709 hcryp->State = HAL_CRYP_STATE_READY;
1710 /* Call Input transfer complete callback */
1711 HAL_CRYP_OutCpltCallback(hcryp);
1712 }
1713 }
1714
1715 /* Return function status */
1716 return HAL_OK;
1717 }
1718
1719 /**
1720 * @brief Initializes the CRYP peripheral in AES CTR decryption mode using Interrupt.
1721 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
1722 * the configuration information for CRYP module
1723 * @param pCypherData Pointer to the cyphertext buffer
1724 * @param Size Length of the plaintext buffer, must be a multiple of 16
1725 * @param pPlainData Pointer to the plaintext buffer
1726 * @retval HAL status
1727 */
1728 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
1729 {
1730 uint32_t inputaddr;
1731 uint32_t outputaddr;
1732
1733 if(hcryp->State == HAL_CRYP_STATE_READY)
1734 {
1735 /* Process Locked */
1736 __HAL_LOCK(hcryp);
1737
1738 /* Get the buffer addresses and sizes */
1739 hcryp->CrypInCount = Size;
1740 hcryp->pCrypInBuffPtr = pCypherData;
1741 hcryp->pCrypOutBuffPtr = pPlainData;
1742 hcryp->CrypOutCount = Size;
1743
1744 /* Change the CRYP state */
1745 hcryp->State = HAL_CRYP_STATE_BUSY;
1746
1747 /* Check if initialization phase has already been performed */
1748 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1749 {
1750 /* Set the key */
1751 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1752
1753 /* Set the CRYP peripheral in AES CTR mode */
1754 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR | CRYP_CR_ALGODIR);
1755
1756 /* Set the Initialization Vector */
1757 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1758
1759 /* Flush FIFO */
1760 __HAL_CRYP_FIFO_FLUSH(hcryp);
1761
1762 /* Set the phase */
1763 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1764 }
1765
1766 /* Enable Interrupts */
1767 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
1768
1769 /* Enable CRYP */
1770 __HAL_CRYP_ENABLE(hcryp);
1771
1772 /* Return function status */
1773 return HAL_OK;
1774 }
1775 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
1776 {
1777 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1778 /* Write the Input block in the IN FIFO */
1779 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1780 inputaddr+=4U;
1781 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1782 inputaddr+=4U;
1783 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1784 inputaddr+=4U;
1785 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1786 hcryp->pCrypInBuffPtr += 16U;
1787 hcryp->CrypInCount -= 16U;
1788 if(hcryp->CrypInCount == 0U)
1789 {
1790 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
1791 /* Call the Input data transfer complete callback */
1792 HAL_CRYP_InCpltCallback(hcryp);
1793 }
1794 }
1795 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
1796 {
1797 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
1798 /* Read the Output block from the Output FIFO */
1799 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1800 outputaddr+=4U;
1801 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1802 outputaddr+=4U;
1803 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1804 outputaddr+=4U;
1805 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1806 hcryp->pCrypOutBuffPtr += 16U;
1807 hcryp->CrypOutCount -= 16U;
1808 if(hcryp->CrypOutCount == 0U)
1809 {
1810 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
1811 /* Process Unlocked */
1812 __HAL_UNLOCK(hcryp);
1813 /* Change the CRYP state */
1814 hcryp->State = HAL_CRYP_STATE_READY;
1815 /* Call Input transfer complete callback */
1816 HAL_CRYP_OutCpltCallback(hcryp);
1817 }
1818 }
1819
1820 /* Return function status */
1821 return HAL_OK;
1822 }
1823
1824 /**
1825 * @brief Initializes the CRYP peripheral in AES ECB encryption mode using DMA.
1826 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
1827 * the configuration information for CRYP module
1828 * @param pPlainData Pointer to the plaintext buffer
1829 * @param Size Length of the plaintext buffer, must be a multiple of 16 bytes
1830 * @param pCypherData Pointer to the cyphertext buffer
1831 * @retval HAL status
1832 */
1833 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1834 {
1835 uint32_t inputaddr;
1836 uint32_t outputaddr;
1837
1838 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
1839 {
1840 /* Process Locked */
1841 __HAL_LOCK(hcryp);
1842
1843 inputaddr = (uint32_t)pPlainData;
1844 outputaddr = (uint32_t)pCypherData;
1845
1846 /* Change the CRYP state */
1847 hcryp->State = HAL_CRYP_STATE_BUSY;
1848
1849 /* Check if initialization phase has already been performed */
1850 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1851 {
1852 /* Set the key */
1853 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1854
1855 /* Set the CRYP peripheral in AES ECB mode */
1856 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB);
1857
1858 /* Flush FIFO */
1859 __HAL_CRYP_FIFO_FLUSH(hcryp);
1860
1861 /* Set the phase */
1862 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1863 }
1864 /* Set the input and output addresses and start DMA transfer */
1865 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
1866
1867 /* Process Unlocked */
1868 __HAL_UNLOCK(hcryp);
1869
1870 /* Return function status */
1871 return HAL_OK;
1872 }
1873 else
1874 {
1875 return HAL_ERROR;
1876 }
1877 }
1878
1879 /**
1880 * @brief Initializes the CRYP peripheral in AES CBC encryption mode using DMA.
1881 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
1882 * the configuration information for CRYP module
1883 * @param pPlainData Pointer to the plaintext buffer
1884 * @param Size Length of the plaintext buffer, must be a multiple of 16.
1885 * @param pCypherData Pointer to the cyphertext buffer
1886 * @retval HAL status
1887 */
1888 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1889 {
1890 uint32_t inputaddr;
1891 uint32_t outputaddr;
1892
1893 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
1894 {
1895 /* Process Locked */
1896 __HAL_LOCK(hcryp);
1897
1898 inputaddr = (uint32_t)pPlainData;
1899 outputaddr = (uint32_t)pCypherData;
1900
1901 /* Change the CRYP state */
1902 hcryp->State = HAL_CRYP_STATE_BUSY;
1903
1904 /* Check if initialization phase has already been performed */
1905 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1906 {
1907 /* Set the key */
1908 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1909
1910 /* Set the CRYP peripheral in AES ECB mode */
1911 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC);
1912
1913 /* Set the Initialization Vector */
1914 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1915
1916 /* Flush FIFO */
1917 __HAL_CRYP_FIFO_FLUSH(hcryp);
1918
1919 /* Set the phase */
1920 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1921 }
1922 /* Set the input and output addresses and start DMA transfer */
1923 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
1924
1925 /* Process Unlocked */
1926 __HAL_UNLOCK(hcryp);
1927
1928 /* Return function status */
1929 return HAL_OK;
1930 }
1931 else
1932 {
1933 return HAL_ERROR;
1934 }
1935 }
1936
1937 /**
1938 * @brief Initializes the CRYP peripheral in AES CTR encryption mode using DMA.
1939 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
1940 * the configuration information for CRYP module
1941 * @param pPlainData Pointer to the plaintext buffer
1942 * @param Size Length of the plaintext buffer, must be a multiple of 16.
1943 * @param pCypherData Pointer to the cyphertext buffer
1944 * @retval HAL status
1945 */
1946 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1947 {
1948 uint32_t inputaddr;
1949 uint32_t outputaddr;
1950
1951 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
1952 {
1953 /* Process Locked */
1954 __HAL_LOCK(hcryp);
1955
1956 inputaddr = (uint32_t)pPlainData;
1957 outputaddr = (uint32_t)pCypherData;
1958
1959 /* Change the CRYP state */
1960 hcryp->State = HAL_CRYP_STATE_BUSY;
1961
1962 /* Check if initialization phase has already been performed */
1963 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1964 {
1965 /* Set the key */
1966 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1967
1968 /* Set the CRYP peripheral in AES ECB mode */
1969 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR);
1970
1971 /* Set the Initialization Vector */
1972 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1973
1974 /* Flush FIFO */
1975 __HAL_CRYP_FIFO_FLUSH(hcryp);
1976
1977 /* Set the phase */
1978 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1979 }
1980
1981 /* Set the input and output addresses and start DMA transfer */
1982 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
1983
1984 /* Process Unlocked */
1985 __HAL_UNLOCK(hcryp);
1986
1987 /* Return function status */
1988 return HAL_OK;
1989 }
1990 else
1991 {
1992 return HAL_ERROR;
1993 }
1994 }
1995
1996 /**
1997 * @brief Initializes the CRYP peripheral in AES ECB decryption mode using DMA.
1998 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
1999 * the configuration information for CRYP module
2000 * @param pCypherData Pointer to the cyphertext buffer
2001 * @param Size Length of the plaintext buffer, must be a multiple of 16 bytes
2002 * @param pPlainData Pointer to the plaintext buffer
2003 * @retval HAL status
2004 */
2005 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
2006 {
2007 uint32_t tickstart = 0U;
2008 uint32_t inputaddr;
2009 uint32_t outputaddr;
2010
2011 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
2012 {
2013 /* Process Locked */
2014 __HAL_LOCK(hcryp);
2015
2016 inputaddr = (uint32_t)pCypherData;
2017 outputaddr = (uint32_t)pPlainData;
2018
2019 /* Change the CRYP state */
2020 hcryp->State = HAL_CRYP_STATE_BUSY;
2021
2022 /* Check if initialization phase has already been performed */
2023 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
2024 {
2025 /* Set the key */
2026 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
2027
2028 /* Set the CRYP peripheral in AES Key mode */
2029 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR);
2030
2031 /* Enable CRYP */
2032 __HAL_CRYP_ENABLE(hcryp);
2033
2034 /* Get tick */
2035 tickstart = HAL_GetTick();
2036
2037 while(HAL_IS_BIT_SET(hcryp->Instance->SR, CRYP_FLAG_BUSY))
2038 {
2039 /* Check for the Timeout */
2040 if((HAL_GetTick() - tickstart ) > CRYP_TIMEOUT_VALUE)
2041 {
2042 /* Change state */
2043 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
2044
2045 /* Process Unlocked */
2046 __HAL_UNLOCK(hcryp);
2047
2048 return HAL_TIMEOUT;
2049 }
2050 }
2051
2052 /* Reset the ALGOMODE bits*/
2053 CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE);
2054
2055 /* Set the CRYP peripheral in AES ECB decryption mode */
2056 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB | CRYP_CR_ALGODIR);
2057
2058 /* Flush FIFO */
2059 __HAL_CRYP_FIFO_FLUSH(hcryp);
2060
2061 /* Set the phase */
2062 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
2063 }
2064
2065 /* Set the input and output addresses and start DMA transfer */
2066 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
2067
2068 /* Process Unlocked */
2069 __HAL_UNLOCK(hcryp);
2070
2071 /* Return function status */
2072 return HAL_OK;
2073 }
2074 else
2075 {
2076 return HAL_ERROR;
2077 }
2078 }
2079
2080 /**
2081 * @brief Initializes the CRYP peripheral in AES CBC encryption mode using DMA.
2082 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
2083 * the configuration information for CRYP module
2084 * @param pCypherData Pointer to the cyphertext buffer
2085 * @param Size Length of the plaintext buffer, must be a multiple of 16 bytes
2086 * @param pPlainData Pointer to the plaintext buffer
2087 * @retval HAL status
2088 */
2089 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
2090 {
2091 uint32_t tickstart = 0U;
2092 uint32_t inputaddr;
2093 uint32_t outputaddr;
2094
2095 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
2096 {
2097 /* Process Locked */
2098 __HAL_LOCK(hcryp);
2099
2100 inputaddr = (uint32_t)pCypherData;
2101 outputaddr = (uint32_t)pPlainData;
2102
2103 /* Change the CRYP state */
2104 hcryp->State = HAL_CRYP_STATE_BUSY;
2105
2106 /* Check if initialization phase has already been performed */
2107 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
2108 {
2109 /* Set the key */
2110 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
2111
2112 /* Set the CRYP peripheral in AES Key mode */
2113 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR);
2114
2115 /* Enable CRYP */
2116 __HAL_CRYP_ENABLE(hcryp);
2117
2118 /* Get tick */
2119 tickstart = HAL_GetTick();
2120
2121 while(HAL_IS_BIT_SET(hcryp->Instance->SR, CRYP_FLAG_BUSY))
2122 {
2123 /* Check for the Timeout */
2124 if((HAL_GetTick() - tickstart ) > CRYP_TIMEOUT_VALUE)
2125 {
2126 /* Change state */
2127 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
2128
2129 /* Process Unlocked */
2130 __HAL_UNLOCK(hcryp);
2131
2132 return HAL_TIMEOUT;
2133 }
2134 }
2135
2136 /* Reset the ALGOMODE bits*/
2137 CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE);
2138
2139 /* Set the CRYP peripheral in AES CBC decryption mode */
2140 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC | CRYP_CR_ALGODIR);
2141
2142 /* Set the Initialization Vector */
2143 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
2144
2145 /* Flush FIFO */
2146 __HAL_CRYP_FIFO_FLUSH(hcryp);
2147
2148 /* Set the phase */
2149 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
2150 }
2151
2152 /* Set the input and output addresses and start DMA transfer */
2153 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
2154
2155 /* Process Unlocked */
2156 __HAL_UNLOCK(hcryp);
2157
2158 /* Return function status */
2159 return HAL_OK;
2160 }
2161 else
2162 {
2163 return HAL_ERROR;
2164 }
2165 }
2166
2167 /**
2168 * @brief Initializes the CRYP peripheral in AES CTR decryption mode using DMA.
2169 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
2170 * the configuration information for CRYP module
2171 * @param pCypherData Pointer to the cyphertext buffer
2172 * @param Size Length of the plaintext buffer, must be a multiple of 16
2173 * @param pPlainData Pointer to the plaintext buffer
2174 * @retval HAL status
2175 */
2176 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
2177 {
2178 uint32_t inputaddr;
2179 uint32_t outputaddr;
2180
2181 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
2182 {
2183 /* Process Locked */
2184 __HAL_LOCK(hcryp);
2185
2186 inputaddr = (uint32_t)pCypherData;
2187 outputaddr = (uint32_t)pPlainData;
2188
2189 /* Change the CRYP state */
2190 hcryp->State = HAL_CRYP_STATE_BUSY;
2191
2192 /* Check if initialization phase has already been performed */
2193 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
2194 {
2195 /* Set the key */
2196 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
2197
2198 /* Set the CRYP peripheral in AES CTR mode */
2199 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR | CRYP_CR_ALGODIR);
2200
2201 /* Set the Initialization Vector */
2202 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
2203
2204 /* Flush FIFO */
2205 __HAL_CRYP_FIFO_FLUSH(hcryp);
2206
2207 /* Set the phase */
2208 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
2209 }
2210
2211 /* Set the input and output addresses and start DMA transfer */
2212 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
2213
2214 /* Process Unlocked */
2215 __HAL_UNLOCK(hcryp);
2216
2217 /* Return function status */
2218 return HAL_OK;
2219 }
2220 else
2221 {
2222 return HAL_ERROR;
2223 }
2224 }
2225
2226
2227 /**
2228 * @}
2229 */
2230
2231 /** @defgroup CRYP_Exported_Functions_Group3 DES processing functions
2232 * @brief processing functions.
2233 *
2234 @verbatim
2235 ==============================================================================
2236 ##### DES processing functions #####
2237 ==============================================================================
2238 [..] This section provides functions allowing to:
2239 (+) Encrypt plaintext using DES using ECB or CBC chaining modes
2240 (+) Decrypt cyphertext using ECB or CBC chaining modes
2241 [..] Three processing functions are available:
2242 (+) Polling mode
2243 (+) Interrupt mode
2244 (+) DMA mode
2245
2246 @endverbatim
2247 * @{
2248 */
2249
2250 /**
2251 * @brief Initializes the CRYP peripheral in DES ECB encryption mode.
2252 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
2253 * the configuration information for CRYP module
2254 * @param pPlainData Pointer to the plaintext buffer
2255 * @param Size Length of the plaintext buffer, must be a multiple of 8
2256 * @param pCypherData Pointer to the cyphertext buffer
2257 * @param Timeout Specify Timeout value
2258 * @retval HAL status
2259 */
2260 HAL_StatusTypeDef HAL_CRYP_DESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
2261 {
2262 /* Process Locked */
2263 __HAL_LOCK(hcryp);
2264
2265 /* Change the CRYP state */
2266 hcryp->State = HAL_CRYP_STATE_BUSY;
2267
2268 /* Set CRYP peripheral in DES ECB encryption mode */
2269 CRYP_SetDESECBMode(hcryp, 0U);
2270
2271 /* Enable CRYP */
2272 __HAL_CRYP_ENABLE(hcryp);
2273
2274 /* Write Plain Data and Get Cypher Data */
2275 if(CRYP_ProcessData2Words(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
2276 {
2277 return HAL_TIMEOUT;
2278 }
2279
2280 /* Change the CRYP state */
2281 hcryp->State = HAL_CRYP_STATE_READY;
2282
2283 /* Process Unlocked */
2284 __HAL_UNLOCK(hcryp);
2285
2286 /* Return function status */
2287 return HAL_OK;
2288 }
2289
2290 /**
2291 * @brief Initializes the CRYP peripheral in DES ECB decryption mode.
2292 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
2293 * the configuration information for CRYP module
2294 * @param pCypherData Pointer to the cyphertext buffer
2295 * @param Size Length of the plaintext buffer, must be a multiple of 8
2296 * @param pPlainData Pointer to the plaintext buffer
2297 * @param Timeout Specify Timeout value
2298 * @retval HAL status
2299 */
2300 HAL_StatusTypeDef HAL_CRYP_DESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
2301 {
2302 /* Process Locked */
2303 __HAL_LOCK(hcryp);
2304
2305 /* Change the CRYP state */
2306 hcryp->State = HAL_CRYP_STATE_BUSY;
2307
2308 /* Set CRYP peripheral in DES ECB decryption mode */
2309 CRYP_SetDESECBMode(hcryp, CRYP_CR_ALGODIR);
2310
2311 /* Enable CRYP */
2312 __HAL_CRYP_ENABLE(hcryp);
2313
2314 /* Write Plain Data and Get Cypher Data */
2315 if(CRYP_ProcessData2Words(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
2316 {
2317 return HAL_TIMEOUT;
2318 }
2319
2320 /* Change the CRYP state */
2321 hcryp->State = HAL_CRYP_STATE_READY;
2322
2323 /* Process Unlocked */
2324 __HAL_UNLOCK(hcryp);
2325
2326 /* Return function status */
2327 return HAL_OK;
2328 }
2329
2330 /**
2331 * @brief Initializes the CRYP peripheral in DES CBC encryption mode.
2332 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
2333 * the configuration information for CRYP module
2334 * @param pPlainData Pointer to the plaintext buffer
2335 * @param Size Length of the plaintext buffer, must be a multiple of 8
2336 * @param pCypherData Pointer to the cyphertext buffer
2337 * @param Timeout Specify Timeout value
2338 * @retval HAL status
2339 */
2340 HAL_StatusTypeDef HAL_CRYP_DESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
2341 {
2342 /* Process Locked */
2343 __HAL_LOCK(hcryp);
2344
2345 /* Change the CRYP state */
2346 hcryp->State = HAL_CRYP_STATE_BUSY;
2347
2348 /* Set CRYP peripheral in DES CBC encryption mode */
2349 CRYP_SetDESCBCMode(hcryp, 0U);
2350
2351 /* Enable CRYP */
2352 __HAL_CRYP_ENABLE(hcryp);
2353
2354 /* Write Plain Data and Get Cypher Data */
2355 if(CRYP_ProcessData2Words(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
2356 {
2357 return HAL_TIMEOUT;
2358 }
2359
2360 /* Change the CRYP state */
2361 hcryp->State = HAL_CRYP_STATE_READY;
2362
2363 /* Process Unlocked */
2364 __HAL_UNLOCK(hcryp);
2365
2366 /* Return function status */
2367 return HAL_OK;
2368 }
2369
2370 /**
2371 * @brief Initializes the CRYP peripheral in DES ECB decryption mode.
2372 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
2373 * the configuration information for CRYP module
2374 * @param pCypherData Pointer to the cyphertext buffer
2375 * @param Size Length of the plaintext buffer, must be a multiple of 8
2376 * @param pPlainData Pointer to the plaintext buffer
2377 * @param Timeout Specify Timeout value
2378 * @retval HAL status
2379 */
2380 HAL_StatusTypeDef HAL_CRYP_DESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
2381 {
2382 /* Process Locked */
2383 __HAL_LOCK(hcryp);
2384
2385 /* Change the CRYP state */
2386 hcryp->State = HAL_CRYP_STATE_BUSY;
2387
2388 /* Set CRYP peripheral in DES CBC decryption mode */
2389 CRYP_SetDESCBCMode(hcryp, CRYP_CR_ALGODIR);
2390
2391 /* Enable CRYP */
2392 __HAL_CRYP_ENABLE(hcryp);
2393
2394 /* Write Plain Data and Get Cypher Data */
2395 if(CRYP_ProcessData2Words(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
2396 {
2397 return HAL_TIMEOUT;
2398 }
2399
2400 /* Change the CRYP state */
2401 hcryp->State = HAL_CRYP_STATE_READY;
2402
2403 /* Process Unlocked */
2404 __HAL_UNLOCK(hcryp);
2405
2406 /* Return function status */
2407 return HAL_OK;
2408 }
2409
2410 /**
2411 * @brief Initializes the CRYP peripheral in DES ECB encryption mode using IT.
2412 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
2413 * the configuration information for CRYP module
2414 * @param pPlainData Pointer to the plaintext buffer
2415 * @param Size Length of the plaintext buffer, must be a multiple of 8
2416 * @param pCypherData Pointer to the cyphertext buffer
2417 * @retval HAL status
2418 */
2419 HAL_StatusTypeDef HAL_CRYP_DESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
2420 {
2421 uint32_t inputaddr;
2422 uint32_t outputaddr;
2423
2424 if(hcryp->State == HAL_CRYP_STATE_READY)
2425 {
2426 /* Process Locked */
2427 __HAL_LOCK(hcryp);
2428
2429 hcryp->CrypInCount = Size;
2430 hcryp->pCrypInBuffPtr = pPlainData;
2431 hcryp->pCrypOutBuffPtr = pCypherData;
2432 hcryp->CrypOutCount = Size;
2433
2434 /* Change the CRYP state */
2435 hcryp->State = HAL_CRYP_STATE_BUSY;
2436
2437 /* Set CRYP peripheral in DES ECB encryption mode */
2438 CRYP_SetDESECBMode(hcryp, 0U);
2439
2440 /* Enable Interrupts */
2441 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
2442
2443 /* Enable CRYP */
2444 __HAL_CRYP_ENABLE(hcryp);
2445
2446 /* Return function status */
2447 return HAL_OK;
2448 }
2449 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
2450 {
2451 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
2452 /* Write the Input block in the IN FIFO */
2453 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
2454 inputaddr+=4U;
2455 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
2456
2457 hcryp->pCrypInBuffPtr += 8U;
2458 hcryp->CrypInCount -= 8U;
2459 if(hcryp->CrypInCount == 0U)
2460 {
2461 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
2462 /* Call the Input data transfer complete callback */
2463 HAL_CRYP_InCpltCallback(hcryp);
2464 }
2465 }
2466 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
2467 {
2468 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
2469 /* Read the Output block from the Output FIFO */
2470 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
2471 outputaddr+=4U;
2472 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
2473
2474 hcryp->pCrypOutBuffPtr += 8U;
2475 hcryp->CrypOutCount -= 8U;
2476 if(hcryp->CrypOutCount == 0U)
2477 {
2478 /* Disable IT */
2479 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
2480 /* Disable CRYP */
2481 __HAL_CRYP_DISABLE(hcryp);
2482 /* Process Unlocked */
2483 __HAL_UNLOCK(hcryp);
2484 /* Change the CRYP state */
2485 hcryp->State = HAL_CRYP_STATE_READY;
2486 /* Call Input transfer complete callback */
2487 HAL_CRYP_OutCpltCallback(hcryp);
2488 }
2489 }
2490
2491 /* Return function status */
2492 return HAL_OK;
2493 }
2494
2495 /**
2496 * @brief Initializes the CRYP peripheral in DES CBC encryption mode using interrupt.
2497 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
2498 * the configuration information for CRYP module
2499 * @param pPlainData Pointer to the plaintext buffer
2500 * @param Size Length of the plaintext buffer, must be a multiple of 8
2501 * @param pCypherData Pointer to the cyphertext buffer
2502 * @retval HAL status
2503 */
2504 HAL_StatusTypeDef HAL_CRYP_DESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
2505 {
2506 uint32_t inputaddr;
2507 uint32_t outputaddr;
2508
2509 if(hcryp->State == HAL_CRYP_STATE_READY)
2510 {
2511 /* Process Locked */
2512 __HAL_LOCK(hcryp);
2513
2514 hcryp->CrypInCount = Size;
2515 hcryp->pCrypInBuffPtr = pPlainData;
2516 hcryp->pCrypOutBuffPtr = pCypherData;
2517 hcryp->CrypOutCount = Size;
2518
2519 /* Change the CRYP state */
2520 hcryp->State = HAL_CRYP_STATE_BUSY;
2521
2522 /* Set CRYP peripheral in DES CBC encryption mode */
2523 CRYP_SetDESCBCMode(hcryp, 0U);
2524
2525 /* Enable Interrupts */
2526 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
2527
2528 /* Enable CRYP */
2529 __HAL_CRYP_ENABLE(hcryp);
2530
2531 /* Return function status */
2532 return HAL_OK;
2533 }
2534
2535 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
2536 {
2537 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
2538 /* Write the Input block in the IN FIFO */
2539 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
2540 inputaddr+=4U;
2541 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
2542
2543 hcryp->pCrypInBuffPtr += 8U;
2544 hcryp->CrypInCount -= 8U;
2545 if(hcryp->CrypInCount == 0U)
2546 {
2547 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
2548 /* Call the Input data transfer complete callback */
2549 HAL_CRYP_InCpltCallback(hcryp);
2550 }
2551 }
2552 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
2553 {
2554 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
2555 /* Read the Output block from the Output FIFO */
2556 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
2557 outputaddr+=4U;
2558 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
2559
2560 hcryp->pCrypOutBuffPtr += 8U;
2561 hcryp->CrypOutCount -= 8U;
2562 if(hcryp->CrypOutCount == 0U)
2563 {
2564 /* Disable IT */
2565 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
2566 /* Disable CRYP */
2567 __HAL_CRYP_DISABLE(hcryp);
2568 /* Process Unlocked */
2569 __HAL_UNLOCK(hcryp);
2570 /* Change the CRYP state */
2571 hcryp->State = HAL_CRYP_STATE_READY;
2572 /* Call Input transfer complete callback */
2573 HAL_CRYP_OutCpltCallback(hcryp);
2574 }
2575 }
2576
2577 /* Return function status */
2578 return HAL_OK;
2579 }
2580
2581 /**
2582 * @brief Initializes the CRYP peripheral in DES ECB decryption mode using IT.
2583 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
2584 * the configuration information for CRYP module
2585 * @param pPlainData Pointer to the plaintext buffer
2586 * @param Size Length of the plaintext buffer, must be a multiple of 8
2587 * @param pCypherData Pointer to the cyphertext buffer
2588 * @retval HAL status
2589 */
2590 HAL_StatusTypeDef HAL_CRYP_DESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
2591 {
2592 uint32_t inputaddr;
2593 uint32_t outputaddr;
2594
2595 if(hcryp->State == HAL_CRYP_STATE_READY)
2596 {
2597 /* Process Locked */
2598 __HAL_LOCK(hcryp);
2599
2600 hcryp->CrypInCount = Size;
2601 hcryp->pCrypInBuffPtr = pCypherData;
2602 hcryp->pCrypOutBuffPtr = pPlainData;
2603 hcryp->CrypOutCount = Size;
2604
2605 /* Change the CRYP state */
2606 hcryp->State = HAL_CRYP_STATE_BUSY;
2607
2608 /* Set CRYP peripheral in DES ECB decryption mode */
2609 CRYP_SetDESECBMode(hcryp, CRYP_CR_ALGODIR);
2610
2611 /* Enable Interrupts */
2612 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
2613
2614 /* Enable CRYP */
2615 __HAL_CRYP_ENABLE(hcryp);
2616
2617 /* Return function status */
2618 return HAL_OK;
2619 }
2620 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
2621 {
2622 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
2623 /* Write the Input block in the IN FIFO */
2624 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
2625 inputaddr+=4U;
2626 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
2627
2628 hcryp->pCrypInBuffPtr += 8U;
2629 hcryp->CrypInCount -= 8U;
2630 if(hcryp->CrypInCount == 0U)
2631 {
2632 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
2633 /* Call the Input data transfer complete callback */
2634 HAL_CRYP_InCpltCallback(hcryp);
2635 }
2636 }
2637 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
2638 {
2639 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
2640 /* Read the Output block from the Output FIFO */
2641 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
2642 outputaddr+=4U;
2643 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
2644
2645 hcryp->pCrypOutBuffPtr += 8U;
2646 hcryp->CrypOutCount -= 8U;
2647 if(hcryp->CrypOutCount == 0U)
2648 {
2649 /* Disable IT */
2650 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
2651 /* Disable CRYP */
2652 __HAL_CRYP_DISABLE(hcryp);
2653 /* Process Unlocked */
2654 __HAL_UNLOCK(hcryp);
2655 /* Change the CRYP state */
2656 hcryp->State = HAL_CRYP_STATE_READY;
2657 /* Call Input transfer complete callback */
2658 HAL_CRYP_OutCpltCallback(hcryp);
2659 }
2660 }
2661
2662 /* Return function status */
2663 return HAL_OK;
2664 }
2665
2666 /**
2667 * @brief Initializes the CRYP peripheral in DES ECB decryption mode using interrupt.
2668 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
2669 * the configuration information for CRYP module
2670 * @param pPlainData Pointer to the plaintext buffer
2671 * @param Size Length of the plaintext buffer, must be a multiple of 8
2672 * @param pCypherData Pointer to the cyphertext buffer
2673 * @retval HAL status
2674 */
2675 HAL_StatusTypeDef HAL_CRYP_DESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
2676 {
2677 uint32_t inputaddr;
2678 uint32_t outputaddr;
2679
2680 if(hcryp->State == HAL_CRYP_STATE_READY)
2681 {
2682 /* Process Locked */
2683 __HAL_LOCK(hcryp);
2684
2685 hcryp->CrypInCount = Size;
2686 hcryp->pCrypInBuffPtr = pCypherData;
2687 hcryp->pCrypOutBuffPtr = pPlainData;
2688 hcryp->CrypOutCount = Size;
2689
2690 /* Change the CRYP state */
2691 hcryp->State = HAL_CRYP_STATE_BUSY;
2692
2693 /* Set CRYP peripheral in DES CBC decryption mode */
2694 CRYP_SetDESCBCMode(hcryp, CRYP_CR_ALGODIR);
2695
2696 /* Enable Interrupts */
2697 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
2698
2699 /* Enable CRYP */
2700 __HAL_CRYP_ENABLE(hcryp);
2701
2702 /* Return function status */
2703 return HAL_OK;
2704 }
2705 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
2706 {
2707 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
2708 /* Write the Input block in the IN FIFO */
2709 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
2710 inputaddr+=4U;
2711 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
2712
2713 hcryp->pCrypInBuffPtr += 8U;
2714 hcryp->CrypInCount -= 8U;
2715 if(hcryp->CrypInCount == 0U)
2716 {
2717 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
2718 /* Call the Input data transfer complete callback */
2719 HAL_CRYP_InCpltCallback(hcryp);
2720 }
2721 }
2722 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
2723 {
2724 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
2725 /* Read the Output block from the Output FIFO */
2726 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
2727 outputaddr+=4U;
2728 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
2729
2730 hcryp->pCrypOutBuffPtr += 8U;
2731 hcryp->CrypOutCount -= 8U;
2732 if(hcryp->CrypOutCount == 0U)
2733 {
2734 /* Disable IT */
2735 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
2736 /* Disable CRYP */
2737 __HAL_CRYP_DISABLE(hcryp);
2738 /* Process Unlocked */
2739 __HAL_UNLOCK(hcryp);
2740 /* Change the CRYP state */
2741 hcryp->State = HAL_CRYP_STATE_READY;
2742 /* Call Input transfer complete callback */
2743 HAL_CRYP_OutCpltCallback(hcryp);
2744 }
2745 }
2746
2747 /* Return function status */
2748 return HAL_OK;
2749 }
2750
2751 /**
2752 * @brief Initializes the CRYP peripheral in DES ECB encryption mode using DMA.
2753 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
2754 * the configuration information for CRYP module
2755 * @param pPlainData Pointer to the plaintext buffer
2756 * @param Size Length of the plaintext buffer, must be a multiple of 8
2757 * @param pCypherData Pointer to the cyphertext buffer
2758 * @retval HAL status
2759 */
2760 HAL_StatusTypeDef HAL_CRYP_DESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
2761 {
2762 uint32_t inputaddr;
2763 uint32_t outputaddr;
2764
2765 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
2766 {
2767 /* Process Locked */
2768 __HAL_LOCK(hcryp);
2769
2770 inputaddr = (uint32_t)pPlainData;
2771 outputaddr = (uint32_t)pCypherData;
2772
2773 /* Change the CRYP state */
2774 hcryp->State = HAL_CRYP_STATE_BUSY;
2775
2776 /* Set CRYP peripheral in DES ECB encryption mode */
2777 CRYP_SetDESECBMode(hcryp, 0U);
2778
2779 /* Set the input and output addresses and start DMA transfer */
2780 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
2781
2782 /* Process Unlocked */
2783 __HAL_UNLOCK(hcryp);
2784
2785 /* Return function status */
2786 return HAL_OK;
2787 }
2788 else
2789 {
2790 return HAL_ERROR;
2791 }
2792 }
2793
2794 /**
2795 * @brief Initializes the CRYP peripheral in DES CBC encryption mode using DMA.
2796 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
2797 * the configuration information for CRYP module
2798 * @param pPlainData Pointer to the plaintext buffer
2799 * @param Size Length of the plaintext buffer, must be a multiple of 8
2800 * @param pCypherData Pointer to the cyphertext buffer
2801 * @retval HAL status
2802 */
2803 HAL_StatusTypeDef HAL_CRYP_DESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
2804 {
2805 uint32_t inputaddr;
2806 uint32_t outputaddr;
2807
2808 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
2809 {
2810 /* Process Locked */
2811 __HAL_LOCK(hcryp);
2812
2813 inputaddr = (uint32_t)pPlainData;
2814 outputaddr = (uint32_t)pCypherData;
2815
2816 /* Change the CRYP state */
2817 hcryp->State = HAL_CRYP_STATE_BUSY;
2818
2819 /* Set CRYP peripheral in DES CBC encryption mode */
2820 CRYP_SetDESCBCMode(hcryp, 0U);
2821
2822 /* Set the input and output addresses and start DMA transfer */
2823 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
2824
2825 /* Process Unlocked */
2826 __HAL_UNLOCK(hcryp);
2827
2828 /* Return function status */
2829 return HAL_OK;
2830 }
2831 else
2832 {
2833 return HAL_ERROR;
2834 }
2835 }
2836
2837 /**
2838 * @brief Initializes the CRYP peripheral in DES ECB decryption mode using DMA.
2839 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
2840 * the configuration information for CRYP module
2841 * @param pPlainData Pointer to the plaintext buffer
2842 * @param Size Length of the plaintext buffer, must be a multiple of 8
2843 * @param pCypherData Pointer to the cyphertext buffer
2844 * @retval HAL status
2845 */
2846 HAL_StatusTypeDef HAL_CRYP_DESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
2847 {
2848 uint32_t inputaddr;
2849 uint32_t outputaddr;
2850
2851 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
2852 {
2853 /* Process Locked */
2854 __HAL_LOCK(hcryp);
2855
2856 inputaddr = (uint32_t)pCypherData;
2857 outputaddr = (uint32_t)pPlainData;
2858
2859 /* Change the CRYP state */
2860 hcryp->State = HAL_CRYP_STATE_BUSY;
2861
2862 /* Set CRYP peripheral in DES ECB decryption mode */
2863 CRYP_SetDESECBMode(hcryp, CRYP_CR_ALGODIR);
2864
2865 /* Set the input and output addresses and start DMA transfer */
2866 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
2867
2868 /* Process Unlocked */
2869 __HAL_UNLOCK(hcryp);
2870
2871 /* Return function status */
2872 return HAL_OK;
2873 }
2874 else
2875 {
2876 return HAL_ERROR;
2877 }
2878 }
2879
2880 /**
2881 * @brief Initializes the CRYP peripheral in DES ECB decryption mode using DMA.
2882 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
2883 * the configuration information for CRYP module
2884 * @param pPlainData Pointer to the plaintext buffer
2885 * @param Size Length of the plaintext buffer, must be a multiple of 8
2886 * @param pCypherData Pointer to the cyphertext buffer
2887 * @retval HAL status
2888 */
2889 HAL_StatusTypeDef HAL_CRYP_DESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
2890 {
2891 uint32_t inputaddr;
2892 uint32_t outputaddr;
2893
2894 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
2895 {
2896 /* Process Locked */
2897 __HAL_LOCK(hcryp);
2898
2899 inputaddr = (uint32_t)pCypherData;
2900 outputaddr = (uint32_t)pPlainData;
2901
2902 /* Change the CRYP state */
2903 hcryp->State = HAL_CRYP_STATE_BUSY;
2904
2905 /* Set CRYP peripheral in DES CBC decryption mode */
2906 CRYP_SetDESCBCMode(hcryp, CRYP_CR_ALGODIR);
2907
2908 /* Set the input and output addresses and start DMA transfer */
2909 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
2910
2911 /* Process Unlocked */
2912 __HAL_UNLOCK(hcryp);
2913
2914 /* Return function status */
2915 return HAL_OK;
2916 }
2917 else
2918 {
2919 return HAL_ERROR;
2920 }
2921 }
2922
2923 /**
2924 * @}
2925 */
2926
2927 /** @defgroup CRYP_Exported_Functions_Group4 TDES processing functions
2928 * @brief processing functions.
2929 *
2930 @verbatim
2931 ==============================================================================
2932 ##### TDES processing functions #####
2933 ==============================================================================
2934 [..] This section provides functions allowing to:
2935 (+) Encrypt plaintext using TDES based on ECB or CBC chaining modes
2936 (+) Decrypt cyphertext using TDES based on ECB or CBC chaining modes
2937 [..] Three processing functions are available:
2938 (+) Polling mode
2939 (+) Interrupt mode
2940 (+) DMA mode
2941
2942 @endverbatim
2943 * @{
2944 */
2945
2946 /**
2947 * @brief Initializes the CRYP peripheral in TDES ECB encryption mode
2948 * then encrypt pPlainData. The cypher data are available in pCypherData
2949 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
2950 * the configuration information for CRYP module
2951 * @param pPlainData Pointer to the plaintext buffer
2952 * @param Size Length of the plaintext buffer, must be a multiple of 8
2953 * @param pCypherData Pointer to the cyphertext buffer
2954 * @param Timeout Specify Timeout value
2955 * @retval HAL status
2956 */
2957 HAL_StatusTypeDef HAL_CRYP_TDESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
2958 {
2959 /* Process Locked */
2960 __HAL_LOCK(hcryp);
2961
2962 /* Change the CRYP state */
2963 hcryp->State = HAL_CRYP_STATE_BUSY;
2964
2965 /* Set CRYP peripheral in TDES ECB encryption mode */
2966 CRYP_SetTDESECBMode(hcryp, 0U);
2967
2968 /* Enable CRYP */
2969 __HAL_CRYP_ENABLE(hcryp);
2970
2971 /* Write Plain Data and Get Cypher Data */
2972 if(CRYP_ProcessData2Words(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
2973 {
2974 return HAL_TIMEOUT;
2975 }
2976
2977 /* Change the CRYP state */
2978 hcryp->State = HAL_CRYP_STATE_READY;
2979
2980 /* Process Unlocked */
2981 __HAL_UNLOCK(hcryp);
2982
2983 /* Return function status */
2984 return HAL_OK;
2985 }
2986
2987 /**
2988 * @brief Initializes the CRYP peripheral in TDES ECB decryption mode
2989 * then decrypted pCypherData. The cypher data are available in pPlainData
2990 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
2991 * the configuration information for CRYP module
2992 * @param pPlainData Pointer to the plaintext buffer
2993 * @param Size Length of the plaintext buffer, must be a multiple of 8
2994 * @param pCypherData Pointer to the cyphertext buffer
2995 * @param Timeout Specify Timeout value
2996 * @retval HAL status
2997 */
2998 HAL_StatusTypeDef HAL_CRYP_TDESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
2999 {
3000 /* Process Locked */
3001 __HAL_LOCK(hcryp);
3002
3003 /* Change the CRYP state */
3004 hcryp->State = HAL_CRYP_STATE_BUSY;
3005
3006 /* Set CRYP peripheral in TDES ECB decryption mode */
3007 CRYP_SetTDESECBMode(hcryp, CRYP_CR_ALGODIR);
3008
3009 /* Enable CRYP */
3010 __HAL_CRYP_ENABLE(hcryp);
3011
3012 /* Write Cypher Data and Get Plain Data */
3013 if(CRYP_ProcessData2Words(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
3014 {
3015 return HAL_TIMEOUT;
3016 }
3017
3018 /* Change the CRYP state */
3019 hcryp->State = HAL_CRYP_STATE_READY;
3020
3021 /* Process Unlocked */
3022 __HAL_UNLOCK(hcryp);
3023
3024 /* Return function status */
3025 return HAL_OK;
3026 }
3027
3028 /**
3029 * @brief Initializes the CRYP peripheral in TDES CBC encryption mode
3030 * then encrypt pPlainData. The cypher data are available in pCypherData
3031 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
3032 * the configuration information for CRYP module
3033 * @param pPlainData Pointer to the plaintext buffer
3034 * @param Size Length of the plaintext buffer, must be a multiple of 8
3035 * @param pCypherData Pointer to the cyphertext buffer
3036 * @param Timeout Specify Timeout value
3037 * @retval HAL status
3038 */
3039 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
3040 {
3041 /* Process Locked */
3042 __HAL_LOCK(hcryp);
3043
3044 /* Change the CRYP state */
3045 hcryp->State = HAL_CRYP_STATE_BUSY;
3046
3047 /* Set CRYP peripheral in TDES CBC encryption mode */
3048 CRYP_SetTDESCBCMode(hcryp, 0U);
3049
3050 /* Enable CRYP */
3051 __HAL_CRYP_ENABLE(hcryp);
3052
3053 /* Write Plain Data and Get Cypher Data */
3054 if(CRYP_ProcessData2Words(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
3055 {
3056 return HAL_TIMEOUT;
3057 }
3058
3059 /* Change the CRYP state */
3060 hcryp->State = HAL_CRYP_STATE_READY;
3061
3062 /* Process Unlocked */
3063 __HAL_UNLOCK(hcryp);
3064
3065 /* Return function status */
3066 return HAL_OK;
3067 }
3068
3069 /**
3070 * @brief Initializes the CRYP peripheral in TDES CBC decryption mode
3071 * then decrypted pCypherData. The cypher data are available in pPlainData
3072 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
3073 * the configuration information for CRYP module
3074 * @param pCypherData Pointer to the cyphertext buffer
3075 * @param Size Length of the plaintext buffer, must be a multiple of 8
3076 * @param pPlainData Pointer to the plaintext buffer
3077 * @param Timeout Specify Timeout value
3078 * @retval HAL status
3079 */
3080 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
3081 {
3082 /* Process Locked */
3083 __HAL_LOCK(hcryp);
3084
3085 /* Change the CRYP state */
3086 hcryp->State = HAL_CRYP_STATE_BUSY;
3087
3088 /* Set CRYP peripheral in TDES CBC decryption mode */
3089 CRYP_SetTDESCBCMode(hcryp, CRYP_CR_ALGODIR);
3090
3091 /* Enable CRYP */
3092 __HAL_CRYP_ENABLE(hcryp);
3093
3094 /* Write Cypher Data and Get Plain Data */
3095 if(CRYP_ProcessData2Words(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
3096 {
3097 return HAL_TIMEOUT;
3098 }
3099
3100 /* Change the CRYP state */
3101 hcryp->State = HAL_CRYP_STATE_READY;
3102
3103 /* Process Unlocked */
3104 __HAL_UNLOCK(hcryp);
3105
3106 /* Return function status */
3107 return HAL_OK;
3108 }
3109
3110 /**
3111 * @brief Initializes the CRYP peripheral in TDES ECB encryption mode using interrupt.
3112 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
3113 * the configuration information for CRYP module
3114 * @param pPlainData Pointer to the plaintext buffer
3115 * @param Size Length of the plaintext buffer, must be a multiple of 8
3116 * @param pCypherData Pointer to the cyphertext buffer
3117 * @retval HAL status
3118 */
3119 HAL_StatusTypeDef HAL_CRYP_TDESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
3120 {
3121 uint32_t inputaddr;
3122 uint32_t outputaddr;
3123
3124 if(hcryp->State == HAL_CRYP_STATE_READY)
3125 {
3126 /* Process Locked */
3127 __HAL_LOCK(hcryp);
3128
3129 hcryp->CrypInCount = Size;
3130 hcryp->pCrypInBuffPtr = pPlainData;
3131 hcryp->pCrypOutBuffPtr = pCypherData;
3132 hcryp->CrypOutCount = Size;
3133
3134 /* Change the CRYP state */
3135 hcryp->State = HAL_CRYP_STATE_BUSY;
3136
3137 /* Set CRYP peripheral in TDES ECB encryption mode */
3138 CRYP_SetTDESECBMode(hcryp, 0U);
3139
3140 /* Enable Interrupts */
3141 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
3142
3143 /* Enable CRYP */
3144 __HAL_CRYP_ENABLE(hcryp);
3145
3146 /* Return function status */
3147 return HAL_OK;
3148 }
3149 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
3150 {
3151 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
3152 /* Write the Input block in the IN FIFO */
3153 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
3154 inputaddr+=4U;
3155 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
3156
3157 hcryp->pCrypInBuffPtr += 8U;
3158 hcryp->CrypInCount -= 8U;
3159 if(hcryp->CrypInCount == 0U)
3160 {
3161 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
3162 /* Call the Input data transfer complete callback */
3163 HAL_CRYP_InCpltCallback(hcryp);
3164 }
3165 }
3166 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
3167 {
3168 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
3169 /* Read the Output block from the Output FIFO */
3170 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
3171 outputaddr+=4U;
3172 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
3173
3174 hcryp->pCrypOutBuffPtr += 8U;
3175 hcryp->CrypOutCount -= 8U;
3176 if(hcryp->CrypOutCount == 0U)
3177 {
3178 /* Disable IT */
3179 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
3180 /* Disable CRYP */
3181 __HAL_CRYP_DISABLE(hcryp);
3182 /* Process Unlocked */
3183 __HAL_UNLOCK(hcryp);
3184 /* Change the CRYP state */
3185 hcryp->State = HAL_CRYP_STATE_READY;
3186 /* Call the Output data transfer complete callback */
3187 HAL_CRYP_OutCpltCallback(hcryp);
3188 }
3189 }
3190
3191 /* Return function status */
3192 return HAL_OK;
3193 }
3194
3195 /**
3196 * @brief Initializes the CRYP peripheral in TDES CBC encryption mode.
3197 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
3198 * the configuration information for CRYP module
3199 * @param pPlainData Pointer to the plaintext buffer
3200 * @param Size Length of the plaintext buffer, must be a multiple of 8
3201 * @param pCypherData Pointer to the cyphertext buffer
3202 * @retval HAL status
3203 */
3204 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
3205 {
3206 uint32_t inputaddr;
3207 uint32_t outputaddr;
3208
3209 if(hcryp->State == HAL_CRYP_STATE_READY)
3210 {
3211 /* Process Locked */
3212 __HAL_LOCK(hcryp);
3213
3214 hcryp->CrypInCount = Size;
3215 hcryp->pCrypInBuffPtr = pPlainData;
3216 hcryp->pCrypOutBuffPtr = pCypherData;
3217 hcryp->CrypOutCount = Size;
3218
3219 /* Change the CRYP state */
3220 hcryp->State = HAL_CRYP_STATE_BUSY;
3221
3222 /* Set CRYP peripheral in TDES CBC encryption mode */
3223 CRYP_SetTDESCBCMode(hcryp, 0U);
3224
3225 /* Enable Interrupts */
3226 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
3227
3228 /* Enable CRYP */
3229 __HAL_CRYP_ENABLE(hcryp);
3230
3231 /* Return function status */
3232 return HAL_OK;
3233 }
3234 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
3235 {
3236 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
3237 /* Write the Input block in the IN FIFO */
3238 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
3239 inputaddr+=4U;
3240 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
3241
3242 hcryp->pCrypInBuffPtr += 8U;
3243 hcryp->CrypInCount -= 8U;
3244 if(hcryp->CrypInCount == 0U)
3245 {
3246 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
3247 /* Call the Input data transfer complete callback */
3248 HAL_CRYP_InCpltCallback(hcryp);
3249 }
3250 }
3251 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
3252 {
3253 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
3254 /* Read the Output block from the Output FIFO */
3255 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
3256 outputaddr+=4U;
3257 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
3258
3259 hcryp->pCrypOutBuffPtr += 8U;
3260 hcryp->CrypOutCount -= 8U;
3261 if(hcryp->CrypOutCount == 0U)
3262 {
3263 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
3264 /* Disable CRYP */
3265 __HAL_CRYP_DISABLE(hcryp);
3266 /* Process Unlocked */
3267 __HAL_UNLOCK(hcryp);
3268 /* Change the CRYP state */
3269 hcryp->State = HAL_CRYP_STATE_READY;
3270 /* Call Input transfer complete callback */
3271 HAL_CRYP_OutCpltCallback(hcryp);
3272 }
3273 }
3274
3275 /* Return function status */
3276 return HAL_OK;
3277 }
3278
3279 /**
3280 * @brief Initializes the CRYP peripheral in TDES ECB decryption mode.
3281 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
3282 * the configuration information for CRYP module
3283 * @param pPlainData Pointer to the plaintext buffer
3284 * @param Size Length of the plaintext buffer, must be a multiple of 8
3285 * @param pCypherData Pointer to the cyphertext buffer
3286 * @retval HAL status
3287 */
3288 HAL_StatusTypeDef HAL_CRYP_TDESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
3289 {
3290 uint32_t inputaddr;
3291 uint32_t outputaddr;
3292
3293 if(hcryp->State == HAL_CRYP_STATE_READY)
3294 {
3295 /* Process Locked */
3296 __HAL_LOCK(hcryp);
3297
3298 hcryp->CrypInCount = Size;
3299 hcryp->pCrypInBuffPtr = pCypherData;
3300 hcryp->pCrypOutBuffPtr = pPlainData;
3301 hcryp->CrypOutCount = Size;
3302
3303 /* Change the CRYP state */
3304 hcryp->State = HAL_CRYP_STATE_BUSY;
3305
3306 /* Set CRYP peripheral in TDES ECB decryption mode */
3307 CRYP_SetTDESECBMode(hcryp, CRYP_CR_ALGODIR);
3308
3309 /* Enable Interrupts */
3310 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
3311
3312 /* Enable CRYP */
3313 __HAL_CRYP_ENABLE(hcryp);
3314
3315 /* Return function status */
3316 return HAL_OK;
3317 }
3318 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
3319 {
3320 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
3321 /* Write the Input block in the IN FIFO */
3322 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
3323 inputaddr+=4U;
3324 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
3325
3326 hcryp->pCrypInBuffPtr += 8U;
3327 hcryp->CrypInCount -= 8U;
3328 if(hcryp->CrypInCount == 0U)
3329 {
3330 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
3331 /* Call the Input data transfer complete callback */
3332 HAL_CRYP_InCpltCallback(hcryp);
3333 }
3334 }
3335 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
3336 {
3337 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
3338 /* Read the Output block from the Output FIFO */
3339 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
3340 outputaddr+=4U;
3341 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
3342
3343 hcryp->pCrypOutBuffPtr += 8U;
3344 hcryp->CrypOutCount -= 8U;
3345 if(hcryp->CrypOutCount == 0U)
3346 {
3347 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
3348 /* Disable CRYP */
3349 __HAL_CRYP_DISABLE(hcryp);
3350 /* Process Unlocked */
3351 __HAL_UNLOCK(hcryp);
3352 /* Change the CRYP state */
3353 hcryp->State = HAL_CRYP_STATE_READY;
3354 /* Call Input transfer complete callback */
3355 HAL_CRYP_OutCpltCallback(hcryp);
3356 }
3357 }
3358
3359 /* Return function status */
3360 return HAL_OK;
3361 }
3362
3363 /**
3364 * @brief Initializes the CRYP peripheral in TDES CBC decryption mode.
3365 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
3366 * the configuration information for CRYP module
3367 * @param pCypherData Pointer to the cyphertext buffer
3368 * @param Size Length of the plaintext buffer, must be a multiple of 8
3369 * @param pPlainData Pointer to the plaintext buffer
3370 * @retval HAL status
3371 */
3372 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
3373 {
3374 uint32_t inputaddr;
3375 uint32_t outputaddr;
3376
3377 if(hcryp->State == HAL_CRYP_STATE_READY)
3378 {
3379 /* Process Locked */
3380 __HAL_LOCK(hcryp);
3381
3382 hcryp->CrypInCount = Size;
3383 hcryp->pCrypInBuffPtr = pCypherData;
3384 hcryp->pCrypOutBuffPtr = pPlainData;
3385 hcryp->CrypOutCount = Size;
3386
3387 /* Change the CRYP state */
3388 hcryp->State = HAL_CRYP_STATE_BUSY;
3389
3390 /* Set CRYP peripheral in TDES CBC decryption mode */
3391 CRYP_SetTDESCBCMode(hcryp, CRYP_CR_ALGODIR);
3392
3393 /* Enable Interrupts */
3394 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
3395
3396 /* Enable CRYP */
3397 __HAL_CRYP_ENABLE(hcryp);
3398
3399 /* Return function status */
3400 return HAL_OK;
3401 }
3402 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
3403 {
3404 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
3405 /* Write the Input block in the IN FIFO */
3406 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
3407 inputaddr+=4U;
3408 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
3409
3410 hcryp->pCrypInBuffPtr += 8U;
3411 hcryp->CrypInCount -= 8U;
3412 if(hcryp->CrypInCount == 0U)
3413 {
3414 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
3415 /* Call the Input data transfer complete callback */
3416 HAL_CRYP_InCpltCallback(hcryp);
3417 }
3418 }
3419 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
3420 {
3421 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
3422 /* Read the Output block from the Output FIFO */
3423 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
3424 outputaddr+=4U;
3425 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
3426
3427 hcryp->pCrypOutBuffPtr += 8U;
3428 hcryp->CrypOutCount -= 8U;
3429 if(hcryp->CrypOutCount == 0U)
3430 {
3431 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
3432 /* Disable CRYP */
3433 __HAL_CRYP_DISABLE(hcryp);
3434 /* Process Unlocked */
3435 __HAL_UNLOCK(hcryp);
3436 /* Change the CRYP state */
3437 hcryp->State = HAL_CRYP_STATE_READY;
3438 /* Call Input transfer complete callback */
3439 HAL_CRYP_OutCpltCallback(hcryp);
3440 }
3441 }
3442
3443 /* Return function status */
3444 return HAL_OK;
3445 }
3446
3447 /**
3448 * @brief Initializes the CRYP peripheral in TDES ECB encryption mode using DMA.
3449 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
3450 * the configuration information for CRYP module
3451 * @param pPlainData Pointer to the plaintext buffer
3452 * @param Size Length of the plaintext buffer, must be a multiple of 8
3453 * @param pCypherData Pointer to the cyphertext buffer
3454 * @retval HAL status
3455 */
3456 HAL_StatusTypeDef HAL_CRYP_TDESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
3457 {
3458 uint32_t inputaddr;
3459 uint32_t outputaddr;
3460
3461 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
3462 {
3463 /* Process Locked */
3464 __HAL_LOCK(hcryp);
3465
3466 inputaddr = (uint32_t)pPlainData;
3467 outputaddr = (uint32_t)pCypherData;
3468
3469 /* Change the CRYP state */
3470 hcryp->State = HAL_CRYP_STATE_BUSY;
3471
3472 /* Set CRYP peripheral in TDES ECB encryption mode */
3473 CRYP_SetTDESECBMode(hcryp, 0U);
3474
3475 /* Set the input and output addresses and start DMA transfer */
3476 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
3477
3478 /* Process Unlocked */
3479 __HAL_UNLOCK(hcryp);
3480
3481 /* Return function status */
3482 return HAL_OK;
3483 }
3484 else
3485 {
3486 return HAL_ERROR;
3487 }
3488 }
3489
3490 /**
3491 * @brief Initializes the CRYP peripheral in TDES CBC encryption mode using DMA.
3492 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
3493 * the configuration information for CRYP module
3494 * @param pPlainData Pointer to the plaintext buffer
3495 * @param Size Length of the plaintext buffer, must be a multiple of 8
3496 * @param pCypherData Pointer to the cyphertext buffer
3497 * @retval HAL status
3498 */
3499 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
3500 {
3501 uint32_t inputaddr;
3502 uint32_t outputaddr;
3503
3504 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
3505 {
3506 /* Process Locked */
3507 __HAL_LOCK(hcryp);
3508
3509 inputaddr = (uint32_t)pPlainData;
3510 outputaddr = (uint32_t)pCypherData;
3511
3512 /* Change the CRYP state */
3513 hcryp->State = HAL_CRYP_STATE_BUSY;
3514
3515 /* Set CRYP peripheral in TDES CBC encryption mode */
3516 CRYP_SetTDESCBCMode(hcryp, 0U);
3517
3518 /* Set the input and output addresses and start DMA transfer */
3519 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
3520
3521 /* Process Unlocked */
3522 __HAL_UNLOCK(hcryp);
3523
3524 /* Return function status */
3525 return HAL_OK;
3526 }
3527 else
3528 {
3529 return HAL_ERROR;
3530 }
3531 }
3532
3533 /**
3534 * @brief Initializes the CRYP peripheral in TDES ECB decryption mode using DMA.
3535 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
3536 * the configuration information for CRYP module
3537 * @param pPlainData Pointer to the plaintext buffer
3538 * @param Size Length of the plaintext buffer, must be a multiple of 8
3539 * @param pCypherData Pointer to the cyphertext buffer
3540 * @retval HAL status
3541 */
3542 HAL_StatusTypeDef HAL_CRYP_TDESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
3543 {
3544 uint32_t inputaddr;
3545 uint32_t outputaddr;
3546
3547 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
3548 {
3549 /* Process Locked */
3550 __HAL_LOCK(hcryp);
3551
3552 inputaddr = (uint32_t)pCypherData;
3553 outputaddr = (uint32_t)pPlainData;
3554
3555 /* Change the CRYP state */
3556 hcryp->State = HAL_CRYP_STATE_BUSY;
3557
3558 /* Set CRYP peripheral in TDES ECB decryption mode */
3559 CRYP_SetTDESECBMode(hcryp, CRYP_CR_ALGODIR);
3560
3561 /* Set the input and output addresses and start DMA transfer */
3562 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
3563
3564 /* Process Unlocked */
3565 __HAL_UNLOCK(hcryp);
3566
3567 /* Return function status */
3568 return HAL_OK;
3569 }
3570 else
3571 {
3572 return HAL_ERROR;
3573 }
3574 }
3575
3576 /**
3577 * @brief Initializes the CRYP peripheral in TDES CBC decryption mode using DMA.
3578 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
3579 * the configuration information for CRYP module
3580 * @param pCypherData Pointer to the cyphertext buffer
3581 * @param Size Length of the plaintext buffer, must be a multiple of 8
3582 * @param pPlainData Pointer to the plaintext buffer
3583 * @retval HAL status
3584 */
3585 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
3586 {
3587 uint32_t inputaddr;
3588 uint32_t outputaddr;
3589
3590 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
3591 {
3592 /* Process Locked */
3593 __HAL_LOCK(hcryp);
3594
3595 inputaddr = (uint32_t)pCypherData;
3596 outputaddr = (uint32_t)pPlainData;
3597
3598 /* Change the CRYP state */
3599 hcryp->State = HAL_CRYP_STATE_BUSY;
3600
3601 /* Set CRYP peripheral in TDES CBC decryption mode */
3602 CRYP_SetTDESCBCMode(hcryp, CRYP_CR_ALGODIR);
3603
3604 /* Set the input and output addresses and start DMA transfer */
3605 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
3606
3607 /* Process Unlocked */
3608 __HAL_UNLOCK(hcryp);
3609
3610 /* Return function status */
3611 return HAL_OK;
3612 }
3613 else
3614 {
3615 return HAL_ERROR;
3616 }
3617 }
3618
3619 /**
3620 * @}
3621 */
3622
3623 /** @defgroup CRYP_Exported_Functions_Group5 DMA callback functions
3624 * @brief DMA callback functions.
3625 *
3626 @verbatim
3627 ==============================================================================
3628 ##### DMA callback functions #####
3629 ==============================================================================
3630 [..] This section provides DMA callback functions:
3631 (+) DMA Input data transfer complete
3632 (+) DMA Output data transfer complete
3633 (+) DMA error
3634
3635 @endverbatim
3636 * @{
3637 */
3638
3639 /**
3640 * @brief Input FIFO transfer completed callbacks.
3641 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
3642 * the configuration information for CRYP module
3643 * @retval None
3644 */
3645 __weak void HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp)
3646 {
3647 /* Prevent unused argument(s) compilation warning */
3648 UNUSED(hcryp);
3649 /* NOTE : This function Should not be modified, when the callback is needed,
3650 the HAL_CRYP_InCpltCallback could be implemented in the user file
3651 */
3652 }
3653
3654 /**
3655 * @brief Output FIFO transfer completed callbacks.
3656 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
3657 * the configuration information for CRYP module
3658 * @retval None
3659 */
3660 __weak void HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp)
3661 {
3662 /* Prevent unused argument(s) compilation warning */
3663 UNUSED(hcryp);
3664 /* NOTE : This function Should not be modified, when the callback is needed,
3665 the HAL_CRYP_OutCpltCallback could be implemented in the user file
3666 */
3667 }
3668
3669 /**
3670 * @brief CRYP error callbacks.
3671 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
3672 * the configuration information for CRYP module
3673 * @retval None
3674 */
3675 __weak void HAL_CRYP_ErrorCallback(CRYP_HandleTypeDef *hcryp)
3676 {
3677 /* Prevent unused argument(s) compilation warning */
3678 UNUSED(hcryp);
3679 /* NOTE : This function Should not be modified, when the callback is needed,
3680 the HAL_CRYP_ErrorCallback could be implemented in the user file
3681 */
3682 }
3683
3684 /**
3685 * @}
3686 */
3687
3688 /** @defgroup CRYP_Exported_Functions_Group6 CRYP IRQ handler management
3689 * @brief CRYP IRQ handler.
3690 *
3691 @verbatim
3692 ==============================================================================
3693 ##### CRYP IRQ handler management #####
3694 ==============================================================================
3695 [..] This section provides CRYP IRQ handler function.
3696
3697 @endverbatim
3698 * @{
3699 */
3700
3701 /**
3702 * @brief This function handles CRYP interrupt request.
3703 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
3704 * the configuration information for CRYP module
3705 * @retval None
3706 */
3707 void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp)
3708 {
3709 switch(CRYP->CR & CRYP_CR_ALGOMODE_DIRECTION)
3710 {
3711 case CRYP_CR_ALGOMODE_TDES_ECB_ENCRYPT:
3712 HAL_CRYP_TDESECB_Encrypt_IT(hcryp, NULL, 0U, NULL);
3713 break;
3714
3715 case CRYP_CR_ALGOMODE_TDES_ECB_DECRYPT:
3716 HAL_CRYP_TDESECB_Decrypt_IT(hcryp, NULL, 0U, NULL);
3717 break;
3718
3719 case CRYP_CR_ALGOMODE_TDES_CBC_ENCRYPT:
3720 HAL_CRYP_TDESCBC_Encrypt_IT(hcryp, NULL, 0U, NULL);
3721 break;
3722
3723 case CRYP_CR_ALGOMODE_TDES_CBC_DECRYPT:
3724 HAL_CRYP_TDESCBC_Decrypt_IT(hcryp, NULL, 0U, NULL);
3725 break;
3726
3727 case CRYP_CR_ALGOMODE_DES_ECB_ENCRYPT:
3728 HAL_CRYP_DESECB_Encrypt_IT(hcryp, NULL, 0U, NULL);
3729 break;
3730
3731 case CRYP_CR_ALGOMODE_DES_ECB_DECRYPT:
3732 HAL_CRYP_DESECB_Decrypt_IT(hcryp, NULL, 0U, NULL);
3733 break;
3734
3735 case CRYP_CR_ALGOMODE_DES_CBC_ENCRYPT:
3736 HAL_CRYP_DESCBC_Encrypt_IT(hcryp, NULL, 0U, NULL);
3737 break;
3738
3739 case CRYP_CR_ALGOMODE_DES_CBC_DECRYPT:
3740 HAL_CRYP_DESCBC_Decrypt_IT(hcryp, NULL, 0U, NULL);
3741 break;
3742
3743 case CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT:
3744 HAL_CRYP_AESECB_Encrypt_IT(hcryp, NULL, 0U, NULL);
3745 break;
3746
3747 case CRYP_CR_ALGOMODE_AES_ECB_DECRYPT:
3748 HAL_CRYP_AESECB_Decrypt_IT(hcryp, NULL, 0U, NULL);
3749 break;
3750
3751 case CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT:
3752 HAL_CRYP_AESCBC_Encrypt_IT(hcryp, NULL, 0U, NULL);
3753 break;
3754
3755 case CRYP_CR_ALGOMODE_AES_CBC_DECRYPT:
3756 HAL_CRYP_AESCBC_Decrypt_IT(hcryp, NULL, 0U, NULL);
3757 break;
3758
3759 case CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT:
3760 HAL_CRYP_AESCTR_Encrypt_IT(hcryp, NULL, 0U, NULL);
3761 break;
3762
3763 case CRYP_CR_ALGOMODE_AES_CTR_DECRYPT:
3764 HAL_CRYP_AESCTR_Decrypt_IT(hcryp, NULL, 0U, NULL);
3765 break;
3766
3767 default:
3768 break;
3769 }
3770 }
3771
3772 /**
3773 * @}
3774 */
3775
3776 /** @defgroup CRYP_Exported_Functions_Group7 Peripheral State functions
3777 * @brief Peripheral State functions.
3778 *
3779 @verbatim
3780 ==============================================================================
3781 ##### Peripheral State functions #####
3782 ==============================================================================
3783 [..]
3784 This subsection permits to get in run-time the status of the peripheral.
3785
3786 @endverbatim
3787 * @{
3788 */
3789
3790 /**
3791 * @brief Returns the CRYP state.
3792 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
3793 * the configuration information for CRYP module
3794 * @retval HAL state
3795 */
3796 HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp)
3797 {
3798 return hcryp->State;
3799 }
3800
3801 /**
3802 * @}
3803 */
3804
3805
3806 /**
3807 * @}
3808 */
3809
3810 #endif /* CRYP */
3811
3812 #if defined (AES)
3813
3814 /** @defgroup AES AES
3815 * @brief AES HAL module driver.
3816 * @{
3817 */
3818
3819 /* Private typedef -----------------------------------------------------------*/
3820 /* Private define ------------------------------------------------------------*/
3821 /* Private macro -------------------------------------------------------------*/
3822 /* Private variables ---------------------------------------------------------*/
3823 /* Private functions --------------------------------------------------------*/
3824
3825 /** @defgroup CRYP_Private_Functions CRYP Private Functions
3826 * @{
3827 */
3828
3829 static HAL_StatusTypeDef CRYP_SetInitVector(CRYP_HandleTypeDef *hcryp);
3830 static HAL_StatusTypeDef CRYP_SetKey(CRYP_HandleTypeDef *hcryp);
3831 static HAL_StatusTypeDef CRYP_AES_IT(CRYP_HandleTypeDef *hcryp);
3832
3833 /**
3834 * @}
3835 */
3836
3837 /* Exported functions ---------------------------------------------------------*/
3838
3839 /** @defgroup CRYP_Exported_Functions CRYP Exported Functions
3840 * @{
3841 */
3842
3843 /** @defgroup CRYP_Exported_Functions_Group1 Initialization and deinitialization functions
3844 * @brief Initialization and Configuration functions.
3845 *
3846 @verbatim
3847 ==============================================================================
3848 ##### Initialization and deinitialization functions #####
3849 ==============================================================================
3850 [..] This section provides functions allowing to:
3851 (+) Initialize the CRYP according to the specified parameters
3852 in the CRYP_InitTypeDef and creates the associated handle
3853 (+) DeInitialize the CRYP peripheral
3854 (+) Initialize the CRYP MSP (MCU Specific Package)
3855 (+) De-Initialize the CRYP MSP
3856
3857 [..]
3858 (@) Specific care must be taken to format the key and the Initialization Vector IV!
3859
3860 [..] If the key is defined as a 128-bit long array key[127..0] = {b127 ... b0} where
3861 b127 is the MSB and b0 the LSB, the key must be stored in MCU memory
3862 (+) as a sequence of words where the MSB word comes first (occupies the
3863 lowest memory address)
3864 (+) where each word is byte-swapped:
3865 (++) address n+0 : 0b b103 .. b96 b111 .. b104 b119 .. b112 b127 .. b120
3866 (++) address n+4 : 0b b71 .. b64 b79 .. b72 b87 .. b80 b95 .. b88
3867 (++) address n+8 : 0b b39 .. b32 b47 .. b40 b55 .. b48 b63 .. b56
3868 (++) address n+C : 0b b7 .. b0 b15 .. b8 b23 .. b16 b31 .. b24
3869 [..] Hereafter, another illustration when considering a 128-bit long key made of 16 bytes {B15..B0}.
3870 The 4 32-bit words that make the key must be stored as follows in MCU memory:
3871 (+) address n+0 : 0x B12 B13 B14 B15
3872 (+) address n+4 : 0x B8 B9 B10 B11
3873 (+) address n+8 : 0x B4 B5 B6 B7
3874 (+) address n+C : 0x B0 B1 B2 B3
3875 [..] which leads to the expected setting
3876 (+) AES_KEYR3 = 0x B15 B14 B13 B12
3877 (+) AES_KEYR2 = 0x B11 B10 B9 B8
3878 (+) AES_KEYR1 = 0x B7 B6 B5 B4
3879 (+) AES_KEYR0 = 0x B3 B2 B1 B0
3880
3881 [..] Same format must be applied for a 256-bit long key made of 32 bytes {B31..B0}.
3882 The 8 32-bit words that make the key must be stored as follows in MCU memory:
3883 (+) address n+00 : 0x B28 B29 B30 B31
3884 (+) address n+04 : 0x B24 B25 B26 B27
3885 (+) address n+08 : 0x B20 B21 B22 B23
3886 (+) address n+0C : 0x B16 B17 B18 B19
3887 (+) address n+10 : 0x B12 B13 B14 B15
3888 (+) address n+14 : 0x B8 B9 B10 B11
3889 (+) address n+18 : 0x B4 B5 B6 B7
3890 (+) address n+1C : 0x B0 B1 B2 B3
3891 [..] which leads to the expected setting
3892 (+) AES_KEYR7 = 0x B31 B30 B29 B28
3893 (+) AES_KEYR6 = 0x B27 B26 B25 B24
3894 (+) AES_KEYR5 = 0x B23 B22 B21 B20
3895 (+) AES_KEYR4 = 0x B19 B18 B17 B16
3896 (+) AES_KEYR3 = 0x B15 B14 B13 B12
3897 (+) AES_KEYR2 = 0x B11 B10 B9 B8
3898 (+) AES_KEYR1 = 0x B7 B6 B5 B4
3899 (+) AES_KEYR0 = 0x B3 B2 B1 B0
3900
3901 [..] Initialization Vector IV (4 32-bit words) format must follow the same as
3902 that of a 128-bit long key.
3903
3904 [..]
3905
3906 @endverbatim
3907 * @{
3908 */
3909
3910 /**
3911 * @brief Initialize the CRYP according to the specified
3912 * parameters in the CRYP_InitTypeDef and initialize the associated handle.
3913 * @note Specific care must be taken to format the key and the Initialization Vector IV
3914 * stored in the MCU memory before calling HAL_CRYP_Init(). Refer to explanations
3915 * hereabove.
3916 * @retval HAL status
3917 */
3918 HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp)
3919 {
3920 /* Check the CRYP handle allocation */
3921 if(hcryp == NULL)
3922 {
3923 return HAL_ERROR;
3924 }
3925
3926 /* Check the instance */
3927 assert_param(IS_AES_ALL_INSTANCE(hcryp->Instance));
3928
3929 /* Check the parameters */
3930 assert_param(IS_CRYP_KEYSIZE(hcryp->Init.KeySize));
3931 assert_param(IS_CRYP_DATATYPE(hcryp->Init.DataType));
3932 assert_param(IS_CRYP_ALGOMODE(hcryp->Init.OperatingMode));
3933 /* ChainingMode parameter is irrelevant when mode is set to Key derivation */
3934 if (hcryp->Init.OperatingMode != CRYP_ALGOMODE_KEYDERIVATION)
3935 {
3936 assert_param(IS_CRYP_CHAINMODE(hcryp->Init.ChainingMode));
3937 }
3938 assert_param(IS_CRYP_WRITE(hcryp->Init.KeyWriteFlag));
3939
3940 /*========================================================*/
3941 /* Check the proper operating/chaining modes combinations */
3942 /*========================================================*/
3943 /* Check the proper chaining when the operating mode is key derivation and decryption */
3944 #if defined(AES_CR_NPBLB)
3945 if ((hcryp->Init.OperatingMode == CRYP_ALGOMODE_KEYDERIVATION_DECRYPT) &&\
3946 ((hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CTR) \
3947 || (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_GCM_GMAC) \
3948 || (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CCM_CMAC)))
3949 #else
3950 if ((hcryp->Init.OperatingMode == CRYP_ALGOMODE_KEYDERIVATION_DECRYPT) &&\
3951 ((hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CTR) \
3952 || (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_GCM_GMAC) \
3953 || (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC)))
3954 #endif
3955 {
3956 return HAL_ERROR;
3957 }
3958 /* Check that key derivation is not set in CMAC mode or CCM mode when applicable */
3959 #if defined(AES_CR_NPBLB)
3960 if ((hcryp->Init.OperatingMode == CRYP_ALGOMODE_KEYDERIVATION)
3961 && (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CCM_CMAC))
3962 #else
3963 if ((hcryp->Init.OperatingMode == CRYP_ALGOMODE_KEYDERIVATION)
3964 && (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC))
3965 #endif
3966 {
3967 return HAL_ERROR;
3968 }
3969
3970
3971 /*================*/
3972 /* Initialization */
3973 /*================*/
3974 /* Initialization start */
3975 if(hcryp->State == HAL_CRYP_STATE_RESET)
3976 {
3977 /* Allocate lock resource and initialize it */
3978 hcryp->Lock = HAL_UNLOCKED;
3979
3980 /* Init the low level hardware */
3981 HAL_CRYP_MspInit(hcryp);
3982 }
3983
3984 /* Change the CRYP state */
3985 hcryp->State = HAL_CRYP_STATE_BUSY;
3986
3987 /* Disable the Peripheral */
3988 __HAL_CRYP_DISABLE();
3989
3990 /*=============================================================*/
3991 /* AES initialization common to all operating modes */
3992 /*=============================================================*/
3993 /* Set the Key size selection */
3994 MODIFY_REG(hcryp->Instance->CR, AES_CR_KEYSIZE, hcryp->Init.KeySize);
3995
3996 /* Set the default CRYP phase when this parameter is not used.
3997 Phase is updated below in case of GCM/GMAC/CMAC(/CCM) setting. */
3998 hcryp->Phase = HAL_CRYP_PHASE_NOT_USED;
3999
4000
4001
4002 /*=============================================================*/
4003 /* Carry on the initialization based on the AES operating mode */
4004 /*=============================================================*/
4005 /* Key derivation */
4006 if (hcryp->Init.OperatingMode == CRYP_ALGOMODE_KEYDERIVATION)
4007 {
4008 MODIFY_REG(hcryp->Instance->CR, AES_CR_MODE, CRYP_ALGOMODE_KEYDERIVATION);
4009
4010 /* Configure the Key registers */
4011 if (CRYP_SetKey(hcryp) != HAL_OK)
4012 {
4013 return HAL_ERROR;
4014 }
4015 }
4016 else
4017 /* Encryption / Decryption (with or without key derivation) / authentication */
4018 {
4019 /* Set data type, operating and chaining modes.
4020 In case of GCM or GMAC, data type is forced to 0b00 */
4021 if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_GCM_GMAC)
4022 {
4023 MODIFY_REG(hcryp->Instance->CR, AES_CR_DATATYPE|AES_CR_MODE|AES_CR_CHMOD, hcryp->Init.OperatingMode|hcryp->Init.ChainingMode);
4024 }
4025 else
4026 {
4027 MODIFY_REG(hcryp->Instance->CR, AES_CR_DATATYPE|AES_CR_MODE|AES_CR_CHMOD, hcryp->Init.DataType|hcryp->Init.OperatingMode|hcryp->Init.ChainingMode);
4028 }
4029
4030
4031 /* Specify the encryption/decryption phase in case of Galois counter mode (GCM),
4032 Galois message authentication code (GMAC), cipher message authentication code (CMAC)
4033 or Counter with Cipher Mode (CCM) when applicable */
4034 #if defined(AES_CR_NPBLB)
4035 if ((hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_GCM_GMAC)
4036 || (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CCM_CMAC))
4037 #else
4038 if ((hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_GCM_GMAC)
4039 || (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC))
4040 #endif
4041 {
4042 MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, hcryp->Init.GCMCMACPhase);
4043 hcryp->Phase = HAL_CRYP_PHASE_START;
4044 }
4045
4046
4047 /* Configure the Key registers if no need to bypass this step */
4048 if (hcryp->Init.KeyWriteFlag == CRYP_KEY_WRITE_ENABLE)
4049 {
4050 if (CRYP_SetKey(hcryp) != HAL_OK)
4051 {
4052 return HAL_ERROR;
4053 }
4054 }
4055
4056 /* If applicable, configure the Initialization Vector */
4057 if (hcryp->Init.ChainingMode != CRYP_CHAINMODE_AES_ECB)
4058 {
4059 if (CRYP_SetInitVector(hcryp) != HAL_OK)
4060 {
4061 return HAL_ERROR;
4062 }
4063 }
4064 }
4065
4066 #if defined(AES_CR_NPBLB)
4067 /* Clear NPBLB field */
4068 CLEAR_BIT(hcryp->Instance->CR, AES_CR_NPBLB);
4069 #endif
4070
4071 /* Reset CrypInCount and CrypOutCount */
4072 hcryp->CrypInCount = 0U;
4073 hcryp->CrypOutCount = 0U;
4074
4075 /* Reset ErrorCode field */
4076 hcryp->ErrorCode = HAL_CRYP_ERROR_NONE;
4077
4078 /* Reset Mode suspension request */
4079 hcryp->SuspendRequest = HAL_CRYP_SUSPEND_NONE;
4080
4081 /* Change the CRYP state */
4082 hcryp->State = HAL_CRYP_STATE_READY;
4083
4084 /* Enable the Peripheral */
4085 __HAL_CRYP_ENABLE();
4086
4087 /* Return function status */
4088 return HAL_OK;
4089 }
4090
4091 /**
4092 * @brief DeInitialize the CRYP peripheral.
4093 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
4094 * the configuration information for CRYP module
4095 * @retval HAL status
4096 */
4097 HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp)
4098 {
4099 /* Check the CRYP handle allocation */
4100 if(hcryp == NULL)
4101 {
4102 return HAL_ERROR;
4103 }
4104
4105 /* Change the CRYP state */
4106 hcryp->State = HAL_CRYP_STATE_BUSY;
4107
4108 /* Set the default CRYP phase */
4109 hcryp->Phase = HAL_CRYP_PHASE_READY;
4110
4111 /* Reset CrypInCount and CrypOutCount */
4112 hcryp->CrypInCount = 0U;
4113 hcryp->CrypOutCount = 0U;
4114
4115 /* Disable the CRYP Peripheral Clock */
4116 __HAL_CRYP_DISABLE();
4117
4118 /* DeInit the low level hardware: CLOCK, NVIC.*/
4119 HAL_CRYP_MspDeInit(hcryp);
4120
4121 /* Change the CRYP state */
4122 hcryp->State = HAL_CRYP_STATE_RESET;
4123
4124 /* Release Lock */
4125 __HAL_UNLOCK(hcryp);
4126
4127 /* Return function status */
4128 return HAL_OK;
4129 }
4130
4131 /**
4132 * @brief Initialize the CRYP MSP.
4133 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
4134 * the configuration information for CRYP module
4135 * @retval None
4136 */
4137 __weak void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp)
4138 {
4139 /* Prevent unused argument(s) compilation warning */
4140 UNUSED(hcryp);
4141
4142 /* NOTE : This function should not be modified; when the callback is needed,
4143 the HAL_CRYP_MspInit can be implemented in the user file
4144 */
4145 }
4146
4147 /**
4148 * @brief DeInitialize CRYP MSP.
4149 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
4150 * the configuration information for CRYP module
4151 * @retval None
4152 */
4153 __weak void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp)
4154 {
4155 /* Prevent unused argument(s) compilation warning */
4156 UNUSED(hcryp);
4157
4158 /* NOTE : This function should not be modified; when the callback is needed,
4159 the HAL_CRYP_MspDeInit can be implemented in the user file
4160 */
4161 }
4162
4163 /**
4164 * @}
4165 */
4166
4167 /** @defgroup CRYP_Exported_Functions_Group2 AES processing functions
4168 * @brief Processing functions.
4169 *
4170 @verbatim
4171 ==============================================================================
4172 ##### AES processing functions #####
4173 ==============================================================================
4174 [..] This section provides functions allowing to:
4175 (+) Encrypt plaintext using AES algorithm in different chaining modes
4176 (+) Decrypt cyphertext using AES algorithm in different chaining modes
4177 [..] Three processing functions are available:
4178 (+) Polling mode
4179 (+) Interrupt mode
4180 (+) DMA mode
4181
4182 @endverbatim
4183 * @{
4184 */
4185
4186
4187 /**
4188 * @brief Encrypt pPlainData in AES ECB encryption mode. The cypher data are available in pCypherData.
4189 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
4190 * the configuration information for CRYP module
4191 * @param pPlainData Pointer to the plaintext buffer
4192 * @param Size Length of the plaintext buffer in bytes, must be a multiple of 16.
4193 * @param pCypherData Pointer to the cyphertext buffer
4194 * @param Timeout Specify Timeout value
4195 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4196 * resort to generic HAL_CRYPEx_AES() API instead (usage recommended).
4197 * @retval HAL status
4198 */
4199 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
4200 {
4201 /* Re-initialize AES IP with proper parameters */
4202 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4203 {
4204 return HAL_ERROR;
4205 }
4206 hcryp->Init.OperatingMode = CRYP_ALGOMODE_ENCRYPT;
4207 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_ECB;
4208 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4209 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4210 {
4211 return HAL_ERROR;
4212 }
4213
4214 return HAL_CRYPEx_AES(hcryp, pPlainData, Size, pCypherData, Timeout);
4215 }
4216
4217
4218 /**
4219 * @brief Encrypt pPlainData in AES CBC encryption mode with key derivation. The cypher data are available in pCypherData.
4220 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
4221 * the configuration information for CRYP module
4222 * @param pPlainData Pointer to the plaintext buffer
4223 * @param Size Length of the plaintext buffer in bytes, must be a multiple of 16.
4224 * @param pCypherData Pointer to the cyphertext buffer
4225 * @param Timeout Specify Timeout value
4226 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4227 * resort to generic HAL_CRYPEx_AES() API instead (usage recommended).
4228 * @retval HAL status
4229 */
4230 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
4231 {
4232 /* Re-initialize AES IP with proper parameters */
4233 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4234 {
4235 return HAL_ERROR;
4236 }
4237 hcryp->Init.OperatingMode = CRYP_ALGOMODE_ENCRYPT;
4238 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CBC;
4239 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4240 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4241 {
4242 return HAL_ERROR;
4243 }
4244
4245 return HAL_CRYPEx_AES(hcryp, pPlainData, Size, pCypherData, Timeout);
4246 }
4247
4248
4249 /**
4250 * @brief Encrypt pPlainData in AES CTR encryption mode. The cypher data are available in pCypherData
4251 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
4252 * the configuration information for CRYP module
4253 * @param pPlainData Pointer to the plaintext buffer
4254 * @param Size Length of the plaintext buffer in bytes, must be a multiple of 16.
4255 * @param pCypherData Pointer to the cyphertext buffer
4256 * @param Timeout Specify Timeout value
4257 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4258 * resort to generic HAL_CRYPEx_AES() API instead (usage recommended).
4259 * @retval HAL status
4260 */
4261 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
4262 {
4263 /* Re-initialize AES IP with proper parameters */
4264 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4265 {
4266 return HAL_ERROR;
4267 }
4268 hcryp->Init.OperatingMode = CRYP_ALGOMODE_ENCRYPT;
4269 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CTR;
4270 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4271 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4272 {
4273 return HAL_ERROR;
4274 }
4275
4276 return HAL_CRYPEx_AES(hcryp, pPlainData, Size, pCypherData, Timeout);
4277 }
4278
4279 /**
4280 * @brief Decrypt pCypherData in AES ECB decryption mode with key derivation,
4281 * the decyphered data are available in pPlainData.
4282 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
4283 * the configuration information for CRYP module
4284 * @param pCypherData Pointer to the cyphertext buffer
4285 * @param Size Length of the plaintext buffer in bytes, must be a multiple of 16.
4286 * @param pPlainData Pointer to the plaintext buffer
4287 * @param Timeout Specify Timeout value
4288 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4289 * resort to generic HAL_CRYPEx_AES() API instead (usage recommended).
4290 * @retval HAL status
4291 */
4292 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
4293 {
4294 /* Re-initialize AES IP with proper parameters */
4295 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4296 {
4297 return HAL_ERROR;
4298 }
4299 hcryp->Init.OperatingMode = CRYP_ALGOMODE_KEYDERIVATION_DECRYPT;
4300 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_ECB;
4301 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4302 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4303 {
4304 return HAL_ERROR;
4305 }
4306
4307 return HAL_CRYPEx_AES(hcryp, pCypherData, Size, pPlainData, Timeout);
4308 }
4309
4310 /**
4311 * @brief Decrypt pCypherData in AES ECB decryption mode with key derivation,
4312 * the decyphered data are available in pPlainData.
4313 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
4314 * the configuration information for CRYP module
4315 * @param pCypherData Pointer to the cyphertext buffer
4316 * @param Size Length of the plaintext buffer in bytes, must be a multiple of 16.
4317 * @param pPlainData Pointer to the plaintext buffer
4318 * @param Timeout Specify Timeout value
4319 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4320 * resort to generic HAL_CRYPEx_AES() API instead (usage recommended).
4321 * @retval HAL status
4322 */
4323 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
4324 {
4325 /* Re-initialize AES IP with proper parameters */
4326 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4327 {
4328 return HAL_ERROR;
4329 }
4330 hcryp->Init.OperatingMode = CRYP_ALGOMODE_KEYDERIVATION_DECRYPT;
4331 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CBC;
4332 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4333 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4334 {
4335 return HAL_ERROR;
4336 }
4337
4338 return HAL_CRYPEx_AES(hcryp, pCypherData, Size, pPlainData, Timeout);
4339 }
4340
4341 /**
4342 * @brief Decrypt pCypherData in AES CTR decryption mode,
4343 * the decyphered data are available in pPlainData.
4344 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
4345 * the configuration information for CRYP module
4346 * @param pCypherData Pointer to the cyphertext buffer
4347 * @param Size Length of the plaintext buffer in bytes, must be a multiple of 16.
4348 * @param pPlainData Pointer to the plaintext buffer
4349 * @param Timeout Specify Timeout value
4350 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4351 * resort to generic HAL_CRYPEx_AES() API instead (usage recommended).
4352 * @retval HAL status
4353 */
4354 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
4355 {
4356 /* Re-initialize AES IP with proper parameters */
4357 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4358 {
4359 return HAL_ERROR;
4360 }
4361 hcryp->Init.OperatingMode = CRYP_ALGOMODE_DECRYPT;
4362 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CTR;
4363 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4364 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4365 {
4366 return HAL_ERROR;
4367 }
4368
4369 return HAL_CRYPEx_AES(hcryp, pCypherData, Size, pPlainData, Timeout);
4370 }
4371
4372 /**
4373 * @brief Encrypt pPlainData in AES ECB encryption mode using Interrupt,
4374 * the cypher data are available in pCypherData.
4375 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
4376 * the configuration information for CRYP module
4377 * @param pPlainData Pointer to the plaintext buffer
4378 * @param Size Length of the plaintext buffer in bytes, must be a multiple of 16.
4379 * @param pCypherData Pointer to the cyphertext buffer
4380 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4381 * resort to generic HAL_CRYPEx_AES_IT() API instead (usage recommended).
4382 * @retval HAL status
4383 */
4384 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
4385 {
4386 /* Re-initialize AES IP with proper parameters */
4387 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4388 {
4389 return HAL_ERROR;
4390 }
4391 hcryp->Init.OperatingMode = CRYP_ALGOMODE_ENCRYPT;
4392 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_ECB;
4393 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4394 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4395 {
4396 return HAL_ERROR;
4397 }
4398
4399 return HAL_CRYPEx_AES_IT(hcryp, pPlainData, Size, pCypherData);
4400 }
4401
4402 /**
4403 * @brief Encrypt pPlainData in AES CBC encryption mode using Interrupt,
4404 * the cypher data are available in pCypherData.
4405 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
4406 * the configuration information for CRYP module
4407 * @param pPlainData Pointer to the plaintext buffer
4408 * @param Size Length of the plaintext buffer in bytes, must be a multiple of 16.
4409 * @param pCypherData Pointer to the cyphertext buffer
4410 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4411 * resort to generic HAL_CRYPEx_AES_IT() API instead (usage recommended).
4412 * @retval HAL status
4413 */
4414 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
4415 {
4416 /* Re-initialize AES IP with proper parameters */
4417 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4418 {
4419 return HAL_ERROR;
4420 }
4421 hcryp->Init.OperatingMode = CRYP_ALGOMODE_ENCRYPT;
4422 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CBC;
4423 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4424 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4425 {
4426 return HAL_ERROR;
4427 }
4428
4429 return HAL_CRYPEx_AES_IT(hcryp, pPlainData, Size, pCypherData);
4430 }
4431
4432
4433 /**
4434 * @brief Encrypt pPlainData in AES CTR encryption mode using Interrupt,
4435 * the cypher data are available in pCypherData.
4436 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
4437 * the configuration information for CRYP module
4438 * @param pPlainData Pointer to the plaintext buffer
4439 * @param Size Length of the plaintext buffer in bytes, must be a multiple of 16.
4440 * @param pCypherData Pointer to the cyphertext buffer
4441 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4442 * resort to generic HAL_CRYPEx_AES_IT() API instead (usage recommended).
4443 * @retval HAL status
4444 */
4445 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
4446 {
4447 /* Re-initialize AES IP with proper parameters */
4448 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4449 {
4450 return HAL_ERROR;
4451 }
4452 hcryp->Init.OperatingMode = CRYP_ALGOMODE_ENCRYPT;
4453 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CTR;
4454 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4455 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4456 {
4457 return HAL_ERROR;
4458 }
4459
4460 return HAL_CRYPEx_AES_IT(hcryp, pPlainData, Size, pCypherData);
4461 }
4462
4463 /**
4464 * @brief Decrypt pCypherData in AES ECB decryption mode using Interrupt,
4465 * the decyphered data are available in pPlainData.
4466 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
4467 * the configuration information for CRYP module
4468 * @param pCypherData Pointer to the cyphertext buffer
4469 * @param Size Length of the plaintext buffer in bytes, must be a multiple of 16.
4470 * @param pPlainData Pointer to the plaintext buffer.
4471 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4472 * resort to generic HAL_CRYPEx_AES_IT() API instead (usage recommended).
4473 * @retval HAL status
4474 */
4475 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
4476 {
4477 /* Re-initialize AES IP with proper parameters */
4478 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4479 {
4480 return HAL_ERROR;
4481 }
4482 hcryp->Init.OperatingMode = CRYP_ALGOMODE_KEYDERIVATION_DECRYPT;
4483 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_ECB;
4484 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4485 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4486 {
4487 return HAL_ERROR;
4488 }
4489
4490 return HAL_CRYPEx_AES_IT(hcryp, pCypherData, Size, pPlainData);
4491 }
4492
4493 /**
4494 * @brief Decrypt pCypherData in AES CBC decryption mode using Interrupt,
4495 * the decyphered data are available in pPlainData.
4496 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
4497 * the configuration information for CRYP module
4498 * @param pCypherData Pointer to the cyphertext buffer
4499 * @param Size Length of the plaintext buffer in bytes, must be a multiple of 16.
4500 * @param pPlainData Pointer to the plaintext buffer
4501 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4502 * resort to generic HAL_CRYPEx_AES_IT() API instead (usage recommended).
4503 * @retval HAL status
4504 */
4505 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
4506 {
4507 /* Re-initialize AES IP with proper parameters */
4508 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4509 {
4510 return HAL_ERROR;
4511 }
4512 hcryp->Init.OperatingMode = CRYP_ALGOMODE_KEYDERIVATION_DECRYPT;
4513 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CBC;
4514 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4515 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4516 {
4517 return HAL_ERROR;
4518 }
4519
4520 return HAL_CRYPEx_AES_IT(hcryp, pCypherData, Size, pPlainData);
4521 }
4522
4523 /**
4524 * @brief Decrypt pCypherData in AES CTR decryption mode using Interrupt,
4525 * the decyphered data are available in pPlainData.
4526 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
4527 * the configuration information for CRYP module
4528 * @param pCypherData Pointer to the cyphertext buffer
4529 * @param Size Length of the plaintext buffer in bytes, must be a multiple of 16.
4530 * @param pPlainData Pointer to the plaintext buffer
4531 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4532 * resort to generic HAL_CRYPEx_AES_IT() API instead (usage recommended).
4533 * @retval HAL status
4534 */
4535 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
4536 {
4537 /* Re-initialize AES IP with proper parameters */
4538 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4539 {
4540 return HAL_ERROR;
4541 }
4542 hcryp->Init.OperatingMode = CRYP_ALGOMODE_DECRYPT;
4543 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CTR;
4544 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4545 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4546 {
4547 return HAL_ERROR;
4548 }
4549
4550 return HAL_CRYPEx_AES_IT(hcryp, pCypherData, Size, pPlainData);
4551 }
4552
4553 /**
4554 * @brief Encrypt pPlainData in AES ECB encryption mode using DMA,
4555 * the cypher data are available in pCypherData.
4556 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
4557 * the configuration information for CRYP module
4558 * @param pPlainData Pointer to the plaintext buffer
4559 * @param Size Length of the plaintext buffer in bytes, must be a multiple of 16.
4560 * @param pCypherData Pointer to the cyphertext buffer
4561 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4562 * resort to generic HAL_CRYPEx_AES_DMA() API instead (usage recommended).
4563 * @note pPlainData and pCypherData buffers must be 32-bit aligned to ensure a correct DMA transfer to and from the IP.
4564 * @retval HAL status
4565 */
4566 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
4567 {
4568 /* Re-initialize AES IP with proper parameters */
4569 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4570 {
4571 return HAL_ERROR;
4572 }
4573 hcryp->Init.OperatingMode = CRYP_ALGOMODE_ENCRYPT;
4574 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_ECB;
4575 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4576 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4577 {
4578 return HAL_ERROR;
4579 }
4580
4581 return HAL_CRYPEx_AES_DMA(hcryp, pPlainData, Size, pCypherData);
4582 }
4583
4584
4585
4586 /**
4587 * @brief Encrypt pPlainData in AES CBC encryption mode using DMA,
4588 * the cypher data are available in pCypherData.
4589 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
4590 * the configuration information for CRYP module
4591 * @param pPlainData Pointer to the plaintext buffer
4592 * @param Size Length of the plaintext buffer, must be a multiple of 16.
4593 * @param pCypherData Pointer to the cyphertext buffer
4594 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4595 * resort to generic HAL_CRYPEx_AES_DMA() API instead (usage recommended).
4596 * @note pPlainData and pCypherData buffers must be 32-bit aligned to ensure a correct DMA transfer to and from the IP.
4597 * @retval HAL status
4598 */
4599 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
4600 {
4601 /* Re-initialize AES IP with proper parameters */
4602 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4603 {
4604 return HAL_ERROR;
4605 }
4606 hcryp->Init.OperatingMode = CRYP_ALGOMODE_ENCRYPT;
4607 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CBC;
4608 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4609 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4610 {
4611 return HAL_ERROR;
4612 }
4613
4614 return HAL_CRYPEx_AES_DMA(hcryp, pPlainData, Size, pCypherData);
4615 }
4616
4617 /**
4618 * @brief Encrypt pPlainData in AES CTR encryption mode using DMA,
4619 * the cypher data are available in pCypherData.
4620 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
4621 * the configuration information for CRYP module
4622 * @param pPlainData Pointer to the plaintext buffer
4623 * @param Size Length of the plaintext buffer in bytes, must be a multiple of 16.
4624 * @param pCypherData Pointer to the cyphertext buffer.
4625 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4626 * resort to generic HAL_CRYPEx_AES_DMA() API instead (usage recommended).
4627 * @note pPlainData and pCypherData buffers must be 32-bit aligned to ensure a correct DMA transfer to and from the IP.
4628 * @retval HAL status
4629 */
4630 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
4631 {
4632 /* Re-initialize AES IP with proper parameters */
4633 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4634 {
4635 return HAL_ERROR;
4636 }
4637 hcryp->Init.OperatingMode = CRYP_ALGOMODE_ENCRYPT;
4638 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CTR;
4639 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4640 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4641 {
4642 return HAL_ERROR;
4643 }
4644
4645 return HAL_CRYPEx_AES_DMA(hcryp, pPlainData, Size, pCypherData);
4646 }
4647
4648 /**
4649 * @brief Decrypt pCypherData in AES ECB decryption mode using DMA,
4650 * the decyphered data are available in pPlainData.
4651 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
4652 * the configuration information for CRYP module
4653 * @param pCypherData Pointer to the cyphertext buffer
4654 * @param Size Length of the plaintext buffer in bytes, must be a multiple of 16.
4655 * @param pPlainData Pointer to the plaintext buffer
4656 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4657 * resort to generic HAL_CRYPEx_AES_DMA() API instead (usage recommended).
4658 * @note pPlainData and pCypherData buffers must be 32-bit aligned to ensure a correct DMA transfer to and from the IP.
4659 * @retval HAL status
4660 */
4661 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
4662 {
4663 /* Re-initialize AES IP with proper parameters */
4664 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4665 {
4666 return HAL_ERROR;
4667 }
4668 hcryp->Init.OperatingMode = CRYP_ALGOMODE_KEYDERIVATION_DECRYPT;
4669 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_ECB;
4670 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4671 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4672 {
4673 return HAL_ERROR;
4674 }
4675
4676 return HAL_CRYPEx_AES_DMA(hcryp, pCypherData, Size, pPlainData);
4677 }
4678
4679 /**
4680 * @brief Decrypt pCypherData in AES CBC decryption mode using DMA,
4681 * the decyphered data are available in pPlainData.
4682 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
4683 * the configuration information for CRYP module
4684 * @param pCypherData Pointer to the cyphertext buffer
4685 * @param Size Length of the plaintext buffer in bytes, must be a multiple of 16.
4686 * @param pPlainData Pointer to the plaintext buffer
4687 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4688 * resort to generic HAL_CRYPEx_AES_DMA() API instead (usage recommended).
4689 * @note pPlainData and pCypherData buffers must be 32-bit aligned to ensure a correct DMA transfer to and from the IP.
4690 * @retval HAL status
4691 */
4692 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
4693 {
4694 /* Re-initialize AES IP with proper parameters */
4695 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4696 {
4697 return HAL_ERROR;
4698 }
4699 hcryp->Init.OperatingMode = CRYP_ALGOMODE_KEYDERIVATION_DECRYPT;
4700 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CBC;
4701 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4702 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4703 {
4704 return HAL_ERROR;
4705 }
4706
4707 return HAL_CRYPEx_AES_DMA(hcryp, pCypherData, Size, pPlainData);
4708 }
4709
4710 /**
4711 * @brief Decrypt pCypherData in AES CTR decryption mode using DMA,
4712 * the decyphered data are available in pPlainData.
4713 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
4714 * the configuration information for CRYP module
4715 * @param pCypherData Pointer to the cyphertext buffer
4716 * @param Size Length of the plaintext buffer in bytes, must be a multiple of 16.
4717 * @param pPlainData Pointer to the plaintext buffer
4718 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4719 * resort to generic HAL_CRYPEx_AES_DMA() API instead (usage recommended).
4720 * @note pPlainData and pCypherData buffers must be 32-bit aligned to ensure a correct DMA transfer to and from the IP.
4721 * @retval HAL status
4722 */
4723 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
4724 {
4725 /* Re-initialize AES IP with proper parameters */
4726 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4727 {
4728 return HAL_ERROR;
4729 }
4730 hcryp->Init.OperatingMode = CRYP_ALGOMODE_DECRYPT;
4731 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CTR;
4732 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4733 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4734 {
4735 return HAL_ERROR;
4736 }
4737
4738 return HAL_CRYPEx_AES_DMA(hcryp, pCypherData, Size, pPlainData);
4739 }
4740
4741
4742 /**
4743 * @}
4744 */
4745
4746 /** @defgroup CRYP_Exported_Functions_Group3 Callback functions
4747 * @brief Callback functions.
4748 *
4749 @verbatim
4750 ==============================================================================
4751 ##### Callback functions #####
4752 ==============================================================================
4753 [..] This section provides Interruption and DMA callback functions:
4754 (+) DMA Input data transfer complete
4755 (+) DMA Output data transfer complete
4756 (+) DMA or Interrupt error
4757
4758 @endverbatim
4759 * @{
4760 */
4761
4762 /**
4763 * @brief CRYP error callback.
4764 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
4765 * the configuration information for CRYP module
4766 * @retval None
4767 */
4768 __weak void HAL_CRYP_ErrorCallback(CRYP_HandleTypeDef *hcryp)
4769 {
4770 /* Prevent unused argument(s) compilation warning */
4771 UNUSED(hcryp);
4772
4773 /* NOTE : This function should not be modified; when the callback is needed,
4774 the HAL_CRYP_ErrorCallback can be implemented in the user file
4775 */
4776 }
4777
4778 /**
4779 * @brief Input DMA transfer complete callback.
4780 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
4781 * the configuration information for CRYP module
4782 * @retval None
4783 */
4784 __weak void HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp)
4785 {
4786 /* Prevent unused argument(s) compilation warning */
4787 UNUSED(hcryp);
4788
4789 /* NOTE : This function should not be modified; when the callback is needed,
4790 the HAL_CRYP_InCpltCallback can be implemented in the user file
4791 */
4792 }
4793
4794 /**
4795 * @brief Output DMA transfer complete callback.
4796 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
4797 * the configuration information for CRYP module
4798 * @retval None
4799 */
4800 __weak void HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp)
4801 {
4802 /* Prevent unused argument(s) compilation warning */
4803 UNUSED(hcryp);
4804
4805 /* NOTE : This function should not be modified; when the callback is needed,
4806 the HAL_CRYP_OutCpltCallback can be implemented in the user file
4807 */
4808 }
4809
4810 /**
4811 * @}
4812 */
4813
4814 /** @defgroup CRYP_Exported_Functions_Group4 CRYP IRQ handler
4815 * @brief AES IRQ handler.
4816 *
4817 @verbatim
4818 ==============================================================================
4819 ##### AES IRQ handler management #####
4820 ==============================================================================
4821 [..] This section provides AES IRQ handler function.
4822
4823 @endverbatim
4824 * @{
4825 */
4826
4827 /**
4828 * @brief Handle AES interrupt request.
4829 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
4830 * the configuration information for CRYP module
4831 * @retval None
4832 */
4833 void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp)
4834 {
4835 /* Check if error occurred */
4836 if (__HAL_CRYP_GET_IT_SOURCE(CRYP_IT_ERRIE) != RESET)
4837 {
4838 /* If Write Error occurred */
4839 if (__HAL_CRYP_GET_FLAG(CRYP_IT_WRERR) != RESET)
4840 {
4841 hcryp->ErrorCode |= HAL_CRYP_WRITE_ERROR;
4842 hcryp->State = HAL_CRYP_STATE_ERROR;
4843 }
4844 /* If Read Error occurred */
4845 if (__HAL_CRYP_GET_FLAG(CRYP_IT_RDERR) != RESET)
4846 {
4847 hcryp->ErrorCode |= HAL_CRYP_READ_ERROR;
4848 hcryp->State = HAL_CRYP_STATE_ERROR;
4849 }
4850
4851 /* If an error has been reported */
4852 if (hcryp->State == HAL_CRYP_STATE_ERROR)
4853 {
4854 /* Disable Error and Computation Complete Interrupts */
4855 __HAL_CRYP_DISABLE_IT(CRYP_IT_CCFIE|CRYP_IT_ERRIE);
4856 /* Clear all Interrupt flags */
4857 __HAL_CRYP_CLEAR_FLAG(CRYP_ERR_CLEAR|CRYP_CCF_CLEAR);
4858
4859 /* Process Unlocked */
4860 __HAL_UNLOCK(hcryp);
4861
4862 HAL_CRYP_ErrorCallback(hcryp);
4863
4864 return;
4865 }
4866 }
4867
4868 /* Check if computation complete interrupt is enabled
4869 and if the computation complete flag is raised */
4870 if((__HAL_CRYP_GET_FLAG(CRYP_IT_CCF) != RESET) && (__HAL_CRYP_GET_IT_SOURCE(CRYP_IT_CCFIE) != RESET))
4871 {
4872 #if defined(AES_CR_NPBLB)
4873 if ((hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_GCM_GMAC)
4874 || (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CCM_CMAC))
4875 #else
4876 if ((hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_GCM_GMAC)
4877 || (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC))
4878 #endif
4879 {
4880 /* To ensure proper suspension requests management, CCF flag
4881 is reset in CRYP_AES_Auth_IT() according to the current
4882 phase under handling */
4883 CRYP_AES_Auth_IT(hcryp);
4884 }
4885 else
4886 {
4887 /* Clear Computation Complete Flag */
4888 __HAL_CRYP_CLEAR_FLAG(CRYP_CCF_CLEAR);
4889 CRYP_AES_IT(hcryp);
4890 }
4891 }
4892 }
4893
4894 /**
4895 * @}
4896 */
4897
4898 /** @defgroup CRYP_Exported_Functions_Group5 Peripheral State functions
4899 * @brief Peripheral State functions.
4900 *
4901 @verbatim
4902 ==============================================================================
4903 ##### Peripheral State functions #####
4904 ==============================================================================
4905 [..]
4906 This subsection permits to get in run-time the status of the peripheral.
4907
4908 @endverbatim
4909 * @{
4910 */
4911
4912 /**
4913 * @brief Return the CRYP handle state.
4914 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
4915 * the configuration information for CRYP module
4916 * @retval HAL state
4917 */
4918 HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp)
4919 {
4920 /* Return CRYP handle state */
4921 return hcryp->State;
4922 }
4923
4924 /**
4925 * @brief Return the CRYP peripheral error.
4926 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
4927 * the configuration information for CRYP module
4928 * @note The returned error is a bit-map combination of possible errors
4929 * @retval Error bit-map
4930 */
4931 uint32_t HAL_CRYP_GetError(CRYP_HandleTypeDef *hcryp)
4932 {
4933 return hcryp->ErrorCode;
4934 }
4935
4936 /**
4937 * @}
4938 */
4939
4940 /**
4941 * @}
4942 */
4943
4944 /** @addtogroup CRYP_Private_Functions
4945 * @{
4946 */
4947
4948
4949 /**
4950 * @brief Write the Key in KeyRx registers.
4951 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
4952 * the configuration information for CRYP module
4953 * @retval None
4954 */
4955 static HAL_StatusTypeDef CRYP_SetKey(CRYP_HandleTypeDef *hcryp)
4956 {
4957 uint32_t keyaddr = 0x0U;
4958
4959 if ((uint32_t)(hcryp->Init.pKey == NULL))
4960 {
4961 return HAL_ERROR;
4962 }
4963
4964
4965 keyaddr = (uint32_t)(hcryp->Init.pKey);
4966
4967 if (hcryp->Init.KeySize == CRYP_KEYSIZE_256B)
4968 {
4969 hcryp->Instance->KEYR7 = __REV(*(uint32_t*)(keyaddr));
4970 keyaddr+=4U;
4971 hcryp->Instance->KEYR6 = __REV(*(uint32_t*)(keyaddr));
4972 keyaddr+=4U;
4973 hcryp->Instance->KEYR5 = __REV(*(uint32_t*)(keyaddr));
4974 keyaddr+=4U;
4975 hcryp->Instance->KEYR4 = __REV(*(uint32_t*)(keyaddr));
4976 keyaddr+=4U;
4977 }
4978
4979 hcryp->Instance->KEYR3 = __REV(*(uint32_t*)(keyaddr));
4980 keyaddr+=4U;
4981 hcryp->Instance->KEYR2 = __REV(*(uint32_t*)(keyaddr));
4982 keyaddr+=4U;
4983 hcryp->Instance->KEYR1 = __REV(*(uint32_t*)(keyaddr));
4984 keyaddr+=4U;
4985 hcryp->Instance->KEYR0 = __REV(*(uint32_t*)(keyaddr));
4986
4987 return HAL_OK;
4988 }
4989
4990 /**
4991 * @brief Write the InitVector/InitCounter in IVRx registers.
4992 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
4993 * the configuration information for CRYP module
4994 * @retval None
4995 */
4996 static HAL_StatusTypeDef CRYP_SetInitVector(CRYP_HandleTypeDef *hcryp)
4997 {
4998 uint32_t ivaddr = 0x0U;
4999
5000 #if !defined(AES_CR_NPBLB)
5001 if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC)
5002 {
5003 hcryp->Instance->IVR3 = 0U;
5004 hcryp->Instance->IVR2 = 0U;
5005 hcryp->Instance->IVR1 = 0U;
5006 hcryp->Instance->IVR0 = 0U;
5007 }
5008 else
5009 #endif
5010 {
5011 if (hcryp->Init.pInitVect == NULL)
5012 {
5013 return HAL_ERROR;
5014 }
5015
5016 ivaddr = (uint32_t)(hcryp->Init.pInitVect);
5017
5018 hcryp->Instance->IVR3 = __REV(*(uint32_t*)(ivaddr));
5019 ivaddr+=4U;
5020 hcryp->Instance->IVR2 = __REV(*(uint32_t*)(ivaddr));
5021 ivaddr+=4U;
5022 hcryp->Instance->IVR1 = __REV(*(uint32_t*)(ivaddr));
5023 ivaddr+=4U;
5024 hcryp->Instance->IVR0 = __REV(*(uint32_t*)(ivaddr));
5025 }
5026 return HAL_OK;
5027 }
5028
5029
5030
5031 /**
5032 * @brief Handle CRYP block input/output data handling under interruption.
5033 * @note The function is called under interruption only, once
5034 * interruptions have been enabled by HAL_CRYPEx_AES_IT().
5035 * @param hcryp pointer to a CRYP_HandleTypeDef structure that contains
5036 * the configuration information for CRYP module.
5037 * @retval HAL status
5038 */
5039 static HAL_StatusTypeDef CRYP_AES_IT(CRYP_HandleTypeDef *hcryp)
5040 {
5041 uint32_t inputaddr = 0U;
5042 uint32_t outputaddr = 0U;
5043
5044 if(hcryp->State == HAL_CRYP_STATE_BUSY)
5045 {
5046 if (hcryp->Init.OperatingMode != CRYP_ALGOMODE_KEYDERIVATION)
5047 {
5048 /* Get the output data address */
5049 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
5050
5051 /* Read the last available output block from the Data Output Register */
5052 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
5053 outputaddr+=4U;
5054 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
5055 outputaddr+=4U;
5056 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
5057 outputaddr+=4U;
5058 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
5059 hcryp->pCrypOutBuffPtr += 16U;
5060 hcryp->CrypOutCount -= 16U;
5061
5062 }
5063 else
5064 {
5065 /* Read the derived key from the Key registers */
5066 if (hcryp->Init.KeySize == CRYP_KEYSIZE_256B)
5067 {
5068 *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR7);
5069 outputaddr+=4U;
5070 *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR6);
5071 outputaddr+=4U;
5072 *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR5);
5073 outputaddr+=4U;
5074 *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR4);
5075 outputaddr+=4U;
5076 }
5077
5078 *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR3);
5079 outputaddr+=4U;
5080 *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR2);
5081 outputaddr+=4U;
5082 *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR1);
5083 outputaddr+=4U;
5084 *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR0);
5085 }
5086
5087 /* In case of ciphering or deciphering, check if all output text has been retrieved;
5088 In case of key derivation, stop right there */
5089 if ((hcryp->CrypOutCount == 0U) || (hcryp->Init.OperatingMode == CRYP_ALGOMODE_KEYDERIVATION))
5090 {
5091 /* Disable Computation Complete Flag and Errors Interrupts */
5092 __HAL_CRYP_DISABLE_IT(CRYP_IT_CCFIE|CRYP_IT_ERRIE);
5093 /* Change the CRYP state */
5094 hcryp->State = HAL_CRYP_STATE_READY;
5095
5096 /* Process Unlocked */
5097 __HAL_UNLOCK(hcryp);
5098
5099 /* Call computation complete callback */
5100 HAL_CRYPEx_ComputationCpltCallback(hcryp);
5101
5102 return HAL_OK;
5103 }
5104 /* If suspension flag has been raised, suspend processing */
5105 else if (hcryp->SuspendRequest == HAL_CRYP_SUSPEND)
5106 {
5107 /* reset ModeSuspend */
5108 hcryp->SuspendRequest = HAL_CRYP_SUSPEND_NONE;
5109
5110 /* Disable Computation Complete Flag and Errors Interrupts */
5111 __HAL_CRYP_DISABLE_IT(CRYP_IT_CCFIE|CRYP_IT_ERRIE);
5112 /* Change the CRYP state */
5113 hcryp->State = HAL_CRYP_STATE_SUSPENDED;
5114
5115 /* Process Unlocked */
5116 __HAL_UNLOCK(hcryp);
5117
5118 return HAL_OK;
5119 }
5120 else /* Process the rest of input data */
5121 {
5122 /* Get the Intput data address */
5123 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
5124
5125 /* Increment/decrement instance pointer/counter */
5126 hcryp->pCrypInBuffPtr += 16U;
5127 hcryp->CrypInCount -= 16U;
5128
5129 /* Write the next input block in the Data Input register */
5130 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
5131 inputaddr+=4U;
5132 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
5133 inputaddr+=4U;
5134 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
5135 inputaddr+=4U;
5136 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
5137
5138 return HAL_OK;
5139 }
5140 }
5141 else
5142 {
5143 return HAL_BUSY;
5144 }
5145 }
5146
5147 /**
5148 * @}
5149 */
5150
5151 #endif /* AES */
5152
5153 #endif /* HAL_CRYP_MODULE_ENABLED */
5154
5155 /**
5156 * @}
5157 */
5158
5159 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/