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comparison Common/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cec.c @ 128:c78bcbd5deda FlipDisplay
Added current STM32 standandard libraries in version independend folder structure
author | Ideenmodellierer |
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date | Sun, 17 Feb 2019 21:12:22 +0100 |
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1 /** | |
2 ****************************************************************************** | |
3 * @file stm32f4xx_hal_cec.c | |
4 * @author MCD Application Team | |
5 * @brief CEC HAL module driver. | |
6 * This file provides firmware functions to manage the following | |
7 * functionalities of the High Definition Multimedia Interface | |
8 * Consumer Electronics Control Peripheral (CEC). | |
9 * + Initialization and de-initialization functions | |
10 * + IO operation functions | |
11 * + Peripheral Control functions | |
12 * | |
13 * | |
14 @verbatim | |
15 =============================================================================== | |
16 ##### How to use this driver ##### | |
17 =============================================================================== | |
18 [..] | |
19 The CEC HAL driver can be used as follow: | |
20 | |
21 (#) Declare a CEC_HandleTypeDef handle structure. | |
22 (#) Initialize the CEC low level resources by implementing the HAL_CEC_MspInit ()API: | |
23 (##) Enable the CEC interface clock. | |
24 (##) CEC pins configuration: | |
25 (+++) Enable the clock for the CEC GPIOs. | |
26 (+++) Configure these CEC pins as alternate function pull-up. | |
27 (##) NVIC configuration if you need to use interrupt process (HAL_CEC_Transmit_IT() | |
28 and HAL_CEC_Receive_IT() APIs): | |
29 (+++) Configure the CEC interrupt priority. | |
30 (+++) Enable the NVIC CEC IRQ handle. | |
31 (+++) The specific CEC interrupts (Transmission complete interrupt, | |
32 RXNE interrupt and Error Interrupts) will be managed using the macros | |
33 __HAL_CEC_ENABLE_IT() and __HAL_CEC_DISABLE_IT() inside the transmit | |
34 and receive process. | |
35 | |
36 (#) Program the Signal Free Time (SFT) and SFT option, Tolerance, reception stop in | |
37 in case of Bit Rising Error, Error-Bit generation conditions, device logical | |
38 address and Listen mode in the hcec Init structure. | |
39 | |
40 (#) Initialize the CEC registers by calling the HAL_CEC_Init() API. | |
41 | |
42 [..] | |
43 (@) This API (HAL_CEC_Init()) configures also the low level Hardware (GPIO, CLOCK, CORTEX...) | |
44 by calling the customed HAL_CEC_MspInit() API. | |
45 | |
46 @endverbatim | |
47 ****************************************************************************** | |
48 * @attention | |
49 * | |
50 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> | |
51 * | |
52 * Redistribution and use in source and binary forms, with or without modification, | |
53 * are permitted provided that the following conditions are met: | |
54 * 1. Redistributions of source code must retain the above copyright notice, | |
55 * this list of conditions and the following disclaimer. | |
56 * 2. Redistributions in binary form must reproduce the above copyright notice, | |
57 * this list of conditions and the following disclaimer in the documentation | |
58 * and/or other materials provided with the distribution. | |
59 * 3. Neither the name of STMicroelectronics nor the names of its contributors | |
60 * may be used to endorse or promote products derived from this software | |
61 * without specific prior written permission. | |
62 * | |
63 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
64 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
65 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | |
66 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE | |
67 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
68 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | |
69 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | |
70 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | |
71 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
72 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
73 * | |
74 ****************************************************************************** | |
75 */ | |
76 | |
77 /* Includes ------------------------------------------------------------------*/ | |
78 #include "stm32f4xx_hal.h" | |
79 | |
80 /** @addtogroup STM32F4xx_HAL_Driver | |
81 * @{ | |
82 */ | |
83 | |
84 /** @defgroup CEC CEC | |
85 * @brief HAL CEC module driver | |
86 * @{ | |
87 */ | |
88 #ifdef HAL_CEC_MODULE_ENABLED | |
89 | |
90 #if defined(STM32F446xx) | |
91 | |
92 /* Private typedef -----------------------------------------------------------*/ | |
93 /* Private define ------------------------------------------------------------*/ | |
94 /** @defgroup CEC_Private_Constants CEC Private Constants | |
95 * @{ | |
96 */ | |
97 /** | |
98 * @} | |
99 */ | |
100 | |
101 /* Private macro -------------------------------------------------------------*/ | |
102 /* Private variables ---------------------------------------------------------*/ | |
103 /* Private function prototypes -----------------------------------------------*/ | |
104 /** @defgroup CEC_Private_Functions CEC Private Functions | |
105 * @{ | |
106 */ | |
107 /** | |
108 * @} | |
109 */ | |
110 | |
111 /* Exported functions ---------------------------------------------------------*/ | |
112 | |
113 /** @defgroup CEC_Exported_Functions CEC Exported Functions | |
114 * @{ | |
115 */ | |
116 | |
117 /** @defgroup CEC_Exported_Functions_Group1 Initialization and de-initialization functions | |
118 * @brief Initialization and Configuration functions | |
119 * | |
120 @verbatim | |
121 =============================================================================== | |
122 ##### Initialization and Configuration functions ##### | |
123 =============================================================================== | |
124 [..] | |
125 This subsection provides a set of functions allowing to initialize the CEC | |
126 (+) The following parameters need to be configured: | |
127 (++) SignalFreeTime | |
128 (++) Tolerance | |
129 (++) BRERxStop (RX stopped or not upon Bit Rising Error) | |
130 (++) BREErrorBitGen (Error-Bit generation in case of Bit Rising Error) | |
131 (++) LBPEErrorBitGen (Error-Bit generation in case of Long Bit Period Error) | |
132 (++) BroadcastMsgNoErrorBitGen (Error-bit generation in case of broadcast message error) | |
133 (++) SignalFreeTimeOption (SFT Timer start definition) | |
134 (++) OwnAddress (CEC device address) | |
135 (++) ListenMode | |
136 | |
137 @endverbatim | |
138 * @{ | |
139 */ | |
140 | |
141 /** | |
142 * @brief Initializes the CEC mode according to the specified | |
143 * parameters in the CEC_InitTypeDef and creates the associated handle . | |
144 * @param hcec CEC handle | |
145 * @retval HAL status | |
146 */ | |
147 HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec) | |
148 { | |
149 /* Check the CEC handle allocation */ | |
150 if((hcec == NULL) ||(hcec->Init.RxBuffer == NULL)) | |
151 { | |
152 return HAL_ERROR; | |
153 } | |
154 | |
155 /* Check the parameters */ | |
156 assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance)); | |
157 assert_param(IS_CEC_SIGNALFREETIME(hcec->Init.SignalFreeTime)); | |
158 assert_param(IS_CEC_TOLERANCE(hcec->Init.Tolerance)); | |
159 assert_param(IS_CEC_BRERXSTOP(hcec->Init.BRERxStop)); | |
160 assert_param(IS_CEC_BREERRORBITGEN(hcec->Init.BREErrorBitGen)); | |
161 assert_param(IS_CEC_LBPEERRORBITGEN(hcec->Init.LBPEErrorBitGen)); | |
162 assert_param(IS_CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION(hcec->Init.BroadcastMsgNoErrorBitGen)); | |
163 assert_param(IS_CEC_SFTOP(hcec->Init.SignalFreeTimeOption)); | |
164 assert_param(IS_CEC_LISTENING_MODE(hcec->Init.ListenMode)); | |
165 assert_param(IS_CEC_OWN_ADDRESS(hcec->Init.OwnAddress)); | |
166 | |
167 if(hcec->gState == HAL_CEC_STATE_RESET) | |
168 { | |
169 /* Allocate lock resource and initialize it */ | |
170 hcec->Lock = HAL_UNLOCKED; | |
171 /* Init the low level hardware : GPIO, CLOCK */ | |
172 HAL_CEC_MspInit(hcec); | |
173 } | |
174 hcec->gState = HAL_CEC_STATE_BUSY; | |
175 | |
176 /* Disable the Peripheral */ | |
177 __HAL_CEC_DISABLE(hcec); | |
178 | |
179 /* Write to CEC Control Register */ | |
180 hcec->Instance->CFGR = hcec->Init.SignalFreeTime | hcec->Init.Tolerance | hcec->Init.BRERxStop|\ | |
181 hcec->Init.BREErrorBitGen | hcec->Init.LBPEErrorBitGen | hcec->Init.BroadcastMsgNoErrorBitGen |\ | |
182 hcec->Init.SignalFreeTimeOption |((uint32_t)(hcec->Init.OwnAddress)<<16U) |\ | |
183 hcec->Init.ListenMode; | |
184 | |
185 /* Enable the following CEC Transmission/Reception interrupts as | |
186 * well as the following CEC Transmission/Reception Errors interrupts | |
187 * Rx Byte Received IT | |
188 * End of Reception IT | |
189 * Rx overrun | |
190 * Rx bit rising error | |
191 * Rx short bit period error | |
192 * Rx long bit period error | |
193 * Rx missing acknowledge | |
194 * Tx Byte Request IT | |
195 * End of Transmission IT | |
196 * Tx Missing Acknowledge IT | |
197 * Tx-Error IT | |
198 * Tx-Buffer Underrun IT | |
199 * Tx arbitration lost */ | |
200 __HAL_CEC_ENABLE_IT(hcec, CEC_IT_RXBR|CEC_IT_RXEND|CEC_IER_RX_ALL_ERR|CEC_IT_TXBR|CEC_IT_TXEND|CEC_IER_TX_ALL_ERR); | |
201 | |
202 /* Enable the CEC Peripheral */ | |
203 __HAL_CEC_ENABLE(hcec); | |
204 | |
205 hcec->ErrorCode = HAL_CEC_ERROR_NONE; | |
206 hcec->gState = HAL_CEC_STATE_READY; | |
207 hcec->RxState = HAL_CEC_STATE_READY; | |
208 | |
209 return HAL_OK; | |
210 } | |
211 | |
212 /** | |
213 * @brief DeInitializes the CEC peripheral | |
214 * @param hcec CEC handle | |
215 * @retval HAL status | |
216 */ | |
217 HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec) | |
218 { | |
219 /* Check the CEC handle allocation */ | |
220 if(hcec == NULL) | |
221 { | |
222 return HAL_ERROR; | |
223 } | |
224 | |
225 /* Check the parameters */ | |
226 assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance)); | |
227 | |
228 hcec->gState = HAL_CEC_STATE_BUSY; | |
229 | |
230 /* DeInit the low level hardware */ | |
231 HAL_CEC_MspDeInit(hcec); | |
232 /* Disable the Peripheral */ | |
233 __HAL_CEC_DISABLE(hcec); | |
234 | |
235 /* Clear Flags */ | |
236 __HAL_CEC_CLEAR_FLAG(hcec,CEC_FLAG_TXEND|CEC_FLAG_TXBR|CEC_FLAG_RXBR|CEC_FLAG_RXEND|CEC_ISR_ALL_ERROR); | |
237 | |
238 /* Disable the following CEC Transmission/Reception interrupts as | |
239 * well as the following CEC Transmission/Reception Errors interrupts | |
240 * Rx Byte Received IT | |
241 * End of Reception IT | |
242 * Rx overrun | |
243 * Rx bit rising error | |
244 * Rx short bit period error | |
245 * Rx long bit period error | |
246 * Rx missing acknowledge | |
247 * Tx Byte Request IT | |
248 * End of Transmission IT | |
249 * Tx Missing Acknowledge IT | |
250 * Tx-Error IT | |
251 * Tx-Buffer Underrun IT | |
252 * Tx arbitration lost */ | |
253 __HAL_CEC_DISABLE_IT(hcec, CEC_IT_RXBR|CEC_IT_RXEND|CEC_IER_RX_ALL_ERR|CEC_IT_TXBR|CEC_IT_TXEND|CEC_IER_TX_ALL_ERR); | |
254 | |
255 hcec->ErrorCode = HAL_CEC_ERROR_NONE; | |
256 hcec->gState = HAL_CEC_STATE_RESET; | |
257 hcec->RxState = HAL_CEC_STATE_RESET; | |
258 | |
259 /* Process Unlock */ | |
260 __HAL_UNLOCK(hcec); | |
261 | |
262 return HAL_OK; | |
263 } | |
264 | |
265 /** | |
266 * @brief Initializes the Own Address of the CEC device | |
267 * @param hcec CEC handle | |
268 * @param CEC_OwnAddress The CEC own address. | |
269 * @retval HAL status | |
270 */ | |
271 HAL_StatusTypeDef HAL_CEC_SetDeviceAddress(CEC_HandleTypeDef *hcec, uint16_t CEC_OwnAddress) | |
272 { | |
273 /* Check the parameters */ | |
274 assert_param(IS_CEC_OWN_ADDRESS(CEC_OwnAddress)); | |
275 | |
276 if ((hcec->gState == HAL_CEC_STATE_READY) && (hcec->RxState == HAL_CEC_STATE_READY)) | |
277 { | |
278 /* Process Locked */ | |
279 __HAL_LOCK(hcec); | |
280 | |
281 hcec->gState = HAL_CEC_STATE_BUSY; | |
282 | |
283 /* Disable the Peripheral */ | |
284 __HAL_CEC_DISABLE(hcec); | |
285 | |
286 if(CEC_OwnAddress != CEC_OWN_ADDRESS_NONE) | |
287 { | |
288 hcec->Instance->CFGR |= ((uint32_t)CEC_OwnAddress<<16U); | |
289 } | |
290 else | |
291 { | |
292 hcec->Instance->CFGR &= ~(CEC_CFGR_OAR); | |
293 } | |
294 | |
295 hcec->gState = HAL_CEC_STATE_READY; | |
296 hcec->ErrorCode = HAL_CEC_ERROR_NONE; | |
297 | |
298 /* Process Unlocked */ | |
299 __HAL_UNLOCK(hcec); | |
300 | |
301 /* Enable the Peripheral */ | |
302 __HAL_CEC_ENABLE(hcec); | |
303 | |
304 return HAL_OK; | |
305 } | |
306 else | |
307 { | |
308 return HAL_BUSY; | |
309 } | |
310 } | |
311 | |
312 /** | |
313 * @brief CEC MSP Init | |
314 * @param hcec CEC handle | |
315 * @retval None | |
316 */ | |
317 __weak void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec) | |
318 { | |
319 /* Prevent unused argument(s) compilation warning */ | |
320 UNUSED(hcec); | |
321 /* NOTE : This function should not be modified, when the callback is needed, | |
322 the HAL_CEC_MspInit can be implemented in the user file | |
323 */ | |
324 } | |
325 | |
326 /** | |
327 * @brief CEC MSP DeInit | |
328 * @param hcec CEC handle | |
329 * @retval None | |
330 */ | |
331 __weak void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec) | |
332 { | |
333 /* Prevent unused argument(s) compilation warning */ | |
334 UNUSED(hcec); | |
335 /* NOTE : This function should not be modified, when the callback is needed, | |
336 the HAL_CEC_MspDeInit can be implemented in the user file | |
337 */ | |
338 } | |
339 | |
340 /** | |
341 * @} | |
342 */ | |
343 | |
344 /** @defgroup CEC_Exported_Functions_Group2 Input and Output operation functions | |
345 * @brief CEC Transmit/Receive functions | |
346 * | |
347 @verbatim | |
348 =============================================================================== | |
349 ##### IO operation functions ##### | |
350 =============================================================================== | |
351 This subsection provides a set of functions allowing to manage the CEC data transfers. | |
352 | |
353 (#) The CEC handle must contain the initiator (TX side) and the destination (RX side) | |
354 logical addresses (4-bit long addresses, 0x0F for broadcast messages destination) | |
355 | |
356 (#) The communication is performed using Interrupts. | |
357 These API's return the HAL status. | |
358 The end of the data processing will be indicated through the | |
359 dedicated CEC IRQ when using Interrupt mode. | |
360 The HAL_CEC_TxCpltCallback(), HAL_CEC_RxCpltCallback() user callbacks | |
361 will be executed respectivelly at the end of the transmit or Receive process | |
362 The HAL_CEC_ErrorCallback()user callback will be executed when a communication | |
363 error is detected | |
364 | |
365 (#) API's with Interrupt are : | |
366 (+) HAL_CEC_Transmit_IT() | |
367 (+) HAL_CEC_IRQHandler() | |
368 | |
369 (#) A set of User Callbacks are provided: | |
370 (+) HAL_CEC_TxCpltCallback() | |
371 (+) HAL_CEC_RxCpltCallback() | |
372 (+) HAL_CEC_ErrorCallback() | |
373 | |
374 @endverbatim | |
375 * @{ | |
376 */ | |
377 | |
378 /** | |
379 * @brief Send data in interrupt mode | |
380 * @param hcec CEC handle | |
381 * @param InitiatorAddress Initiator logical address | |
382 * @param DestinationAddress destination logical address | |
383 * @param pData pointer to input byte data buffer | |
384 * @param Size amount of data to be sent in bytes (without counting the header). | |
385 * 0 means only the header is sent (ping operation). | |
386 * Maximum TX size is 15 bytes (1 opcode and up to 14 operands). | |
387 * @retval HAL status | |
388 */ | |
389 HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t InitiatorAddress, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size) | |
390 { | |
391 /* if the IP isn't already busy and if there is no previous transmission | |
392 already pending due to arbitration lost */ | |
393 if (hcec->gState == HAL_CEC_STATE_READY) | |
394 { | |
395 if((pData == NULL ) && (Size > 0U)) | |
396 { | |
397 return HAL_ERROR; | |
398 } | |
399 | |
400 assert_param(IS_CEC_ADDRESS(DestinationAddress)); | |
401 assert_param(IS_CEC_ADDRESS(InitiatorAddress)); | |
402 assert_param(IS_CEC_MSGSIZE(Size)); | |
403 | |
404 /* Process Locked */ | |
405 __HAL_LOCK(hcec); | |
406 hcec->pTxBuffPtr = pData; | |
407 hcec->gState = HAL_CEC_STATE_BUSY_TX; | |
408 hcec->ErrorCode = HAL_CEC_ERROR_NONE; | |
409 | |
410 /* initialize the number of bytes to send, | |
411 * 0 means only one header is sent (ping operation) */ | |
412 hcec->TxXferCount = Size; | |
413 | |
414 /* in case of no payload (Size = 0), sender is only pinging the system; | |
415 Set TX End of Message (TXEOM) bit, must be set before writing data to TXDR */ | |
416 if (Size == 0U) | |
417 { | |
418 __HAL_CEC_LAST_BYTE_TX_SET(hcec); | |
419 } | |
420 | |
421 /* send header block */ | |
422 hcec->Instance->TXDR = ((uint8_t)(InitiatorAddress << CEC_INITIATOR_LSB_POS) |(uint8_t) DestinationAddress); | |
423 /* Set TX Start of Message (TXSOM) bit */ | |
424 __HAL_CEC_FIRST_BYTE_TX_SET(hcec); | |
425 | |
426 /* Process Unlocked */ | |
427 __HAL_UNLOCK(hcec); | |
428 | |
429 return HAL_OK; | |
430 | |
431 } | |
432 else | |
433 { | |
434 return HAL_BUSY; | |
435 } | |
436 } | |
437 | |
438 /** | |
439 * @brief Get size of the received frame. | |
440 * @param hcec CEC handle | |
441 * @retval Frame size | |
442 */ | |
443 uint32_t HAL_CEC_GetLastReceivedFrameSize(CEC_HandleTypeDef *hcec) | |
444 { | |
445 return hcec->RxXferSize; | |
446 } | |
447 | |
448 /** | |
449 * @brief Change Rx Buffer. | |
450 * @param hcec CEC handle | |
451 * @param Rxbuffer Rx Buffer | |
452 * @note This function can be called only inside the HAL_CEC_RxCpltCallback() | |
453 * @retval Frame size | |
454 */ | |
455 void HAL_CEC_ChangeRxBuffer(CEC_HandleTypeDef *hcec, uint8_t* Rxbuffer) | |
456 { | |
457 hcec->Init.RxBuffer = Rxbuffer; | |
458 } | |
459 | |
460 /** | |
461 * @brief This function handles CEC interrupt requests. | |
462 * @param hcec CEC handle | |
463 * @retval None | |
464 */ | |
465 void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec) | |
466 { | |
467 | |
468 /* save interrupts register for further error or interrupts handling purposes */ | |
469 uint32_t reg = 0U; | |
470 reg = hcec->Instance->ISR; | |
471 | |
472 | |
473 /* ----------------------------Arbitration Lost Management----------------------------------*/ | |
474 /* CEC TX arbitration error interrupt occurred --------------------------------------*/ | |
475 if((reg & CEC_FLAG_ARBLST) != RESET) | |
476 { | |
477 hcec->ErrorCode = HAL_CEC_ERROR_ARBLST; | |
478 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_ARBLST); | |
479 } | |
480 | |
481 /* ----------------------------Rx Management----------------------------------*/ | |
482 /* CEC RX byte received interrupt ---------------------------------------------------*/ | |
483 if((reg & CEC_FLAG_RXBR) != RESET) | |
484 { | |
485 /* reception is starting */ | |
486 hcec->RxState = HAL_CEC_STATE_BUSY_RX; | |
487 hcec->RxXferSize++; | |
488 /* read received byte */ | |
489 *hcec->Init.RxBuffer++ = hcec->Instance->RXDR; | |
490 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXBR); | |
491 } | |
492 | |
493 /* CEC RX end received interrupt ---------------------------------------------------*/ | |
494 if((reg & CEC_FLAG_RXEND) != RESET) | |
495 { | |
496 /* clear IT */ | |
497 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXEND); | |
498 | |
499 /* Rx process is completed, restore hcec->RxState to Ready */ | |
500 hcec->RxState = HAL_CEC_STATE_READY; | |
501 hcec->ErrorCode = HAL_CEC_ERROR_NONE; | |
502 hcec->Init.RxBuffer -= hcec->RxXferSize; | |
503 HAL_CEC_RxCpltCallback(hcec, hcec->RxXferSize); | |
504 hcec->RxXferSize = 0U; | |
505 } | |
506 | |
507 /* ----------------------------Tx Management----------------------------------*/ | |
508 /* CEC TX byte request interrupt ------------------------------------------------*/ | |
509 if((reg & CEC_FLAG_TXBR) != RESET) | |
510 { | |
511 if (hcec->TxXferCount == 0U) | |
512 { | |
513 /* if this is the last byte transmission, set TX End of Message (TXEOM) bit */ | |
514 __HAL_CEC_LAST_BYTE_TX_SET(hcec); | |
515 hcec->Instance->TXDR = *hcec->pTxBuffPtr++; | |
516 } | |
517 else | |
518 { | |
519 hcec->Instance->TXDR = *hcec->pTxBuffPtr++; | |
520 hcec->TxXferCount--; | |
521 } | |
522 /* clear Tx-Byte request flag */ | |
523 __HAL_CEC_CLEAR_FLAG(hcec,CEC_FLAG_TXBR); | |
524 } | |
525 | |
526 /* CEC TX end interrupt ------------------------------------------------*/ | |
527 if((reg & CEC_FLAG_TXEND) != RESET) | |
528 { | |
529 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TXEND); | |
530 | |
531 /* Tx process is ended, restore hcec->gState to Ready */ | |
532 hcec->gState = HAL_CEC_STATE_READY; | |
533 /* Call the Process Unlocked before calling the Tx call back API to give the possibility to | |
534 start again the Transmission under the Tx call back API */ | |
535 __HAL_UNLOCK(hcec); | |
536 hcec->ErrorCode = HAL_CEC_ERROR_NONE; | |
537 HAL_CEC_TxCpltCallback(hcec); | |
538 } | |
539 | |
540 /* ----------------------------Rx/Tx Error Management----------------------------------*/ | |
541 if ((reg & (CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE|CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)) != 0U) | |
542 { | |
543 hcec->ErrorCode = reg; | |
544 __HAL_CEC_CLEAR_FLAG(hcec, HAL_CEC_ERROR_RXOVR|HAL_CEC_ERROR_BRE|CEC_FLAG_LBPE|CEC_FLAG_SBPE|HAL_CEC_ERROR_RXACKE|HAL_CEC_ERROR_TXUDR|HAL_CEC_ERROR_TXERR|HAL_CEC_ERROR_TXACKE); | |
545 | |
546 | |
547 if((reg & (CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE)) != RESET) | |
548 { | |
549 hcec->Init.RxBuffer-=hcec->RxXferSize; | |
550 hcec->RxXferSize = 0U; | |
551 hcec->RxState = HAL_CEC_STATE_READY; | |
552 } | |
553 else if (((reg & (CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)) != RESET) && ((reg & CEC_ISR_ARBLST) == RESET)) | |
554 { | |
555 /* Set the CEC state ready to be able to start again the process */ | |
556 hcec->gState = HAL_CEC_STATE_READY; | |
557 } | |
558 | |
559 /* Error Call Back */ | |
560 HAL_CEC_ErrorCallback(hcec); | |
561 } | |
562 | |
563 } | |
564 | |
565 /** | |
566 * @brief Tx Transfer completed callback | |
567 * @param hcec CEC handle | |
568 * @retval None | |
569 */ | |
570 __weak void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec) | |
571 { | |
572 /* Prevent unused argument(s) compilation warning */ | |
573 UNUSED(hcec); | |
574 /* NOTE : This function should not be modified, when the callback is needed, | |
575 the HAL_CEC_TxCpltCallback can be implemented in the user file | |
576 */ | |
577 } | |
578 | |
579 /** | |
580 * @brief Rx Transfer completed callback | |
581 * @param hcec CEC handle | |
582 * @param RxFrameSize Size of frame | |
583 * @retval None | |
584 */ | |
585 __weak void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec, uint32_t RxFrameSize) | |
586 { | |
587 /* Prevent unused argument(s) compilation warning */ | |
588 UNUSED(hcec); | |
589 UNUSED(RxFrameSize); | |
590 /* NOTE : This function should not be modified, when the callback is needed, | |
591 the HAL_CEC_RxCpltCallback can be implemented in the user file | |
592 */ | |
593 } | |
594 | |
595 /** | |
596 * @brief CEC error callbacks | |
597 * @param hcec CEC handle | |
598 * @retval None | |
599 */ | |
600 __weak void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec) | |
601 { | |
602 /* Prevent unused argument(s) compilation warning */ | |
603 UNUSED(hcec); | |
604 /* NOTE : This function should not be modified, when the callback is needed, | |
605 the HAL_CEC_ErrorCallback can be implemented in the user file | |
606 */ | |
607 } | |
608 /** | |
609 * @} | |
610 */ | |
611 | |
612 /** @defgroup CEC_Exported_Functions_Group3 Peripheral Control function | |
613 * @brief CEC control functions | |
614 * | |
615 @verbatim | |
616 =============================================================================== | |
617 ##### Peripheral Control function ##### | |
618 =============================================================================== | |
619 [..] | |
620 This subsection provides a set of functions allowing to control the CEC. | |
621 (+) HAL_CEC_GetState() API can be helpful to check in run-time the state of the CEC peripheral. | |
622 (+) HAL_CEC_GetError() API can be helpful to check in run-time the error of the CEC peripheral. | |
623 @endverbatim | |
624 * @{ | |
625 */ | |
626 /** | |
627 * @brief return the CEC state | |
628 * @param hcec pointer to a CEC_HandleTypeDef structure that contains | |
629 * the configuration information for the specified CEC module. | |
630 * @retval HAL state | |
631 */ | |
632 HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec) | |
633 { | |
634 uint32_t temp1 = 0x00U, temp2 = 0x00U; | |
635 temp1 = hcec->gState; | |
636 temp2 = hcec->RxState; | |
637 | |
638 return (HAL_CEC_StateTypeDef)(temp1 | temp2); | |
639 } | |
640 | |
641 /** | |
642 * @brief Return the CEC error code | |
643 * @param hcec pointer to a CEC_HandleTypeDef structure that contains | |
644 * the configuration information for the specified CEC. | |
645 * @retval CEC Error Code | |
646 */ | |
647 uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec) | |
648 { | |
649 return hcec->ErrorCode; | |
650 } | |
651 | |
652 /** | |
653 * @} | |
654 */ | |
655 | |
656 /** | |
657 * @} | |
658 */ | |
659 | |
660 #endif /* STM32F446xx */ | |
661 | |
662 #endif /* HAL_CEC_MODULE_ENABLED */ | |
663 /** | |
664 * @} | |
665 */ | |
666 | |
667 /** | |
668 * @} | |
669 */ | |
670 | |
671 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |