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Added current STM32 standandard libraries in version independend folder structure
author | Ideenmodellierer |
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date | Sun, 17 Feb 2019 21:12:22 +0100 |
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1 /** | |
2 ****************************************************************************** | |
3 * @file stm32f4xx_hal_can.c | |
4 * @author MCD Application Team | |
5 * @brief CAN HAL module driver. | |
6 * This file provides firmware functions to manage the following | |
7 * functionalities of the Controller Area Network (CAN) peripheral: | |
8 * + Initialization and de-initialization functions | |
9 * + Configuration functions | |
10 * + Control functions | |
11 * + Interrupts management | |
12 * + Callbacks functions | |
13 * + Peripheral State and Error functions | |
14 * | |
15 @verbatim | |
16 ============================================================================== | |
17 ##### How to use this driver ##### | |
18 ============================================================================== | |
19 [..] | |
20 (#) Initialize the CAN low level resources by implementing the | |
21 HAL_CAN_MspInit(): | |
22 (++) Enable the CAN interface clock using __HAL_RCC_CANx_CLK_ENABLE() | |
23 (++) Configure CAN pins | |
24 (+++) Enable the clock for the CAN GPIOs | |
25 (+++) Configure CAN pins as alternate function open-drain | |
26 (++) In case of using interrupts (e.g. HAL_CAN_ActivateNotification()) | |
27 (+++) Configure the CAN interrupt priority using | |
28 HAL_NVIC_SetPriority() | |
29 (+++) Enable the CAN IRQ handler using HAL_NVIC_EnableIRQ() | |
30 (+++) In CAN IRQ handler, call HAL_CAN_IRQHandler() | |
31 | |
32 (#) Initialize the CAN peripheral using HAL_CAN_Init() function. This | |
33 function resorts to HAL_CAN_MspInit() for low-level initialization. | |
34 | |
35 (#) Configure the reception filters using the following configuration | |
36 functions: | |
37 (++) HAL_CAN_ConfigFilter() | |
38 | |
39 (#) Start the CAN module using HAL_CAN_Start() function. At this level | |
40 the node is active on the bus: it receive messages, and can send | |
41 messages. | |
42 | |
43 (#) To manage messages transmission, the following Tx control functions | |
44 can be used: | |
45 (++) HAL_CAN_AddTxMessage() to request transmission of a new | |
46 message. | |
47 (++) HAL_CAN_AbortTxRequest() to abort transmission of a pending | |
48 message. | |
49 (++) HAL_CAN_GetTxMailboxesFreeLevel() to get the number of free Tx | |
50 mailboxes. | |
51 (++) HAL_CAN_IsTxMessagePending() to check if a message is pending | |
52 in a Tx mailbox. | |
53 (++) HAL_CAN_GetTxTimestamp() to get the timestamp of Tx message | |
54 sent, if time triggered communication mode is enabled. | |
55 | |
56 (#) When a message is received into the CAN Rx FIFOs, it can be retrieved | |
57 using the HAL_CAN_GetRxMessage() function. The function | |
58 HAL_CAN_GetRxFifoFillLevel() allows to know how many Rx message are | |
59 stored in the Rx Fifo. | |
60 | |
61 (#) Calling the HAL_CAN_Stop() function stops the CAN module. | |
62 | |
63 (#) The deinitialization is achieved with HAL_CAN_DeInit() function. | |
64 | |
65 | |
66 *** Polling mode operation *** | |
67 ============================== | |
68 [..] | |
69 (#) Reception: | |
70 (++) Monitor reception of message using HAL_CAN_GetRxFifoFillLevel() | |
71 until at least one message is received. | |
72 (++) Then get the message using HAL_CAN_GetRxMessage(). | |
73 | |
74 (#) Transmission: | |
75 (++) Monitor the Tx mailboxes availability until at least one Tx | |
76 mailbox is free, using HAL_CAN_GetTxMailboxesFreeLevel(). | |
77 (++) Then request transmission of a message using | |
78 HAL_CAN_AddTxMessage(). | |
79 | |
80 | |
81 *** Interrupt mode operation *** | |
82 ================================ | |
83 [..] | |
84 (#) Notifications are activated using HAL_CAN_ActivateNotification() | |
85 function. Then, the process can be controlled through the | |
86 available user callbacks: HAL_CAN_xxxCallback(), using same APIs | |
87 HAL_CAN_GetRxMessage() and HAL_CAN_AddTxMessage(). | |
88 | |
89 (#) Notifications can be deactivated using | |
90 HAL_CAN_DeactivateNotification() function. | |
91 | |
92 (#) Special care should be taken for CAN_IT_RX_FIFO0_MSG_PENDING and | |
93 CAN_IT_RX_FIFO1_MSG_PENDING notifications. These notifications trig | |
94 the callbacks HAL_CAN_RxFIFO0MsgPendingCallback() and | |
95 HAL_CAN_RxFIFO1MsgPendingCallback(). User has two possible options | |
96 here. | |
97 (++) Directly get the Rx message in the callback, using | |
98 HAL_CAN_GetRxMessage(). | |
99 (++) Or deactivate the notification in the callback without | |
100 getting the Rx message. The Rx message can then be got later | |
101 using HAL_CAN_GetRxMessage(). Once the Rx message have been | |
102 read, the notification can be activated again. | |
103 | |
104 | |
105 *** Sleep mode *** | |
106 ================== | |
107 [..] | |
108 (#) The CAN peripheral can be put in sleep mode (low power), using | |
109 HAL_CAN_RequestSleep(). The sleep mode will be entered as soon as the | |
110 current CAN activity (transmission or reception of a CAN frame) will | |
111 be completed. | |
112 | |
113 (#) A notification can be activated to be informed when the sleep mode | |
114 will be entered. | |
115 | |
116 (#) It can be checked if the sleep mode is entered using | |
117 HAL_CAN_IsSleepActive(). | |
118 Note that the CAN state (accessible from the API HAL_CAN_GetState()) | |
119 is HAL_CAN_STATE_SLEEP_PENDING as soon as the sleep mode request is | |
120 submitted (the sleep mode is not yet entered), and become | |
121 HAL_CAN_STATE_SLEEP_ACTIVE when the sleep mode is effective. | |
122 | |
123 (#) The wake-up from sleep mode can be trigged by two ways: | |
124 (++) Using HAL_CAN_WakeUp(). When returning from this function, | |
125 the sleep mode is exited (if return status is HAL_OK). | |
126 (++) When a start of Rx CAN frame is detected by the CAN peripheral, | |
127 if automatic wake up mode is enabled. | |
128 | |
129 @endverbatim | |
130 ****************************************************************************** | |
131 * @attention | |
132 * | |
133 * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> | |
134 * | |
135 * Redistribution and use in source and binary forms, with or without modification, | |
136 * are permitted provided that the following conditions are met: | |
137 * 1. Redistributions of source code must retain the above copyright notice, | |
138 * this list of conditions and the following disclaimer. | |
139 * 2. Redistributions in binary form must reproduce the above copyright notice, | |
140 * this list of conditions and the following disclaimer in the documentation | |
141 * and/or other materials provided with the distribution. | |
142 * 3. Neither the name of STMicroelectronics nor the names of its contributors | |
143 * may be used to endorse or promote products derived from this software | |
144 * without specific prior written permission. | |
145 * | |
146 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
147 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
148 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | |
149 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE | |
150 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
151 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | |
152 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | |
153 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | |
154 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
155 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
156 * | |
157 ****************************************************************************** | |
158 */ | |
159 | |
160 /* Includes ------------------------------------------------------------------*/ | |
161 #include "stm32f4xx_hal.h" | |
162 | |
163 /** @addtogroup STM32F4xx_HAL_Driver | |
164 * @{ | |
165 */ | |
166 | |
167 #if defined(CAN1) | |
168 | |
169 /** @defgroup CAN CAN | |
170 * @brief CAN driver modules | |
171 * @{ | |
172 */ | |
173 | |
174 #ifdef HAL_CAN_MODULE_ENABLED | |
175 | |
176 #ifdef HAL_CAN_LEGACY_MODULE_ENABLED | |
177 #error "The CAN driver cannot be used with its legacy, Please enable only one CAN module at once" | |
178 #endif | |
179 | |
180 /* Private typedef -----------------------------------------------------------*/ | |
181 /* Private define ------------------------------------------------------------*/ | |
182 /** @defgroup CAN_Private_Constants CAN Private Constants | |
183 * @{ | |
184 */ | |
185 #define CAN_TIMEOUT_VALUE 10U | |
186 /** | |
187 * @} | |
188 */ | |
189 /* Private macro -------------------------------------------------------------*/ | |
190 /* Private variables ---------------------------------------------------------*/ | |
191 /* Private function prototypes -----------------------------------------------*/ | |
192 /* Exported functions --------------------------------------------------------*/ | |
193 | |
194 /** @defgroup CAN_Exported_Functions CAN Exported Functions | |
195 * @{ | |
196 */ | |
197 | |
198 /** @defgroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions | |
199 * @brief Initialization and Configuration functions | |
200 * | |
201 @verbatim | |
202 ============================================================================== | |
203 ##### Initialization and de-initialization functions ##### | |
204 ============================================================================== | |
205 [..] This section provides functions allowing to: | |
206 (+) HAL_CAN_Init : Initialize and configure the CAN. | |
207 (+) HAL_CAN_DeInit : De-initialize the CAN. | |
208 (+) HAL_CAN_MspInit : Initialize the CAN MSP. | |
209 (+) HAL_CAN_MspDeInit : DeInitialize the CAN MSP. | |
210 | |
211 @endverbatim | |
212 * @{ | |
213 */ | |
214 | |
215 /** | |
216 * @brief Initializes the CAN peripheral according to the specified | |
217 * parameters in the CAN_InitStruct. | |
218 * @param hcan pointer to a CAN_HandleTypeDef structure that contains | |
219 * the configuration information for the specified CAN. | |
220 * @retval HAL status | |
221 */ | |
222 HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan) | |
223 { | |
224 uint32_t tickstart = 0U; | |
225 | |
226 /* Check CAN handle */ | |
227 if (hcan == NULL) | |
228 { | |
229 return HAL_ERROR; | |
230 } | |
231 | |
232 /* Check the parameters */ | |
233 assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance)); | |
234 assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TimeTriggeredMode)); | |
235 assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoBusOff)); | |
236 assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoWakeUp)); | |
237 assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoRetransmission)); | |
238 assert_param(IS_FUNCTIONAL_STATE(hcan->Init.ReceiveFifoLocked)); | |
239 assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TransmitFifoPriority)); | |
240 assert_param(IS_CAN_MODE(hcan->Init.Mode)); | |
241 assert_param(IS_CAN_SJW(hcan->Init.SyncJumpWidth)); | |
242 assert_param(IS_CAN_BS1(hcan->Init.TimeSeg1)); | |
243 assert_param(IS_CAN_BS2(hcan->Init.TimeSeg2)); | |
244 assert_param(IS_CAN_PRESCALER(hcan->Init.Prescaler)); | |
245 | |
246 if (hcan->State == HAL_CAN_STATE_RESET) | |
247 { | |
248 /* Init the low level hardware: CLOCK, NVIC */ | |
249 HAL_CAN_MspInit(hcan); | |
250 } | |
251 | |
252 /* Exit from sleep mode */ | |
253 CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); | |
254 | |
255 /* Get tick */ | |
256 tickstart = HAL_GetTick(); | |
257 | |
258 /* Check Sleep mode leave acknowledge */ | |
259 while ((hcan->Instance->MSR & CAN_MSR_SLAK) != RESET) | |
260 { | |
261 if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) | |
262 { | |
263 /* Update error code */ | |
264 hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; | |
265 | |
266 /* Change CAN state */ | |
267 hcan->State = HAL_CAN_STATE_ERROR; | |
268 | |
269 return HAL_ERROR; | |
270 } | |
271 } | |
272 | |
273 /* Request initialisation */ | |
274 SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); | |
275 | |
276 /* Get tick */ | |
277 tickstart = HAL_GetTick(); | |
278 | |
279 /* Wait initialisation acknowledge */ | |
280 while ((hcan->Instance->MSR & CAN_MSR_INAK) == RESET) | |
281 { | |
282 if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) | |
283 { | |
284 /* Update error code */ | |
285 hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; | |
286 | |
287 /* Change CAN state */ | |
288 hcan->State = HAL_CAN_STATE_ERROR; | |
289 | |
290 return HAL_ERROR; | |
291 } | |
292 } | |
293 | |
294 /* Set the time triggered communication mode */ | |
295 if (hcan->Init.TimeTriggeredMode == ENABLE) | |
296 { | |
297 SET_BIT(hcan->Instance->MCR, CAN_MCR_TTCM); | |
298 } | |
299 else | |
300 { | |
301 CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TTCM); | |
302 } | |
303 | |
304 /* Set the automatic bus-off management */ | |
305 if (hcan->Init.AutoBusOff == ENABLE) | |
306 { | |
307 SET_BIT(hcan->Instance->MCR, CAN_MCR_ABOM); | |
308 } | |
309 else | |
310 { | |
311 CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_ABOM); | |
312 } | |
313 | |
314 /* Set the automatic wake-up mode */ | |
315 if (hcan->Init.AutoWakeUp == ENABLE) | |
316 { | |
317 SET_BIT(hcan->Instance->MCR, CAN_MCR_AWUM); | |
318 } | |
319 else | |
320 { | |
321 CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_AWUM); | |
322 } | |
323 | |
324 /* Set the automatic retransmission */ | |
325 if (hcan->Init.AutoRetransmission == ENABLE) | |
326 { | |
327 CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_NART); | |
328 } | |
329 else | |
330 { | |
331 SET_BIT(hcan->Instance->MCR, CAN_MCR_NART); | |
332 } | |
333 | |
334 /* Set the receive FIFO locked mode */ | |
335 if (hcan->Init.ReceiveFifoLocked == ENABLE) | |
336 { | |
337 SET_BIT(hcan->Instance->MCR, CAN_MCR_RFLM); | |
338 } | |
339 else | |
340 { | |
341 CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_RFLM); | |
342 } | |
343 | |
344 /* Set the transmit FIFO priority */ | |
345 if (hcan->Init.TransmitFifoPriority == ENABLE) | |
346 { | |
347 SET_BIT(hcan->Instance->MCR, CAN_MCR_TXFP); | |
348 } | |
349 else | |
350 { | |
351 CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TXFP); | |
352 } | |
353 | |
354 /* Set the bit timing register */ | |
355 WRITE_REG(hcan->Instance->BTR, (uint32_t)(hcan->Init.Mode | | |
356 hcan->Init.SyncJumpWidth | | |
357 hcan->Init.TimeSeg1 | | |
358 hcan->Init.TimeSeg2 | | |
359 (hcan->Init.Prescaler - 1U))); | |
360 | |
361 /* Initialize the error code */ | |
362 hcan->ErrorCode = HAL_CAN_ERROR_NONE; | |
363 | |
364 /* Initialize the CAN state */ | |
365 hcan->State = HAL_CAN_STATE_READY; | |
366 | |
367 /* Return function status */ | |
368 return HAL_OK; | |
369 } | |
370 | |
371 /** | |
372 * @brief Deinitializes the CAN peripheral registers to their default | |
373 * reset values. | |
374 * @param hcan pointer to a CAN_HandleTypeDef structure that contains | |
375 * the configuration information for the specified CAN. | |
376 * @retval HAL status | |
377 */ | |
378 HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef *hcan) | |
379 { | |
380 /* Check CAN handle */ | |
381 if (hcan == NULL) | |
382 { | |
383 return HAL_ERROR; | |
384 } | |
385 | |
386 /* Check the parameters */ | |
387 assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance)); | |
388 | |
389 /* Stop the CAN module */ | |
390 HAL_CAN_Stop(hcan); | |
391 | |
392 /* DeInit the low level hardware: CLOCK, NVIC */ | |
393 HAL_CAN_MspDeInit(hcan); | |
394 | |
395 /* Reset the CAN peripheral */ | |
396 SET_BIT(hcan->Instance->MCR, CAN_MCR_RESET); | |
397 | |
398 /* Reset the CAN ErrorCode */ | |
399 hcan->ErrorCode = HAL_CAN_ERROR_NONE; | |
400 | |
401 /* Change CAN state */ | |
402 hcan->State = HAL_CAN_STATE_RESET; | |
403 | |
404 /* Return function status */ | |
405 return HAL_OK; | |
406 } | |
407 | |
408 /** | |
409 * @brief Initializes the CAN MSP. | |
410 * @param hcan pointer to a CAN_HandleTypeDef structure that contains | |
411 * the configuration information for the specified CAN. | |
412 * @retval None | |
413 */ | |
414 __weak void HAL_CAN_MspInit(CAN_HandleTypeDef *hcan) | |
415 { | |
416 /* Prevent unused argument(s) compilation warning */ | |
417 UNUSED(hcan); | |
418 | |
419 /* NOTE : This function Should not be modified, when the callback is needed, | |
420 the HAL_CAN_MspInit could be implemented in the user file | |
421 */ | |
422 } | |
423 | |
424 /** | |
425 * @brief DeInitializes the CAN MSP. | |
426 * @param hcan pointer to a CAN_HandleTypeDef structure that contains | |
427 * the configuration information for the specified CAN. | |
428 * @retval None | |
429 */ | |
430 __weak void HAL_CAN_MspDeInit(CAN_HandleTypeDef *hcan) | |
431 { | |
432 /* Prevent unused argument(s) compilation warning */ | |
433 UNUSED(hcan); | |
434 | |
435 /* NOTE : This function Should not be modified, when the callback is needed, | |
436 the HAL_CAN_MspDeInit could be implemented in the user file | |
437 */ | |
438 } | |
439 | |
440 | |
441 /** | |
442 * @} | |
443 */ | |
444 | |
445 /** @defgroup CAN_Exported_Functions_Group2 Configuration functions | |
446 * @brief Configuration functions. | |
447 * | |
448 @verbatim | |
449 ============================================================================== | |
450 ##### Configuration functions ##### | |
451 ============================================================================== | |
452 [..] This section provides functions allowing to: | |
453 (+) HAL_CAN_ConfigFilter : Configure the CAN reception filters | |
454 | |
455 @endverbatim | |
456 * @{ | |
457 */ | |
458 | |
459 /** | |
460 * @brief Configures the CAN reception filter according to the specified | |
461 * parameters in the CAN_FilterInitStruct. | |
462 * @param hcan pointer to a CAN_HandleTypeDef structure that contains | |
463 * the configuration information for the specified CAN. | |
464 * @param sFilterConfig pointer to a CAN_FilterTypeDef structure that | |
465 * contains the filter configuration information. | |
466 * @retval None | |
467 */ | |
468 HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, CAN_FilterTypeDef *sFilterConfig) | |
469 { | |
470 uint32_t filternbrbitpos = 0U; | |
471 CAN_TypeDef *can_ip = hcan->Instance; | |
472 | |
473 if ((hcan->State == HAL_CAN_STATE_READY) || | |
474 (hcan->State == HAL_CAN_STATE_LISTENING)) | |
475 { | |
476 /* Check the parameters */ | |
477 assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterIdHigh)); | |
478 assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterIdLow)); | |
479 assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterMaskIdHigh)); | |
480 assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterMaskIdLow)); | |
481 assert_param(IS_CAN_FILTER_MODE(sFilterConfig->FilterMode)); | |
482 assert_param(IS_CAN_FILTER_SCALE(sFilterConfig->FilterScale)); | |
483 assert_param(IS_CAN_FILTER_FIFO(sFilterConfig->FilterFIFOAssignment)); | |
484 assert_param(IS_FUNCTIONAL_STATE(sFilterConfig->FilterActivation)); | |
485 | |
486 #if defined(CAN3) | |
487 /* Check the CAN instance */ | |
488 if (hcan->Instance == CAN3) | |
489 { | |
490 /* CAN3 is single instance with 14 dedicated filters banks */ | |
491 | |
492 /* Check the parameters */ | |
493 assert_param(IS_CAN_FILTER_BANK_SINGLE(sFilterConfig->FilterBank)); | |
494 } | |
495 else | |
496 { | |
497 /* CAN1 and CAN2 are dual instances with 28 common filters banks */ | |
498 /* Select master instance to access the filter banks */ | |
499 can_ip = CAN1; | |
500 | |
501 /* Check the parameters */ | |
502 assert_param(IS_CAN_FILTER_BANK_DUAL(sFilterConfig->FilterBank)); | |
503 assert_param(IS_CAN_FILTER_BANK_DUAL(sFilterConfig->SlaveStartFilterBank)); | |
504 } | |
505 #elif defined(CAN2) | |
506 /* CAN1 and CAN2 are dual instances with 28 common filters banks */ | |
507 /* Select master instance to access the filter banks */ | |
508 can_ip = CAN1; | |
509 | |
510 /* Check the parameters */ | |
511 assert_param(IS_CAN_FILTER_BANK_DUAL(sFilterConfig->FilterBank)); | |
512 assert_param(IS_CAN_FILTER_BANK_DUAL(sFilterConfig->SlaveStartFilterBank)); | |
513 #else | |
514 /* CAN1 is single instance with 14 dedicated filters banks */ | |
515 | |
516 /* Check the parameters */ | |
517 assert_param(IS_CAN_FILTER_BANK_SINGLE(sFilterConfig->FilterBank)); | |
518 #endif | |
519 | |
520 /* Initialisation mode for the filter */ | |
521 SET_BIT(can_ip->FMR, CAN_FMR_FINIT); | |
522 | |
523 #if defined(CAN3) | |
524 /* Check the CAN instance */ | |
525 if (can_ip == CAN1) | |
526 { | |
527 /* Select the start filter number of CAN2 slave instance */ | |
528 CLEAR_BIT(can_ip->FMR, CAN_FMR_CAN2SB); | |
529 SET_BIT(can_ip->FMR, sFilterConfig->SlaveStartFilterBank << CAN_FMR_CAN2SB_Pos); | |
530 } | |
531 | |
532 #elif defined(CAN2) | |
533 /* Select the start filter number of CAN2 slave instance */ | |
534 CLEAR_BIT(can_ip->FMR, CAN_FMR_CAN2SB); | |
535 SET_BIT(can_ip->FMR, sFilterConfig->SlaveStartFilterBank << CAN_FMR_CAN2SB_Pos); | |
536 | |
537 #endif | |
538 /* Convert filter number into bit position */ | |
539 filternbrbitpos = (1U) << sFilterConfig->FilterBank; | |
540 | |
541 /* Filter Deactivation */ | |
542 CLEAR_BIT(can_ip->FA1R, filternbrbitpos); | |
543 | |
544 /* Filter Scale */ | |
545 if (sFilterConfig->FilterScale == CAN_FILTERSCALE_16BIT) | |
546 { | |
547 /* 16-bit scale for the filter */ | |
548 CLEAR_BIT(can_ip->FS1R, filternbrbitpos); | |
549 | |
550 /* First 16-bit identifier and First 16-bit mask */ | |
551 /* Or First 16-bit identifier and Second 16-bit identifier */ | |
552 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = | |
553 ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) | | |
554 (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); | |
555 | |
556 /* Second 16-bit identifier and Second 16-bit mask */ | |
557 /* Or Third 16-bit identifier and Fourth 16-bit identifier */ | |
558 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = | |
559 ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | | |
560 (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh); | |
561 } | |
562 | |
563 if (sFilterConfig->FilterScale == CAN_FILTERSCALE_32BIT) | |
564 { | |
565 /* 32-bit scale for the filter */ | |
566 SET_BIT(can_ip->FS1R, filternbrbitpos); | |
567 | |
568 /* 32-bit identifier or First 32-bit identifier */ | |
569 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = | |
570 ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) | | |
571 (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); | |
572 | |
573 /* 32-bit mask or Second 32-bit identifier */ | |
574 can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = | |
575 ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | | |
576 (0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow); | |
577 } | |
578 | |
579 /* Filter Mode */ | |
580 if (sFilterConfig->FilterMode == CAN_FILTERMODE_IDMASK) | |
581 { | |
582 /* Id/Mask mode for the filter*/ | |
583 CLEAR_BIT(can_ip->FM1R, filternbrbitpos); | |
584 } | |
585 else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */ | |
586 { | |
587 /* Identifier list mode for the filter*/ | |
588 SET_BIT(can_ip->FM1R, filternbrbitpos); | |
589 } | |
590 | |
591 /* Filter FIFO assignment */ | |
592 if (sFilterConfig->FilterFIFOAssignment == CAN_FILTER_FIFO0) | |
593 { | |
594 /* FIFO 0 assignation for the filter */ | |
595 CLEAR_BIT(can_ip->FFA1R, filternbrbitpos); | |
596 } | |
597 else | |
598 { | |
599 /* FIFO 1 assignation for the filter */ | |
600 SET_BIT(can_ip->FFA1R, filternbrbitpos); | |
601 } | |
602 | |
603 /* Filter activation */ | |
604 if (sFilterConfig->FilterActivation == ENABLE) | |
605 { | |
606 SET_BIT(can_ip->FA1R, filternbrbitpos); | |
607 } | |
608 | |
609 /* Leave the initialisation mode for the filter */ | |
610 CLEAR_BIT(can_ip->FMR, CAN_FMR_FINIT); | |
611 | |
612 /* Return function status */ | |
613 return HAL_OK; | |
614 } | |
615 else | |
616 { | |
617 /* Update error code */ | |
618 hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; | |
619 | |
620 return HAL_ERROR; | |
621 } | |
622 } | |
623 | |
624 /** | |
625 * @} | |
626 */ | |
627 | |
628 /** @defgroup CAN_Exported_Functions_Group3 Control functions | |
629 * @brief Control functions | |
630 * | |
631 @verbatim | |
632 ============================================================================== | |
633 ##### Control functions ##### | |
634 ============================================================================== | |
635 [..] This section provides functions allowing to: | |
636 (+) HAL_CAN_Start : Start the CAN module | |
637 (+) HAL_CAN_Stop : Stop the CAN module | |
638 (+) HAL_CAN_RequestSleep : Request sleep mode entry. | |
639 (+) HAL_CAN_WakeUp : Wake up from sleep mode. | |
640 (+) HAL_CAN_IsSleepActive : Check is sleep mode is active. | |
641 (+) HAL_CAN_AddTxMessage : Add a message to the Tx mailboxes | |
642 and activate the corresponding | |
643 transmission request | |
644 (+) HAL_CAN_AbortTxRequest : Abort transmission request | |
645 (+) HAL_CAN_GetTxMailboxesFreeLevel : Return Tx mailboxes free level | |
646 (+) HAL_CAN_IsTxMessagePending : Check if a transmission request is | |
647 pending on the selected Tx mailbox | |
648 (+) HAL_CAN_GetRxMessage : Get a CAN frame from the Rx FIFO | |
649 (+) HAL_CAN_GetRxFifoFillLevel : Return Rx FIFO fill level | |
650 | |
651 @endverbatim | |
652 * @{ | |
653 */ | |
654 | |
655 /** | |
656 * @brief Start the CAN module. | |
657 * @param hcan pointer to an CAN_HandleTypeDef structure that contains | |
658 * the configuration information for the specified CAN. | |
659 * @retval HAL status | |
660 */ | |
661 HAL_StatusTypeDef HAL_CAN_Start(CAN_HandleTypeDef *hcan) | |
662 { | |
663 uint32_t tickstart = 0U; | |
664 | |
665 if (hcan->State == HAL_CAN_STATE_READY) | |
666 { | |
667 /* Change CAN peripheral state */ | |
668 hcan->State = HAL_CAN_STATE_LISTENING; | |
669 | |
670 /* Request leave initialisation */ | |
671 CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); | |
672 | |
673 /* Get tick */ | |
674 tickstart = HAL_GetTick(); | |
675 | |
676 /* Wait the acknowledge */ | |
677 while ((hcan->Instance->MSR & CAN_MSR_INAK) != RESET) | |
678 { | |
679 /* Check for the Timeout */ | |
680 if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) | |
681 { | |
682 /* Update error code */ | |
683 hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; | |
684 | |
685 /* Change CAN state */ | |
686 hcan->State = HAL_CAN_STATE_ERROR; | |
687 | |
688 return HAL_ERROR; | |
689 } | |
690 } | |
691 | |
692 /* Reset the CAN ErrorCode */ | |
693 hcan->ErrorCode = HAL_CAN_ERROR_NONE; | |
694 | |
695 /* Return function status */ | |
696 return HAL_OK; | |
697 } | |
698 else | |
699 { | |
700 /* Update error code */ | |
701 hcan->ErrorCode |= HAL_CAN_ERROR_NOT_READY; | |
702 | |
703 return HAL_ERROR; | |
704 } | |
705 } | |
706 | |
707 /** | |
708 * @brief Stop the CAN module and enable access to configuration registers. | |
709 * @param hcan pointer to an CAN_HandleTypeDef structure that contains | |
710 * the configuration information for the specified CAN. | |
711 * @retval HAL status | |
712 */ | |
713 HAL_StatusTypeDef HAL_CAN_Stop(CAN_HandleTypeDef *hcan) | |
714 { | |
715 uint32_t tickstart = 0U; | |
716 | |
717 if (hcan->State == HAL_CAN_STATE_LISTENING) | |
718 { | |
719 /* Request initialisation */ | |
720 SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); | |
721 | |
722 /* Get tick */ | |
723 tickstart = HAL_GetTick(); | |
724 | |
725 /* Wait the acknowledge */ | |
726 while ((hcan->Instance->MSR & CAN_MSR_INAK) == RESET) | |
727 { | |
728 /* Check for the Timeout */ | |
729 if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) | |
730 { | |
731 /* Update error code */ | |
732 hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; | |
733 | |
734 /* Change CAN state */ | |
735 hcan->State = HAL_CAN_STATE_ERROR; | |
736 | |
737 return HAL_ERROR; | |
738 } | |
739 } | |
740 | |
741 /* Exit from sleep mode */ | |
742 CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); | |
743 | |
744 /* Change CAN peripheral state */ | |
745 hcan->State = HAL_CAN_STATE_READY; | |
746 | |
747 /* Return function status */ | |
748 return HAL_OK; | |
749 } | |
750 else | |
751 { | |
752 /* Update error code */ | |
753 hcan->ErrorCode |= HAL_CAN_ERROR_NOT_STARTED; | |
754 | |
755 return HAL_ERROR; | |
756 } | |
757 } | |
758 | |
759 /** | |
760 * @brief Request the sleep mode (low power) entry. | |
761 * When returning from this function, Sleep mode will be entered | |
762 * as soon as the current CAN activity (transmission or reception | |
763 * of a CAN frame) has been completed. | |
764 * @param hcan pointer to a CAN_HandleTypeDef structure that contains | |
765 * the configuration information for the specified CAN. | |
766 * @retval HAL status. | |
767 */ | |
768 HAL_StatusTypeDef HAL_CAN_RequestSleep(CAN_HandleTypeDef *hcan) | |
769 { | |
770 if ((hcan->State == HAL_CAN_STATE_READY) || | |
771 (hcan->State == HAL_CAN_STATE_LISTENING)) | |
772 { | |
773 /* Request Sleep mode */ | |
774 SET_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); | |
775 | |
776 /* Return function status */ | |
777 return HAL_OK; | |
778 } | |
779 else | |
780 { | |
781 /* Update error code */ | |
782 hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; | |
783 | |
784 /* Return function status */ | |
785 return HAL_ERROR; | |
786 } | |
787 } | |
788 | |
789 /** | |
790 * @brief Wake up from sleep mode. | |
791 * When returning with HAL_OK status from this function, Sleep mode | |
792 * is exited. | |
793 * @param hcan pointer to a CAN_HandleTypeDef structure that contains | |
794 * the configuration information for the specified CAN. | |
795 * @retval HAL status. | |
796 */ | |
797 HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan) | |
798 { | |
799 __IO uint32_t count = 0; | |
800 uint32_t timeout = 1000000U; | |
801 | |
802 if ((hcan->State == HAL_CAN_STATE_READY) || | |
803 (hcan->State == HAL_CAN_STATE_LISTENING)) | |
804 { | |
805 /* Wake up request */ | |
806 CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); | |
807 | |
808 /* Wait sleep mode is exited */ | |
809 do | |
810 { | |
811 /* Check if timeout is reached */ | |
812 if (++count > timeout) | |
813 { | |
814 /* Update error code */ | |
815 hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; | |
816 | |
817 return HAL_ERROR; | |
818 } | |
819 } | |
820 while ((hcan->Instance->MSR & CAN_MSR_SLAK) != RESET); | |
821 | |
822 /* Return function status */ | |
823 return HAL_OK; | |
824 } | |
825 else | |
826 { | |
827 /* Update error code */ | |
828 hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; | |
829 | |
830 return HAL_ERROR; | |
831 } | |
832 } | |
833 | |
834 /** | |
835 * @brief Check is sleep mode is active. | |
836 * @param hcan pointer to a CAN_HandleTypeDef structure that contains | |
837 * the configuration information for the specified CAN. | |
838 * @retval Status | |
839 * - 0 : Sleep mode is not active. | |
840 * - 1 : Sleep mode is active. | |
841 */ | |
842 uint32_t HAL_CAN_IsSleepActive(CAN_HandleTypeDef *hcan) | |
843 { | |
844 uint32_t status = 0U; | |
845 | |
846 if ((hcan->State == HAL_CAN_STATE_READY) || | |
847 (hcan->State == HAL_CAN_STATE_LISTENING)) | |
848 { | |
849 /* Check Sleep mode */ | |
850 if ((hcan->Instance->MSR & CAN_MSR_SLAK) != RESET) | |
851 { | |
852 status = 1U; | |
853 } | |
854 } | |
855 | |
856 /* Return function status */ | |
857 return status; | |
858 } | |
859 | |
860 /** | |
861 * @brief Add a message to the first free Tx mailbox and activate the | |
862 * corresponding transmission request. | |
863 * @param hcan pointer to a CAN_HandleTypeDef structure that contains | |
864 * the configuration information for the specified CAN. | |
865 * @param pHeader pointer to a CAN_TxHeaderTypeDef structure. | |
866 * @param aData array containing the payload of the Tx frame. | |
867 * @param pTxMailbox pointer to a variable where the function will return | |
868 * the TxMailbox used to store the Tx message. | |
869 * This parameter can be a value of @arg CAN_Tx_Mailboxes. | |
870 * @retval HAL status | |
871 */ | |
872 HAL_StatusTypeDef HAL_CAN_AddTxMessage(CAN_HandleTypeDef *hcan, CAN_TxHeaderTypeDef *pHeader, uint8_t aData[], uint32_t *pTxMailbox) | |
873 { | |
874 uint32_t transmitmailbox; | |
875 | |
876 /* Check the parameters */ | |
877 assert_param(IS_CAN_IDTYPE(pHeader->IDE)); | |
878 assert_param(IS_CAN_RTR(pHeader->RTR)); | |
879 assert_param(IS_CAN_DLC(pHeader->DLC)); | |
880 if (pHeader->IDE == CAN_ID_STD) | |
881 { | |
882 assert_param(IS_CAN_STDID(pHeader->StdId)); | |
883 } | |
884 else | |
885 { | |
886 assert_param(IS_CAN_EXTID(pHeader->ExtId)); | |
887 } | |
888 assert_param(IS_FUNCTIONAL_STATE(pHeader->TransmitGlobalTime)); | |
889 | |
890 if ((hcan->State == HAL_CAN_STATE_READY) || | |
891 (hcan->State == HAL_CAN_STATE_LISTENING)) | |
892 { | |
893 /* Check that all the Tx mailboxes are not full */ | |
894 if (((hcan->Instance->TSR & CAN_TSR_TME0) != RESET) || | |
895 ((hcan->Instance->TSR & CAN_TSR_TME1) != RESET) || | |
896 ((hcan->Instance->TSR & CAN_TSR_TME2) != RESET)) | |
897 { | |
898 /* Select an empty transmit mailbox */ | |
899 transmitmailbox = (hcan->Instance->TSR & CAN_TSR_CODE) >> CAN_TSR_CODE_Pos; | |
900 | |
901 /* Store the Tx mailbox */ | |
902 *pTxMailbox = 1U << transmitmailbox; | |
903 | |
904 /* Set up the Id */ | |
905 if (pHeader->IDE == CAN_ID_STD) | |
906 { | |
907 hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->StdId << CAN_TI0R_STID_Pos) | | |
908 pHeader->RTR); | |
909 } | |
910 else | |
911 { | |
912 hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | | |
913 pHeader->IDE | | |
914 pHeader->RTR); | |
915 } | |
916 | |
917 /* Set up the DLC */ | |
918 hcan->Instance->sTxMailBox[transmitmailbox].TDTR = (pHeader->DLC); | |
919 | |
920 /* Set up the Transmit Global Time mode */ | |
921 if (pHeader->TransmitGlobalTime == ENABLE) | |
922 { | |
923 SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TDTR, CAN_TDT0R_TGT); | |
924 } | |
925 | |
926 /* Set up the data field */ | |
927 WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDHR, | |
928 ((uint32_t)aData[7] << CAN_TDH0R_DATA7_Pos) | | |
929 ((uint32_t)aData[6] << CAN_TDH0R_DATA6_Pos) | | |
930 ((uint32_t)aData[5] << CAN_TDH0R_DATA5_Pos) | | |
931 ((uint32_t)aData[4] << CAN_TDH0R_DATA4_Pos)); | |
932 WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDLR, | |
933 ((uint32_t)aData[3] << CAN_TDL0R_DATA3_Pos) | | |
934 ((uint32_t)aData[2] << CAN_TDL0R_DATA2_Pos) | | |
935 ((uint32_t)aData[1] << CAN_TDL0R_DATA1_Pos) | | |
936 ((uint32_t)aData[0] << CAN_TDL0R_DATA0_Pos)); | |
937 | |
938 /* Request transmission */ | |
939 SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TIR, CAN_TI0R_TXRQ); | |
940 | |
941 /* Return function status */ | |
942 return HAL_OK; | |
943 } | |
944 else | |
945 { | |
946 /* Update error code */ | |
947 hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; | |
948 | |
949 return HAL_ERROR; | |
950 } | |
951 } | |
952 else | |
953 { | |
954 /* Update error code */ | |
955 hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; | |
956 | |
957 return HAL_ERROR; | |
958 } | |
959 } | |
960 | |
961 /** | |
962 * @brief Abort transmission requests | |
963 * @param hcan pointer to an CAN_HandleTypeDef structure that contains | |
964 * the configuration information for the specified CAN. | |
965 * @param TxMailboxes List of the Tx Mailboxes to abort. | |
966 * This parameter can be any combination of @arg CAN_Tx_Mailboxes. | |
967 * @retval HAL status | |
968 */ | |
969 HAL_StatusTypeDef HAL_CAN_AbortTxRequest(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes) | |
970 { | |
971 /* Check function parameters */ | |
972 assert_param(IS_CAN_TX_MAILBOX_LIST(TxMailboxes)); | |
973 | |
974 if ((hcan->State == HAL_CAN_STATE_READY) || | |
975 (hcan->State == HAL_CAN_STATE_LISTENING)) | |
976 { | |
977 /* Check Tx Mailbox 0 */ | |
978 if ((TxMailboxes & CAN_TX_MAILBOX0) != RESET) | |
979 { | |
980 /* Add cancellation request for Tx Mailbox 0 */ | |
981 SET_BIT(hcan->Instance->TSR, CAN_TSR_ABRQ0); | |
982 } | |
983 | |
984 /* Check Tx Mailbox 1 */ | |
985 if ((TxMailboxes & CAN_TX_MAILBOX1) != RESET) | |
986 { | |
987 /* Add cancellation request for Tx Mailbox 1 */ | |
988 SET_BIT(hcan->Instance->TSR, CAN_TSR_ABRQ1); | |
989 } | |
990 | |
991 /* Check Tx Mailbox 2 */ | |
992 if ((TxMailboxes & CAN_TX_MAILBOX2) != RESET) | |
993 { | |
994 /* Add cancellation request for Tx Mailbox 2 */ | |
995 SET_BIT(hcan->Instance->TSR, CAN_TSR_ABRQ2); | |
996 } | |
997 | |
998 /* Return function status */ | |
999 return HAL_OK; | |
1000 } | |
1001 else | |
1002 { | |
1003 /* Update error code */ | |
1004 hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; | |
1005 | |
1006 return HAL_ERROR; | |
1007 } | |
1008 } | |
1009 | |
1010 /** | |
1011 * @brief Return Tx Mailboxes free level: number of free Tx Mailboxes. | |
1012 * @param hcan pointer to a CAN_HandleTypeDef structure that contains | |
1013 * the configuration information for the specified CAN. | |
1014 * @retval Number of free Tx Mailboxes. | |
1015 */ | |
1016 uint32_t HAL_CAN_GetTxMailboxesFreeLevel(CAN_HandleTypeDef *hcan) | |
1017 { | |
1018 uint32_t freelevel = 0U; | |
1019 | |
1020 if ((hcan->State == HAL_CAN_STATE_READY) || | |
1021 (hcan->State == HAL_CAN_STATE_LISTENING)) | |
1022 { | |
1023 /* Check Tx Mailbox 0 status */ | |
1024 if ((hcan->Instance->TSR & CAN_TSR_TME0) != RESET) | |
1025 { | |
1026 freelevel++; | |
1027 } | |
1028 | |
1029 /* Check Tx Mailbox 1 status */ | |
1030 if ((hcan->Instance->TSR & CAN_TSR_TME1) != RESET) | |
1031 { | |
1032 freelevel++; | |
1033 } | |
1034 | |
1035 /* Check Tx Mailbox 2 status */ | |
1036 if ((hcan->Instance->TSR & CAN_TSR_TME2) != RESET) | |
1037 { | |
1038 freelevel++; | |
1039 } | |
1040 } | |
1041 | |
1042 /* Return Tx Mailboxes free level */ | |
1043 return freelevel; | |
1044 } | |
1045 | |
1046 /** | |
1047 * @brief Check if a transmission request is pending on the selected Tx | |
1048 * Mailboxes. | |
1049 * @param hcan pointer to an CAN_HandleTypeDef structure that contains | |
1050 * the configuration information for the specified CAN. | |
1051 * @param TxMailboxes List of Tx Mailboxes to check. | |
1052 * This parameter can be any combination of @arg CAN_Tx_Mailboxes. | |
1053 * @retval Status | |
1054 * - 0 : No pending transmission request on any selected Tx Mailboxes. | |
1055 * - 1 : Pending transmission request on at least one of the selected | |
1056 * Tx Mailbox. | |
1057 */ | |
1058 uint32_t HAL_CAN_IsTxMessagePending(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes) | |
1059 { | |
1060 uint32_t status = 0U; | |
1061 | |
1062 /* Check function parameters */ | |
1063 assert_param(IS_CAN_TX_MAILBOX_LIST(TxMailboxes)); | |
1064 | |
1065 if ((hcan->State == HAL_CAN_STATE_READY) || | |
1066 (hcan->State == HAL_CAN_STATE_LISTENING)) | |
1067 { | |
1068 /* Check pending transmission request on the selected Tx Mailboxes */ | |
1069 if ((hcan->Instance->TSR & (TxMailboxes << CAN_TSR_TME0_Pos)) != (TxMailboxes << CAN_TSR_TME0_Pos)) | |
1070 { | |
1071 status = 1U; | |
1072 } | |
1073 } | |
1074 | |
1075 /* Return status */ | |
1076 return status; | |
1077 } | |
1078 | |
1079 /** | |
1080 * @brief Return timestamp of Tx message sent, if time triggered communication | |
1081 mode is enabled. | |
1082 * @param hcan pointer to a CAN_HandleTypeDef structure that contains | |
1083 * the configuration information for the specified CAN. | |
1084 * @param TxMailbox Tx Mailbox where the timestamp of message sent will be | |
1085 * read. | |
1086 * This parameter can be one value of @arg CAN_Tx_Mailboxes. | |
1087 * @retval Timestamp of message sent from Tx Mailbox. | |
1088 */ | |
1089 uint32_t HAL_CAN_GetTxTimestamp(CAN_HandleTypeDef *hcan, uint32_t TxMailbox) | |
1090 { | |
1091 uint32_t timestamp = 0U; | |
1092 uint32_t transmitmailbox; | |
1093 | |
1094 /* Check function parameters */ | |
1095 assert_param(IS_CAN_TX_MAILBOX(TxMailbox)); | |
1096 | |
1097 if ((hcan->State == HAL_CAN_STATE_READY) || | |
1098 (hcan->State == HAL_CAN_STATE_LISTENING)) | |
1099 { | |
1100 /* Select the Tx mailbox */ | |
1101 transmitmailbox = POSITION_VAL(TxMailbox); | |
1102 | |
1103 /* Get timestamp */ | |
1104 timestamp = (hcan->Instance->sTxMailBox[transmitmailbox].TDTR & CAN_TDT0R_TIME) >> CAN_TDT0R_TIME_Pos; | |
1105 } | |
1106 | |
1107 /* Return the timestamp */ | |
1108 return timestamp; | |
1109 } | |
1110 | |
1111 /** | |
1112 * @brief Get an CAN frame from the Rx FIFO zone into the message RAM. | |
1113 * @param hcan pointer to an CAN_HandleTypeDef structure that contains | |
1114 * the configuration information for the specified CAN. | |
1115 * @param RxFifo Fifo number of the received message to be read. | |
1116 * This parameter can be a value of @arg CAN_receive_FIFO_number. | |
1117 * @param pHeader pointer to a CAN_RxHeaderTypeDef structure where the header | |
1118 * of the Rx frame will be stored. | |
1119 * @param aData array where the payload of the Rx frame will be stored. | |
1120 * @retval HAL status | |
1121 */ | |
1122 HAL_StatusTypeDef HAL_CAN_GetRxMessage(CAN_HandleTypeDef *hcan, uint32_t RxFifo, CAN_RxHeaderTypeDef *pHeader, uint8_t aData[]) | |
1123 { | |
1124 assert_param(IS_CAN_RX_FIFO(RxFifo)); | |
1125 | |
1126 if ((hcan->State == HAL_CAN_STATE_READY) || | |
1127 (hcan->State == HAL_CAN_STATE_LISTENING)) | |
1128 { | |
1129 /* Check the Rx FIFO */ | |
1130 if (RxFifo == CAN_RX_FIFO0) /* Rx element is assigned to Rx FIFO 0 */ | |
1131 { | |
1132 /* Check that the Rx FIFO 0 is not empty */ | |
1133 if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) == RESET) | |
1134 { | |
1135 /* Update error code */ | |
1136 hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; | |
1137 | |
1138 return HAL_ERROR; | |
1139 } | |
1140 } | |
1141 else if (RxFifo == CAN_RX_FIFO1) /* Rx element is assigned to Rx FIFO 1 */ | |
1142 { | |
1143 /* Check that the Rx FIFO 1 is not empty */ | |
1144 if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) == RESET) | |
1145 { | |
1146 /* Update error code */ | |
1147 hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; | |
1148 | |
1149 return HAL_ERROR; | |
1150 } | |
1151 } | |
1152 | |
1153 /* Get the header */ | |
1154 pHeader->IDE = CAN_RI0R_IDE & hcan->Instance->sFIFOMailBox[RxFifo].RIR; | |
1155 if (pHeader->IDE == CAN_ID_STD) | |
1156 { | |
1157 pHeader->StdId = (CAN_RI0R_STID & hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_TI0R_STID_Pos; | |
1158 } | |
1159 else | |
1160 { | |
1161 pHeader->ExtId = ((CAN_RI0R_EXID | CAN_RI0R_STID) & hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_RI0R_EXID_Pos; | |
1162 } | |
1163 pHeader->RTR = (CAN_RI0R_RTR & hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_RI0R_RTR_Pos; | |
1164 pHeader->DLC = (CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_Pos; | |
1165 pHeader->FilterMatchIndex = (CAN_RDT0R_FMI & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_FMI_Pos; | |
1166 pHeader->Timestamp = (CAN_RDT0R_TIME & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_TIME_Pos; | |
1167 | |
1168 /* Get the data */ | |
1169 aData[0] = (CAN_RDL0R_DATA0 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA0_Pos; | |
1170 aData[1] = (CAN_RDL0R_DATA1 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA1_Pos; | |
1171 aData[2] = (CAN_RDL0R_DATA2 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA2_Pos; | |
1172 aData[3] = (CAN_RDL0R_DATA3 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA3_Pos; | |
1173 aData[4] = (CAN_RDH0R_DATA4 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA4_Pos; | |
1174 aData[5] = (CAN_RDH0R_DATA5 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA5_Pos; | |
1175 aData[6] = (CAN_RDH0R_DATA6 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA6_Pos; | |
1176 aData[7] = (CAN_RDH0R_DATA7 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA7_Pos; | |
1177 | |
1178 /* Release the FIFO */ | |
1179 if (RxFifo == CAN_RX_FIFO0) /* Rx element is assigned to Rx FIFO 0 */ | |
1180 { | |
1181 /* Release RX FIFO 0 */ | |
1182 SET_BIT(hcan->Instance->RF0R, CAN_RF0R_RFOM0); | |
1183 } | |
1184 else if (RxFifo == CAN_RX_FIFO1) /* Rx element is assigned to Rx FIFO 1 */ | |
1185 { | |
1186 /* Release RX FIFO 1 */ | |
1187 SET_BIT(hcan->Instance->RF1R, CAN_RF1R_RFOM1); | |
1188 } | |
1189 | |
1190 /* Return function status */ | |
1191 return HAL_OK; | |
1192 } | |
1193 else | |
1194 { | |
1195 /* Update error code */ | |
1196 hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; | |
1197 | |
1198 return HAL_ERROR; | |
1199 } | |
1200 } | |
1201 | |
1202 /** | |
1203 * @brief Return Rx FIFO fill level. | |
1204 * @param hcan pointer to an CAN_HandleTypeDef structure that contains | |
1205 * the configuration information for the specified CAN. | |
1206 * @param RxFifo Rx FIFO. | |
1207 * This parameter can be a value of @arg CAN_receive_FIFO_number. | |
1208 * @retval Number of messages available in Rx FIFO. | |
1209 */ | |
1210 uint32_t HAL_CAN_GetRxFifoFillLevel(CAN_HandleTypeDef *hcan, uint32_t RxFifo) | |
1211 { | |
1212 uint32_t filllevel = 0U; | |
1213 | |
1214 /* Check function parameters */ | |
1215 assert_param(IS_CAN_RX_FIFO(RxFifo)); | |
1216 | |
1217 if ((hcan->State == HAL_CAN_STATE_READY) || | |
1218 (hcan->State == HAL_CAN_STATE_LISTENING)) | |
1219 { | |
1220 if (RxFifo == CAN_RX_FIFO0) | |
1221 { | |
1222 filllevel = hcan->Instance->RF0R & CAN_RF0R_FMP0; | |
1223 } | |
1224 else /* RxFifo == CAN_RX_FIFO1 */ | |
1225 { | |
1226 filllevel = hcan->Instance->RF1R & CAN_RF1R_FMP1; | |
1227 } | |
1228 } | |
1229 | |
1230 /* Return Rx FIFO fill level */ | |
1231 return filllevel; | |
1232 } | |
1233 | |
1234 /** | |
1235 * @} | |
1236 */ | |
1237 | |
1238 /** @defgroup CAN_Exported_Functions_Group4 Interrupts management | |
1239 * @brief Interrupts management | |
1240 * | |
1241 @verbatim | |
1242 ============================================================================== | |
1243 ##### Interrupts management ##### | |
1244 ============================================================================== | |
1245 [..] This section provides functions allowing to: | |
1246 (+) HAL_CAN_ActivateNotification : Enable interrupts | |
1247 (+) HAL_CAN_DeactivateNotification : Disable interrupts | |
1248 (+) HAL_CAN_IRQHandler : Handles CAN interrupt request | |
1249 | |
1250 @endverbatim | |
1251 * @{ | |
1252 */ | |
1253 | |
1254 /** | |
1255 * @brief Enable interrupts. | |
1256 * @param hcan pointer to an CAN_HandleTypeDef structure that contains | |
1257 * the configuration information for the specified CAN. | |
1258 * @param ActiveITs indicates which interrupts will be enabled. | |
1259 * This parameter can be any combination of @arg CAN_Interrupts. | |
1260 * @retval HAL status | |
1261 */ | |
1262 HAL_StatusTypeDef HAL_CAN_ActivateNotification(CAN_HandleTypeDef *hcan, uint32_t ActiveITs) | |
1263 { | |
1264 /* Check function parameters */ | |
1265 assert_param(IS_CAN_IT(ActiveITs)); | |
1266 | |
1267 if ((hcan->State == HAL_CAN_STATE_READY) || | |
1268 (hcan->State == HAL_CAN_STATE_LISTENING)) | |
1269 { | |
1270 /* Enable the selected interrupts */ | |
1271 __HAL_CAN_ENABLE_IT(hcan, ActiveITs); | |
1272 | |
1273 /* Return function status */ | |
1274 return HAL_OK; | |
1275 } | |
1276 else | |
1277 { | |
1278 /* Update error code */ | |
1279 hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; | |
1280 | |
1281 return HAL_ERROR; | |
1282 } | |
1283 } | |
1284 | |
1285 /** | |
1286 * @brief Disable interrupts. | |
1287 * @param hcan pointer to an CAN_HandleTypeDef structure that contains | |
1288 * the configuration information for the specified CAN. | |
1289 * @param InactiveITs indicates which interrupts will be disabled. | |
1290 * This parameter can be any combination of @arg CAN_Interrupts. | |
1291 * @retval HAL status | |
1292 */ | |
1293 HAL_StatusTypeDef HAL_CAN_DeactivateNotification(CAN_HandleTypeDef *hcan, uint32_t InactiveITs) | |
1294 { | |
1295 /* Check function parameters */ | |
1296 assert_param(IS_CAN_IT(InactiveITs)); | |
1297 | |
1298 if ((hcan->State == HAL_CAN_STATE_READY) || | |
1299 (hcan->State == HAL_CAN_STATE_LISTENING)) | |
1300 { | |
1301 /* Disable the selected interrupts */ | |
1302 __HAL_CAN_DISABLE_IT(hcan, InactiveITs); | |
1303 | |
1304 /* Return function status */ | |
1305 return HAL_OK; | |
1306 } | |
1307 else | |
1308 { | |
1309 /* Update error code */ | |
1310 hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; | |
1311 | |
1312 return HAL_ERROR; | |
1313 } | |
1314 } | |
1315 | |
1316 /** | |
1317 * @brief Handles CAN interrupt request | |
1318 * @param hcan pointer to a CAN_HandleTypeDef structure that contains | |
1319 * the configuration information for the specified CAN. | |
1320 * @retval None | |
1321 */ | |
1322 void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan) | |
1323 { | |
1324 uint32_t errorcode = HAL_CAN_ERROR_NONE; | |
1325 uint32_t interrupts = READ_REG(hcan->Instance->IER); | |
1326 uint32_t msrflags = READ_REG(hcan->Instance->MSR); | |
1327 uint32_t tsrflags = READ_REG(hcan->Instance->TSR); | |
1328 uint32_t rf0rflags = READ_REG(hcan->Instance->RF0R); | |
1329 uint32_t rf1rflags = READ_REG(hcan->Instance->RF1R); | |
1330 uint32_t esrflags = READ_REG(hcan->Instance->ESR); | |
1331 | |
1332 /* Transmit Mailbox empty interrupt management *****************************/ | |
1333 if ((interrupts & CAN_IT_TX_MAILBOX_EMPTY) != RESET) | |
1334 { | |
1335 /* Transmit Mailbox 0 management *****************************************/ | |
1336 if ((tsrflags & CAN_TSR_RQCP0) != RESET) | |
1337 { | |
1338 /* Clear the Transmission Complete flag (and TXOK0,ALST0,TERR0 bits) */ | |
1339 __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP0); | |
1340 | |
1341 if ((tsrflags & CAN_TSR_TXOK0) != RESET) | |
1342 { | |
1343 /* Transmission Mailbox 0 complete callback */ | |
1344 /* Call weak (surcharged) callback */ | |
1345 HAL_CAN_TxMailbox0CompleteCallback(hcan); | |
1346 } | |
1347 else | |
1348 { | |
1349 if ((tsrflags & CAN_TSR_ALST0) != RESET) | |
1350 { | |
1351 /* Update error code */ | |
1352 errorcode |= HAL_CAN_ERROR_TX_ALST0; | |
1353 } | |
1354 else if ((tsrflags & CAN_TSR_TERR0) != RESET) | |
1355 { | |
1356 /* Update error code */ | |
1357 errorcode |= HAL_CAN_ERROR_TX_TERR0; | |
1358 } | |
1359 else | |
1360 { | |
1361 /* Transmission Mailbox 0 abort callback */ | |
1362 /* Call weak (surcharged) callback */ | |
1363 HAL_CAN_TxMailbox0AbortCallback(hcan); | |
1364 } | |
1365 } | |
1366 } | |
1367 | |
1368 /* Transmit Mailbox 1 management *****************************************/ | |
1369 if ((tsrflags & CAN_TSR_RQCP1) != RESET) | |
1370 { | |
1371 /* Clear the Transmission Complete flag (and TXOK1,ALST1,TERR1 bits) */ | |
1372 __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP1); | |
1373 | |
1374 if ((tsrflags & CAN_TSR_TXOK1) != RESET) | |
1375 { | |
1376 /* Transmission Mailbox 1 complete callback */ | |
1377 /* Call weak (surcharged) callback */ | |
1378 HAL_CAN_TxMailbox1CompleteCallback(hcan); | |
1379 } | |
1380 else | |
1381 { | |
1382 if ((tsrflags & CAN_TSR_ALST1) != RESET) | |
1383 { | |
1384 /* Update error code */ | |
1385 errorcode |= HAL_CAN_ERROR_TX_ALST1; | |
1386 } | |
1387 else if ((tsrflags & CAN_TSR_TERR1) != RESET) | |
1388 { | |
1389 /* Update error code */ | |
1390 errorcode |= HAL_CAN_ERROR_TX_TERR1; | |
1391 } | |
1392 else | |
1393 { | |
1394 /* Transmission Mailbox 1 abort callback */ | |
1395 /* Call weak (surcharged) callback */ | |
1396 HAL_CAN_TxMailbox1AbortCallback(hcan); | |
1397 } | |
1398 } | |
1399 } | |
1400 | |
1401 /* Transmit Mailbox 2 management *****************************************/ | |
1402 if ((tsrflags & CAN_TSR_RQCP2) != RESET) | |
1403 { | |
1404 /* Clear the Transmission Complete flag (and TXOK2,ALST2,TERR2 bits) */ | |
1405 __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP2); | |
1406 | |
1407 if ((tsrflags & CAN_TSR_TXOK2) != RESET) | |
1408 { | |
1409 /* Transmission Mailbox 2 complete callback */ | |
1410 /* Call weak (surcharged) callback */ | |
1411 HAL_CAN_TxMailbox2CompleteCallback(hcan); | |
1412 } | |
1413 else | |
1414 { | |
1415 if ((tsrflags & CAN_TSR_ALST2) != RESET) | |
1416 { | |
1417 /* Update error code */ | |
1418 errorcode |= HAL_CAN_ERROR_TX_ALST2; | |
1419 } | |
1420 else if ((tsrflags & CAN_TSR_TERR2) != RESET) | |
1421 { | |
1422 /* Update error code */ | |
1423 errorcode |= HAL_CAN_ERROR_TX_TERR2; | |
1424 } | |
1425 else | |
1426 { | |
1427 /* Transmission Mailbox 2 abort callback */ | |
1428 /* Call weak (surcharged) callback */ | |
1429 HAL_CAN_TxMailbox2AbortCallback(hcan); | |
1430 } | |
1431 } | |
1432 } | |
1433 } | |
1434 | |
1435 /* Receive FIFO 0 overrun interrupt management *****************************/ | |
1436 if ((interrupts & CAN_IT_RX_FIFO0_OVERRUN) != RESET) | |
1437 { | |
1438 if ((rf0rflags & CAN_RF0R_FOVR0) != RESET) | |
1439 { | |
1440 /* Set CAN error code to Rx Fifo 0 overrun error */ | |
1441 errorcode |= HAL_CAN_ERROR_RX_FOV0; | |
1442 | |
1443 /* Clear FIFO0 Overrun Flag */ | |
1444 __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV0); | |
1445 } | |
1446 } | |
1447 | |
1448 /* Receive FIFO 0 full interrupt management ********************************/ | |
1449 if ((interrupts & CAN_IT_RX_FIFO0_FULL) != RESET) | |
1450 { | |
1451 if ((rf0rflags & CAN_RF0R_FULL0) != RESET) | |
1452 { | |
1453 /* Clear FIFO 0 full Flag */ | |
1454 __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF0); | |
1455 | |
1456 /* Receive FIFO 0 full Callback */ | |
1457 /* Call weak (surcharged) callback */ | |
1458 HAL_CAN_RxFifo0FullCallback(hcan); | |
1459 } | |
1460 } | |
1461 | |
1462 /* Receive FIFO 0 message pending interrupt management *********************/ | |
1463 if ((interrupts & CAN_IT_RX_FIFO0_MSG_PENDING) != RESET) | |
1464 { | |
1465 /* Check if message is still pending */ | |
1466 if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) != RESET) | |
1467 { | |
1468 /* Receive FIFO 0 mesage pending Callback */ | |
1469 /* Call weak (surcharged) callback */ | |
1470 HAL_CAN_RxFifo0MsgPendingCallback(hcan); | |
1471 } | |
1472 } | |
1473 | |
1474 /* Receive FIFO 1 overrun interrupt management *****************************/ | |
1475 if ((interrupts & CAN_IT_RX_FIFO1_OVERRUN) != RESET) | |
1476 { | |
1477 if ((rf1rflags & CAN_RF1R_FOVR1) != RESET) | |
1478 { | |
1479 /* Set CAN error code to Rx Fifo 1 overrun error */ | |
1480 errorcode |= HAL_CAN_ERROR_RX_FOV1; | |
1481 | |
1482 /* Clear FIFO1 Overrun Flag */ | |
1483 __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV1); | |
1484 } | |
1485 } | |
1486 | |
1487 /* Receive FIFO 1 full interrupt management ********************************/ | |
1488 if ((interrupts & CAN_IT_RX_FIFO1_FULL) != RESET) | |
1489 { | |
1490 if ((rf1rflags & CAN_RF1R_FULL1) != RESET) | |
1491 { | |
1492 /* Clear FIFO 1 full Flag */ | |
1493 __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF1); | |
1494 | |
1495 /* Receive FIFO 1 full Callback */ | |
1496 /* Call weak (surcharged) callback */ | |
1497 HAL_CAN_RxFifo1FullCallback(hcan); | |
1498 } | |
1499 } | |
1500 | |
1501 /* Receive FIFO 1 message pending interrupt management *********************/ | |
1502 if ((interrupts & CAN_IT_RX_FIFO1_MSG_PENDING) != RESET) | |
1503 { | |
1504 /* Check if message is still pending */ | |
1505 if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) != RESET) | |
1506 { | |
1507 /* Receive FIFO 1 mesage pending Callback */ | |
1508 /* Call weak (surcharged) callback */ | |
1509 HAL_CAN_RxFifo1MsgPendingCallback(hcan); | |
1510 } | |
1511 } | |
1512 | |
1513 /* Sleep interrupt management *********************************************/ | |
1514 if ((interrupts & CAN_IT_SLEEP_ACK) != RESET) | |
1515 { | |
1516 if ((msrflags & CAN_MSR_SLAKI) != RESET) | |
1517 { | |
1518 /* Clear Sleep interrupt Flag */ | |
1519 __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_SLAKI); | |
1520 | |
1521 /* Sleep Callback */ | |
1522 /* Call weak (surcharged) callback */ | |
1523 HAL_CAN_SleepCallback(hcan); | |
1524 } | |
1525 } | |
1526 | |
1527 /* WakeUp interrupt management *********************************************/ | |
1528 if ((interrupts & CAN_IT_WAKEUP) != RESET) | |
1529 { | |
1530 if ((msrflags & CAN_MSR_WKUI) != RESET) | |
1531 { | |
1532 /* Clear WakeUp Flag */ | |
1533 __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_WKU); | |
1534 | |
1535 /* WakeUp Callback */ | |
1536 /* Call weak (surcharged) callback */ | |
1537 HAL_CAN_WakeUpFromRxMsgCallback(hcan); | |
1538 } | |
1539 } | |
1540 | |
1541 /* Error interrupts management *********************************************/ | |
1542 if ((interrupts & CAN_IT_ERROR) != RESET) | |
1543 { | |
1544 if ((msrflags & CAN_MSR_ERRI) != RESET) | |
1545 { | |
1546 /* Check Error Warning Flag */ | |
1547 if (((interrupts & CAN_IT_ERROR_WARNING) != RESET) && | |
1548 ((esrflags & CAN_ESR_EWGF) != RESET)) | |
1549 { | |
1550 /* Set CAN error code to Error Warning */ | |
1551 errorcode |= HAL_CAN_ERROR_EWG; | |
1552 | |
1553 /* No need for clear of Error Warning Flag as read-only */ | |
1554 } | |
1555 | |
1556 /* Check Error Passive Flag */ | |
1557 if (((interrupts & CAN_IT_ERROR_PASSIVE) != RESET) && | |
1558 ((esrflags & CAN_ESR_EPVF) != RESET)) | |
1559 { | |
1560 /* Set CAN error code to Error Passive */ | |
1561 errorcode |= HAL_CAN_ERROR_EPV; | |
1562 | |
1563 /* No need for clear of Error Passive Flag as read-only */ | |
1564 } | |
1565 | |
1566 /* Check Bus-off Flag */ | |
1567 if (((interrupts & CAN_IT_BUSOFF) != RESET) && | |
1568 ((esrflags & CAN_ESR_BOFF) != RESET)) | |
1569 { | |
1570 /* Set CAN error code to Bus-Off */ | |
1571 errorcode |= HAL_CAN_ERROR_BOF; | |
1572 | |
1573 /* No need for clear of Error Bus-Off as read-only */ | |
1574 } | |
1575 | |
1576 /* Check Last Error Code Flag */ | |
1577 if (((interrupts & CAN_IT_LAST_ERROR_CODE) != RESET) && | |
1578 ((esrflags & CAN_ESR_LEC) != RESET)) | |
1579 { | |
1580 switch (esrflags & CAN_ESR_LEC) | |
1581 { | |
1582 case (CAN_ESR_LEC_0): | |
1583 /* Set CAN error code to Stuff error */ | |
1584 errorcode |= HAL_CAN_ERROR_STF; | |
1585 break; | |
1586 case (CAN_ESR_LEC_1): | |
1587 /* Set CAN error code to Form error */ | |
1588 errorcode |= HAL_CAN_ERROR_FOR; | |
1589 break; | |
1590 case (CAN_ESR_LEC_1 | CAN_ESR_LEC_0): | |
1591 /* Set CAN error code to Acknowledgement error */ | |
1592 errorcode |= HAL_CAN_ERROR_ACK; | |
1593 break; | |
1594 case (CAN_ESR_LEC_2): | |
1595 /* Set CAN error code to Bit recessive error */ | |
1596 errorcode |= HAL_CAN_ERROR_BR; | |
1597 break; | |
1598 case (CAN_ESR_LEC_2 | CAN_ESR_LEC_0): | |
1599 /* Set CAN error code to Bit Dominant error */ | |
1600 errorcode |= HAL_CAN_ERROR_BD; | |
1601 break; | |
1602 case (CAN_ESR_LEC_2 | CAN_ESR_LEC_1): | |
1603 /* Set CAN error code to CRC error */ | |
1604 errorcode |= HAL_CAN_ERROR_CRC; | |
1605 break; | |
1606 default: | |
1607 break; | |
1608 } | |
1609 | |
1610 /* Clear Last error code Flag */ | |
1611 CLEAR_BIT(hcan->Instance->ESR, CAN_ESR_LEC); | |
1612 } | |
1613 } | |
1614 | |
1615 /* Clear ERRI Flag */ | |
1616 __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_ERRI); | |
1617 } | |
1618 | |
1619 /* Call the Error call Back in case of Errors */ | |
1620 if (errorcode != HAL_CAN_ERROR_NONE) | |
1621 { | |
1622 /* Update error code in handle */ | |
1623 hcan->ErrorCode |= errorcode; | |
1624 | |
1625 /* Call Error callback function */ | |
1626 /* Call weak (surcharged) callback */ | |
1627 HAL_CAN_ErrorCallback(hcan); | |
1628 } | |
1629 } | |
1630 | |
1631 /** | |
1632 * @} | |
1633 */ | |
1634 | |
1635 /** @defgroup CAN_Exported_Functions_Group5 Callback functions | |
1636 * @brief CAN Callback functions | |
1637 * | |
1638 @verbatim | |
1639 ============================================================================== | |
1640 ##### Callback functions ##### | |
1641 ============================================================================== | |
1642 [..] | |
1643 This subsection provides the following callback functions: | |
1644 (+) HAL_CAN_TxMailbox0CompleteCallback | |
1645 (+) HAL_CAN_TxMailbox1CompleteCallback | |
1646 (+) HAL_CAN_TxMailbox2CompleteCallback | |
1647 (+) HAL_CAN_TxMailbox0AbortCallback | |
1648 (+) HAL_CAN_TxMailbox1AbortCallback | |
1649 (+) HAL_CAN_TxMailbox2AbortCallback | |
1650 (+) HAL_CAN_RxFifo0MsgPendingCallback | |
1651 (+) HAL_CAN_RxFifo0FullCallback | |
1652 (+) HAL_CAN_RxFifo1MsgPendingCallback | |
1653 (+) HAL_CAN_RxFifo1FullCallback | |
1654 (+) HAL_CAN_SleepCallback | |
1655 (+) HAL_CAN_WakeUpFromRxMsgCallback | |
1656 (+) HAL_CAN_ErrorCallback | |
1657 | |
1658 @endverbatim | |
1659 * @{ | |
1660 */ | |
1661 | |
1662 /** | |
1663 * @brief Transmission Mailbox 0 complete callback. | |
1664 * @param hcan pointer to a CAN_HandleTypeDef structure that contains | |
1665 * the configuration information for the specified CAN. | |
1666 * @retval None | |
1667 */ | |
1668 __weak void HAL_CAN_TxMailbox0CompleteCallback(CAN_HandleTypeDef *hcan) | |
1669 { | |
1670 /* Prevent unused argument(s) compilation warning */ | |
1671 UNUSED(hcan); | |
1672 | |
1673 /* NOTE : This function Should not be modified, when the callback is needed, | |
1674 the HAL_CAN_TxMailbox0CompleteCallback could be implemented in the | |
1675 user file | |
1676 */ | |
1677 } | |
1678 | |
1679 /** | |
1680 * @brief Transmission Mailbox 1 complete callback. | |
1681 * @param hcan pointer to a CAN_HandleTypeDef structure that contains | |
1682 * the configuration information for the specified CAN. | |
1683 * @retval None | |
1684 */ | |
1685 __weak void HAL_CAN_TxMailbox1CompleteCallback(CAN_HandleTypeDef *hcan) | |
1686 { | |
1687 /* Prevent unused argument(s) compilation warning */ | |
1688 UNUSED(hcan); | |
1689 | |
1690 /* NOTE : This function Should not be modified, when the callback is needed, | |
1691 the HAL_CAN_TxMailbox1CompleteCallback could be implemented in the | |
1692 user file | |
1693 */ | |
1694 } | |
1695 | |
1696 /** | |
1697 * @brief Transmission Mailbox 2 complete callback. | |
1698 * @param hcan pointer to a CAN_HandleTypeDef structure that contains | |
1699 * the configuration information for the specified CAN. | |
1700 * @retval None | |
1701 */ | |
1702 __weak void HAL_CAN_TxMailbox2CompleteCallback(CAN_HandleTypeDef *hcan) | |
1703 { | |
1704 /* Prevent unused argument(s) compilation warning */ | |
1705 UNUSED(hcan); | |
1706 | |
1707 /* NOTE : This function Should not be modified, when the callback is needed, | |
1708 the HAL_CAN_TxMailbox2CompleteCallback could be implemented in the | |
1709 user file | |
1710 */ | |
1711 } | |
1712 | |
1713 /** | |
1714 * @brief Transmission Mailbox 0 Cancellation callback. | |
1715 * @param hcan pointer to an CAN_HandleTypeDef structure that contains | |
1716 * the configuration information for the specified CAN. | |
1717 * @retval None | |
1718 */ | |
1719 __weak void HAL_CAN_TxMailbox0AbortCallback(CAN_HandleTypeDef *hcan) | |
1720 { | |
1721 /* Prevent unused argument(s) compilation warning */ | |
1722 UNUSED(hcan); | |
1723 | |
1724 /* NOTE : This function Should not be modified, when the callback is needed, | |
1725 the HAL_CAN_TxMailbox0AbortCallback could be implemented in the | |
1726 user file | |
1727 */ | |
1728 } | |
1729 | |
1730 /** | |
1731 * @brief Transmission Mailbox 1 Cancellation callback. | |
1732 * @param hcan pointer to an CAN_HandleTypeDef structure that contains | |
1733 * the configuration information for the specified CAN. | |
1734 * @retval None | |
1735 */ | |
1736 __weak void HAL_CAN_TxMailbox1AbortCallback(CAN_HandleTypeDef *hcan) | |
1737 { | |
1738 /* Prevent unused argument(s) compilation warning */ | |
1739 UNUSED(hcan); | |
1740 | |
1741 /* NOTE : This function Should not be modified, when the callback is needed, | |
1742 the HAL_CAN_TxMailbox1AbortCallback could be implemented in the | |
1743 user file | |
1744 */ | |
1745 } | |
1746 | |
1747 /** | |
1748 * @brief Transmission Mailbox 2 Cancellation callback. | |
1749 * @param hcan pointer to an CAN_HandleTypeDef structure that contains | |
1750 * the configuration information for the specified CAN. | |
1751 * @retval None | |
1752 */ | |
1753 __weak void HAL_CAN_TxMailbox2AbortCallback(CAN_HandleTypeDef *hcan) | |
1754 { | |
1755 /* Prevent unused argument(s) compilation warning */ | |
1756 UNUSED(hcan); | |
1757 | |
1758 /* NOTE : This function Should not be modified, when the callback is needed, | |
1759 the HAL_CAN_TxMailbox2AbortCallback could be implemented in the | |
1760 user file | |
1761 */ | |
1762 } | |
1763 | |
1764 /** | |
1765 * @brief Rx FIFO 0 message pending callback. | |
1766 * @param hcan pointer to a CAN_HandleTypeDef structure that contains | |
1767 * the configuration information for the specified CAN. | |
1768 * @retval None | |
1769 */ | |
1770 __weak void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan) | |
1771 { | |
1772 /* Prevent unused argument(s) compilation warning */ | |
1773 UNUSED(hcan); | |
1774 | |
1775 /* NOTE : This function Should not be modified, when the callback is needed, | |
1776 the HAL_CAN_RxFifo0MsgPendingCallback could be implemented in the | |
1777 user file | |
1778 */ | |
1779 } | |
1780 | |
1781 /** | |
1782 * @brief Rx FIFO 0 full callback. | |
1783 * @param hcan pointer to a CAN_HandleTypeDef structure that contains | |
1784 * the configuration information for the specified CAN. | |
1785 * @retval None | |
1786 */ | |
1787 __weak void HAL_CAN_RxFifo0FullCallback(CAN_HandleTypeDef *hcan) | |
1788 { | |
1789 /* Prevent unused argument(s) compilation warning */ | |
1790 UNUSED(hcan); | |
1791 | |
1792 /* NOTE : This function Should not be modified, when the callback is needed, | |
1793 the HAL_CAN_RxFifo0FullCallback could be implemented in the user | |
1794 file | |
1795 */ | |
1796 } | |
1797 | |
1798 /** | |
1799 * @brief Rx FIFO 1 message pending callback. | |
1800 * @param hcan pointer to a CAN_HandleTypeDef structure that contains | |
1801 * the configuration information for the specified CAN. | |
1802 * @retval None | |
1803 */ | |
1804 __weak void HAL_CAN_RxFifo1MsgPendingCallback(CAN_HandleTypeDef *hcan) | |
1805 { | |
1806 /* Prevent unused argument(s) compilation warning */ | |
1807 UNUSED(hcan); | |
1808 | |
1809 /* NOTE : This function Should not be modified, when the callback is needed, | |
1810 the HAL_CAN_RxFifo1MsgPendingCallback could be implemented in the | |
1811 user file | |
1812 */ | |
1813 } | |
1814 | |
1815 /** | |
1816 * @brief Rx FIFO 1 full callback. | |
1817 * @param hcan pointer to a CAN_HandleTypeDef structure that contains | |
1818 * the configuration information for the specified CAN. | |
1819 * @retval None | |
1820 */ | |
1821 __weak void HAL_CAN_RxFifo1FullCallback(CAN_HandleTypeDef *hcan) | |
1822 { | |
1823 /* Prevent unused argument(s) compilation warning */ | |
1824 UNUSED(hcan); | |
1825 | |
1826 /* NOTE : This function Should not be modified, when the callback is needed, | |
1827 the HAL_CAN_RxFifo1FullCallback could be implemented in the user | |
1828 file | |
1829 */ | |
1830 } | |
1831 | |
1832 /** | |
1833 * @brief Sleep callback. | |
1834 * @param hcan pointer to a CAN_HandleTypeDef structure that contains | |
1835 * the configuration information for the specified CAN. | |
1836 * @retval None | |
1837 */ | |
1838 __weak void HAL_CAN_SleepCallback(CAN_HandleTypeDef *hcan) | |
1839 { | |
1840 /* Prevent unused argument(s) compilation warning */ | |
1841 UNUSED(hcan); | |
1842 | |
1843 /* NOTE : This function Should not be modified, when the callback is needed, | |
1844 the HAL_CAN_SleepCallback could be implemented in the user file | |
1845 */ | |
1846 } | |
1847 | |
1848 /** | |
1849 * @brief WakeUp from Rx message callback. | |
1850 * @param hcan pointer to a CAN_HandleTypeDef structure that contains | |
1851 * the configuration information for the specified CAN. | |
1852 * @retval None | |
1853 */ | |
1854 __weak void HAL_CAN_WakeUpFromRxMsgCallback(CAN_HandleTypeDef *hcan) | |
1855 { | |
1856 /* Prevent unused argument(s) compilation warning */ | |
1857 UNUSED(hcan); | |
1858 | |
1859 /* NOTE : This function Should not be modified, when the callback is needed, | |
1860 the HAL_CAN_WakeUpFromRxMsgCallback could be implemented in the | |
1861 user file | |
1862 */ | |
1863 } | |
1864 | |
1865 /** | |
1866 * @brief Error CAN callback. | |
1867 * @param hcan pointer to a CAN_HandleTypeDef structure that contains | |
1868 * the configuration information for the specified CAN. | |
1869 * @retval None | |
1870 */ | |
1871 __weak void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan) | |
1872 { | |
1873 /* Prevent unused argument(s) compilation warning */ | |
1874 UNUSED(hcan); | |
1875 | |
1876 /* NOTE : This function Should not be modified, when the callback is needed, | |
1877 the HAL_CAN_ErrorCallback could be implemented in the user file | |
1878 */ | |
1879 } | |
1880 | |
1881 /** | |
1882 * @} | |
1883 */ | |
1884 | |
1885 /** @defgroup CAN_Exported_Functions_Group6 Peripheral State and Error functions | |
1886 * @brief CAN Peripheral State functions | |
1887 * | |
1888 @verbatim | |
1889 ============================================================================== | |
1890 ##### Peripheral State and Error functions ##### | |
1891 ============================================================================== | |
1892 [..] | |
1893 This subsection provides functions allowing to : | |
1894 (+) HAL_CAN_GetState() : Return the CAN state. | |
1895 (+) HAL_CAN_GetError() : Return the CAN error codes if any. | |
1896 (+) HAL_CAN_ResetError(): Reset the CAN error codes if any. | |
1897 | |
1898 @endverbatim | |
1899 * @{ | |
1900 */ | |
1901 | |
1902 /** | |
1903 * @brief Return the CAN state. | |
1904 * @param hcan pointer to a CAN_HandleTypeDef structure that contains | |
1905 * the configuration information for the specified CAN. | |
1906 * @retval HAL state | |
1907 */ | |
1908 HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef *hcan) | |
1909 { | |
1910 HAL_CAN_StateTypeDef state = hcan->State; | |
1911 | |
1912 if ((hcan->State == HAL_CAN_STATE_READY) || | |
1913 (hcan->State == HAL_CAN_STATE_LISTENING)) | |
1914 { | |
1915 /* Check sleep mode acknowledge flag */ | |
1916 if ((hcan->Instance->MSR & CAN_MSR_SLAK) != RESET) | |
1917 { | |
1918 /* Sleep mode is active */ | |
1919 state = HAL_CAN_STATE_SLEEP_ACTIVE; | |
1920 } | |
1921 /* Check sleep mode request flag */ | |
1922 else if ((hcan->Instance->MCR & CAN_MCR_SLEEP) != RESET) | |
1923 { | |
1924 /* Sleep mode request is pending */ | |
1925 state = HAL_CAN_STATE_SLEEP_PENDING; | |
1926 } | |
1927 } | |
1928 | |
1929 /* Return CAN state */ | |
1930 return state; | |
1931 } | |
1932 | |
1933 /** | |
1934 * @brief Return the CAN error code. | |
1935 * @param hcan pointer to a CAN_HandleTypeDef structure that contains | |
1936 * the configuration information for the specified CAN. | |
1937 * @retval CAN Error Code | |
1938 */ | |
1939 uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan) | |
1940 { | |
1941 /* Return CAN error code */ | |
1942 return hcan->ErrorCode; | |
1943 } | |
1944 | |
1945 /** | |
1946 * @brief Reset the CAN error code. | |
1947 * @param hcan pointer to a CAN_HandleTypeDef structure that contains | |
1948 * the configuration information for the specified CAN. | |
1949 * @retval HAL status | |
1950 */ | |
1951 HAL_StatusTypeDef HAL_CAN_ResetError(CAN_HandleTypeDef *hcan) | |
1952 { | |
1953 HAL_StatusTypeDef status = HAL_OK; | |
1954 | |
1955 if ((hcan->State == HAL_CAN_STATE_READY) || | |
1956 (hcan->State == HAL_CAN_STATE_LISTENING)) | |
1957 { | |
1958 /* Reset CAN error code */ | |
1959 hcan->ErrorCode = 0U; | |
1960 } | |
1961 else | |
1962 { | |
1963 /* Update error code */ | |
1964 hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; | |
1965 | |
1966 status = HAL_ERROR; | |
1967 } | |
1968 | |
1969 /* Return the status */ | |
1970 return status; | |
1971 } | |
1972 | |
1973 /** | |
1974 * @} | |
1975 */ | |
1976 | |
1977 /** | |
1978 * @} | |
1979 */ | |
1980 | |
1981 #endif /* HAL_CAN_MODULE_ENABLED */ | |
1982 | |
1983 /** | |
1984 * @} | |
1985 */ | |
1986 | |
1987 #endif /* CAN1 */ | |
1988 | |
1989 /** | |
1990 * @} | |
1991 */ | |
1992 | |
1993 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |