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comparison Common/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h @ 128:c78bcbd5deda FlipDisplay
Added current STM32 standandard libraries in version independend folder structure
author | Ideenmodellierer |
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date | Sun, 17 Feb 2019 21:12:22 +0100 |
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127:1369f8660eaa | 128:c78bcbd5deda |
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1 /** | |
2 ****************************************************************************** | |
3 * @file stm32f4xx_ll_usb.h | |
4 * @author MCD Application Team | |
5 * @brief Header file of USB Core HAL module. | |
6 ****************************************************************************** | |
7 * @attention | |
8 * | |
9 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> | |
10 * | |
11 * Redistribution and use in source and binary forms, with or without modification, | |
12 * are permitted provided that the following conditions are met: | |
13 * 1. Redistributions of source code must retain the above copyright notice, | |
14 * this list of conditions and the following disclaimer. | |
15 * 2. Redistributions in binary form must reproduce the above copyright notice, | |
16 * this list of conditions and the following disclaimer in the documentation | |
17 * and/or other materials provided with the distribution. | |
18 * 3. Neither the name of STMicroelectronics nor the names of its contributors | |
19 * may be used to endorse or promote products derived from this software | |
20 * without specific prior written permission. | |
21 * | |
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | |
25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE | |
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | |
28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | |
29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | |
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
32 * | |
33 ****************************************************************************** | |
34 */ | |
35 | |
36 /* Define to prevent recursive inclusion -------------------------------------*/ | |
37 #ifndef __STM32F4xx_LL_USB_H | |
38 #define __STM32F4xx_LL_USB_H | |
39 | |
40 #ifdef __cplusplus | |
41 extern "C" { | |
42 #endif | |
43 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \ | |
44 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \ | |
45 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \ | |
46 defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \ | |
47 defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) | |
48 /* Includes ------------------------------------------------------------------*/ | |
49 #include "stm32f4xx_hal_def.h" | |
50 | |
51 /** @addtogroup STM32F4xx_HAL | |
52 * @{ | |
53 */ | |
54 | |
55 /** @addtogroup USB_Core | |
56 * @{ | |
57 */ | |
58 | |
59 /* Exported types ------------------------------------------------------------*/ | |
60 | |
61 /** | |
62 * @brief USB Mode definition | |
63 */ | |
64 typedef enum | |
65 { | |
66 USB_OTG_DEVICE_MODE = 0U, | |
67 USB_OTG_HOST_MODE = 1U, | |
68 USB_OTG_DRD_MODE = 2U | |
69 | |
70 }USB_OTG_ModeTypeDef; | |
71 | |
72 /** | |
73 * @brief URB States definition | |
74 */ | |
75 typedef enum { | |
76 URB_IDLE = 0U, | |
77 URB_DONE, | |
78 URB_NOTREADY, | |
79 URB_NYET, | |
80 URB_ERROR, | |
81 URB_STALL | |
82 | |
83 }USB_OTG_URBStateTypeDef; | |
84 | |
85 /** | |
86 * @brief Host channel States definition | |
87 */ | |
88 typedef enum { | |
89 HC_IDLE = 0U, | |
90 HC_XFRC, | |
91 HC_HALTED, | |
92 HC_NAK, | |
93 HC_NYET, | |
94 HC_STALL, | |
95 HC_XACTERR, | |
96 HC_BBLERR, | |
97 HC_DATATGLERR | |
98 | |
99 }USB_OTG_HCStateTypeDef; | |
100 | |
101 /** | |
102 * @brief PCD Initialization Structure definition | |
103 */ | |
104 typedef struct | |
105 { | |
106 uint32_t dev_endpoints; /*!< Device Endpoints number. | |
107 This parameter depends on the used USB core. | |
108 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ | |
109 | |
110 uint32_t Host_channels; /*!< Host Channels number. | |
111 This parameter Depends on the used USB core. | |
112 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ | |
113 | |
114 uint32_t speed; /*!< USB Core speed. | |
115 This parameter can be any value of @ref USB_Core_Speed_ */ | |
116 | |
117 uint32_t dma_enable; /*!< Enable or disable of the USB embedded DMA. */ | |
118 | |
119 uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size. | |
120 This parameter can be any value of @ref USB_EP0_MPS_ */ | |
121 | |
122 uint32_t phy_itface; /*!< Select the used PHY interface. | |
123 This parameter can be any value of @ref USB_Core_PHY_ */ | |
124 | |
125 uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */ | |
126 | |
127 uint32_t low_power_enable; /*!< Enable or disable the low power mode. */ | |
128 | |
129 uint32_t lpm_enable; /*!< Enable or disable Link Power Management. */ | |
130 | |
131 uint32_t battery_charging_enable; /*!< Enable or disable Battery charging. */ | |
132 | |
133 uint32_t vbus_sensing_enable; /*!< Enable or disable the VBUS Sensing feature. */ | |
134 | |
135 uint32_t use_dedicated_ep1; /*!< Enable or disable the use of the dedicated EP1 interrupt. */ | |
136 | |
137 uint32_t use_external_vbus; /*!< Enable or disable the use of the external VBUS. */ | |
138 | |
139 }USB_OTG_CfgTypeDef; | |
140 | |
141 /** | |
142 * @brief OTG End Point Initialization Structure definition | |
143 */ | |
144 typedef struct | |
145 { | |
146 uint8_t num; /*!< Endpoint number | |
147 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ | |
148 | |
149 uint8_t is_in; /*!< Endpoint direction | |
150 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ | |
151 | |
152 uint8_t is_stall; /*!< Endpoint stall condition | |
153 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ | |
154 | |
155 uint8_t type; /*!< Endpoint type | |
156 This parameter can be any value of @ref USB_EP_Type_ */ | |
157 | |
158 uint8_t data_pid_start; /*!< Initial data PID | |
159 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ | |
160 | |
161 uint8_t even_odd_frame; /*!< IFrame parity | |
162 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ | |
163 | |
164 uint16_t tx_fifo_num; /*!< Transmission FIFO number | |
165 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ | |
166 | |
167 uint32_t maxpacket; /*!< Endpoint Max packet size | |
168 This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */ | |
169 | |
170 uint8_t *xfer_buff; /*!< Pointer to transfer buffer */ | |
171 | |
172 uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address */ | |
173 | |
174 uint32_t xfer_len; /*!< Current transfer length */ | |
175 | |
176 uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */ | |
177 | |
178 }USB_OTG_EPTypeDef; | |
179 | |
180 /** | |
181 * @brief OTG HC Initialization Structure definition | |
182 */ | |
183 typedef struct | |
184 { | |
185 uint8_t dev_addr ; /*!< USB device address. | |
186 This parameter must be a number between Min_Data = 1 and Max_Data = 255 */ | |
187 | |
188 uint8_t ch_num; /*!< Host channel number. | |
189 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ | |
190 | |
191 uint8_t ep_num; /*!< Endpoint number. | |
192 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ | |
193 | |
194 uint8_t ep_is_in; /*!< Endpoint direction | |
195 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ | |
196 | |
197 uint8_t speed; /*!< USB Host speed. | |
198 This parameter can be any value of @ref USB_Core_Speed_ */ | |
199 | |
200 uint8_t do_ping; /*!< Enable or disable the use of the PING protocol for HS mode. */ | |
201 | |
202 uint8_t process_ping; /*!< Execute the PING protocol for HS mode. */ | |
203 | |
204 uint8_t ep_type; /*!< Endpoint Type. | |
205 This parameter can be any value of @ref USB_EP_Type_ */ | |
206 | |
207 uint16_t max_packet; /*!< Endpoint Max packet size. | |
208 This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */ | |
209 | |
210 uint8_t data_pid; /*!< Initial data PID. | |
211 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ | |
212 | |
213 uint8_t *xfer_buff; /*!< Pointer to transfer buffer. */ | |
214 | |
215 uint32_t xfer_len; /*!< Current transfer length. */ | |
216 | |
217 uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer. */ | |
218 | |
219 uint8_t toggle_in; /*!< IN transfer current toggle flag. | |
220 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ | |
221 | |
222 uint8_t toggle_out; /*!< OUT transfer current toggle flag | |
223 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ | |
224 | |
225 uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address. */ | |
226 | |
227 uint32_t ErrCnt; /*!< Host channel error count.*/ | |
228 | |
229 USB_OTG_URBStateTypeDef urb_state; /*!< URB state. | |
230 This parameter can be any value of @ref USB_OTG_URBStateTypeDef */ | |
231 | |
232 USB_OTG_HCStateTypeDef state; /*!< Host Channel state. | |
233 This parameter can be any value of @ref USB_OTG_HCStateTypeDef */ | |
234 | |
235 }USB_OTG_HCTypeDef; | |
236 | |
237 /* Exported constants --------------------------------------------------------*/ | |
238 | |
239 /** @defgroup PCD_Exported_Constants PCD Exported Constants | |
240 * @{ | |
241 */ | |
242 | |
243 /** @defgroup USB_Core_Mode_ USB Core Mode | |
244 * @{ | |
245 */ | |
246 #define USB_OTG_MODE_DEVICE 0U | |
247 #define USB_OTG_MODE_HOST 1U | |
248 #define USB_OTG_MODE_DRD 2U | |
249 /** | |
250 * @} | |
251 */ | |
252 | |
253 /** @defgroup USB_Core_Speed_ USB Core Speed | |
254 * @{ | |
255 */ | |
256 #define USB_OTG_SPEED_HIGH 0U | |
257 #define USB_OTG_SPEED_HIGH_IN_FULL 1U | |
258 #define USB_OTG_SPEED_LOW 2U | |
259 #define USB_OTG_SPEED_FULL 3U | |
260 /** | |
261 * @} | |
262 */ | |
263 | |
264 /** @defgroup USB_Core_PHY_ USB Core PHY | |
265 * @{ | |
266 */ | |
267 #define USB_OTG_ULPI_PHY 1U | |
268 #define USB_OTG_EMBEDDED_PHY 2U | |
269 /** | |
270 * @} | |
271 */ | |
272 | |
273 /** @defgroup USB_Core_MPS_ USB Core MPS | |
274 * @{ | |
275 */ | |
276 #define USB_OTG_HS_MAX_PACKET_SIZE 512U | |
277 #define USB_OTG_FS_MAX_PACKET_SIZE 64U | |
278 #define USB_OTG_MAX_EP0_SIZE 64U | |
279 /** | |
280 * @} | |
281 */ | |
282 | |
283 /** @defgroup USB_Core_Phy_Frequency_ USB Core Phy Frequency | |
284 * @{ | |
285 */ | |
286 #define DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ (0U << 1U) | |
287 #define DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ (1U << 1U) | |
288 #define DSTS_ENUMSPD_LS_PHY_6MHZ (2U << 1U) | |
289 #define DSTS_ENUMSPD_FS_PHY_48MHZ (3U << 1U) | |
290 /** | |
291 * @} | |
292 */ | |
293 | |
294 /** @defgroup USB_CORE_Frame_Interval_ USB CORE Frame Interval | |
295 * @{ | |
296 */ | |
297 #define DCFG_FRAME_INTERVAL_80 0U | |
298 #define DCFG_FRAME_INTERVAL_85 1U | |
299 #define DCFG_FRAME_INTERVAL_90 2U | |
300 #define DCFG_FRAME_INTERVAL_95 3U | |
301 /** | |
302 * @} | |
303 */ | |
304 | |
305 /** @defgroup USB_EP0_MPS_ USB EP0 MPS | |
306 * @{ | |
307 */ | |
308 #define DEP0CTL_MPS_64 0U | |
309 #define DEP0CTL_MPS_32 1U | |
310 #define DEP0CTL_MPS_16 2U | |
311 #define DEP0CTL_MPS_8 3U | |
312 /** | |
313 * @} | |
314 */ | |
315 | |
316 /** @defgroup USB_EP_Speed_ USB EP Speed | |
317 * @{ | |
318 */ | |
319 #define EP_SPEED_LOW 0U | |
320 #define EP_SPEED_FULL 1U | |
321 #define EP_SPEED_HIGH 2U | |
322 /** | |
323 * @} | |
324 */ | |
325 | |
326 /** @defgroup USB_EP_Type_ USB EP Type | |
327 * @{ | |
328 */ | |
329 #define EP_TYPE_CTRL 0U | |
330 #define EP_TYPE_ISOC 1U | |
331 #define EP_TYPE_BULK 2U | |
332 #define EP_TYPE_INTR 3U | |
333 #define EP_TYPE_MSK 3U | |
334 /** | |
335 * @} | |
336 */ | |
337 | |
338 /** @defgroup USB_STS_Defines_ USB STS Defines | |
339 * @{ | |
340 */ | |
341 #define STS_GOUT_NAK 1U | |
342 #define STS_DATA_UPDT 2U | |
343 #define STS_XFER_COMP 3U | |
344 #define STS_SETUP_COMP 4U | |
345 #define STS_SETUP_UPDT 6U | |
346 /** | |
347 * @} | |
348 */ | |
349 | |
350 /** @defgroup HCFG_SPEED_Defines_ HCFG SPEED Defines | |
351 * @{ | |
352 */ | |
353 #define HCFG_30_60_MHZ 0U | |
354 #define HCFG_48_MHZ 1U | |
355 #define HCFG_6_MHZ 2U | |
356 /** | |
357 * @} | |
358 */ | |
359 | |
360 /** @defgroup HPRT0_PRTSPD_SPEED_Defines_ HPRT0 PRTSPD SPEED Defines | |
361 * @{ | |
362 */ | |
363 #define HPRT0_PRTSPD_HIGH_SPEED 0U | |
364 #define HPRT0_PRTSPD_FULL_SPEED 1U | |
365 #define HPRT0_PRTSPD_LOW_SPEED 2U | |
366 /** | |
367 * @} | |
368 */ | |
369 | |
370 #define HCCHAR_CTRL 0U | |
371 #define HCCHAR_ISOC 1U | |
372 #define HCCHAR_BULK 2U | |
373 #define HCCHAR_INTR 3U | |
374 | |
375 #define HC_PID_DATA0 0U | |
376 #define HC_PID_DATA2 1U | |
377 #define HC_PID_DATA1 2U | |
378 #define HC_PID_SETUP 3U | |
379 | |
380 #define GRXSTS_PKTSTS_IN 2U | |
381 #define GRXSTS_PKTSTS_IN_XFER_COMP 3U | |
382 #define GRXSTS_PKTSTS_DATA_TOGGLE_ERR 5U | |
383 #define GRXSTS_PKTSTS_CH_HALTED 7U | |
384 | |
385 #define USBx_PCGCCTL *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_PCGCCTL_BASE) | |
386 #define USBx_HPRT0 *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_HOST_PORT_BASE) | |
387 | |
388 #define USBx_DEVICE ((USB_OTG_DeviceTypeDef *)((uint32_t )USBx + USB_OTG_DEVICE_BASE)) | |
389 #define USBx_INEP(i) ((USB_OTG_INEndpointTypeDef *)((uint32_t)USBx + USB_OTG_IN_ENDPOINT_BASE + (i)*USB_OTG_EP_REG_SIZE)) | |
390 #define USBx_OUTEP(i) ((USB_OTG_OUTEndpointTypeDef *)((uint32_t)USBx + USB_OTG_OUT_ENDPOINT_BASE + (i)*USB_OTG_EP_REG_SIZE)) | |
391 #define USBx_DFIFO(i) *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_FIFO_BASE + (i) * USB_OTG_FIFO_SIZE) | |
392 | |
393 #define USBx_HOST ((USB_OTG_HostTypeDef *)((uint32_t )USBx + USB_OTG_HOST_BASE)) | |
394 #define USBx_HC(i) ((USB_OTG_HostChannelTypeDef *)((uint32_t)USBx + USB_OTG_HOST_CHANNEL_BASE + (i)*USB_OTG_HOST_CHANNEL_SIZE)) | |
395 /** | |
396 * @} | |
397 */ | |
398 /* Exported macro ------------------------------------------------------------*/ | |
399 #define USB_MASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK &= ~(__INTERRUPT__)) | |
400 #define USB_UNMASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK |= (__INTERRUPT__)) | |
401 | |
402 #define CLEAR_IN_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_INEP(__EPNUM__)->DIEPINT = (__INTERRUPT__)) | |
403 #define CLEAR_OUT_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_OUTEP(__EPNUM__)->DOEPINT = (__INTERRUPT__)) | |
404 | |
405 /* Exported functions --------------------------------------------------------*/ | |
406 HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef Init); | |
407 HAL_StatusTypeDef USB_DevInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef Init); | |
408 HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx); | |
409 HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx); | |
410 HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx , USB_OTG_ModeTypeDef mode); | |
411 HAL_StatusTypeDef USB_SetDevSpeed(USB_OTG_GlobalTypeDef *USBx , uint8_t speed); | |
412 HAL_StatusTypeDef USB_FlushRxFifo (USB_OTG_GlobalTypeDef *USBx); | |
413 HAL_StatusTypeDef USB_FlushTxFifo (USB_OTG_GlobalTypeDef *USBx, uint32_t num ); | |
414 HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); | |
415 HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); | |
416 HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); | |
417 HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); | |
418 HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); | |
419 HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma); | |
420 HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma); | |
421 void * USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len); | |
422 HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); | |
423 HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep); | |
424 HAL_StatusTypeDef USB_SetDevAddress (USB_OTG_GlobalTypeDef *USBx, uint8_t address); | |
425 HAL_StatusTypeDef USB_DevConnect (USB_OTG_GlobalTypeDef *USBx); | |
426 HAL_StatusTypeDef USB_DevDisconnect (USB_OTG_GlobalTypeDef *USBx); | |
427 HAL_StatusTypeDef USB_StopDevice(USB_OTG_GlobalTypeDef *USBx); | |
428 HAL_StatusTypeDef USB_ActivateSetup (USB_OTG_GlobalTypeDef *USBx); | |
429 HAL_StatusTypeDef USB_EP0_OutStart(USB_OTG_GlobalTypeDef *USBx, uint8_t dma, uint8_t *psetup); | |
430 uint8_t USB_GetDevSpeed(USB_OTG_GlobalTypeDef *USBx); | |
431 uint32_t USB_GetMode(USB_OTG_GlobalTypeDef *USBx); | |
432 uint32_t USB_ReadInterrupts (USB_OTG_GlobalTypeDef *USBx); | |
433 uint32_t USB_ReadDevAllOutEpInterrupt (USB_OTG_GlobalTypeDef *USBx); | |
434 uint32_t USB_ReadDevOutEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum); | |
435 uint32_t USB_ReadDevAllInEpInterrupt (USB_OTG_GlobalTypeDef *USBx); | |
436 uint32_t USB_ReadDevInEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum); | |
437 void USB_ClearInterrupts (USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt); | |
438 | |
439 HAL_StatusTypeDef USB_HostInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg); | |
440 HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx , uint8_t freq); | |
441 HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx); | |
442 HAL_StatusTypeDef USB_DriveVbus (USB_OTG_GlobalTypeDef *USBx, uint8_t state); | |
443 uint32_t USB_GetHostSpeed (USB_OTG_GlobalTypeDef *USBx); | |
444 uint32_t USB_GetCurrentFrame (USB_OTG_GlobalTypeDef *USBx); | |
445 HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx, | |
446 uint8_t ch_num, | |
447 uint8_t epnum, | |
448 uint8_t dev_address, | |
449 uint8_t speed, | |
450 uint8_t ep_type, | |
451 uint16_t mps); | |
452 HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDef *hc, uint8_t dma); | |
453 uint32_t USB_HC_ReadInterrupt (USB_OTG_GlobalTypeDef *USBx); | |
454 HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx , uint8_t hc_num); | |
455 HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx , uint8_t ch_num); | |
456 HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx); | |
457 | |
458 /** | |
459 * @} | |
460 */ | |
461 | |
462 /** | |
463 * @} | |
464 */ | |
465 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || | |
466 STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Rx || | |
467 STM32F412Vx || STM32F412Cx || STM32F413xx || STM32F423xx */ | |
468 #ifdef __cplusplus | |
469 } | |
470 #endif | |
471 | |
472 | |
473 #endif /* __STM32F4xx_LL_USB_H */ | |
474 | |
475 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |