Mercurial > public > ostc4

comparison Common/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_lptim.h @ 128:c78bcbd5deda FlipDisplay

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
Added current STM32 standandard libraries in version independend folder structure
author Ideenmodellierer
date Sun, 17 Feb 2019 21:12:22 +0100
parents
children
comparison
equal deleted inserted replaced
127:1369f8660eaa 128:c78bcbd5deda
1 /**
2 ******************************************************************************
3 * @file stm32f4xx_ll_lptim.h
4 * @author MCD Application Team
5 * @brief Header file of LPTIM LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
10 *
11 * Redistribution and use in source and binary forms, with or without modification,
12 * are permitted provided that the following conditions are met:
13 * 1. Redistributions of source code must retain the above copyright notice,
14 * this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright notice,
16 * this list of conditions and the following disclaimer in the documentation
17 * and/or other materials provided with the distribution.
18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 ******************************************************************************
34 */
35
36 /* Define to prevent recursive inclusion -------------------------------------*/
37 #ifndef __STM32F4xx_LL_LPTIM_H
38 #define __STM32F4xx_LL_LPTIM_H
39
40 #ifdef __cplusplus
41 extern "C" {
42 #endif
43
44 /* Includes ------------------------------------------------------------------*/
45 #include "stm32f4xx.h"
46
47 /** @addtogroup STM32F4xx_LL_Driver
48 * @{
49 */
50 #if defined (LPTIM1)
51
52 /** @defgroup LPTIM_LL LPTIM
53 * @{
54 */
55
56 /* Private types -------------------------------------------------------------*/
57 /* Private variables ---------------------------------------------------------*/
58
59 /* Private constants ---------------------------------------------------------*/
60
61 /* Private macros ------------------------------------------------------------*/
62 #if defined(USE_FULL_LL_DRIVER)
63 /** @defgroup LPTIM_LL_Private_Macros LPTIM Private Macros
64 * @{
65 */
66 /**
67 * @}
68 */
69 #endif /*USE_FULL_LL_DRIVER*/
70
71 /* Exported types ------------------------------------------------------------*/
72 #if defined(USE_FULL_LL_DRIVER)
73 /** @defgroup LPTIM_LL_ES_INIT LPTIM Exported Init structure
74 * @{
75 */
76
77 /**
78 * @brief LPTIM Init structure definition
79 */
80 typedef struct
81 {
82 uint32_t ClockSource; /*!< Specifies the source of the clock used by the LPTIM instance.
83 This parameter can be a value of @ref LPTIM_LL_EC_CLK_SOURCE.
84
85 This feature can be modified afterwards using unitary function @ref LL_LPTIM_SetClockSource().*/
86
87 uint32_t Prescaler; /*!< Specifies the prescaler division ratio.
88 This parameter can be a value of @ref LPTIM_LL_EC_PRESCALER.
89
90 This feature can be modified afterwards using using unitary function @ref LL_LPTIM_SetPrescaler().*/
91
92 uint32_t Waveform; /*!< Specifies the waveform shape.
93 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_WAVEFORM.
94
95 This feature can be modified afterwards using unitary function @ref LL_LPTIM_ConfigOutput().*/
96
97 uint32_t Polarity; /*!< Specifies waveform polarity.
98 This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_POLARITY.
99
100 This feature can be modified afterwards using unitary function @ref LL_LPTIM_ConfigOutput().*/
101 } LL_LPTIM_InitTypeDef;
102
103 /**
104 * @}
105 */
106 #endif /* USE_FULL_LL_DRIVER */
107
108 /* Exported constants --------------------------------------------------------*/
109 /** @defgroup LPTIM_LL_Exported_Constants LPTIM Exported Constants
110 * @{
111 */
112
113 /** @defgroup LPTIM_LL_EC_GET_FLAG Get Flags Defines
114 * @brief Flags defines which can be used with LL_LPTIM_ReadReg function
115 * @{
116 */
117 #define LL_LPTIM_ISR_CMPM LPTIM_ISR_CMPM /*!< Compare match */
118 #define LL_LPTIM_ISR_ARRM LPTIM_ISR_ARRM /*!< Autoreload match */
119 #define LL_LPTIM_ISR_EXTTRIG LPTIM_ISR_EXTTRIG /*!< External trigger edge event */
120 #define LL_LPTIM_ISR_CMPOK LPTIM_ISR_CMPOK /*!< Compare register update OK */
121 #define LL_LPTIM_ISR_ARROK LPTIM_ISR_ARROK /*!< Autoreload register update OK */
122 #define LL_LPTIM_ISR_UP LPTIM_ISR_UP /*!< Counter direction change down to up */
123 #define LL_LPTIM_ISR_DOWN LPTIM_ISR_DOWN /*!< Counter direction change up to down */
124 /**
125 * @}
126 */
127
128 /** @defgroup LPTIM_LL_EC_IT IT Defines
129 * @brief IT defines which can be used with LL_LPTIM_ReadReg and LL_LPTIM_WriteReg functions
130 * @{
131 */
132 #define LL_LPTIM_IER_CMPMIE LPTIM_IER_CMPMIE /*!< Compare match Interrupt Enable */
133 #define LL_LPTIM_IER_ARRMIE LPTIM_IER_ARRMIE /*!< Autoreload match Interrupt Enable */
134 #define LL_LPTIM_IER_EXTTRIGIE LPTIM_IER_EXTTRIGIE /*!< External trigger valid edge Interrupt Enable */
135 #define LL_LPTIM_IER_CMPOKIE LPTIM_IER_CMPOKIE /*!< Compare register update OK Interrupt Enable */
136 #define LL_LPTIM_IER_ARROKIE LPTIM_IER_ARROKIE /*!< Autoreload register update OK Interrupt Enable */
137 #define LL_LPTIM_IER_UPIE LPTIM_IER_UPIE /*!< Direction change to UP Interrupt Enable */
138 #define LL_LPTIM_IER_DOWNIE LPTIM_IER_DOWNIE /*!< Direction change to down Interrupt Enable */
139 /**
140 * @}
141 */
142
143 /** @defgroup LPTIM_LL_EC_OPERATING_MODE Operating Mode
144 * @{
145 */
146 #define LL_LPTIM_OPERATING_MODE_CONTINUOUS LPTIM_CR_CNTSTRT /*!<LP Timer starts in continuous mode*/
147 #define LL_LPTIM_OPERATING_MODE_ONESHOT LPTIM_CR_SNGSTRT /*!<LP Tilmer starts in single mode*/
148 /**
149 * @}
150 */
151
152 /** @defgroup LPTIM_LL_EC_UPDATE_MODE Update Mode
153 * @{
154 */
155 #define LL_LPTIM_UPDATE_MODE_IMMEDIATE 0x00000000U /*!<Preload is disabled: registers are updated after each APB bus write access*/
156 #define LL_LPTIM_UPDATE_MODE_ENDOFPERIOD LPTIM_CFGR_PRELOAD /*!<preload is enabled: registers are updated at the end of the current LPTIM period*/
157 /**
158 * @}
159 */
160
161 /** @defgroup LPTIM_LL_EC_COUNTER_MODE Counter Mode
162 * @{
163 */
164 #define LL_LPTIM_COUNTER_MODE_INTERNAL 0x00000000U /*!<The counter is incremented following each internal clock pulse*/
165 #define LL_LPTIM_COUNTER_MODE_EXTERNAL LPTIM_CFGR_COUNTMODE /*!<The counter is incremented following each valid clock pulse on the LPTIM external Input1*/
166 /**
167 * @}
168 */
169
170 /** @defgroup LPTIM_LL_EC_OUTPUT_WAVEFORM Output Waveform Type
171 * @{
172 */
173 #define LL_LPTIM_OUTPUT_WAVEFORM_PWM 0x00000000U /*!<LPTIM generates either a PWM waveform or a One pulse waveform depending on chosen operating mode CONTINOUS or SINGLE*/
174 #define LL_LPTIM_OUTPUT_WAVEFORM_SETONCE LPTIM_CFGR_WAVE /*!<LPTIM generates a Set Once waveform*/
175 /**
176 * @}
177 */
178
179 /** @defgroup LPTIM_LL_EC_OUTPUT_POLARITY Output Polarity
180 * @{
181 */
182 #define LL_LPTIM_OUTPUT_POLARITY_REGULAR 0x00000000U /*!<The LPTIM output reflects the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
183 #define LL_LPTIM_OUTPUT_POLARITY_INVERSE LPTIM_CFGR_WAVPOL /*!<The LPTIM output reflects the inverse of the compare results between LPTIMx_ARR and LPTIMx_CMP registers*/
184 /**
185 * @}
186 */
187
188 /** @defgroup LPTIM_LL_EC_PRESCALER Prescaler Value
189 * @{
190 */
191 #define LL_LPTIM_PRESCALER_DIV1 0x00000000U /*!<Prescaler division factor is set to 1*/
192 #define LL_LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 /*!<Prescaler division factor is set to 2*/
193 #define LL_LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 /*!<Prescaler division factor is set to 4*/
194 #define LL_LPTIM_PRESCALER_DIV8 (LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 8*/
195 #define LL_LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 /*!<Prescaler division factor is set to 16*/
196 #define LL_LPTIM_PRESCALER_DIV32 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_0) /*!<Prescaler division factor is set to 32*/
197 #define LL_LPTIM_PRESCALER_DIV64 (LPTIM_CFGR_PRESC_2 | LPTIM_CFGR_PRESC_1) /*!<Prescaler division factor is set to 64*/
198 #define LL_LPTIM_PRESCALER_DIV128 LPTIM_CFGR_PRESC /*!<Prescaler division factor is set to 128*/
199 /**
200 * @}
201 */
202
203 /** @defgroup LPTIM_LL_EC_TRIG_SOURCE Trigger Source
204 * @{
205 */
206 #define LL_LPTIM_TRIG_SOURCE_GPIO 0x00000000U /*!<External input trigger is connected to TIMx_ETR input*/
207 #define LL_LPTIM_TRIG_SOURCE_RTCALARMA LPTIM_CFGR_TRIGSEL_0 /*!<External input trigger is connected to RTC Alarm A*/
208 #define LL_LPTIM_TRIG_SOURCE_RTCALARMB LPTIM_CFGR_TRIGSEL_1 /*!<External input trigger is connected to RTC Alarm B*/
209 #define LL_LPTIM_TRIG_SOURCE_RTCTAMP1 (LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to RTC Tamper 1*/
210 #define LL_LPTIM_TRIG_SOURCE_TIM1_TRGO LPTIM_CFGR_TRIGSEL_2 /*!<External input trigger is connected to TIM1*/
211 #define LL_LPTIM_TRIG_SOURCE_TIM5_TRGO (LPTIM_CFGR_TRIGSEL_2 | LPTIM_CFGR_TRIGSEL_0) /*!<External input trigger is connected to TIM5*/
212 /**
213 * @}
214 */
215
216 /** @defgroup LPTIM_LL_EC_TRIG_FILTER Trigger Filter
217 * @{
218 */
219 #define LL_LPTIM_TRIG_FILTER_NONE 0x00000000U /*!<Any trigger active level change is considered as a valid trigger*/
220 #define LL_LPTIM_TRIG_FILTER_2 LPTIM_CFGR_TRGFLT_0 /*!<Trigger active level change must be stable for at least 2 clock periods before it is considered as valid trigger*/
221 #define LL_LPTIM_TRIG_FILTER_4 LPTIM_CFGR_TRGFLT_1 /*!<Trigger active level change must be stable for at least 4 clock periods before it is considered as valid trigger*/
222 #define LL_LPTIM_TRIG_FILTER_8 LPTIM_CFGR_TRGFLT /*!<Trigger active level change must be stable for at least 8 clock periods before it is considered as valid trigger*/
223 /**
224 * @}
225 */
226
227 /** @defgroup LPTIM_LL_EC_TRIG_POLARITY Trigger Polarity
228 * @{
229 */
230 #define LL_LPTIM_TRIG_POLARITY_RISING LPTIM_CFGR_TRIGEN_0 /*!<LPTIM counter starts when a rising edge is detected*/
231 #define LL_LPTIM_TRIG_POLARITY_FALLING LPTIM_CFGR_TRIGEN_1 /*!<LPTIM counter starts when a falling edge is detected*/
232 #define LL_LPTIM_TRIG_POLARITY_RISING_FALLING LPTIM_CFGR_TRIGEN /*!<LPTIM counter starts when a rising or a falling edge is detected*/
233 /**
234 * @}
235 */
236
237 /** @defgroup LPTIM_LL_EC_CLK_SOURCE Clock Source
238 * @{
239 */
240 #define LL_LPTIM_CLK_SOURCE_INTERNAL 0x00000000U /*!<LPTIM is clocked by internal clock source (APB clock or any of the embedded oscillators)*/
241 #define LL_LPTIM_CLK_SOURCE_EXTERNAL LPTIM_CFGR_CKSEL /*!<LPTIM is clocked by an external clock source through the LPTIM external Input1*/
242 /**
243 * @}
244 */
245
246 /** @defgroup LPTIM_LL_EC_CLK_FILTER Clock Filter
247 * @{
248 */
249 #define LL_LPTIM_CLK_FILTER_NONE 0x00000000U /*!<Any external clock signal level change is considered as a valid transition*/
250 #define LL_LPTIM_CLK_FILTER_2 LPTIM_CFGR_CKFLT_0 /*!<External clock signal level change must be stable for at least 2 clock periods before it is considered as valid transition*/
251 #define LL_LPTIM_CLK_FILTER_4 LPTIM_CFGR_CKFLT_1 /*!<External clock signal level change must be stable for at least 4 clock periods before it is considered as valid transition*/
252 #define LL_LPTIM_CLK_FILTER_8 LPTIM_CFGR_CKFLT /*!<External clock signal level change must be stable for at least 8 clock periods before it is considered as valid transition*/
253 /**
254 * @}
255 */
256
257 /** @defgroup LPTIM_LL_EC_CLK_POLARITY Clock Polarity
258 * @{
259 */
260 #define LL_LPTIM_CLK_POLARITY_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/
261 #define LL_LPTIM_CLK_POLARITY_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/
262 #define LL_LPTIM_CLK_POLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/
263 /**
264 * @}
265 */
266
267 /** @defgroup LPTIM_LL_EC_ENCODER_MODE Encoder Mode
268 * @{
269 */
270 #define LL_LPTIM_ENCODER_MODE_RISING 0x00000000U /*!< The rising edge is the active edge used for counting*/
271 #define LL_LPTIM_ENCODER_MODE_FALLING LPTIM_CFGR_CKPOL_0 /*!< The falling edge is the active edge used for counting*/
272 #define LL_LPTIM_ENCODER_MODE_RISING_FALLING LPTIM_CFGR_CKPOL_1 /*!< Both edges are active edges*/
273 /**
274 * @}
275 */
276
277
278 /**
279 * @}
280 */
281
282 /* Exported macro ------------------------------------------------------------*/
283 /** @defgroup LPTIM_LL_Exported_Macros LPTIM Exported Macros
284 * @{
285 */
286
287 /** @defgroup LPTIM_LL_EM_WRITE_READ Common Write and read registers Macros
288 * @{
289 */
290
291 /**
292 * @brief Write a value in LPTIM register
293 * @param __INSTANCE__ LPTIM Instance
294 * @param __REG__ Register to be written
295 * @param __VALUE__ Value to be written in the register
296 * @retval None
297 */
298 #define LL_LPTIM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
299
300 /**
301 * @brief Read a value in LPTIM register
302 * @param __INSTANCE__ LPTIM Instance
303 * @param __REG__ Register to be read
304 * @retval Register value
305 */
306 #define LL_LPTIM_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
307 /**
308 * @}
309 */
310
311 /**
312 * @}
313 */
314
315
316 /* Exported functions --------------------------------------------------------*/
317 /** @defgroup LPTIM_LL_Exported_Functions LPTIM Exported Functions
318 * @{
319 */
320
321 /** @defgroup LPTIM_LL_EF_LPTIM_Configuration LPTIM Configuration
322 * @{
323 */
324
325 /**
326 * @brief Enable the LPTIM instance
327 * @note After setting the ENABLE bit, a delay of two counter clock is needed
328 * before the LPTIM instance is actually enabled.
329 * @rmtoll CR ENABLE LL_LPTIM_Enable
330 * @param LPTIMx Low-Power Timer instance
331 * @retval None
332 */
333 __STATIC_INLINE void LL_LPTIM_Enable(LPTIM_TypeDef *LPTIMx)
334 {
335 SET_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
336 }
337
338 /**
339 * @brief Disable the LPTIM instance
340 * @rmtoll CR ENABLE LL_LPTIM_Disable
341 * @param LPTIMx Low-Power Timer instance
342 * @retval None
343 */
344 __STATIC_INLINE void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx)
345 {
346 CLEAR_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
347 }
348
349 /**
350 * @brief Indicates whether the LPTIM instance is enabled.
351 * @rmtoll CR ENABLE LL_LPTIM_IsEnabled
352 * @param LPTIMx Low-Power Timer instance
353 * @retval State of bit (1 or 0).
354 */
355 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabled(LPTIM_TypeDef *LPTIMx)
356 {
357 return (READ_BIT(LPTIMx->CR, LPTIM_CR_ENABLE) == (LPTIM_CR_ENABLE));
358 }
359
360 /**
361 * @brief Starts the LPTIM counter in the desired mode.
362 * @note LPTIM instance must be enabled before starting the counter.
363 * @note It is possible to change on the fly from One Shot mode to
364 * Continuous mode.
365 * @rmtoll CR CNTSTRT LL_LPTIM_StartCounter\n
366 * CR SNGSTRT LL_LPTIM_StartCounter
367 * @param LPTIMx Low-Power Timer instance
368 * @param OperatingMode This parameter can be one of the following values:
369 * @arg @ref LL_LPTIM_OPERATING_MODE_CONTINUOUS
370 * @arg @ref LL_LPTIM_OPERATING_MODE_ONESHOT
371 * @retval None
372 */
373 __STATIC_INLINE void LL_LPTIM_StartCounter(LPTIM_TypeDef *LPTIMx, uint32_t OperatingMode)
374 {
375 MODIFY_REG(LPTIMx->CR, LPTIM_CR_CNTSTRT | LPTIM_CR_SNGSTRT, OperatingMode);
376 }
377
378
379 /**
380 * @brief Set the LPTIM registers update mode (enable/disable register preload)
381 * @note This function must be called when the LPTIM instance is disabled.
382 * @rmtoll CFGR PRELOAD LL_LPTIM_SetUpdateMode
383 * @param LPTIMx Low-Power Timer instance
384 * @param UpdateMode This parameter can be one of the following values:
385 * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
386 * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
387 * @retval None
388 */
389 __STATIC_INLINE void LL_LPTIM_SetUpdateMode(LPTIM_TypeDef *LPTIMx, uint32_t UpdateMode)
390 {
391 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD, UpdateMode);
392 }
393
394 /**
395 * @brief Get the LPTIM registers update mode
396 * @rmtoll CFGR PRELOAD LL_LPTIM_GetUpdateMode
397 * @param LPTIMx Low-Power Timer instance
398 * @retval Returned value can be one of the following values:
399 * @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
400 * @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
401 */
402 __STATIC_INLINE uint32_t LL_LPTIM_GetUpdateMode(LPTIM_TypeDef *LPTIMx)
403 {
404 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD));
405 }
406
407 /**
408 * @brief Set the auto reload value
409 * @note The LPTIMx_ARR register content must only be modified when the LPTIM is enabled
410 * @note After a write to the LPTIMx_ARR register a new write operation to the
411 * same register can only be performed when the previous write operation
412 * is completed. Any successive write before the ARROK flag be set, will
413 * lead to unpredictable results.
414 * @note autoreload value be strictly greater than the compare value.
415 * @rmtoll ARR ARR LL_LPTIM_SetAutoReload
416 * @param LPTIMx Low-Power Timer instance
417 * @param AutoReload Value between Min_Data=0x00 and Max_Data=0xFFFF
418 * @retval None
419 */
420 __STATIC_INLINE void LL_LPTIM_SetAutoReload(LPTIM_TypeDef *LPTIMx, uint32_t AutoReload)
421 {
422 MODIFY_REG(LPTIMx->ARR, LPTIM_ARR_ARR, AutoReload);
423 }
424
425 /**
426 * @brief Get actual auto reload value
427 * @rmtoll ARR ARR LL_LPTIM_GetAutoReload
428 * @param LPTIMx Low-Power Timer instance
429 * @retval AutoReload Value between Min_Data=0x00 and Max_Data=0xFFFF
430 */
431 __STATIC_INLINE uint32_t LL_LPTIM_GetAutoReload(LPTIM_TypeDef *LPTIMx)
432 {
433 return (uint32_t)(READ_BIT(LPTIMx->ARR, LPTIM_ARR_ARR));
434 }
435
436 /**
437 * @brief Set the compare value
438 * @note After a write to the LPTIMx_CMP register a new write operation to the
439 * same register can only be performed when the previous write operation
440 * is completed. Any successive write before the CMPOK flag be set, will
441 * lead to unpredictable results.
442 * @rmtoll CMP CMP LL_LPTIM_SetCompare
443 * @param LPTIMx Low-Power Timer instance
444 * @param CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
445 * @retval None
446 */
447 __STATIC_INLINE void LL_LPTIM_SetCompare(LPTIM_TypeDef *LPTIMx, uint32_t CompareValue)
448 {
449 MODIFY_REG(LPTIMx->CMP, LPTIM_CMP_CMP, CompareValue);
450 }
451
452 /**
453 * @brief Get actual compare value
454 * @rmtoll CMP CMP LL_LPTIM_GetCompare
455 * @param LPTIMx Low-Power Timer instance
456 * @retval CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
457 */
458 __STATIC_INLINE uint32_t LL_LPTIM_GetCompare(LPTIM_TypeDef *LPTIMx)
459 {
460 return (uint32_t)(READ_BIT(LPTIMx->CMP, LPTIM_CMP_CMP));
461 }
462
463 /**
464 * @brief Get actual counter value
465 * @note When the LPTIM instance is running with an asynchronous clock, reading
466 * the LPTIMx_CNT register may return unreliable values. So in this case
467 * it is necessary to perform two consecutive read accesses and verify
468 * that the two returned values are identical.
469 * @rmtoll CNT CNT LL_LPTIM_GetCounter
470 * @param LPTIMx Low-Power Timer instance
471 * @retval Counter value
472 */
473 __STATIC_INLINE uint32_t LL_LPTIM_GetCounter(LPTIM_TypeDef *LPTIMx)
474 {
475 return (uint32_t)(READ_BIT(LPTIMx->CNT, LPTIM_CNT_CNT));
476 }
477
478 /**
479 * @brief Set the counter mode (selection of the LPTIM counter clock source).
480 * @note The counter mode can be set only when the LPTIM instance is disabled.
481 * @rmtoll CFGR COUNTMODE LL_LPTIM_SetCounterMode
482 * @param LPTIMx Low-Power Timer instance
483 * @param CounterMode This parameter can be one of the following values:
484 * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
485 * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
486 * @retval None
487 */
488 __STATIC_INLINE void LL_LPTIM_SetCounterMode(LPTIM_TypeDef *LPTIMx, uint32_t CounterMode)
489 {
490 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE, CounterMode);
491 }
492
493 /**
494 * @brief Get the counter mode
495 * @rmtoll CFGR COUNTMODE LL_LPTIM_GetCounterMode
496 * @param LPTIMx Low-Power Timer instance
497 * @retval Returned value can be one of the following values:
498 * @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
499 * @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
500 */
501 __STATIC_INLINE uint32_t LL_LPTIM_GetCounterMode(LPTIM_TypeDef *LPTIMx)
502 {
503 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE));
504 }
505
506 /**
507 * @brief Configure the LPTIM instance output (LPTIMx_OUT)
508 * @note This function must be called when the LPTIM instance is disabled.
509 * @note Regarding the LPTIM output polarity the change takes effect
510 * immediately, so the output default value will change immediately after
511 * the polarity is re-configured, even before the timer is enabled.
512 * @rmtoll CFGR WAVE LL_LPTIM_ConfigOutput\n
513 * CFGR WAVPOL LL_LPTIM_ConfigOutput
514 * @param LPTIMx Low-Power Timer instance
515 * @param Waveform This parameter can be one of the following values:
516 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
517 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
518 * @param Polarity This parameter can be one of the following values:
519 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
520 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
521 * @retval None
522 */
523 __STATIC_INLINE void LL_LPTIM_ConfigOutput(LPTIM_TypeDef *LPTIMx, uint32_t Waveform, uint32_t Polarity)
524 {
525 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE | LPTIM_CFGR_WAVPOL, Waveform | Polarity);
526 }
527
528 /**
529 * @brief Set waveform shape
530 * @rmtoll CFGR WAVE LL_LPTIM_SetWaveform
531 * @param LPTIMx Low-Power Timer instance
532 * @param Waveform This parameter can be one of the following values:
533 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
534 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
535 * @retval None
536 */
537 __STATIC_INLINE void LL_LPTIM_SetWaveform(LPTIM_TypeDef *LPTIMx, uint32_t Waveform)
538 {
539 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE, Waveform);
540 }
541
542 /**
543 * @brief Get actual waveform shape
544 * @rmtoll CFGR WAVE LL_LPTIM_GetWaveform
545 * @param LPTIMx Low-Power Timer instance
546 * @retval Returned value can be one of the following values:
547 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
548 * @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
549 */
550 __STATIC_INLINE uint32_t LL_LPTIM_GetWaveform(LPTIM_TypeDef *LPTIMx)
551 {
552 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVE));
553 }
554
555 /**
556 * @brief Set output polarity
557 * @rmtoll CFGR WAVPOL LL_LPTIM_SetPolarity
558 * @param LPTIMx Low-Power Timer instance
559 * @param Polarity This parameter can be one of the following values:
560 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
561 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
562 * @retval None
563 */
564 __STATIC_INLINE void LL_LPTIM_SetPolarity(LPTIM_TypeDef *LPTIMx, uint32_t Polarity)
565 {
566 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL, Polarity);
567 }
568
569 /**
570 * @brief Get actual output polarity
571 * @rmtoll CFGR WAVPOL LL_LPTIM_GetPolarity
572 * @param LPTIMx Low-Power Timer instance
573 * @retval Returned value can be one of the following values:
574 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
575 * @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
576 */
577 __STATIC_INLINE uint32_t LL_LPTIM_GetPolarity(LPTIM_TypeDef *LPTIMx)
578 {
579 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL));
580 }
581
582 /**
583 * @brief Set actual prescaler division ratio.
584 * @note This function must be called when the LPTIM instance is disabled.
585 * @note When the LPTIM is configured to be clocked by an internal clock source
586 * and the LPTIM counter is configured to be updated by active edges
587 * detected on the LPTIM external Input1, the internal clock provided to
588 * the LPTIM must be not be prescaled.
589 * @rmtoll CFGR PRESC LL_LPTIM_SetPrescaler
590 * @param LPTIMx Low-Power Timer instance
591 * @param Prescaler This parameter can be one of the following values:
592 * @arg @ref LL_LPTIM_PRESCALER_DIV1
593 * @arg @ref LL_LPTIM_PRESCALER_DIV2
594 * @arg @ref LL_LPTIM_PRESCALER_DIV4
595 * @arg @ref LL_LPTIM_PRESCALER_DIV8
596 * @arg @ref LL_LPTIM_PRESCALER_DIV16
597 * @arg @ref LL_LPTIM_PRESCALER_DIV32
598 * @arg @ref LL_LPTIM_PRESCALER_DIV64
599 * @arg @ref LL_LPTIM_PRESCALER_DIV128
600 * @retval None
601 */
602 __STATIC_INLINE void LL_LPTIM_SetPrescaler(LPTIM_TypeDef *LPTIMx, uint32_t Prescaler)
603 {
604 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRESC, Prescaler);
605 }
606
607 /**
608 * @brief Get actual prescaler division ratio.
609 * @rmtoll CFGR PRESC LL_LPTIM_GetPrescaler
610 * @param LPTIMx Low-Power Timer instance
611 * @retval Returned value can be one of the following values:
612 * @arg @ref LL_LPTIM_PRESCALER_DIV1
613 * @arg @ref LL_LPTIM_PRESCALER_DIV2
614 * @arg @ref LL_LPTIM_PRESCALER_DIV4
615 * @arg @ref LL_LPTIM_PRESCALER_DIV8
616 * @arg @ref LL_LPTIM_PRESCALER_DIV16
617 * @arg @ref LL_LPTIM_PRESCALER_DIV32
618 * @arg @ref LL_LPTIM_PRESCALER_DIV64
619 * @arg @ref LL_LPTIM_PRESCALER_DIV128
620 */
621 __STATIC_INLINE uint32_t LL_LPTIM_GetPrescaler(LPTIM_TypeDef *LPTIMx)
622 {
623 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRESC));
624 }
625
626
627 /**
628 * @}
629 */
630
631 /** @defgroup LPTIM_LL_EF_Trigger_Configuration Trigger Configuration
632 * @{
633 */
634
635 /**
636 * @brief Enable the timeout function
637 * @note This function must be called when the LPTIM instance is disabled.
638 * @note The first trigger event will start the timer, any successive trigger
639 * event will reset the counter and the timer will restart.
640 * @note The timeout value corresponds to the compare value; if no trigger
641 * occurs within the expected time frame, the MCU is waked-up by the
642 * compare match event.
643 * @rmtoll CFGR TIMOUT LL_LPTIM_EnableTimeout
644 * @param LPTIMx Low-Power Timer instance
645 * @retval None
646 */
647 __STATIC_INLINE void LL_LPTIM_EnableTimeout(LPTIM_TypeDef *LPTIMx)
648 {
649 SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
650 }
651
652 /**
653 * @brief Disable the timeout function
654 * @note This function must be called when the LPTIM instance is disabled.
655 * @note A trigger event arriving when the timer is already started will be
656 * ignored.
657 * @rmtoll CFGR TIMOUT LL_LPTIM_DisableTimeout
658 * @param LPTIMx Low-Power Timer instance
659 * @retval None
660 */
661 __STATIC_INLINE void LL_LPTIM_DisableTimeout(LPTIM_TypeDef *LPTIMx)
662 {
663 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
664 }
665
666 /**
667 * @brief Indicate whether the timeout function is enabled.
668 * @rmtoll CFGR TIMOUT LL_LPTIM_IsEnabledTimeout
669 * @param LPTIMx Low-Power Timer instance
670 * @retval State of bit (1 or 0).
671 */
672 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledTimeout(LPTIM_TypeDef *LPTIMx)
673 {
674 return (READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT) == (LPTIM_CFGR_TIMOUT));
675 }
676
677 /**
678 * @brief Start the LPTIM counter
679 * @note This function must be called when the LPTIM instance is disabled.
680 * @rmtoll CFGR TRIGEN LL_LPTIM_TrigSw
681 * @param LPTIMx Low-Power Timer instance
682 * @retval None
683 */
684 __STATIC_INLINE void LL_LPTIM_TrigSw(LPTIM_TypeDef *LPTIMx)
685 {
686 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN);
687 }
688
689 /**
690 * @brief Configure the external trigger used as a trigger event for the LPTIM.
691 * @note This function must be called when the LPTIM instance is disabled.
692 * @note An internal clock source must be present when a digital filter is
693 * required for the trigger.
694 * @rmtoll CFGR TRIGSEL LL_LPTIM_ConfigTrigger\n
695 * CFGR TRGFLT LL_LPTIM_ConfigTrigger\n
696 * CFGR TRIGEN LL_LPTIM_ConfigTrigger
697 * @param LPTIMx Low-Power Timer instance
698 * @param Source This parameter can be one of the following values:
699 * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
700 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
701 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
702 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
703 * @arg @ref LL_LPTIM_TRIG_SOURCE_TIM1_TRGO
704 * @arg @ref LL_LPTIM_TRIG_SOURCE_TIM5_TRGO
705 * @param Filter This parameter can be one of the following values:
706 * @arg @ref LL_LPTIM_TRIG_FILTER_NONE
707 * @arg @ref LL_LPTIM_TRIG_FILTER_2
708 * @arg @ref LL_LPTIM_TRIG_FILTER_4
709 * @arg @ref LL_LPTIM_TRIG_FILTER_8
710 * @param Polarity This parameter can be one of the following values:
711 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
712 * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
713 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
714 * (*) value not defined in all devices.
715 * @retval None
716 */
717 __STATIC_INLINE void LL_LPTIM_ConfigTrigger(LPTIM_TypeDef *LPTIMx, uint32_t Source, uint32_t Filter, uint32_t Polarity)
718 {
719 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL | LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGEN, Source | Filter | Polarity);
720 }
721
722 /**
723 * @brief Get actual external trigger source.
724 * @rmtoll CFGR TRIGSEL LL_LPTIM_GetTriggerSource
725 * @param LPTIMx Low-Power Timer instance
726 * @retval Returned value can be one of the following values:
727 * @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
728 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
729 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
730 * @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
731 * @arg @ref LL_LPTIM_TRIG_SOURCE_TIM1_TRGO
732 * @arg @ref LL_LPTIM_TRIG_SOURCE_TIM5_TRGO
733 */
734 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerSource(LPTIM_TypeDef *LPTIMx)
735 {
736 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL));
737 }
738
739 /**
740 * @brief Get actual external trigger filter.
741 * @rmtoll CFGR TRGFLT LL_LPTIM_GetTriggerFilter
742 * @param LPTIMx Low-Power Timer instance
743 * @retval Returned value can be one of the following values:
744 * @arg @ref LL_LPTIM_TRIG_FILTER_NONE
745 * @arg @ref LL_LPTIM_TRIG_FILTER_2
746 * @arg @ref LL_LPTIM_TRIG_FILTER_4
747 * @arg @ref LL_LPTIM_TRIG_FILTER_8
748 */
749 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerFilter(LPTIM_TypeDef *LPTIMx)
750 {
751 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRGFLT));
752 }
753
754 /**
755 * @brief Get actual external trigger polarity.
756 * @rmtoll CFGR TRIGEN LL_LPTIM_GetTriggerPolarity
757 * @param LPTIMx Low-Power Timer instance
758 * @retval Returned value can be one of the following values:
759 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
760 * @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
761 * @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
762 */
763 __STATIC_INLINE uint32_t LL_LPTIM_GetTriggerPolarity(LPTIM_TypeDef *LPTIMx)
764 {
765 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN));
766 }
767
768 /**
769 * @}
770 */
771
772 /** @defgroup LPTIM_LL_EF_Clock_Configuration Clock Configuration
773 * @{
774 */
775
776 /**
777 * @brief Set the source of the clock used by the LPTIM instance.
778 * @note This function must be called when the LPTIM instance is disabled.
779 * @rmtoll CFGR CKSEL LL_LPTIM_SetClockSource
780 * @param LPTIMx Low-Power Timer instance
781 * @param ClockSource This parameter can be one of the following values:
782 * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
783 * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
784 * @retval None
785 */
786 __STATIC_INLINE void LL_LPTIM_SetClockSource(LPTIM_TypeDef *LPTIMx, uint32_t ClockSource)
787 {
788 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKSEL, ClockSource);
789 }
790
791 /**
792 * @brief Get actual LPTIM instance clock source.
793 * @rmtoll CFGR CKSEL LL_LPTIM_GetClockSource
794 * @param LPTIMx Low-Power Timer instance
795 * @retval Returned value can be one of the following values:
796 * @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
797 * @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
798 */
799 __STATIC_INLINE uint32_t LL_LPTIM_GetClockSource(LPTIM_TypeDef *LPTIMx)
800 {
801 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKSEL));
802 }
803
804 /**
805 * @brief Configure the active edge or edges used by the counter when the LPTIM is clocked by an external clock source.
806 * @note This function must be called when the LPTIM instance is disabled.
807 * @note When both external clock signal edges are considered active ones,
808 * the LPTIM must also be clocked by an internal clock source with a
809 * frequency equal to at least four times the external clock frequency.
810 * @note An internal clock source must be present when a digital filter is
811 * required for external clock.
812 * @rmtoll CFGR CKFLT LL_LPTIM_ConfigClock\n
813 * CFGR CKPOL LL_LPTIM_ConfigClock
814 * @param LPTIMx Low-Power Timer instance
815 * @param ClockFilter This parameter can be one of the following values:
816 * @arg @ref LL_LPTIM_CLK_FILTER_NONE
817 * @arg @ref LL_LPTIM_CLK_FILTER_2
818 * @arg @ref LL_LPTIM_CLK_FILTER_4
819 * @arg @ref LL_LPTIM_CLK_FILTER_8
820 * @param ClockPolarity This parameter can be one of the following values:
821 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING
822 * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
823 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
824 * @retval None
825 */
826 __STATIC_INLINE void LL_LPTIM_ConfigClock(LPTIM_TypeDef *LPTIMx, uint32_t ClockFilter, uint32_t ClockPolarity)
827 {
828 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKFLT | LPTIM_CFGR_CKPOL, ClockFilter | ClockPolarity);
829 }
830
831 /**
832 * @brief Get actual clock polarity
833 * @rmtoll CFGR CKPOL LL_LPTIM_GetClockPolarity
834 * @param LPTIMx Low-Power Timer instance
835 * @retval Returned value can be one of the following values:
836 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING
837 * @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
838 * @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
839 */
840 __STATIC_INLINE uint32_t LL_LPTIM_GetClockPolarity(LPTIM_TypeDef *LPTIMx)
841 {
842 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
843 }
844
845 /**
846 * @brief Get actual clock digital filter
847 * @rmtoll CFGR CKFLT LL_LPTIM_GetClockFilter
848 * @param LPTIMx Low-Power Timer instance
849 * @retval Returned value can be one of the following values:
850 * @arg @ref LL_LPTIM_CLK_FILTER_NONE
851 * @arg @ref LL_LPTIM_CLK_FILTER_2
852 * @arg @ref LL_LPTIM_CLK_FILTER_4
853 * @arg @ref LL_LPTIM_CLK_FILTER_8
854 */
855 __STATIC_INLINE uint32_t LL_LPTIM_GetClockFilter(LPTIM_TypeDef *LPTIMx)
856 {
857 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKFLT));
858 }
859
860 /**
861 * @}
862 */
863
864 /** @defgroup LPTIM_LL_EF_Encoder_Mode Encoder Mode
865 * @{
866 */
867
868 /**
869 * @brief Configure the encoder mode.
870 * @note This function must be called when the LPTIM instance is disabled.
871 * @rmtoll CFGR CKPOL LL_LPTIM_SetEncoderMode
872 * @param LPTIMx Low-Power Timer instance
873 * @param EncoderMode This parameter can be one of the following values:
874 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING
875 * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
876 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
877 * @retval None
878 */
879 __STATIC_INLINE void LL_LPTIM_SetEncoderMode(LPTIM_TypeDef *LPTIMx, uint32_t EncoderMode)
880 {
881 MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKPOL, EncoderMode);
882 }
883
884 /**
885 * @brief Get actual encoder mode.
886 * @rmtoll CFGR CKPOL LL_LPTIM_GetEncoderMode
887 * @param LPTIMx Low-Power Timer instance
888 * @retval Returned value can be one of the following values:
889 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING
890 * @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
891 * @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
892 */
893 __STATIC_INLINE uint32_t LL_LPTIM_GetEncoderMode(LPTIM_TypeDef *LPTIMx)
894 {
895 return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
896 }
897
898 /**
899 * @brief Enable the encoder mode
900 * @note This function must be called when the LPTIM instance is disabled.
901 * @note In this mode the LPTIM instance must be clocked by an internal clock
902 * source. Also, the prescaler division ratio must be equal to 1.
903 * @note LPTIM instance must be configured in continuous mode prior enabling
904 * the encoder mode.
905 * @rmtoll CFGR ENC LL_LPTIM_EnableEncoderMode
906 * @param LPTIMx Low-Power Timer instance
907 * @retval None
908 */
909 __STATIC_INLINE void LL_LPTIM_EnableEncoderMode(LPTIM_TypeDef *LPTIMx)
910 {
911 SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
912 }
913
914 /**
915 * @brief Disable the encoder mode
916 * @note This function must be called when the LPTIM instance is disabled.
917 * @rmtoll CFGR ENC LL_LPTIM_DisableEncoderMode
918 * @param LPTIMx Low-Power Timer instance
919 * @retval None
920 */
921 __STATIC_INLINE void LL_LPTIM_DisableEncoderMode(LPTIM_TypeDef *LPTIMx)
922 {
923 CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
924 }
925
926 /**
927 * @brief Indicates whether the LPTIM operates in encoder mode.
928 * @rmtoll CFGR ENC LL_LPTIM_IsEnabledEncoderMode
929 * @param LPTIMx Low-Power Timer instance
930 * @retval State of bit (1 or 0).
931 */
932 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledEncoderMode(LPTIM_TypeDef *LPTIMx)
933 {
934 return (READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC) == (LPTIM_CFGR_ENC));
935 }
936
937 /**
938 * @}
939 */
940
941 /** @defgroup LPTIM_LL_EF_FLAG_Management FLAG Management
942 * @{
943 */
944
945 /**
946 * @brief Clear the compare match flag (CMPMCF)
947 * @rmtoll ICR CMPMCF LL_LPTIM_ClearFLAG_CMPM
948 * @param LPTIMx Low-Power Timer instance
949 * @retval None
950 */
951 __STATIC_INLINE void LL_LPTIM_ClearFLAG_CMPM(LPTIM_TypeDef *LPTIMx)
952 {
953 SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPMCF);
954 }
955
956 /**
957 * @brief Inform application whether a compare match interrupt has occurred.
958 * @rmtoll ISR CMPM LL_LPTIM_IsActiveFlag_CMPM
959 * @param LPTIMx Low-Power Timer instance
960 * @retval State of bit (1 or 0).
961 */
962 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPM(LPTIM_TypeDef *LPTIMx)
963 {
964 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPM) == (LPTIM_ISR_CMPM));
965 }
966
967 /**
968 * @brief Clear the autoreload match flag (ARRMCF)
969 * @rmtoll ICR ARRMCF LL_LPTIM_ClearFLAG_ARRM
970 * @param LPTIMx Low-Power Timer instance
971 * @retval None
972 */
973 __STATIC_INLINE void LL_LPTIM_ClearFLAG_ARRM(LPTIM_TypeDef *LPTIMx)
974 {
975 SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARRMCF);
976 }
977
978 /**
979 * @brief Inform application whether a autoreload match interrupt has occured.
980 * @rmtoll ISR ARRM LL_LPTIM_IsActiveFlag_ARRM
981 * @param LPTIMx Low-Power Timer instance
982 * @retval State of bit (1 or 0).
983 */
984 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARRM(LPTIM_TypeDef *LPTIMx)
985 {
986 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARRM) == (LPTIM_ISR_ARRM));
987 }
988
989 /**
990 * @brief Clear the external trigger valid edge flag(EXTTRIGCF).
991 * @rmtoll ICR EXTTRIGCF LL_LPTIM_ClearFlag_EXTTRIG
992 * @param LPTIMx Low-Power Timer instance
993 * @retval None
994 */
995 __STATIC_INLINE void LL_LPTIM_ClearFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
996 {
997 SET_BIT(LPTIMx->ICR, LPTIM_ICR_EXTTRIGCF);
998 }
999
1000 /**
1001 * @brief Inform application whether a valid edge on the selected external trigger input has occurred.
1002 * @rmtoll ISR EXTTRIG LL_LPTIM_IsActiveFlag_EXTTRIG
1003 * @param LPTIMx Low-Power Timer instance
1004 * @retval State of bit (1 or 0).
1005 */
1006 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1007 {
1008 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_EXTTRIG) == (LPTIM_ISR_EXTTRIG));
1009 }
1010
1011 /**
1012 * @brief Clear the compare register update interrupt flag (CMPOKCF).
1013 * @rmtoll ICR CMPOKCF LL_LPTIM_ClearFlag_CMPOK
1014 * @param LPTIMx Low-Power Timer instance
1015 * @retval None
1016 */
1017 __STATIC_INLINE void LL_LPTIM_ClearFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
1018 {
1019 SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPOKCF);
1020 }
1021
1022 /**
1023 * @brief Informs application whether the APB bus write operation to the LPTIMx_CMP register has been successfully completed; If so, a new one can be initiated.
1024 * @rmtoll ISR CMPOK LL_LPTIM_IsActiveFlag_CMPOK
1025 * @param LPTIMx Low-Power Timer instance
1026 * @retval State of bit (1 or 0).
1027 */
1028 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
1029 {
1030 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPOK) == (LPTIM_ISR_CMPOK));
1031 }
1032
1033 /**
1034 * @brief Clear the autoreload register update interrupt flag (ARROKCF).
1035 * @rmtoll ICR ARROKCF LL_LPTIM_ClearFlag_ARROK
1036 * @param LPTIMx Low-Power Timer instance
1037 * @retval None
1038 */
1039 __STATIC_INLINE void LL_LPTIM_ClearFlag_ARROK(LPTIM_TypeDef *LPTIMx)
1040 {
1041 SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARROKCF);
1042 }
1043
1044 /**
1045 * @brief Informs application whether the APB bus write operation to the LPTIMx_ARR register has been successfully completed; If so, a new one can be initiated.
1046 * @rmtoll ISR ARROK LL_LPTIM_IsActiveFlag_ARROK
1047 * @param LPTIMx Low-Power Timer instance
1048 * @retval State of bit (1 or 0).
1049 */
1050 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARROK(LPTIM_TypeDef *LPTIMx)
1051 {
1052 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARROK) == (LPTIM_ISR_ARROK));
1053 }
1054
1055 /**
1056 * @brief Clear the counter direction change to up interrupt flag (UPCF).
1057 * @rmtoll ICR UPCF LL_LPTIM_ClearFlag_UP
1058 * @param LPTIMx Low-Power Timer instance
1059 * @retval None
1060 */
1061 __STATIC_INLINE void LL_LPTIM_ClearFlag_UP(LPTIM_TypeDef *LPTIMx)
1062 {
1063 SET_BIT(LPTIMx->ICR, LPTIM_ICR_UPCF);
1064 }
1065
1066 /**
1067 * @brief Informs the application whether the counter direction has changed from down to up (when the LPTIM instance operates in encoder mode).
1068 * @rmtoll ISR UP LL_LPTIM_IsActiveFlag_UP
1069 * @param LPTIMx Low-Power Timer instance
1070 * @retval State of bit (1 or 0).
1071 */
1072 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_UP(LPTIM_TypeDef *LPTIMx)
1073 {
1074 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_UP) == (LPTIM_ISR_UP));
1075 }
1076
1077 /**
1078 * @brief Clear the counter direction change to down interrupt flag (DOWNCF).
1079 * @rmtoll ICR DOWNCF LL_LPTIM_ClearFlag_DOWN
1080 * @param LPTIMx Low-Power Timer instance
1081 * @retval None
1082 */
1083 __STATIC_INLINE void LL_LPTIM_ClearFlag_DOWN(LPTIM_TypeDef *LPTIMx)
1084 {
1085 SET_BIT(LPTIMx->ICR, LPTIM_ICR_DOWNCF);
1086 }
1087
1088 /**
1089 * @brief Informs the application whether the counter direction has changed from up to down (when the LPTIM instance operates in encoder mode).
1090 * @rmtoll ISR DOWN LL_LPTIM_IsActiveFlag_DOWN
1091 * @param LPTIMx Low-Power Timer instance
1092 * @retval State of bit (1 or 0).
1093 */
1094 __STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_DOWN(LPTIM_TypeDef *LPTIMx)
1095 {
1096 return (READ_BIT(LPTIMx->ISR, LPTIM_ISR_DOWN) == (LPTIM_ISR_DOWN));
1097 }
1098
1099 /**
1100 * @}
1101 */
1102
1103 /** @defgroup LPTIM_LL_EF_IT_Management Interrupt Management
1104 * @{
1105 */
1106
1107 /**
1108 * @brief Enable compare match interrupt (CMPMIE).
1109 * @rmtoll IER CMPMIE LL_LPTIM_EnableIT_CMPM
1110 * @param LPTIMx Low-Power Timer instance
1111 * @retval None
1112 */
1113 __STATIC_INLINE void LL_LPTIM_EnableIT_CMPM(LPTIM_TypeDef *LPTIMx)
1114 {
1115 SET_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
1116 }
1117
1118 /**
1119 * @brief Disable compare match interrupt (CMPMIE).
1120 * @rmtoll IER CMPMIE LL_LPTIM_DisableIT_CMPM
1121 * @param LPTIMx Low-Power Timer instance
1122 * @retval None
1123 */
1124 __STATIC_INLINE void LL_LPTIM_DisableIT_CMPM(LPTIM_TypeDef *LPTIMx)
1125 {
1126 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
1127 }
1128
1129 /**
1130 * @brief Indicates whether the compare match interrupt (CMPMIE) is enabled.
1131 * @rmtoll IER CMPMIE LL_LPTIM_IsEnabledIT_CMPM
1132 * @param LPTIMx Low-Power Timer instance
1133 * @retval State of bit (1 or 0).
1134 */
1135 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPM(LPTIM_TypeDef *LPTIMx)
1136 {
1137 return (READ_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE) == (LPTIM_IER_CMPMIE));
1138 }
1139
1140 /**
1141 * @brief Enable autoreload match interrupt (ARRMIE).
1142 * @rmtoll IER ARRMIE LL_LPTIM_EnableIT_ARRM
1143 * @param LPTIMx Low-Power Timer instance
1144 * @retval None
1145 */
1146 __STATIC_INLINE void LL_LPTIM_EnableIT_ARRM(LPTIM_TypeDef *LPTIMx)
1147 {
1148 SET_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
1149 }
1150
1151 /**
1152 * @brief Disable autoreload match interrupt (ARRMIE).
1153 * @rmtoll IER ARRMIE LL_LPTIM_DisableIT_ARRM
1154 * @param LPTIMx Low-Power Timer instance
1155 * @retval None
1156 */
1157 __STATIC_INLINE void LL_LPTIM_DisableIT_ARRM(LPTIM_TypeDef *LPTIMx)
1158 {
1159 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
1160 }
1161
1162 /**
1163 * @brief Indicates whether the autoreload match interrupt (ARRMIE) is enabled.
1164 * @rmtoll IER ARRMIE LL_LPTIM_IsEnabledIT_ARRM
1165 * @param LPTIMx Low-Power Timer instance
1166 * @retval State of bit (1 or 0).
1167 */
1168 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARRM(LPTIM_TypeDef *LPTIMx)
1169 {
1170 return (READ_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE) == (LPTIM_IER_ARRMIE));
1171 }
1172
1173 /**
1174 * @brief Enable external trigger valid edge interrupt (EXTTRIGIE).
1175 * @rmtoll IER EXTTRIGIE LL_LPTIM_EnableIT_EXTTRIG
1176 * @param LPTIMx Low-Power Timer instance
1177 * @retval None
1178 */
1179 __STATIC_INLINE void LL_LPTIM_EnableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1180 {
1181 SET_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
1182 }
1183
1184 /**
1185 * @brief Disable external trigger valid edge interrupt (EXTTRIGIE).
1186 * @rmtoll IER EXTTRIGIE LL_LPTIM_DisableIT_EXTTRIG
1187 * @param LPTIMx Low-Power Timer instance
1188 * @retval None
1189 */
1190 __STATIC_INLINE void LL_LPTIM_DisableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1191 {
1192 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
1193 }
1194
1195 /**
1196 * @brief Indicates external trigger valid edge interrupt (EXTTRIGIE) is enabled.
1197 * @rmtoll IER EXTTRIGIE LL_LPTIM_IsEnabledIT_EXTTRIG
1198 * @param LPTIMx Low-Power Timer instance
1199 * @retval State of bit (1 or 0).
1200 */
1201 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
1202 {
1203 return (READ_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE) == (LPTIM_IER_EXTTRIGIE));
1204 }
1205
1206 /**
1207 * @brief Enable compare register write completed interrupt (CMPOKIE).
1208 * @rmtoll IER CMPOKIE LL_LPTIM_EnableIT_CMPOK
1209 * @param LPTIMx Low-Power Timer instance
1210 * @retval None
1211 */
1212 __STATIC_INLINE void LL_LPTIM_EnableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
1213 {
1214 SET_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
1215 }
1216
1217 /**
1218 * @brief Disable compare register write completed interrupt (CMPOKIE).
1219 * @rmtoll IER CMPOKIE LL_LPTIM_DisableIT_CMPOK
1220 * @param LPTIMx Low-Power Timer instance
1221 * @retval None
1222 */
1223 __STATIC_INLINE void LL_LPTIM_DisableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
1224 {
1225 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
1226 }
1227
1228 /**
1229 * @brief Indicates whether the compare register write completed interrupt (CMPOKIE) is enabled.
1230 * @rmtoll IER CMPOKIE LL_LPTIM_IsEnabledIT_CMPOK
1231 * @param LPTIMx Low-Power Timer instance
1232 * @retval State of bit (1 or 0).
1233 */
1234 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPOK(LPTIM_TypeDef *LPTIMx)
1235 {
1236 return (READ_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE) == (LPTIM_IER_CMPOKIE));
1237 }
1238
1239 /**
1240 * @brief Enable autoreload register write completed interrupt (ARROKIE).
1241 * @rmtoll IER ARROKIE LL_LPTIM_EnableIT_ARROK
1242 * @param LPTIMx Low-Power Timer instance
1243 * @retval None
1244 */
1245 __STATIC_INLINE void LL_LPTIM_EnableIT_ARROK(LPTIM_TypeDef *LPTIMx)
1246 {
1247 SET_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
1248 }
1249
1250 /**
1251 * @brief Disable autoreload register write completed interrupt (ARROKIE).
1252 * @rmtoll IER ARROKIE LL_LPTIM_DisableIT_ARROK
1253 * @param LPTIMx Low-Power Timer instance
1254 * @retval None
1255 */
1256 __STATIC_INLINE void LL_LPTIM_DisableIT_ARROK(LPTIM_TypeDef *LPTIMx)
1257 {
1258 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
1259 }
1260
1261 /**
1262 * @brief Indicates whether the autoreload register write completed interrupt (ARROKIE) is enabled.
1263 * @rmtoll IER ARROKIE LL_LPTIM_IsEnabledIT_ARROK
1264 * @param LPTIMx Low-Power Timer instance
1265 * @retval State of bit (1 or 0).
1266 */
1267 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARROK(LPTIM_TypeDef *LPTIMx)
1268 {
1269 return (READ_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE) == (LPTIM_IER_ARROKIE));
1270 }
1271
1272 /**
1273 * @brief Enable direction change to up interrupt (UPIE).
1274 * @rmtoll IER UPIE LL_LPTIM_EnableIT_UP
1275 * @param LPTIMx Low-Power Timer instance
1276 * @retval None
1277 */
1278 __STATIC_INLINE void LL_LPTIM_EnableIT_UP(LPTIM_TypeDef *LPTIMx)
1279 {
1280 SET_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
1281 }
1282
1283 /**
1284 * @brief Disable direction change to up interrupt (UPIE).
1285 * @rmtoll IER UPIE LL_LPTIM_DisableIT_UP
1286 * @param LPTIMx Low-Power Timer instance
1287 * @retval None
1288 */
1289 __STATIC_INLINE void LL_LPTIM_DisableIT_UP(LPTIM_TypeDef *LPTIMx)
1290 {
1291 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
1292 }
1293
1294 /**
1295 * @brief Indicates whether the direction change to up interrupt (UPIE) is enabled.
1296 * @rmtoll IER UPIE LL_LPTIM_IsEnabledIT_UP
1297 * @param LPTIMx Low-Power Timer instance
1298 * @retval State of bit (1 or 0).
1299 */
1300 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_UP(LPTIM_TypeDef *LPTIMx)
1301 {
1302 return (READ_BIT(LPTIMx->IER, LPTIM_IER_UPIE) == (LPTIM_IER_UPIE));
1303 }
1304
1305 /**
1306 * @brief Enable direction change to down interrupt (DOWNIE).
1307 * @rmtoll IER DOWNIE LL_LPTIM_EnableIT_DOWN
1308 * @param LPTIMx Low-Power Timer instance
1309 * @retval None
1310 */
1311 __STATIC_INLINE void LL_LPTIM_EnableIT_DOWN(LPTIM_TypeDef *LPTIMx)
1312 {
1313 SET_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
1314 }
1315
1316 /**
1317 * @brief Disable direction change to down interrupt (DOWNIE).
1318 * @rmtoll IER DOWNIE LL_LPTIM_DisableIT_DOWN
1319 * @param LPTIMx Low-Power Timer instance
1320 * @retval None
1321 */
1322 __STATIC_INLINE void LL_LPTIM_DisableIT_DOWN(LPTIM_TypeDef *LPTIMx)
1323 {
1324 CLEAR_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
1325 }
1326
1327 /**
1328 * @brief Indicates whether the direction change to down interrupt (DOWNIE) is enabled.
1329 * @rmtoll IER DOWNIE LL_LPTIM_IsEnabledIT_DOWN
1330 * @param LPTIMx Low-Power Timer instance
1331 * @retval State of bit (1 or 0).
1332 */
1333 __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_DOWN(LPTIM_TypeDef *LPTIMx)
1334 {
1335 return (READ_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE) == (LPTIM_IER_DOWNIE));
1336 }
1337
1338 /**
1339 * @}
1340 */
1341
1342 #if defined(USE_FULL_LL_DRIVER)
1343 /** @defgroup LPTIM_LL_EF_Init Initialisation and deinitialisation functions
1344 * @{
1345 */
1346
1347 ErrorStatus LL_LPTIM_DeInit(LPTIM_TypeDef *LPTIMx);
1348 void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
1349 ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
1350 /**
1351 * @}
1352 */
1353 #endif /* USE_FULL_LL_DRIVER */
1354
1355 /**
1356 * @}
1357 */
1358
1359 /**
1360 * @}
1361 */
1362
1363 #endif /* LPTIM1 */
1364
1365 /**
1366 * @}
1367 */
1368
1369 #ifdef __cplusplus
1370 }
1371 #endif
1372
1373 #endif /* __STM32F4xx_LL_LPTIM_H */
1374
1375 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/