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Added current STM32 standandard libraries in version independend folder structure
author Ideenmodellierer
date Sun, 17 Feb 2019 21:12:22 +0100
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127:1369f8660eaa 128:c78bcbd5deda
1 /**
2 ******************************************************************************
3 * @file stm32f4xx_ll_iwdg.h
4 * @author MCD Application Team
5 * @brief Header file of IWDG LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
10 *
11 * Redistribution and use in source and binary forms, with or without modification,
12 * are permitted provided that the following conditions are met:
13 * 1. Redistributions of source code must retain the above copyright notice,
14 * this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright notice,
16 * this list of conditions and the following disclaimer in the documentation
17 * and/or other materials provided with the distribution.
18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 ******************************************************************************
34 */
35
36 /* Define to prevent recursive inclusion -------------------------------------*/
37 #ifndef __STM32F4xx_LL_IWDG_H
38 #define __STM32F4xx_LL_IWDG_H
39
40 #ifdef __cplusplus
41 extern "C" {
42 #endif
43
44 /* Includes ------------------------------------------------------------------*/
45 #include "stm32f4xx.h"
46
47 /** @addtogroup STM32F4xx_LL_Driver
48 * @{
49 */
50
51 #if defined(IWDG)
52
53 /** @defgroup IWDG_LL IWDG
54 * @{
55 */
56
57 /* Private types -------------------------------------------------------------*/
58 /* Private variables ---------------------------------------------------------*/
59
60 /* Private constants ---------------------------------------------------------*/
61 /** @defgroup IWDG_LL_Private_Constants IWDG Private Constants
62 * @{
63 */
64
65 #define LL_IWDG_KEY_RELOAD 0x0000AAAAU /*!< IWDG Reload Counter Enable */
66 #define LL_IWDG_KEY_ENABLE 0x0000CCCCU /*!< IWDG Peripheral Enable */
67 #define LL_IWDG_KEY_WR_ACCESS_ENABLE 0x00005555U /*!< IWDG KR Write Access Enable */
68 #define LL_IWDG_KEY_WR_ACCESS_DISABLE 0x00000000U /*!< IWDG KR Write Access Disable */
69
70 /**
71 * @}
72 */
73
74 /* Private macros ------------------------------------------------------------*/
75
76 /* Exported types ------------------------------------------------------------*/
77 /* Exported constants --------------------------------------------------------*/
78 /** @defgroup IWDG_LL_Exported_Constants IWDG Exported Constants
79 * @{
80 */
81
82 /** @defgroup IWDG_LL_EC_GET_FLAG Get Flags Defines
83 * @brief Flags defines which can be used with LL_IWDG_ReadReg function
84 * @{
85 */
86 #define LL_IWDG_SR_PVU IWDG_SR_PVU /*!< Watchdog prescaler value update */
87 #define LL_IWDG_SR_RVU IWDG_SR_RVU /*!< Watchdog counter reload value update */
88
89 /**
90 * @}
91 */
92
93 /** @defgroup IWDG_LL_EC_PRESCALER Prescaler Divider
94 * @{
95 */
96 #define LL_IWDG_PRESCALER_4 0x00000000U /*!< Divider by 4 */
97 #define LL_IWDG_PRESCALER_8 (IWDG_PR_PR_0) /*!< Divider by 8 */
98 #define LL_IWDG_PRESCALER_16 (IWDG_PR_PR_1) /*!< Divider by 16 */
99 #define LL_IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< Divider by 32 */
100 #define LL_IWDG_PRESCALER_64 (IWDG_PR_PR_2) /*!< Divider by 64 */
101 #define LL_IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< Divider by 128 */
102 #define LL_IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< Divider by 256 */
103 /**
104 * @}
105 */
106
107 /**
108 * @}
109 */
110
111 /* Exported macro ------------------------------------------------------------*/
112 /** @defgroup IWDG_LL_Exported_Macros IWDG Exported Macros
113 * @{
114 */
115
116 /** @defgroup IWDG_LL_EM_WRITE_READ Common Write and read registers Macros
117 * @{
118 */
119
120 /**
121 * @brief Write a value in IWDG register
122 * @param __INSTANCE__ IWDG Instance
123 * @param __REG__ Register to be written
124 * @param __VALUE__ Value to be written in the register
125 * @retval None
126 */
127 #define LL_IWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
128
129 /**
130 * @brief Read a value in IWDG register
131 * @param __INSTANCE__ IWDG Instance
132 * @param __REG__ Register to be read
133 * @retval Register value
134 */
135 #define LL_IWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
136 /**
137 * @}
138 */
139
140 /**
141 * @}
142 */
143
144
145 /* Exported functions --------------------------------------------------------*/
146 /** @defgroup IWDG_LL_Exported_Functions IWDG Exported Functions
147 * @{
148 */
149 /** @defgroup IWDG_LL_EF_Configuration Configuration
150 * @{
151 */
152
153 /**
154 * @brief Start the Independent Watchdog
155 * @note Except if the hardware watchdog option is selected
156 * @rmtoll KR KEY LL_IWDG_Enable
157 * @param IWDGx IWDG Instance
158 * @retval None
159 */
160 __STATIC_INLINE void LL_IWDG_Enable(IWDG_TypeDef *IWDGx)
161 {
162 WRITE_REG(IWDG->KR, LL_IWDG_KEY_ENABLE);
163 }
164
165 /**
166 * @brief Reloads IWDG counter with value defined in the reload register
167 * @rmtoll KR KEY LL_IWDG_ReloadCounter
168 * @param IWDGx IWDG Instance
169 * @retval None
170 */
171 __STATIC_INLINE void LL_IWDG_ReloadCounter(IWDG_TypeDef *IWDGx)
172 {
173 WRITE_REG(IWDG->KR, LL_IWDG_KEY_RELOAD);
174 }
175
176 /**
177 * @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers
178 * @rmtoll KR KEY LL_IWDG_EnableWriteAccess
179 * @param IWDGx IWDG Instance
180 * @retval None
181 */
182 __STATIC_INLINE void LL_IWDG_EnableWriteAccess(IWDG_TypeDef *IWDGx)
183 {
184 WRITE_REG(IWDG->KR, LL_IWDG_KEY_WR_ACCESS_ENABLE);
185 }
186
187 /**
188 * @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers
189 * @rmtoll KR KEY LL_IWDG_DisableWriteAccess
190 * @param IWDGx IWDG Instance
191 * @retval None
192 */
193 __STATIC_INLINE void LL_IWDG_DisableWriteAccess(IWDG_TypeDef *IWDGx)
194 {
195 WRITE_REG(IWDG->KR, LL_IWDG_KEY_WR_ACCESS_DISABLE);
196 }
197
198 /**
199 * @brief Select the prescaler of the IWDG
200 * @rmtoll PR PR LL_IWDG_SetPrescaler
201 * @param IWDGx IWDG Instance
202 * @param Prescaler This parameter can be one of the following values:
203 * @arg @ref LL_IWDG_PRESCALER_4
204 * @arg @ref LL_IWDG_PRESCALER_8
205 * @arg @ref LL_IWDG_PRESCALER_16
206 * @arg @ref LL_IWDG_PRESCALER_32
207 * @arg @ref LL_IWDG_PRESCALER_64
208 * @arg @ref LL_IWDG_PRESCALER_128
209 * @arg @ref LL_IWDG_PRESCALER_256
210 * @retval None
211 */
212 __STATIC_INLINE void LL_IWDG_SetPrescaler(IWDG_TypeDef *IWDGx, uint32_t Prescaler)
213 {
214 WRITE_REG(IWDGx->PR, IWDG_PR_PR & Prescaler);
215 }
216
217 /**
218 * @brief Get the selected prescaler of the IWDG
219 * @rmtoll PR PR LL_IWDG_GetPrescaler
220 * @param IWDGx IWDG Instance
221 * @retval Returned value can be one of the following values:
222 * @arg @ref LL_IWDG_PRESCALER_4
223 * @arg @ref LL_IWDG_PRESCALER_8
224 * @arg @ref LL_IWDG_PRESCALER_16
225 * @arg @ref LL_IWDG_PRESCALER_32
226 * @arg @ref LL_IWDG_PRESCALER_64
227 * @arg @ref LL_IWDG_PRESCALER_128
228 * @arg @ref LL_IWDG_PRESCALER_256
229 */
230 __STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(IWDG_TypeDef *IWDGx)
231 {
232 return (uint32_t)(READ_REG(IWDGx->PR));
233 }
234
235 /**
236 * @brief Specify the IWDG down-counter reload value
237 * @rmtoll RLR RL LL_IWDG_SetReloadCounter
238 * @param IWDGx IWDG Instance
239 * @param Counter Value between Min_Data=0 and Max_Data=0x0FFF
240 * @retval None
241 */
242 __STATIC_INLINE void LL_IWDG_SetReloadCounter(IWDG_TypeDef *IWDGx, uint32_t Counter)
243 {
244 WRITE_REG(IWDGx->RLR, IWDG_RLR_RL & Counter);
245 }
246
247 /**
248 * @brief Get the specified IWDG down-counter reload value
249 * @rmtoll RLR RL LL_IWDG_GetReloadCounter
250 * @param IWDGx IWDG Instance
251 * @retval Value between Min_Data=0 and Max_Data=0x0FFF
252 */
253 __STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(IWDG_TypeDef *IWDGx)
254 {
255 return (uint32_t)(READ_REG(IWDGx->RLR));
256 }
257
258
259 /**
260 * @}
261 */
262
263 /** @defgroup IWDG_LL_EF_FLAG_Management FLAG_Management
264 * @{
265 */
266
267 /**
268 * @brief Check if flag Prescaler Value Update is set or not
269 * @rmtoll SR PVU LL_IWDG_IsActiveFlag_PVU
270 * @param IWDGx IWDG Instance
271 * @retval State of bit (1 or 0).
272 */
273 __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef *IWDGx)
274 {
275 return (READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU));
276 }
277
278 /**
279 * @brief Check if flag Reload Value Update is set or not
280 * @rmtoll SR RVU LL_IWDG_IsActiveFlag_RVU
281 * @param IWDGx IWDG Instance
282 * @retval State of bit (1 or 0).
283 */
284 __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef *IWDGx)
285 {
286 return (READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU));
287 }
288
289
290 /**
291 * @brief Check if all flags Prescaler, Reload & Window Value Update are reset or not
292 * @rmtoll SR PVU LL_IWDG_IsReady\n
293 * SR RVU LL_IWDG_IsReady
294 * @param IWDGx IWDG Instance
295 * @retval State of bits (1 or 0).
296 */
297 __STATIC_INLINE uint32_t LL_IWDG_IsReady(IWDG_TypeDef *IWDGx)
298 {
299 return (READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU) == 0U);
300 }
301
302 /**
303 * @}
304 */
305
306
307 /**
308 * @}
309 */
310
311 /**
312 * @}
313 */
314
315 #endif /* IWDG) */
316
317 /**
318 * @}
319 */
320
321 #ifdef __cplusplus
322 }
323 #endif
324
325 #endif /* __STM32F4xx_LL_IWDG_H */
326
327 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/