comparison Common/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h @ 128:c78bcbd5deda FlipDisplay

Added current STM32 standandard libraries in version independend folder structure
author Ideenmodellierer
date Sun, 17 Feb 2019 21:12:22 +0100
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127:1369f8660eaa 128:c78bcbd5deda
1 /**
2 ******************************************************************************
3 * @file stm32f4xx_hal_tim_ex.h
4 * @author MCD Application Team
5 * @brief Header file of TIM HAL Extension module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
10 *
11 * Redistribution and use in source and binary forms, with or without modification,
12 * are permitted provided that the following conditions are met:
13 * 1. Redistributions of source code must retain the above copyright notice,
14 * this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright notice,
16 * this list of conditions and the following disclaimer in the documentation
17 * and/or other materials provided with the distribution.
18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 ******************************************************************************
34 */
35
36 /* Define to prevent recursive inclusion -------------------------------------*/
37 #ifndef __STM32F4xx_HAL_TIM_EX_H
38 #define __STM32F4xx_HAL_TIM_EX_H
39
40 #ifdef __cplusplus
41 extern "C" {
42 #endif
43
44 /* Includes ------------------------------------------------------------------*/
45 #include "stm32f4xx_hal_def.h"
46
47 /** @addtogroup STM32F4xx_HAL_Driver
48 * @{
49 */
50
51 /** @addtogroup TIMEx
52 * @{
53 */
54
55 /* Exported types ------------------------------------------------------------*/
56 /** @defgroup TIMEx_Exported_Types TIM Exported Types
57 * @{
58 */
59
60 /**
61 * @brief TIM Hall sensor Configuration Structure definition
62 */
63
64 typedef struct
65 {
66
67 uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
68 This parameter can be a value of @ref TIM_Input_Capture_Polarity */
69
70 uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
71 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
72
73 uint32_t IC1Filter; /*!< Specifies the input capture filter.
74 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
75
76 uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
77 This parameter can be a number between Min_Data = 0x0000U and Max_Data = 0xFFFFU */
78 } TIM_HallSensor_InitTypeDef;
79
80 /**
81 * @brief TIM Master configuration Structure definition
82 */
83 typedef struct {
84 uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection.
85 This parameter can be a value of @ref TIM_Master_Mode_Selection */
86
87 uint32_t MasterSlaveMode; /*!< Master/slave mode selection.
88 This parameter can be a value of @ref TIM_Master_Slave_Mode */
89 }TIM_MasterConfigTypeDef;
90
91 /**
92 * @brief TIM Break and Dead time configuration Structure definition
93 */
94 typedef struct
95 {
96 uint32_t OffStateRunMode; /*!< TIM off state in run mode.
97 This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */
98 uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode.
99 This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */
100 uint32_t LockLevel; /*!< TIM Lock level.
101 This parameter can be a value of @ref TIM_Lock_level */
102 uint32_t DeadTime; /*!< TIM dead Time.
103 This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */
104 uint32_t BreakState; /*!< TIM Break State.
105 This parameter can be a value of @ref TIM_Break_Input_enable_disable */
106 uint32_t BreakPolarity; /*!< TIM Break input polarity.
107 This parameter can be a value of @ref TIM_Break_Polarity */
108 uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state.
109 This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */
110 }TIM_BreakDeadTimeConfigTypeDef;
111 /**
112 * @}
113 */
114
115 /* Exported constants --------------------------------------------------------*/
116 /** @defgroup TIMEx_Exported_Constants TIM Exported Constants
117 * @{
118 */
119
120 /** @defgroup TIMEx_Remap TIM Remap
121 * @{
122 */
123 #define TIM_TIM2_TIM8_TRGO 0x00000000U
124 #define TIM_TIM2_ETH_PTP 0x00000400U
125 #define TIM_TIM2_USBFS_SOF 0x00000800U
126 #define TIM_TIM2_USBHS_SOF 0x00000C00U
127 #define TIM_TIM5_GPIO 0x00000000U
128 #define TIM_TIM5_LSI 0x00000040U
129 #define TIM_TIM5_LSE 0x00000080U
130 #define TIM_TIM5_RTC 0x000000C0U
131 #define TIM_TIM11_GPIO 0x00000000U
132 #define TIM_TIM11_HSE 0x00000002U
133
134 #if defined(STM32F413xx) || defined(STM32F423xx)
135 #define TIM_TIM9_TIM3_TRGO 0x10000000U
136 #define TIM_TIM9_LPTIM 0x10000010U
137 #define TIM_TIM5_TIM3_TRGO 0x10000000U
138 #define TIM_TIM5_LPTIM 0x10000008U
139 #define TIM_TIM1_TIM3_TRGO 0x10000000U
140 #define TIM_TIM1_LPTIM 0x10000004U
141 #endif /* STM32F413xx | STM32F423xx */
142
143 #if defined (STM32F446xx)
144 #define TIM_TIM11_SPDIFRX 0x00000001U
145 #endif /* STM32F446xx */
146 /**
147 * @}
148 */
149
150 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F413xx) || defined(STM32F423xx)
151 /** @defgroup TIMEx_SystemBreakInput TIM System Break Input
152 * @{
153 */
154 #define TIM_SYSTEMBREAKINPUT_HARDFAULT 0x00000001U /* Core Lockup lock output(Hardfault) is connected to Break Input of TIM1 and TIM8 */
155 #define TIM_SYSTEMBREAKINPUT_PVD 0x00000004U /* PVD Interrupt is connected to Break Input of TIM1 and TIM8 */
156 #define TIM_SYSTEMBREAKINPUT_HARDFAULT_PVD 0x00000005U /* Core Lockup lock output(Hardfault) and PVD Interrupt are connected to Break Input of TIM1 and TIM8 */
157 /**
158 * @}
159 */
160 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx || STM32F413xx || STM32F423xx */
161
162 /**
163 * @}
164 */
165 /* Exported macro ------------------------------------------------------------*/
166 /* Exported functions --------------------------------------------------------*/
167 /** @addtogroup TIMEx_Exported_Functions
168 * @{
169 */
170
171 /** @addtogroup TIMEx_Exported_Functions_Group1
172 * @{
173 */
174 /* Timer Hall Sensor functions **********************************************/
175 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef* htim, TIM_HallSensor_InitTypeDef* sConfig);
176 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef* htim);
177
178 void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef* htim);
179 void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef* htim);
180
181 /* Blocking mode: Polling */
182 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef* htim);
183 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef* htim);
184 /* Non-Blocking mode: Interrupt */
185 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef* htim);
186 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef* htim);
187 /* Non-Blocking mode: DMA */
188 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef* htim, uint32_t *pData, uint16_t Length);
189 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef* htim);
190 /**
191 * @}
192 */
193
194 /** @addtogroup TIMEx_Exported_Functions_Group2
195 * @{
196 */
197 /* Timer Complementary Output Compare functions *****************************/
198 /* Blocking mode: Polling */
199 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef* htim, uint32_t Channel);
200 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef* htim, uint32_t Channel);
201
202 /* Non-Blocking mode: Interrupt */
203 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
204 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
205
206 /* Non-Blocking mode: DMA */
207 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef* htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
208 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef* htim, uint32_t Channel);
209 /**
210 * @}
211 */
212
213 /** @addtogroup TIMEx_Exported_Functions_Group3
214 * @{
215 */
216 /* Timer Complementary PWM functions ****************************************/
217 /* Blocking mode: Polling */
218 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef* htim, uint32_t Channel);
219 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef* htim, uint32_t Channel);
220
221 /* Non-Blocking mode: Interrupt */
222 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
223 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
224 /* Non-Blocking mode: DMA */
225 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef* htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
226 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef* htim, uint32_t Channel);
227 /**
228 * @}
229 */
230
231 /** @addtogroup TIMEx_Exported_Functions_Group4
232 * @{
233 */
234 /* Timer Complementary One Pulse functions **********************************/
235 /* Blocking mode: Polling */
236 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
237 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
238
239 /* Non-Blocking mode: Interrupt */
240 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
241 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
242 /**
243 * @}
244 */
245
246 /** @addtogroup TIMEx_Exported_Functions_Group5
247 * @{
248 */
249 /* Extension Control functions ************************************************/
250 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource);
251 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource);
252 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource);
253 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef* htim, TIM_MasterConfigTypeDef * sMasterConfig);
254 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef* htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);
255 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef* htim, uint32_t Remap);
256 /**
257 * @}
258 */
259
260 /** @addtogroup TIMEx_Exported_Functions_Group6
261 * @{
262 */
263 /* Extension Callback *********************************************************/
264 void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef* htim);
265 void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef* htim);
266 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
267 /**
268 * @}
269 */
270
271 /** @addtogroup TIMEx_Exported_Functions_Group7
272 * @{
273 */
274 /* Extension Peripheral State functions **************************************/
275 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef* htim);
276 /**
277 * @}
278 */
279
280 /**
281 * @}
282 */
283
284 /* Private types -------------------------------------------------------------*/
285 /* Private variables ---------------------------------------------------------*/
286 /* Private constants ---------------------------------------------------------*/
287 /* Private macros ------------------------------------------------------------*/
288 /** @defgroup TIMEx_Private_Macros TIM Private Macros
289 * @{
290 */
291 #if defined (STM32F446xx)
292 #define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO)||\
293 ((TIM_REMAP) == TIM_TIM2_ETH_PTP)||\
294 ((TIM_REMAP) == TIM_TIM2_USBFS_SOF)||\
295 ((TIM_REMAP) == TIM_TIM2_USBHS_SOF)||\
296 ((TIM_REMAP) == TIM_TIM5_GPIO)||\
297 ((TIM_REMAP) == TIM_TIM5_LSI)||\
298 ((TIM_REMAP) == TIM_TIM5_LSE)||\
299 ((TIM_REMAP) == TIM_TIM5_RTC)||\
300 ((TIM_REMAP) == TIM_TIM11_GPIO)||\
301 ((TIM_REMAP) == TIM_TIM11_SPDIFRX)||\
302 ((TIM_REMAP) == TIM_TIM11_HSE))
303 #elif defined(STM32F413xx) || defined(STM32F423xx)
304 #define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO)||\
305 ((TIM_REMAP) == TIM_TIM2_ETH_PTP)||\
306 ((TIM_REMAP) == TIM_TIM2_USBFS_SOF)||\
307 ((TIM_REMAP) == TIM_TIM2_USBHS_SOF)||\
308 ((TIM_REMAP) == TIM_TIM5_GPIO)||\
309 ((TIM_REMAP) == TIM_TIM5_LSI)||\
310 ((TIM_REMAP) == TIM_TIM5_LSE)||\
311 ((TIM_REMAP) == TIM_TIM5_RTC)||\
312 ((TIM_REMAP) == TIM_TIM11_GPIO)||\
313 ((TIM_REMAP) == TIM_TIM11_HSE)||\
314 ((TIM_REMAP) == TIM_TIM9_TIM3_TRGO)||\
315 ((TIM_REMAP) == TIM_TIM9_LPTIM)||\
316 ((TIM_REMAP) == TIM_TIM5_TIM3_TRGO)||\
317 ((TIM_REMAP) == TIM_TIM5_LPTIM)||\
318 ((TIM_REMAP) == TIM_TIM1_TIM3_TRGO)||\
319 ((TIM_REMAP) == TIM_TIM1_LPTIM))
320 #else
321 #define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO)||\
322 ((TIM_REMAP) == TIM_TIM2_ETH_PTP)||\
323 ((TIM_REMAP) == TIM_TIM2_USBFS_SOF)||\
324 ((TIM_REMAP) == TIM_TIM2_USBHS_SOF)||\
325 ((TIM_REMAP) == TIM_TIM5_GPIO)||\
326 ((TIM_REMAP) == TIM_TIM5_LSI)||\
327 ((TIM_REMAP) == TIM_TIM5_LSE)||\
328 ((TIM_REMAP) == TIM_TIM5_RTC)||\
329 ((TIM_REMAP) == TIM_TIM11_GPIO)||\
330 ((TIM_REMAP) == TIM_TIM11_HSE))
331 #endif /* STM32F446xx */
332
333 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F413xx) || defined(STM32F423xx)
334 #define IS_TIM_SYSTEMBREAKINPUT(BREAKINPUT) (((BREAKINPUT) == TIM_SYSTEMBREAKINPUT_HARDFAULT)||\
335 ((BREAKINPUT) == TIM_SYSTEMBREAKINPUT_PVD)||\
336 ((BREAKINPUT) == TIM_SYSTEMBREAKINPUT_HARDFAULT_PVD))
337
338 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx || STM32F413xx || STM32F423xx */
339
340 #define IS_TIM_DEADTIME(DEADTIME) ((DEADTIME) <= 0xFFU)
341 /**
342 * @}
343 */
344
345 /* Private functions ---------------------------------------------------------*/
346 /** @defgroup TIMEx_Private_Functions TIM Private Functions
347 * @{
348 */
349
350 /**
351 * @}
352 */
353
354 /**
355 * @}
356 */
357
358 /**
359 * @}
360 */
361
362 #ifdef __cplusplus
363 }
364 #endif
365
366 #endif /* __STM32F4xx_HAL_TIM_EX_H */
367
368 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/