comparison Common/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spdifrx.h @ 128:c78bcbd5deda FlipDisplay

Added current STM32 standandard libraries in version independend folder structure
author Ideenmodellierer
date Sun, 17 Feb 2019 21:12:22 +0100
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127:1369f8660eaa 128:c78bcbd5deda
1 /**
2 ******************************************************************************
3 * @file stm32f4xx_hal_spdifrx.h
4 * @author MCD Application Team
5 * @brief Header file of SPDIFRX HAL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
10 *
11 * Redistribution and use in source and binary forms, with or without modification,
12 * are permitted provided that the following conditions are met:
13 * 1. Redistributions of source code must retain the above copyright notice,
14 * this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright notice,
16 * this list of conditions and the following disclaimer in the documentation
17 * and/or other materials provided with the distribution.
18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 ******************************************************************************
34 */
35
36 /* Define to prevent recursive inclusion -------------------------------------*/
37 #ifndef __STM32F4xx_HAL_SPDIFRX_H
38 #define __STM32F4xx_HAL_SPDIFRX_H
39
40 #ifdef __cplusplus
41 extern "C" {
42 #endif
43
44 #if defined(STM32F446xx)
45
46 /* Includes ------------------------------------------------------------------*/
47 #include "stm32f4xx_hal_def.h"
48
49 /** @addtogroup STM32F4xx_HAL_Driver
50 * @{
51 */
52
53 /** @addtogroup SPDIFRX
54 * @{
55 */
56
57 /* Exported types ------------------------------------------------------------*/
58 /** @defgroup SPDIFRX_Exported_Types SPDIFRX Exported Types
59 * @{
60 */
61
62 /**
63 * @brief SPDIFRX Init structure definition
64 */
65 typedef struct
66 {
67 uint32_t InputSelection; /*!< Specifies the SPDIF input selection.
68 This parameter can be a value of @ref SPDIFRX_Input_Selection */
69
70 uint32_t Retries; /*!< Specifies the Maximum allowed re-tries during synchronization phase.
71 This parameter can be a value of @ref SPDIFRX_Max_Retries */
72
73 uint32_t WaitForActivity; /*!< Specifies the wait for activity on SPDIF selected input.
74 This parameter can be a value of @ref SPDIFRX_Wait_For_Activity. */
75
76 uint32_t ChannelSelection; /*!< Specifies whether the control flow will take the channel status from channel A or B.
77 This parameter can be a value of @ref SPDIFRX_Channel_Selection */
78
79 uint32_t DataFormat; /*!< Specifies the Data samples format (LSB, MSB, ...).
80 This parameter can be a value of @ref SPDIFRX_Data_Format */
81
82 uint32_t StereoMode; /*!< Specifies whether the peripheral is in stereo or mono mode.
83 This parameter can be a value of @ref SPDIFRX_Stereo_Mode */
84
85 uint32_t PreambleTypeMask; /*!< Specifies whether The preamble type bits are copied or not into the received frame.
86 This parameter can be a value of @ref SPDIFRX_PT_Mask */
87
88 uint32_t ChannelStatusMask; /*!< Specifies whether the channel status and user bits are copied or not into the received frame.
89 This parameter can be a value of @ref SPDIFRX_ChannelStatus_Mask */
90
91 uint32_t ValidityBitMask; /*!< Specifies whether the validity bit is copied or not into the received frame.
92 This parameter can be a value of @ref SPDIFRX_V_Mask */
93
94 uint32_t ParityErrorMask; /*!< Specifies whether the parity error bit is copied or not into the received frame.
95 This parameter can be a value of @ref SPDIFRX_PE_Mask */
96 }SPDIFRX_InitTypeDef;
97
98 /**
99 * @brief SPDIFRX SetDataFormat structure definition
100 */
101 typedef struct
102 {
103 uint32_t DataFormat; /*!< Specifies the Data samples format (LSB, MSB, ...).
104 This parameter can be a value of @ref SPDIFRX_Data_Format */
105
106 uint32_t StereoMode; /*!< Specifies whether the peripheral is in stereo or mono mode.
107 This parameter can be a value of @ref SPDIFRX_Stereo_Mode */
108
109 uint32_t PreambleTypeMask; /*!< Specifies whether The preamble type bits are copied or not into the received frame.
110 This parameter can be a value of @ref SPDIFRX_PT_Mask */
111
112 uint32_t ChannelStatusMask; /*!< Specifies whether the channel status and user bits are copied or not into the received frame.
113 This parameter can be a value of @ref SPDIFRX_ChannelStatus_Mask */
114
115 uint32_t ValidityBitMask; /*!< Specifies whether the validity bit is copied or not into the received frame.
116 This parameter can be a value of @ref SPDIFRX_V_Mask */
117
118 uint32_t ParityErrorMask; /*!< Specifies whether the parity error bit is copied or not into the received frame.
119 This parameter can be a value of @ref SPDIFRX_PE_Mask */
120 }SPDIFRX_SetDataFormatTypeDef;
121
122 /**
123 * @brief HAL State structures definition
124 */
125 typedef enum
126 {
127 HAL_SPDIFRX_STATE_RESET = 0x00U, /*!< SPDIFRX not yet initialized or disabled */
128 HAL_SPDIFRX_STATE_READY = 0x01U, /*!< SPDIFRX initialized and ready for use */
129 HAL_SPDIFRX_STATE_BUSY = 0x02U, /*!< SPDIFRX internal process is ongoing */
130 HAL_SPDIFRX_STATE_BUSY_RX = 0x03U, /*!< SPDIFRX internal Data Flow RX process is ongoing */
131 HAL_SPDIFRX_STATE_BUSY_CX = 0x04U, /*!< SPDIFRX internal Control Flow RX process is ongoing */
132 HAL_SPDIFRX_STATE_ERROR = 0x07U /*!< SPDIFRX error state */
133 }HAL_SPDIFRX_StateTypeDef;
134
135 /**
136 * @brief SPDIFRX handle Structure definition
137 */
138 typedef struct
139 {
140 SPDIFRX_TypeDef *Instance; /* SPDIFRX registers base address */
141
142 SPDIFRX_InitTypeDef Init; /* SPDIFRX communication parameters */
143
144 uint32_t *pRxBuffPtr; /* Pointer to SPDIFRX Rx transfer buffer */
145
146 uint32_t *pCsBuffPtr; /* Pointer to SPDIFRX Cx transfer buffer */
147
148 __IO uint16_t RxXferSize; /* SPDIFRX Rx transfer size */
149
150 __IO uint16_t RxXferCount; /* SPDIFRX Rx transfer counter
151 (This field is initialized at the
152 same value as transfer size at the
153 beginning of the transfer and
154 decremented when a sample is received.
155 NbSamplesReceived = RxBufferSize-RxBufferCount) */
156
157 __IO uint16_t CsXferSize; /* SPDIFRX Rx transfer size */
158
159 __IO uint16_t CsXferCount; /* SPDIFRX Rx transfer counter
160 (This field is initialized at the
161 same value as transfer size at the
162 beginning of the transfer and
163 decremented when a sample is received.
164 NbSamplesReceived = RxBufferSize-RxBufferCount) */
165
166 DMA_HandleTypeDef *hdmaCsRx; /* SPDIFRX EC60958_channel_status and user_information DMA handle parameters */
167
168 DMA_HandleTypeDef *hdmaDrRx; /* SPDIFRX Rx DMA handle parameters */
169
170 __IO HAL_LockTypeDef Lock; /* SPDIFRX locking object */
171
172 __IO HAL_SPDIFRX_StateTypeDef State; /* SPDIFRX communication state */
173
174 __IO uint32_t ErrorCode; /* SPDIFRX Error code */
175 }SPDIFRX_HandleTypeDef;
176 /**
177 * @}
178 */
179
180 /* Exported constants --------------------------------------------------------*/
181 /** @defgroup SPDIFRX_Exported_Constants SPDIFRX Exported Constants
182 * @{
183 */
184 /** @defgroup SPDIFRX_ErrorCode SPDIFRX Error Code
185 * @{
186 */
187 #define HAL_SPDIFRX_ERROR_NONE 0x00000000U /*!< No error */
188 #define HAL_SPDIFRX_ERROR_TIMEOUT 0x00000001U /*!< Timeout error */
189 #define HAL_SPDIFRX_ERROR_OVR 0x00000002U /*!< OVR error */
190 #define HAL_SPDIFRX_ERROR_PE 0x00000004U /*!< Parity error */
191 #define HAL_SPDIFRX_ERROR_DMA 0x00000008U /*!< DMA transfer error */
192 #define HAL_SPDIFRX_ERROR_UNKNOWN 0x00000010U /*!< Unknown Error error */
193 /**
194 * @}
195 */
196
197 /** @defgroup SPDIFRX_Input_Selection SPDIFRX Input Selection
198 * @{
199 */
200 #define SPDIFRX_INPUT_IN0 0x00000000U
201 #define SPDIFRX_INPUT_IN1 0x00010000U
202 #define SPDIFRX_INPUT_IN2 0x00020000U
203 #define SPDIFRX_INPUT_IN3 0x00030000U
204 /**
205 * @}
206 */
207
208 /** @defgroup SPDIFRX_Max_Retries SPDIFRX Maximum Retries
209 * @{
210 */
211 #define SPDIFRX_MAXRETRIES_NONE 0x00000000U
212 #define SPDIFRX_MAXRETRIES_3 0x00001000U
213 #define SPDIFRX_MAXRETRIES_15 0x00002000U
214 #define SPDIFRX_MAXRETRIES_63 0x00003000U
215 /**
216 * @}
217 */
218
219 /** @defgroup SPDIFRX_Wait_For_Activity SPDIFRX Wait For Activity
220 * @{
221 */
222 #define SPDIFRX_WAITFORACTIVITY_OFF 0x00000000U
223 #define SPDIFRX_WAITFORACTIVITY_ON ((uint32_t)SPDIFRX_CR_WFA)
224 /**
225 * @}
226 */
227
228 /** @defgroup SPDIFRX_PT_Mask SPDIFRX Preamble Type Mask
229 * @{
230 */
231 #define SPDIFRX_PREAMBLETYPEMASK_OFF 0x00000000U
232 #define SPDIFRX_PREAMBLETYPEMASK_ON ((uint32_t)SPDIFRX_CR_PTMSK)
233 /**
234 * @}
235 */
236
237 /** @defgroup SPDIFRX_ChannelStatus_Mask SPDIFRX Channel Status Mask
238 * @{
239 */
240 #define SPDIFRX_CHANNELSTATUS_OFF 0x00000000U /* The channel status and user bits are copied into the SPDIF_DR */
241 #define SPDIFRX_CHANNELSTATUS_ON ((uint32_t)SPDIFRX_CR_CUMSK) /* The channel status and user bits are not copied into the SPDIF_DR, zeros are written instead*/
242 /**
243 * @}
244 */
245
246 /** @defgroup SPDIFRX_V_Mask SPDIFRX Validity Mask
247 * @{
248 */
249 #define SPDIFRX_VALIDITYMASK_OFF 0x00000000U
250 #define SPDIFRX_VALIDITYMASK_ON ((uint32_t)SPDIFRX_CR_VMSK)
251 /**
252 * @}
253 */
254
255 /** @defgroup SPDIFRX_PE_Mask SPDIFRX Parity Error Mask
256 * @{
257 */
258 #define SPDIFRX_PARITYERRORMASK_OFF 0x00000000U
259 #define SPDIFRX_PARITYERRORMASK_ON ((uint32_t)SPDIFRX_CR_PMSK)
260 /**
261 * @}
262 */
263
264 /** @defgroup SPDIFRX_Channel_Selection SPDIFRX Channel Selection
265 * @{
266 */
267 #define SPDIFRX_CHANNEL_A 0x00000000U
268 #define SPDIFRX_CHANNEL_B ((uint32_t)SPDIFRX_CR_CHSEL)
269 /**
270 * @}
271 */
272
273 /** @defgroup SPDIFRX_Data_Format SPDIFRX Data Format
274 * @{
275 */
276 #define SPDIFRX_DATAFORMAT_LSB 0x00000000U
277 #define SPDIFRX_DATAFORMAT_MSB 0x00000010U
278 #define SPDIFRX_DATAFORMAT_32BITS 0x00000020U
279 /**
280 * @}
281 */
282
283 /** @defgroup SPDIFRX_Stereo_Mode SPDIFRX Stereo Mode
284 * @{
285 */
286 #define SPDIFRX_STEREOMODE_DISABLE 0x00000000U
287 #define SPDIFRX_STEREOMODE_ENABLE ((uint32_t)SPDIFRX_CR_RXSTEO)
288 /**
289 * @}
290 */
291
292 /** @defgroup SPDIFRX_State SPDIFRX State
293 * @{
294 */
295
296 #define SPDIFRX_STATE_IDLE 0xFFFFFFFCU
297 #define SPDIFRX_STATE_SYNC 0x00000001U
298 #define SPDIFRX_STATE_RCV ((uint32_t)SPDIFRX_CR_SPDIFEN)
299 /**
300 * @}
301 */
302
303 /** @defgroup SPDIFRX_Interrupts_Definition SPDIFRX Interrupts Definition
304 * @{
305 */
306 #define SPDIFRX_IT_RXNE ((uint32_t)SPDIFRX_IMR_RXNEIE)
307 #define SPDIFRX_IT_CSRNE ((uint32_t)SPDIFRX_IMR_CSRNEIE)
308 #define SPDIFRX_IT_PERRIE ((uint32_t)SPDIFRX_IMR_PERRIE)
309 #define SPDIFRX_IT_OVRIE ((uint32_t)SPDIFRX_IMR_OVRIE)
310 #define SPDIFRX_IT_SBLKIE ((uint32_t)SPDIFRX_IMR_SBLKIE)
311 #define SPDIFRX_IT_SYNCDIE ((uint32_t)SPDIFRX_IMR_SYNCDIE)
312 #define SPDIFRX_IT_IFEIE ((uint32_t)SPDIFRX_IMR_IFEIE )
313 /**
314 * @}
315 */
316
317 /** @defgroup SPDIFRX_Flags_Definition SPDIFRX Flags Definition
318 * @{
319 */
320 #define SPDIFRX_FLAG_RXNE ((uint32_t)SPDIFRX_SR_RXNE)
321 #define SPDIFRX_FLAG_CSRNE ((uint32_t)SPDIFRX_SR_CSRNE)
322 #define SPDIFRX_FLAG_PERR ((uint32_t)SPDIFRX_SR_PERR)
323 #define SPDIFRX_FLAG_OVR ((uint32_t)SPDIFRX_SR_OVR)
324 #define SPDIFRX_FLAG_SBD ((uint32_t)SPDIFRX_SR_SBD)
325 #define SPDIFRX_FLAG_SYNCD ((uint32_t)SPDIFRX_SR_SYNCD)
326 #define SPDIFRX_FLAG_FERR ((uint32_t)SPDIFRX_SR_FERR)
327 #define SPDIFRX_FLAG_SERR ((uint32_t)SPDIFRX_SR_SERR)
328 #define SPDIFRX_FLAG_TERR ((uint32_t)SPDIFRX_SR_TERR)
329 /**
330 * @}
331 */
332
333 /**
334 * @}
335 */
336
337 /* Exported macros -----------------------------------------------------------*/
338 /** @defgroup SPDIFRX_Exported_macros SPDIFRX Exported Macros
339 * @{
340 */
341
342 /** @brief Reset SPDIFRX handle state
343 * @param __HANDLE__ SPDIFRX handle.
344 * @retval None
345 */
346 #define __HAL_SPDIFRX_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = (uint16_t)SPDIFRX_CR_SPDIFEN)
347
348 /** @brief Disable the specified SPDIFRX peripheral (IDLE State).
349 * @param __HANDLE__ specifies the SPDIFRX Handle.
350 * @retval None
351 */
352 #define __HAL_SPDIFRX_IDLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= SPDIFRX_STATE_IDLE)
353
354 /** @brief Enable the specified SPDIFRX peripheral (SYNC State).
355 * @param __HANDLE__ specifies the SPDIFRX Handle.
356 * @retval None
357 */
358 #define __HAL_SPDIFRX_SYNC(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_SYNC)
359
360
361 /** @brief Enable the specified SPDIFRX peripheral (RCV State).
362 * @param __HANDLE__ specifies the SPDIFRX Handle.
363 * @retval None
364 */
365 #define __HAL_SPDIFRX_RCV(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_RCV)
366
367 /** @brief Enable or disable the specified SPDIFRX interrupts.
368 * @param __HANDLE__ specifies the SPDIFRX Handle.
369 * @param __INTERRUPT__ specifies the interrupt source to enable or disable.
370 * This parameter can be one of the following values:
371 * @arg SPDIFRX_IT_RXNE
372 * @arg SPDIFRX_IT_CSRNE
373 * @arg SPDIFRX_IT_PERRIE
374 * @arg SPDIFRX_IT_OVRIE
375 * @arg SPDIFRX_IT_SBLKIE
376 * @arg SPDIFRX_IT_SYNCDIE
377 * @arg SPDIFRX_IT_IFEIE
378 * @retval None
379 */
380 #define __HAL_SPDIFRX_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__))
381 #define __HAL_SPDIFRX_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR &= (uint16_t)(~(__INTERRUPT__)))
382
383 /** @brief Checks if the specified SPDIFRX interrupt source is enabled or disabled.
384 * @param __HANDLE__ specifies the SPDIFRX Handle.
385 * @param __INTERRUPT__ specifies the SPDIFRX interrupt source to check.
386 * This parameter can be one of the following values:
387 * @arg SPDIFRX_IT_RXNE
388 * @arg SPDIFRX_IT_CSRNE
389 * @arg SPDIFRX_IT_PERRIE
390 * @arg SPDIFRX_IT_OVRIE
391 * @arg SPDIFRX_IT_SBLKIE
392 * @arg SPDIFRX_IT_SYNCDIE
393 * @arg SPDIFRX_IT_IFEIE
394 * @retval The new state of __IT__ (TRUE or FALSE).
395 */
396 #define __HAL_SPDIFRX_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
397
398 /** @brief Checks whether the specified SPDIFRX flag is set or not.
399 * @param __HANDLE__ specifies the SPDIFRX Handle.
400 * @param __FLAG__ specifies the flag to check.
401 * This parameter can be one of the following values:
402 * @arg SPDIFRX_FLAG_RXNE
403 * @arg SPDIFRX_FLAG_CSRNE
404 * @arg SPDIFRX_FLAG_PERR
405 * @arg SPDIFRX_FLAG_OVR
406 * @arg SPDIFRX_FLAG_SBD
407 * @arg SPDIFRX_FLAG_SYNCD
408 * @arg SPDIFRX_FLAG_FERR
409 * @arg SPDIFRX_FLAG_SERR
410 * @arg SPDIFRX_FLAG_TERR
411 * @retval The new state of __FLAG__ (TRUE or FALSE).
412 */
413 #define __HAL_SPDIFRX_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
414
415 /** @brief Clears the specified SPDIFRX SR flag, in setting the proper IFCR register bit.
416 * @param __HANDLE__ specifies the USART Handle.
417 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set
418 * to clear the corresponding interrupt
419 * This parameter can be one of the following values:
420 * @arg SPDIFRX_FLAG_PERR
421 * @arg SPDIFRX_FLAG_OVR
422 * @arg SPDIFRX_SR_SBD
423 * @arg SPDIFRX_SR_SYNCD
424 * @retval None
425 */
426 #define __HAL_SPDIFRX_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->IFCR = (uint32_t)(__IT_CLEAR__))
427
428 /**
429 * @}
430 */
431
432 /* Exported functions --------------------------------------------------------*/
433 /** @addtogroup SPDIFRX_Exported_Functions
434 * @{
435 */
436
437 /** @addtogroup SPDIFRX_Exported_Functions_Group1
438 * @{
439 */
440 /* Initialization/de-initialization functions **********************************/
441 HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif);
442 HAL_StatusTypeDef HAL_SPDIFRX_DeInit (SPDIFRX_HandleTypeDef *hspdif);
443 void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif);
444 void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif);
445 HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef sDataFormat);
446 /**
447 * @}
448 */
449
450 /** @addtogroup SPDIFRX_Exported_Functions_Group2
451 * @{
452 */
453 /* I/O operation functions ***************************************************/
454 /* Blocking mode: Polling */
455 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout);
456 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout);
457
458 /* Non-Blocking mode: Interrupt */
459 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
460 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
461 void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif);
462
463 /* Non-Blocking mode: DMA */
464 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
465 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
466
467 HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif);
468
469 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
470 void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
471 void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
472 void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif);
473 void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
474 void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
475 /**
476 * @}
477 */
478
479 /** @addtogroup SPDIFRX_Exported_Functions_Group3
480 * @{
481 */
482 /* Peripheral Control and State functions ************************************/
483 HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef *hspdif);
484 uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef *hspdif);
485 /**
486 * @}
487 */
488
489 /**
490 * @}
491 */
492 /* Private types -------------------------------------------------------------*/
493 /* Private variables ---------------------------------------------------------*/
494 /* Private constants ---------------------------------------------------------*/
495 /* Private macros ------------------------------------------------------------*/
496 /** @defgroup SPDIFRX_Private_Macros SPDIFRX Private Macros
497 * @{
498 */
499 #define IS_SPDIFRX_INPUT_SELECT(INPUT) (((INPUT) == SPDIFRX_INPUT_IN1) || \
500 ((INPUT) == SPDIFRX_INPUT_IN2) || \
501 ((INPUT) == SPDIFRX_INPUT_IN3) || \
502 ((INPUT) == SPDIFRX_INPUT_IN0))
503 #define IS_SPDIFRX_MAX_RETRIES(RET) (((RET) == SPDIFRX_MAXRETRIES_NONE) || \
504 ((RET) == SPDIFRX_MAXRETRIES_3) || \
505 ((RET) == SPDIFRX_MAXRETRIES_15) || \
506 ((RET) == SPDIFRX_MAXRETRIES_63))
507 #define IS_SPDIFRX_WAIT_FOR_ACTIVITY(VAL) (((VAL) == SPDIFRX_WAITFORACTIVITY_ON) || \
508 ((VAL) == SPDIFRX_WAITFORACTIVITY_OFF))
509 #define IS_PREAMBLE_TYPE_MASK(VAL) (((VAL) == SPDIFRX_PREAMBLETYPEMASK_ON) || \
510 ((VAL) == SPDIFRX_PREAMBLETYPEMASK_OFF))
511 #define IS_VALIDITY_MASK(VAL) (((VAL) == SPDIFRX_VALIDITYMASK_OFF) || \
512 ((VAL) == SPDIFRX_VALIDITYMASK_ON))
513 #define IS_PARITY_ERROR_MASK(VAL) (((VAL) == SPDIFRX_PARITYERRORMASK_OFF) || \
514 ((VAL) == SPDIFRX_PARITYERRORMASK_ON))
515 #define IS_SPDIFRX_CHANNEL(CHANNEL) (((CHANNEL) == SPDIFRX_CHANNEL_A) || \
516 ((CHANNEL) == SPDIFRX_CHANNEL_B))
517 #define IS_SPDIFRX_DATA_FORMAT(FORMAT) (((FORMAT) == SPDIFRX_DATAFORMAT_LSB) || \
518 ((FORMAT) == SPDIFRX_DATAFORMAT_MSB) || \
519 ((FORMAT) == SPDIFRX_DATAFORMAT_32BITS))
520 #define IS_STEREO_MODE(MODE) (((MODE) == SPDIFRX_STEREOMODE_DISABLE) || \
521 ((MODE) == SPDIFRX_STEREOMODE_ENABLE))
522
523 #define IS_CHANNEL_STATUS_MASK(VAL) (((VAL) == SPDIFRX_CHANNELSTATUS_ON) || \
524 ((VAL) == SPDIFRX_CHANNELSTATUS_OFF))
525 /**
526 * @}
527 */
528
529 /* Private functions ---------------------------------------------------------*/
530 /** @defgroup SPDIFRX_Private_Functions SPDIFRX Private Functions
531 * @{
532 */
533 /**
534 * @}
535 */
536
537 /**
538 * @}
539 */
540
541 /**
542 * @}
543 */
544 #endif /* STM32F446xx */
545
546 #ifdef __cplusplus
547 }
548 #endif
549
550
551 #endif /* __STM32F4xx_HAL_SPDIFRX_H */
552
553 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/