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Added current STM32 standandard libraries in version independend folder structure
author Ideenmodellierer
date Sun, 17 Feb 2019 21:12:22 +0100
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127:1369f8660eaa 128:c78bcbd5deda
1 /**
2 ******************************************************************************
3 * @file stm32f4xx_hal_sdram.h
4 * @author MCD Application Team
5 * @brief Header file of SDRAM HAL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
10 *
11 * Redistribution and use in source and binary forms, with or without modification,
12 * are permitted provided that the following conditions are met:
13 * 1. Redistributions of source code must retain the above copyright notice,
14 * this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright notice,
16 * this list of conditions and the following disclaimer in the documentation
17 * and/or other materials provided with the distribution.
18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 ******************************************************************************
34 */
35
36 /* Define to prevent recursive inclusion -------------------------------------*/
37 #ifndef __STM32F4xx_HAL_SDRAM_H
38 #define __STM32F4xx_HAL_SDRAM_H
39
40 #ifdef __cplusplus
41 extern "C" {
42 #endif
43
44 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
45 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
46
47 /* Includes ------------------------------------------------------------------*/
48 #include "stm32f4xx_ll_fmc.h"
49
50 /** @addtogroup STM32F4xx_HAL_Driver
51 * @{
52 */
53
54 /** @addtogroup SDRAM
55 * @{
56 */
57
58 /* Exported typedef ----------------------------------------------------------*/
59 /** @defgroup SDRAM_Exported_Types SDRAM Exported Types
60 * @{
61 */
62
63 /**
64 * @brief HAL SDRAM State structure definition
65 */
66 typedef enum
67 {
68 HAL_SDRAM_STATE_RESET = 0x00U, /*!< SDRAM not yet initialized or disabled */
69 HAL_SDRAM_STATE_READY = 0x01U, /*!< SDRAM initialized and ready for use */
70 HAL_SDRAM_STATE_BUSY = 0x02U, /*!< SDRAM internal process is ongoing */
71 HAL_SDRAM_STATE_ERROR = 0x03U, /*!< SDRAM error state */
72 HAL_SDRAM_STATE_WRITE_PROTECTED = 0x04U, /*!< SDRAM device write protected */
73 HAL_SDRAM_STATE_PRECHARGED = 0x05U /*!< SDRAM device precharged */
74
75 }HAL_SDRAM_StateTypeDef;
76
77 /**
78 * @brief SDRAM handle Structure definition
79 */
80 typedef struct
81 {
82 FMC_SDRAM_TypeDef *Instance; /*!< Register base address */
83
84 FMC_SDRAM_InitTypeDef Init; /*!< SDRAM device configuration parameters */
85
86 __IO HAL_SDRAM_StateTypeDef State; /*!< SDRAM access state */
87
88 HAL_LockTypeDef Lock; /*!< SDRAM locking object */
89
90 DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */
91
92 }SDRAM_HandleTypeDef;
93 /**
94 * @}
95 */
96
97 /* Exported constants --------------------------------------------------------*/
98 /* Exported macro ------------------------------------------------------------*/
99 /** @defgroup SDRAM_Exported_Macros SDRAM Exported Macros
100 * @{
101 */
102
103 /** @brief Reset SDRAM handle state
104 * @param __HANDLE__ specifies the SDRAM handle.
105 * @retval None
106 */
107 #define __HAL_SDRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SDRAM_STATE_RESET)
108 /**
109 * @}
110 */
111
112 /* Exported functions --------------------------------------------------------*/
113 /** @addtogroup SDRAM_Exported_Functions SDRAM Exported Functions
114 * @{
115 */
116
117 /** @addtogroup SDRAM_Exported_Functions_Group1
118 * @{
119 */
120
121 /* Initialization/de-initialization functions *********************************/
122 HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing);
123 HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram);
124 void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram);
125 void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram);
126
127 void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram);
128 void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram);
129 void HAL_SDRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
130 void HAL_SDRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
131 /**
132 * @}
133 */
134
135 /** @addtogroup SDRAM_Exported_Functions_Group2
136 * @{
137 */
138 /* I/O operation functions ****************************************************/
139 HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
140 HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
141 HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
142 HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
143 HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
144 HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
145
146 HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t * pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
147 HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
148 /**
149 * @}
150 */
151
152 /** @addtogroup SDRAM_Exported_Functions_Group3
153 * @{
154 */
155 /* SDRAM Control functions *****************************************************/
156 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram);
157 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram);
158 HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout);
159 HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate);
160 HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber);
161 uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram);
162 /**
163 * @}
164 */
165
166 /** @addtogroup SDRAM_Exported_Functions_Group4
167 * @{
168 */
169 /* SDRAM State functions ********************************************************/
170 HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram);
171 /**
172 * @}
173 */
174
175 /**
176 * @}
177 */
178
179 /**
180 * @}
181 */
182
183 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
184
185 /**
186 * @}
187 */
188
189 #ifdef __cplusplus
190 }
191 #endif
192
193 #endif /* __STM32F4xx_HAL_SDRAM_H */
194
195 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/