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Added current STM32 standandard libraries in version independend folder structure
author Ideenmodellierer
date Sun, 17 Feb 2019 21:12:22 +0100
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127:1369f8660eaa 128:c78bcbd5deda
1 /**
2 ******************************************************************************
3 * @file stm32f4xx_hal_pwr_ex.h
4 * @author MCD Application Team
5 * @brief Header file of PWR HAL Extension module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
10 *
11 * Redistribution and use in source and binary forms, with or without modification,
12 * are permitted provided that the following conditions are met:
13 * 1. Redistributions of source code must retain the above copyright notice,
14 * this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright notice,
16 * this list of conditions and the following disclaimer in the documentation
17 * and/or other materials provided with the distribution.
18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 ******************************************************************************
34 */
35
36 /* Define to prevent recursive inclusion -------------------------------------*/
37 #ifndef __STM32F4xx_HAL_PWR_EX_H
38 #define __STM32F4xx_HAL_PWR_EX_H
39
40 #ifdef __cplusplus
41 extern "C" {
42 #endif
43
44 /* Includes ------------------------------------------------------------------*/
45 #include "stm32f4xx_hal_def.h"
46
47 /** @addtogroup STM32F4xx_HAL_Driver
48 * @{
49 */
50
51 /** @addtogroup PWREx
52 * @{
53 */
54
55 /* Exported types ------------------------------------------------------------*/
56 /* Exported constants --------------------------------------------------------*/
57 /** @defgroup PWREx_Exported_Constants PWREx Exported Constants
58 * @{
59 */
60 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
61 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
62
63 /** @defgroup PWREx_Regulator_state_in_UnderDrive_mode PWREx Regulator state in UnderDrive mode
64 * @{
65 */
66 #define PWR_MAINREGULATOR_UNDERDRIVE_ON PWR_CR_MRUDS
67 #define PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON ((uint32_t)(PWR_CR_LPDS | PWR_CR_LPUDS))
68 /**
69 * @}
70 */
71
72 /** @defgroup PWREx_Over_Under_Drive_Flag PWREx Over Under Drive Flag
73 * @{
74 */
75 #define PWR_FLAG_ODRDY PWR_CSR_ODRDY
76 #define PWR_FLAG_ODSWRDY PWR_CSR_ODSWRDY
77 #define PWR_FLAG_UDRDY PWR_CSR_UDSWRDY
78 /**
79 * @}
80 */
81 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
82
83 /** @defgroup PWREx_Regulator_Voltage_Scale PWREx Regulator Voltage Scale
84 * @{
85 */
86 #if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx)
87 #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS /* Scale 1 mode(default value at reset): the maximum value of fHCLK = 168 MHz. */
88 #define PWR_REGULATOR_VOLTAGE_SCALE2 0x00000000U /* Scale 2 mode: the maximum value of fHCLK = 144 MHz. */
89 #else
90 #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS /* Scale 1 mode(default value at reset): the maximum value of fHCLK is 168 MHz. It can be extended to
91 180 MHz by activating the over-drive mode. */
92 #define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR_VOS_1 /* Scale 2 mode: the maximum value of fHCLK is 144 MHz. It can be extended to
93 168 MHz by activating the over-drive mode. */
94 #define PWR_REGULATOR_VOLTAGE_SCALE3 PWR_CR_VOS_0 /* Scale 3 mode: the maximum value of fHCLK is 120 MHz. */
95 #endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx */
96 /**
97 * @}
98 */
99 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
100 defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
101 /** @defgroup PWREx_WakeUp_Pins PWREx WakeUp Pins
102 * @{
103 */
104 #define PWR_WAKEUP_PIN2 0x00000080U
105 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
106 defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
107 #define PWR_WAKEUP_PIN3 0x00000040U
108 #endif /* STM32F410xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Zx || STM32F412Vx || \
109 STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
110 /**
111 * @}
112 */
113 #endif /* STM32F410xx || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
114 STM32F413xx || STM32F423xx */
115
116 /**
117 * @}
118 */
119
120 /* Exported macro ------------------------------------------------------------*/
121 /** @defgroup PWREx_Exported_Constants PWREx Exported Constants
122 * @{
123 */
124
125 #if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx)
126 /** @brief macros configure the main internal regulator output voltage.
127 * @param __REGULATOR__ specifies the regulator output voltage to achieve
128 * a tradeoff between performance and power consumption when the device does
129 * not operate at the maximum frequency (refer to the datasheets for more details).
130 * This parameter can be one of the following values:
131 * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode
132 * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode
133 * @retval None
134 */
135 #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) do { \
136 __IO uint32_t tmpreg = 0x00U; \
137 MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)); \
138 /* Delay after an RCC peripheral clock enabling */ \
139 tmpreg = READ_BIT(PWR->CR, PWR_CR_VOS); \
140 UNUSED(tmpreg); \
141 } while(0U)
142 #else
143 /** @brief macros configure the main internal regulator output voltage.
144 * @param __REGULATOR__ specifies the regulator output voltage to achieve
145 * a tradeoff between performance and power consumption when the device does
146 * not operate at the maximum frequency (refer to the datasheets for more details).
147 * This parameter can be one of the following values:
148 * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode
149 * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode
150 * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode
151 * @retval None
152 */
153 #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) do { \
154 __IO uint32_t tmpreg = 0x00U; \
155 MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)); \
156 /* Delay after an RCC peripheral clock enabling */ \
157 tmpreg = READ_BIT(PWR->CR, PWR_CR_VOS); \
158 UNUSED(tmpreg); \
159 } while(0U)
160 #endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx */
161
162 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
163 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
164 /** @brief Macros to enable or disable the Over drive mode.
165 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
166 */
167 #define __HAL_PWR_OVERDRIVE_ENABLE() (*(__IO uint32_t *) CR_ODEN_BB = ENABLE)
168 #define __HAL_PWR_OVERDRIVE_DISABLE() (*(__IO uint32_t *) CR_ODEN_BB = DISABLE)
169
170 /** @brief Macros to enable or disable the Over drive switching.
171 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
172 */
173 #define __HAL_PWR_OVERDRIVESWITCHING_ENABLE() (*(__IO uint32_t *) CR_ODSWEN_BB = ENABLE)
174 #define __HAL_PWR_OVERDRIVESWITCHING_DISABLE() (*(__IO uint32_t *) CR_ODSWEN_BB = DISABLE)
175
176 /** @brief Macros to enable or disable the Under drive mode.
177 * @note This mode is enabled only with STOP low power mode.
178 * In this mode, the 1.2V domain is preserved in reduced leakage mode. This
179 * mode is only available when the main regulator or the low power regulator
180 * is in low voltage mode.
181 * @note If the Under-drive mode was enabled, it is automatically disabled after
182 * exiting Stop mode.
183 * When the voltage regulator operates in Under-drive mode, an additional
184 * startup delay is induced when waking up from Stop mode.
185 */
186 #define __HAL_PWR_UNDERDRIVE_ENABLE() (PWR->CR |= (uint32_t)PWR_CR_UDEN)
187 #define __HAL_PWR_UNDERDRIVE_DISABLE() (PWR->CR &= (uint32_t)(~PWR_CR_UDEN))
188
189 /** @brief Check PWR flag is set or not.
190 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
191 * @param __FLAG__ specifies the flag to check.
192 * This parameter can be one of the following values:
193 * @arg PWR_FLAG_ODRDY: This flag indicates that the Over-drive mode
194 * is ready
195 * @arg PWR_FLAG_ODSWRDY: This flag indicates that the Over-drive mode
196 * switching is ready
197 * @arg PWR_FLAG_UDRDY: This flag indicates that the Under-drive mode
198 * is enabled in Stop mode
199 * @retval The new state of __FLAG__ (TRUE or FALSE).
200 */
201 #define __HAL_PWR_GET_ODRUDR_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
202
203 /** @brief Clear the Under-Drive Ready flag.
204 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
205 */
206 #define __HAL_PWR_CLEAR_ODRUDR_FLAG() (PWR->CSR |= PWR_FLAG_UDRDY)
207
208 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
209 /**
210 * @}
211 */
212
213 /* Exported functions --------------------------------------------------------*/
214 /** @addtogroup PWREx_Exported_Functions PWREx Exported Functions
215 * @{
216 */
217
218 /** @addtogroup PWREx_Exported_Functions_Group1
219 * @{
220 */
221 void HAL_PWREx_EnableFlashPowerDown(void);
222 void HAL_PWREx_DisableFlashPowerDown(void);
223 HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void);
224 HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void);
225 uint32_t HAL_PWREx_GetVoltageRange(void);
226 HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling);
227
228 #if defined(STM32F469xx) || defined(STM32F479xx)
229 void HAL_PWREx_EnableWakeUpPinPolarityRisingEdge(void);
230 void HAL_PWREx_EnableWakeUpPinPolarityFallingEdge(void);
231 #endif /* STM32F469xx || STM32F479xx */
232
233 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F401xC) ||\
234 defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F412Zx) || defined(STM32F412Vx) ||\
235 defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
236 void HAL_PWREx_EnableMainRegulatorLowVoltage(void);
237 void HAL_PWREx_DisableMainRegulatorLowVoltage(void);
238 void HAL_PWREx_EnableLowRegulatorLowVoltage(void);
239 void HAL_PWREx_DisableLowRegulatorLowVoltage(void);
240 #endif /* STM32F410xx || STM32F401xC || STM32F401xE || STM32F411xE || STM32F412Zx || STM32F412Vx ||\
241 STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
242
243 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx) ||\
244 defined(STM32F469xx) || defined(STM32F479xx)
245 HAL_StatusTypeDef HAL_PWREx_EnableOverDrive(void);
246 HAL_StatusTypeDef HAL_PWREx_DisableOverDrive(void);
247 HAL_StatusTypeDef HAL_PWREx_EnterUnderDriveSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
248 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
249
250 /**
251 * @}
252 */
253
254 /**
255 * @}
256 */
257 /* Private types -------------------------------------------------------------*/
258 /* Private variables ---------------------------------------------------------*/
259 /* Private constants ---------------------------------------------------------*/
260 /** @defgroup PWREx_Private_Constants PWREx Private Constants
261 * @{
262 */
263
264 /** @defgroup PWREx_register_alias_address PWREx Register alias address
265 * @{
266 */
267 /* ------------- PWR registers bit address in the alias region ---------------*/
268 /* --- CR Register ---*/
269 /* Alias word address of FPDS bit */
270 #define FPDS_BIT_NUMBER PWR_CR_FPDS_Pos
271 #define CR_FPDS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (FPDS_BIT_NUMBER * 4U))
272
273 /* Alias word address of ODEN bit */
274 #define ODEN_BIT_NUMBER PWR_CR_ODEN_Pos
275 #define CR_ODEN_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (ODEN_BIT_NUMBER * 4U))
276
277 /* Alias word address of ODSWEN bit */
278 #define ODSWEN_BIT_NUMBER PWR_CR_ODSWEN_Pos
279 #define CR_ODSWEN_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (ODSWEN_BIT_NUMBER * 4U))
280
281 /* Alias word address of MRLVDS bit */
282 #define MRLVDS_BIT_NUMBER PWR_CR_MRLVDS_Pos
283 #define CR_MRLVDS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (MRLVDS_BIT_NUMBER * 4U))
284
285 /* Alias word address of LPLVDS bit */
286 #define LPLVDS_BIT_NUMBER PWR_CR_LPLVDS_Pos
287 #define CR_LPLVDS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (LPLVDS_BIT_NUMBER * 4U))
288
289 /**
290 * @}
291 */
292
293 /** @defgroup PWREx_CSR_register_alias PWRx CSR Register alias address
294 * @{
295 */
296 /* --- CSR Register ---*/
297 /* Alias word address of BRE bit */
298 #define BRE_BIT_NUMBER PWR_CSR_BRE_Pos
299 #define CSR_BRE_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32U) + (BRE_BIT_NUMBER * 4U))
300
301 #if defined(STM32F469xx) || defined(STM32F479xx)
302 /* Alias word address of WUPP bit */
303 #define WUPP_BIT_NUMBER PWR_CSR_WUPP_Pos
304 #define CSR_WUPP_BB (PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32U) + (WUPP_BIT_NUMBER * 4U))
305 #endif /* STM32F469xx || STM32F479xx */
306 /**
307 * @}
308 */
309
310 /**
311 * @}
312 */
313
314 /* Private macros ------------------------------------------------------------*/
315 /** @defgroup PWREx_Private_Macros PWREx Private Macros
316 * @{
317 */
318
319 /** @defgroup PWREx_IS_PWR_Definitions PWREx Private macros to check input parameters
320 * @{
321 */
322 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
323 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
324 #define IS_PWR_REGULATOR_UNDERDRIVE(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_UNDERDRIVE_ON) || \
325 ((REGULATOR) == PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON))
326 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
327
328 #if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx)
329 #define IS_PWR_VOLTAGE_SCALING_RANGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
330 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2))
331 #else
332 #define IS_PWR_VOLTAGE_SCALING_RANGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
333 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \
334 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE3))
335 #endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx */
336
337 #if defined(STM32F446xx)
338 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || ((PIN) == PWR_WAKEUP_PIN2))
339 #elif defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F412Zx) ||\
340 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\
341 defined(STM32F423xx)
342 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || ((PIN) == PWR_WAKEUP_PIN2) || \
343 ((PIN) == PWR_WAKEUP_PIN3))
344 #else
345 #define IS_PWR_WAKEUP_PIN(PIN) ((PIN) == PWR_WAKEUP_PIN1)
346 #endif /* STM32F446xx */
347 /**
348 * @}
349 */
350
351 /**
352 * @}
353 */
354
355 /**
356 * @}
357 */
358
359 /**
360 * @}
361 */
362
363 #ifdef __cplusplus
364 }
365 #endif
366
367
368 #endif /* __STM32F4xx_HAL_PWR_EX_H */
369
370 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/