Mercurial > public > ostc4

comparison Common/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h @ 128:c78bcbd5deda FlipDisplay

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
Added current STM32 standandard libraries in version independend folder structure
author Ideenmodellierer
date Sun, 17 Feb 2019 21:12:22 +0100
parents
children
comparison
equal deleted inserted replaced
127:1369f8660eaa 128:c78bcbd5deda
1 /**
2 ******************************************************************************
3 * @file stm32f4xx_hal_pwr.h
4 * @author MCD Application Team
5 * @brief Header file of PWR HAL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
10 *
11 * Redistribution and use in source and binary forms, with or without modification,
12 * are permitted provided that the following conditions are met:
13 * 1. Redistributions of source code must retain the above copyright notice,
14 * this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright notice,
16 * this list of conditions and the following disclaimer in the documentation
17 * and/or other materials provided with the distribution.
18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 ******************************************************************************
34 */
35
36 /* Define to prevent recursive inclusion -------------------------------------*/
37 #ifndef __STM32F4xx_HAL_PWR_H
38 #define __STM32F4xx_HAL_PWR_H
39
40 #ifdef __cplusplus
41 extern "C" {
42 #endif
43
44 /* Includes ------------------------------------------------------------------*/
45 #include "stm32f4xx_hal_def.h"
46
47 /** @addtogroup STM32F4xx_HAL_Driver
48 * @{
49 */
50
51 /** @addtogroup PWR
52 * @{
53 */
54
55 /* Exported types ------------------------------------------------------------*/
56
57 /** @defgroup PWR_Exported_Types PWR Exported Types
58 * @{
59 */
60
61 /**
62 * @brief PWR PVD configuration structure definition
63 */
64 typedef struct
65 {
66 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level.
67 This parameter can be a value of @ref PWR_PVD_detection_level */
68
69 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
70 This parameter can be a value of @ref PWR_PVD_Mode */
71 }PWR_PVDTypeDef;
72
73 /**
74 * @}
75 */
76
77 /* Exported constants --------------------------------------------------------*/
78 /** @defgroup PWR_Exported_Constants PWR Exported Constants
79 * @{
80 */
81
82 /** @defgroup PWR_WakeUp_Pins PWR WakeUp Pins
83 * @{
84 */
85 #define PWR_WAKEUP_PIN1 0x00000100U
86 /**
87 * @}
88 */
89
90 /** @defgroup PWR_PVD_detection_level PWR PVD detection level
91 * @{
92 */
93 #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0
94 #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1
95 #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2
96 #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3
97 #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4
98 #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5
99 #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6
100 #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7/* External input analog voltage
101 (Compare internally to VREFINT) */
102 /**
103 * @}
104 */
105
106 /** @defgroup PWR_PVD_Mode PWR PVD Mode
107 * @{
108 */
109 #define PWR_PVD_MODE_NORMAL 0x00000000U /*!< basic mode is used */
110 #define PWR_PVD_MODE_IT_RISING 0x00010001U /*!< External Interrupt Mode with Rising edge trigger detection */
111 #define PWR_PVD_MODE_IT_FALLING 0x00010002U /*!< External Interrupt Mode with Falling edge trigger detection */
112 #define PWR_PVD_MODE_IT_RISING_FALLING 0x00010003U /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
113 #define PWR_PVD_MODE_EVENT_RISING 0x00020001U /*!< Event Mode with Rising edge trigger detection */
114 #define PWR_PVD_MODE_EVENT_FALLING 0x00020002U /*!< Event Mode with Falling edge trigger detection */
115 #define PWR_PVD_MODE_EVENT_RISING_FALLING 0x00020003U /*!< Event Mode with Rising/Falling edge trigger detection */
116 /**
117 * @}
118 */
119
120
121 /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in SLEEP/STOP mode
122 * @{
123 */
124 #define PWR_MAINREGULATOR_ON 0x00000000U
125 #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS
126 /**
127 * @}
128 */
129
130 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
131 * @{
132 */
133 #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01)
134 #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02)
135 /**
136 * @}
137 */
138
139 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
140 * @{
141 */
142 #define PWR_STOPENTRY_WFI ((uint8_t)0x01)
143 #define PWR_STOPENTRY_WFE ((uint8_t)0x02)
144 /**
145 * @}
146 */
147
148 /** @defgroup PWR_Flag PWR Flag
149 * @{
150 */
151 #define PWR_FLAG_WU PWR_CSR_WUF
152 #define PWR_FLAG_SB PWR_CSR_SBF
153 #define PWR_FLAG_PVDO PWR_CSR_PVDO
154 #define PWR_FLAG_BRR PWR_CSR_BRR
155 #define PWR_FLAG_VOSRDY PWR_CSR_VOSRDY
156 /**
157 * @}
158 */
159
160 /**
161 * @}
162 */
163
164 /* Exported macro ------------------------------------------------------------*/
165 /** @defgroup PWR_Exported_Macro PWR Exported Macro
166 * @{
167 */
168
169 /** @brief Check PWR flag is set or not.
170 * @param __FLAG__ specifies the flag to check.
171 * This parameter can be one of the following values:
172 * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
173 * was received from the WKUP pin or from the RTC alarm (Alarm A
174 * or Alarm B), RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
175 * An additional wakeup event is detected if the WKUP pin is enabled
176 * (by setting the EWUP bit) when the WKUP pin level is already high.
177 * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
178 * resumed from StandBy mode.
179 * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
180 * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
181 * For this reason, this bit is equal to 0 after Standby or reset
182 * until the PVDE bit is set.
183 * @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset
184 * when the device wakes up from Standby mode or by a system reset
185 * or power reset.
186 * @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage
187 * scaling output selection is ready.
188 * @retval The new state of __FLAG__ (TRUE or FALSE).
189 */
190 #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
191
192 /** @brief Clear the PWR's pending flags.
193 * @param __FLAG__ specifies the flag to clear.
194 * This parameter can be one of the following values:
195 * @arg PWR_FLAG_WU: Wake Up flag
196 * @arg PWR_FLAG_SB: StandBy flag
197 */
198 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2U)
199
200 /**
201 * @brief Enable the PVD Exti Line 16.
202 * @retval None.
203 */
204 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD))
205
206 /**
207 * @brief Disable the PVD EXTI Line 16.
208 * @retval None.
209 */
210 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD))
211
212 /**
213 * @brief Enable event on PVD Exti Line 16.
214 * @retval None.
215 */
216 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD))
217
218 /**
219 * @brief Disable event on PVD Exti Line 16.
220 * @retval None.
221 */
222 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD))
223
224 /**
225 * @brief Enable the PVD Extended Interrupt Rising Trigger.
226 * @retval None.
227 */
228 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
229
230 /**
231 * @brief Disable the PVD Extended Interrupt Rising Trigger.
232 * @retval None.
233 */
234 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
235
236 /**
237 * @brief Enable the PVD Extended Interrupt Falling Trigger.
238 * @retval None.
239 */
240 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
241
242
243 /**
244 * @brief Disable the PVD Extended Interrupt Falling Trigger.
245 * @retval None.
246 */
247 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
248
249
250 /**
251 * @brief PVD EXTI line configuration: set rising & falling edge trigger.
252 * @retval None.
253 */
254 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();\
255 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();\
256 }while(0U)
257
258 /**
259 * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
260 * This parameter can be:
261 * @retval None.
262 */
263 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();\
264 __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();\
265 }while(0U)
266
267 /**
268 * @brief checks whether the specified PVD Exti interrupt flag is set or not.
269 * @retval EXTI PVD Line Status.
270 */
271 #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD))
272
273 /**
274 * @brief Clear the PVD Exti flag.
275 * @retval None.
276 */
277 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD))
278
279 /**
280 * @brief Generates a Software interrupt on PVD EXTI line.
281 * @retval None
282 */
283 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD))
284
285 /**
286 * @}
287 */
288
289 /* Include PWR HAL Extension module */
290 #include "stm32f4xx_hal_pwr_ex.h"
291
292 /* Exported functions --------------------------------------------------------*/
293 /** @addtogroup PWR_Exported_Functions PWR Exported Functions
294 * @{
295 */
296
297 /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
298 * @{
299 */
300 /* Initialization and de-initialization functions *****************************/
301 void HAL_PWR_DeInit(void);
302 void HAL_PWR_EnableBkUpAccess(void);
303 void HAL_PWR_DisableBkUpAccess(void);
304 /**
305 * @}
306 */
307
308 /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions
309 * @{
310 */
311 /* Peripheral Control functions **********************************************/
312 /* PVD configuration */
313 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
314 void HAL_PWR_EnablePVD(void);
315 void HAL_PWR_DisablePVD(void);
316
317 /* WakeUp pins configuration */
318 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
319 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
320
321 /* Low Power modes entry */
322 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
323 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
324 void HAL_PWR_EnterSTANDBYMode(void);
325
326 /* Power PVD IRQ Handler */
327 void HAL_PWR_PVD_IRQHandler(void);
328 void HAL_PWR_PVDCallback(void);
329
330 /* Cortex System Control functions *******************************************/
331 void HAL_PWR_EnableSleepOnExit(void);
332 void HAL_PWR_DisableSleepOnExit(void);
333 void HAL_PWR_EnableSEVOnPend(void);
334 void HAL_PWR_DisableSEVOnPend(void);
335 /**
336 * @}
337 */
338
339 /**
340 * @}
341 */
342
343 /* Private types -------------------------------------------------------------*/
344 /* Private variables ---------------------------------------------------------*/
345 /* Private constants ---------------------------------------------------------*/
346 /** @defgroup PWR_Private_Constants PWR Private Constants
347 * @{
348 */
349
350 /** @defgroup PWR_PVD_EXTI_Line PWR PVD EXTI Line
351 * @{
352 */
353 #define PWR_EXTI_LINE_PVD ((uint32_t)EXTI_IMR_MR16) /*!< External interrupt line 16 Connected to the PVD EXTI Line */
354 /**
355 * @}
356 */
357
358 /** @defgroup PWR_register_alias_address PWR Register alias address
359 * @{
360 */
361 /* ------------- PWR registers bit address in the alias region ---------------*/
362 #define PWR_OFFSET (PWR_BASE - PERIPH_BASE)
363 #define PWR_CR_OFFSET 0x00U
364 #define PWR_CSR_OFFSET 0x04U
365 #define PWR_CR_OFFSET_BB (PWR_OFFSET + PWR_CR_OFFSET)
366 #define PWR_CSR_OFFSET_BB (PWR_OFFSET + PWR_CSR_OFFSET)
367 /**
368 * @}
369 */
370
371 /** @defgroup PWR_CR_register_alias PWR CR Register alias address
372 * @{
373 */
374 /* --- CR Register ---*/
375 /* Alias word address of DBP bit */
376 #define DBP_BIT_NUMBER PWR_CR_DBP_Pos
377 #define CR_DBP_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (DBP_BIT_NUMBER * 4U))
378
379 /* Alias word address of PVDE bit */
380 #define PVDE_BIT_NUMBER PWR_CR_PVDE_Pos
381 #define CR_PVDE_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (PVDE_BIT_NUMBER * 4U))
382
383 /* Alias word address of VOS bit */
384 #define VOS_BIT_NUMBER PWR_CR_VOS_Pos
385 #define CR_VOS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (VOS_BIT_NUMBER * 4U))
386 /**
387 * @}
388 */
389
390 /** @defgroup PWR_CSR_register_alias PWR CSR Register alias address
391 * @{
392 */
393 /* --- CSR Register ---*/
394 /* Alias word address of EWUP bit */
395 #define EWUP_BIT_NUMBER PWR_CSR_EWUP_Pos
396 #define CSR_EWUP_BB (PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32U) + (EWUP_BIT_NUMBER * 4U))
397 /**
398 * @}
399 */
400
401 /**
402 * @}
403 */
404 /* Private macros ------------------------------------------------------------*/
405 /** @defgroup PWR_Private_Macros PWR Private Macros
406 * @{
407 */
408
409 /** @defgroup PWR_IS_PWR_Definitions PWR Private macros to check input parameters
410 * @{
411 */
412 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
413 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
414 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
415 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
416 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
417 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
418 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
419 ((MODE) == PWR_PVD_MODE_NORMAL))
420 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
421 ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
422 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
423 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE))
424 /**
425 * @}
426 */
427
428 /**
429 * @}
430 */
431
432 /**
433 * @}
434 */
435
436 /**
437 * @}
438 */
439
440 #ifdef __cplusplus
441 }
442 #endif
443
444
445 #endif /* __STM32F4xx_HAL_PWR_H */
446
447 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/