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Added current STM32 standandard libraries in version independend folder structure
author Ideenmodellierer
date Sun, 17 Feb 2019 21:12:22 +0100
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127:1369f8660eaa 128:c78bcbd5deda
1 /**
2 ******************************************************************************
3 * @file stm32f4xx_hal_i2s.h
4 * @author MCD Application Team
5 * @brief Header file of I2S HAL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
10 *
11 * Redistribution and use in source and binary forms, with or without modification,
12 * are permitted provided that the following conditions are met:
13 * 1. Redistributions of source code must retain the above copyright notice,
14 * this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright notice,
16 * this list of conditions and the following disclaimer in the documentation
17 * and/or other materials provided with the distribution.
18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 ******************************************************************************
34 */
35
36 /* Define to prevent recursive inclusion -------------------------------------*/
37 #ifndef __STM32F4xx_HAL_I2S_H
38 #define __STM32F4xx_HAL_I2S_H
39
40 #ifdef __cplusplus
41 extern "C" {
42 #endif
43
44 /* Includes ------------------------------------------------------------------*/
45 #include "stm32f4xx_hal_def.h"
46
47 /** @addtogroup STM32F4xx_HAL_Driver
48 * @{
49 */
50
51 /** @addtogroup I2S I2S
52 * @{
53 */
54
55 /* Exported types ------------------------------------------------------------*/
56 /** @defgroup I2S_Exported_Types I2S Exported Types
57 * @{
58 */
59
60 /**
61 * @brief I2S Init structure definition
62 */
63 typedef struct
64 {
65 uint32_t Mode; /*!< Specifies the I2S operating mode.
66 This parameter can be a value of @ref I2S_Mode */
67
68 uint32_t Standard; /*!< Specifies the standard used for the I2S communication.
69 This parameter can be a value of @ref I2S_Standard */
70
71 uint32_t DataFormat; /*!< Specifies the data format for the I2S communication.
72 This parameter can be a value of @ref I2S_Data_Format */
73
74 uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
75 This parameter can be a value of @ref I2S_MCLK_Output */
76
77 uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
78 This parameter can be a value of @ref I2S_Audio_Frequency */
79
80 uint32_t CPOL; /*!< Specifies the idle state of the I2S clock.
81 This parameter can be a value of @ref I2S_Clock_Polarity */
82
83 uint32_t ClockSource; /*!< Specifies the I2S Clock Source.
84 This parameter can be a value of @ref I2S_Clock_Source */
85
86 uint32_t FullDuplexMode; /*!< Specifies the I2S FullDuplex mode.
87 This parameter can be a value of @ref I2S_FullDuplex_Mode */
88
89 }I2S_InitTypeDef;
90
91 /**
92 * @brief HAL State structures definition
93 */
94 typedef enum
95 {
96 HAL_I2S_STATE_RESET = 0x00U, /*!< I2S not yet initialized or disabled */
97 HAL_I2S_STATE_READY = 0x01U, /*!< I2S initialized and ready for use */
98 HAL_I2S_STATE_BUSY = 0x02U, /*!< I2S internal process is ongoing */
99 HAL_I2S_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */
100 HAL_I2S_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */
101 HAL_I2S_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */
102 HAL_I2S_STATE_TIMEOUT = 0x06U, /*!< I2S timeout state */
103 HAL_I2S_STATE_ERROR = 0x07U /*!< I2S error state */
104
105 }HAL_I2S_StateTypeDef;
106
107 /**
108 * @brief I2S handle Structure definition
109 */
110 typedef struct __I2S_HandleTypeDef
111 {
112 SPI_TypeDef *Instance; /*!< I2S registers base address */
113
114 I2S_InitTypeDef Init; /*!< I2S communication parameters */
115
116 uint16_t *pTxBuffPtr; /*!< Pointer to I2S Tx transfer buffer */
117
118 __IO uint16_t TxXferSize; /*!< I2S Tx transfer size */
119
120 __IO uint16_t TxXferCount; /*!< I2S Tx transfer Counter */
121
122 uint16_t *pRxBuffPtr; /*!< Pointer to I2S Rx transfer buffer */
123
124 __IO uint16_t RxXferSize; /*!< I2S Rx transfer size */
125
126 __IO uint16_t RxXferCount; /*!< I2S Rx transfer counter
127 (This field is initialized at the
128 same value as transfer size at the
129 beginning of the transfer and
130 decremented when a sample is received
131 NbSamplesReceived = RxBufferSize-RxBufferCount) */
132
133 void (*IrqHandlerISR) (struct __I2S_HandleTypeDef *hi2s); /*!< I2S function pointer on IrqHandler */
134
135 DMA_HandleTypeDef *hdmatx; /*!< I2S Tx DMA handle parameters */
136
137 DMA_HandleTypeDef *hdmarx; /*!< I2S Rx DMA handle parameters */
138
139 __IO HAL_LockTypeDef Lock; /*!< I2S locking object */
140
141 __IO HAL_I2S_StateTypeDef State; /*!< I2S communication state */
142
143 __IO uint32_t ErrorCode; /*!< I2S Error code
144 This parameter can be a value of @ref I2S_ErrorCode */
145
146 }I2S_HandleTypeDef;
147 /**
148 * @}
149 */
150
151 /* Exported constants --------------------------------------------------------*/
152 /** @defgroup I2S_Exported_Constants I2S Exported Constants
153 * @{
154 */
155 /**
156 * @defgroup I2S_ErrorCode I2S Error Code
157 * @{
158 */
159 #define HAL_I2S_ERROR_NONE (0x00000000U) /*!< No error */
160 #define HAL_I2S_ERROR_TIMEOUT (0x00000001U) /*!< Timeout error */
161 #define HAL_I2S_ERROR_OVR (0x00000002U) /*!< OVR error */
162 #define HAL_I2S_ERROR_UDR (0x00000004U) /*!< UDR error */
163 #define HAL_I2S_ERROR_DMA (0x00000008U) /*!< DMA transfer error */
164 #define HAL_I2S_ERROR_PRESCALER (0x00000010U) /*!< Prescaler Calculation error */
165 /**
166 * @}
167 */
168
169 /** @defgroup I2S_Mode I2S Mode
170 * @{
171 */
172 #define I2S_MODE_SLAVE_TX (0x00000000U)
173 #define I2S_MODE_SLAVE_RX (0x00000100U)
174 #define I2S_MODE_MASTER_TX (0x00000200U)
175 #define I2S_MODE_MASTER_RX (0x00000300U)
176 /**
177 * @}
178 */
179
180 /** @defgroup I2S_Standard I2S Standard
181 * @{
182 */
183 #define I2S_STANDARD_PHILIPS (0x00000000U)
184 #define I2S_STANDARD_MSB (0x00000010U)
185 #define I2S_STANDARD_LSB (0x00000020U)
186 #define I2S_STANDARD_PCM_SHORT (0x00000030U)
187 #define I2S_STANDARD_PCM_LONG (0x000000B0U)
188 /**
189 * @}
190 */
191
192 /** @defgroup I2S_Data_Format I2S Data Format
193 * @{
194 */
195 #define I2S_DATAFORMAT_16B (0x00000000U)
196 #define I2S_DATAFORMAT_16B_EXTENDED (0x00000001U)
197 #define I2S_DATAFORMAT_24B (0x00000003U)
198 #define I2S_DATAFORMAT_32B (0x00000005U)
199 /**
200 * @}
201 */
202
203 /** @defgroup I2S_MCLK_Output I2S Mclk Output
204 * @{
205 */
206 #define I2S_MCLKOUTPUT_ENABLE SPI_I2SPR_MCKOE
207 #define I2S_MCLKOUTPUT_DISABLE (0x00000000U)
208 /**
209 * @}
210 */
211
212 /** @defgroup I2S_Audio_Frequency I2S Audio Frequency
213 * @{
214 */
215 #define I2S_AUDIOFREQ_192K (192000U)
216 #define I2S_AUDIOFREQ_96K (96000U)
217 #define I2S_AUDIOFREQ_48K (48000U)
218 #define I2S_AUDIOFREQ_44K (44100U)
219 #define I2S_AUDIOFREQ_32K (32000U)
220 #define I2S_AUDIOFREQ_22K (22050U)
221 #define I2S_AUDIOFREQ_16K (16000U)
222 #define I2S_AUDIOFREQ_11K (11025U)
223 #define I2S_AUDIOFREQ_8K (8000U)
224 #define I2S_AUDIOFREQ_DEFAULT (2U)
225 /**
226 * @}
227 */
228
229 /** @defgroup I2S_FullDuplex_Mode I2S FullDuplex Mode
230 * @{
231 */
232 #define I2S_FULLDUPLEXMODE_DISABLE (0x00000000U)
233 #define I2S_FULLDUPLEXMODE_ENABLE (0x00000001U)
234 /**
235 * @}
236 */
237
238 /** @defgroup I2S_Clock_Polarity I2S Clock Polarity
239 * @{
240 */
241 #define I2S_CPOL_LOW (0x00000000U)
242 #define I2S_CPOL_HIGH (SPI_I2SCFGR_CKPOL)
243 /**
244 * @}
245 */
246
247 /** @defgroup I2S_Interrupts_Definition I2S Interrupts Definition
248 * @{
249 */
250 #define I2S_IT_TXE SPI_CR2_TXEIE
251 #define I2S_IT_RXNE SPI_CR2_RXNEIE
252 #define I2S_IT_ERR SPI_CR2_ERRIE
253 /**
254 * @}
255 */
256
257 /** @defgroup I2S_Flags_Definition I2S Flags Definition
258 * @{
259 */
260 #define I2S_FLAG_TXE SPI_SR_TXE
261 #define I2S_FLAG_RXNE SPI_SR_RXNE
262
263 #define I2S_FLAG_UDR SPI_SR_UDR
264 #define I2S_FLAG_OVR SPI_SR_OVR
265 #define I2S_FLAG_FRE SPI_SR_FRE
266
267 #define I2S_FLAG_CHSIDE SPI_SR_CHSIDE
268 #define I2S_FLAG_BSY SPI_SR_BSY
269 /**
270 * @}
271 */
272 /** @defgroup I2S_Clock_Source I2S Clock Source Definition
273 * @{
274 */
275 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
276 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
277 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F469xx) || \
278 defined(STM32F479xx)
279 #define I2S_CLOCK_PLL (0x00000000U)
280 #define I2S_CLOCK_EXTERNAL (0x00000001U)
281 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
282 STM32F401xC || STM32F401xE || STM32F411xE || STM32F469xx || STM32F479xx */
283
284 #if defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) ||\
285 defined(STM32F413xx) || defined(STM32F423xx)
286 #define I2S_CLOCK_PLL (0x00000000U)
287 #define I2S_CLOCK_EXTERNAL (0x00000001U)
288 #define I2S_CLOCK_PLLR (0x00000002U)
289 #define I2S_CLOCK_PLLSRC (0x00000003U)
290 #endif /* STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
291
292 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
293 #define I2S_CLOCK_PLLSRC (0x00000000U)
294 #define I2S_CLOCK_EXTERNAL (0x00000001U)
295 #define I2S_CLOCK_PLLR (0x00000002U)
296 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
297 /**
298 * @}
299 */
300
301 /**
302 * @}
303 */
304
305 /* Exported macro ------------------------------------------------------------*/
306 /** @defgroup I2S_Exported_Macros I2S Exported Macros
307 * @{
308 */
309
310 /** @brief Reset I2S handle state
311 * @param __HANDLE__ specifies the I2S Handle.
312 * @retval None
313 */
314 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)
315
316 /** @brief Enable or disable the specified SPI peripheral (in I2S mode).
317 * @param __HANDLE__ specifies the I2S Handle.
318 * @retval None
319 */
320 #define __HAL_I2S_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR |= SPI_I2SCFGR_I2SE)
321 #define __HAL_I2S_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR &=(uint16_t)(~SPI_I2SCFGR_I2SE))
322
323 /** @brief Enable or disable the specified I2S interrupts.
324 * @param __HANDLE__ specifies the I2S Handle.
325 * @param __INTERRUPT__ specifies the interrupt source to enable or disable.
326 * This parameter can be one of the following values:
327 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
328 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
329 * @arg I2S_IT_ERR: Error interrupt enable
330 * @retval None
331 */
332 #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
333 #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &=(uint16_t)(~(__INTERRUPT__)))
334
335 /** @brief Checks if the specified I2S interrupt source is enabled or disabled.
336 * @param __HANDLE__ specifies the I2S Handle.
337 * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral.
338 * @param __INTERRUPT__ specifies the I2S interrupt source to check.
339 * This parameter can be one of the following values:
340 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
341 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
342 * @arg I2S_IT_ERR: Error interrupt enable
343 * @retval The new state of __IT__ (TRUE or FALSE).
344 */
345 #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
346
347 /** @brief Checks whether the specified I2S flag is set or not.
348 * @param __HANDLE__ specifies the I2S Handle.
349 * @param __FLAG__ specifies the flag to check.
350 * This parameter can be one of the following values:
351 * @arg I2S_FLAG_RXNE: Receive buffer not empty flag
352 * @arg I2S_FLAG_TXE: Transmit buffer empty flag
353 * @arg I2S_FLAG_UDR: Underrun flag
354 * @arg I2S_FLAG_OVR: Overrun flag
355 * @arg I2S_FLAG_FRE: Frame error flag
356 * @arg I2S_FLAG_CHSIDE: Channel Side flag
357 * @arg I2S_FLAG_BSY: Busy flag
358 * @retval The new state of __FLAG__ (TRUE or FALSE).
359 */
360 #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
361
362 /** @brief Clears the I2S OVR pending flag.
363 * @param __HANDLE__ specifies the I2S Handle.
364 * @retval None
365 */
366 #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) \
367 do{ \
368 __IO uint32_t tmpreg = 0x00U; \
369 tmpreg = (__HANDLE__)->Instance->DR; \
370 tmpreg = (__HANDLE__)->Instance->SR; \
371 UNUSED(tmpreg); \
372 } while(0)
373
374 /** @brief Clears the I2S UDR pending flag.
375 * @param __HANDLE__ specifies the I2S Handle.
376 * @retval None
377 */
378 #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) \
379 do{ \
380 __IO uint32_t tmpreg = 0x00U; \
381 tmpreg = (__HANDLE__)->Instance->SR; \
382 UNUSED(tmpreg); \
383 } while(0)
384 /**
385 * @}
386 */
387
388 /* Include I2S Extension module */
389 #include "stm32f4xx_hal_i2s_ex.h"
390
391 /* Exported functions --------------------------------------------------------*/
392 /** @defgroup I2S_Exported_Functions I2S Exported Functions
393 * @{
394 */
395
396 /** @defgroup I2S_Exported_Functions_Group1 I2S Initialization and de-initialization functions
397 * @{
398 */
399 /* Initialization/de-initialization functions **********************************/
400 HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s);
401 HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s);
402 void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s);
403 void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
404 /**
405 * @}
406 */
407
408 /** @defgroup I2S_Exported_Functions_Group2 I2S IO operation functions
409 * @{
410 */
411 /* I/O operation functions *****************************************************/
412 /* Blocking mode: Polling */
413 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
414 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
415
416 /* Non-Blocking mode: Interrupt */
417 HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
418 HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
419 void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s);
420
421 /* Non-Blocking mode: DMA */
422 HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
423 HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
424
425 HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s);
426 HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s);
427 HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s);
428
429 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
430 void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
431 void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s);
432 void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
433 void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s);
434 void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s);
435 /**
436 * @}
437 */
438
439 /** @defgroup I2S_Exported_Functions_Group3 I2S Peripheral Control and State functions
440 * @{
441 */
442 /* Peripheral Control and State functions ************************************/
443 HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s);
444 uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s);
445 /**
446 * @}
447 */
448
449 /**
450 * @}
451 */
452
453 /* Private types -------------------------------------------------------------*/
454 /* Private variables ---------------------------------------------------------*/
455 /* Private constants ---------------------------------------------------------*/
456 /** @defgroup I2S_Private_Constants I2S Private Constants
457 * @{
458 */
459
460 /**
461 * @}
462 */
463
464 /* Private macros ------------------------------------------------------------*/
465 /** @defgroup I2S_Private_Macros I2S Private Macros
466 * @{
467 */
468 #define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \
469 ((MODE) == I2S_MODE_SLAVE_RX) || \
470 ((MODE) == I2S_MODE_MASTER_TX) || \
471 ((MODE) == I2S_MODE_MASTER_RX))
472
473 #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS) || \
474 ((STANDARD) == I2S_STANDARD_MSB) || \
475 ((STANDARD) == I2S_STANDARD_LSB) || \
476 ((STANDARD) == I2S_STANDARD_PCM_SHORT) || \
477 ((STANDARD) == I2S_STANDARD_PCM_LONG))
478
479 #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B) || \
480 ((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \
481 ((FORMAT) == I2S_DATAFORMAT_24B) || \
482 ((FORMAT) == I2S_DATAFORMAT_32B))
483
484 #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \
485 ((OUTPUT) == I2S_MCLKOUTPUT_DISABLE))
486
487 #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \
488 ((FREQ) <= I2S_AUDIOFREQ_192K)) || \
489 ((FREQ) == I2S_AUDIOFREQ_DEFAULT))
490
491 #define IS_I2S_FULLDUPLEX_MODE(MODE) (((MODE) == I2S_FULLDUPLEXMODE_DISABLE) || \
492 ((MODE) == I2S_FULLDUPLEXMODE_ENABLE))
493
494 #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \
495 ((CPOL) == I2S_CPOL_HIGH))
496
497 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
498 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
499 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F469xx) || \
500 defined(STM32F479xx)
501 #define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) ||\
502 ((CLOCK) == I2S_CLOCK_PLL))
503 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
504 STM32F401xC || STM32F401xE || STM32F411xE || STM32F469xx || STM32F479xx */
505
506 #if defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) ||\
507 defined(STM32F412Rx) || defined(STM32F412Cx) || defined (STM32F413xx) ||\
508 defined(STM32F423xx)
509 #define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) ||\
510 ((CLOCK) == I2S_CLOCK_PLL) ||\
511 ((CLOCK) == I2S_CLOCK_PLLSRC) ||\
512 ((CLOCK) == I2S_CLOCK_PLLR))
513 #endif /* STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
514
515 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
516 #define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) ||\
517 ((CLOCK) == I2S_CLOCK_PLLSRC) ||\
518 ((CLOCK) == I2S_CLOCK_PLLR))
519 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
520
521 /**
522 * @}
523 */
524
525 /* Private functions ---------------------------------------------------------*/
526 /**
527 * @}
528 */
529
530 /**
531 * @}
532 */
533
534 #ifdef __cplusplus
535 }
536 #endif
537
538
539 #endif /* __STM32F4xx_HAL_I2S_H */
540
541 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/