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Added current STM32 standandard libraries in version independend folder structure
author Ideenmodellierer
date Sun, 17 Feb 2019 21:12:22 +0100
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127:1369f8660eaa 128:c78bcbd5deda
1 /**
2 ******************************************************************************
3 * @file stm32f4xx_hal_dcmi.h
4 * @author MCD Application Team
5 * @brief Header file of DCMI HAL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
10 *
11 * Redistribution and use in source and binary forms, with or without modification,
12 * are permitted provided that the following conditions are met:
13 * 1. Redistributions of source code must retain the above copyright notice,
14 * this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright notice,
16 * this list of conditions and the following disclaimer in the documentation
17 * and/or other materials provided with the distribution.
18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 ******************************************************************************
34 */
35
36 /* Define to prevent recursive inclusion -------------------------------------*/
37 #ifndef __STM32F4xx_HAL_DCMI_H
38 #define __STM32F4xx_HAL_DCMI_H
39
40 #ifdef __cplusplus
41 extern "C" {
42 #endif
43
44 #if defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) ||\
45 defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx) || defined(STM32F469xx) ||\
46 defined(STM32F479xx)
47 /* Includes ------------------------------------------------------------------*/
48 #include "stm32f4xx_hal_def.h"
49
50 /* Include DCMI HAL Extended module */
51 /* (include on top of file since DCMI structures are defined in extended file) */
52 #include "stm32f4xx_hal_dcmi_ex.h"
53
54 /** @addtogroup STM32F4xx_HAL_Driver
55 * @{
56 */
57
58 /** @addtogroup DCMI DCMI
59 * @brief DCMI HAL module driver
60 * @{
61 */
62
63 /* Exported types ------------------------------------------------------------*/
64 /** @defgroup DCMI_Exported_Types DCMI Exported Types
65 * @{
66 */
67 /**
68 * @brief HAL DCMI State structures definition
69 */
70 typedef enum
71 {
72 HAL_DCMI_STATE_RESET = 0x00U, /*!< DCMI not yet initialized or disabled */
73 HAL_DCMI_STATE_READY = 0x01U, /*!< DCMI initialized and ready for use */
74 HAL_DCMI_STATE_BUSY = 0x02U, /*!< DCMI internal processing is ongoing */
75 HAL_DCMI_STATE_TIMEOUT = 0x03U, /*!< DCMI timeout state */
76 HAL_DCMI_STATE_ERROR = 0x04U, /*!< DCMI error state */
77 HAL_DCMI_STATE_SUSPENDED = 0x05U /*!< DCMI suspend state */
78 }HAL_DCMI_StateTypeDef;
79
80 /**
81 * @brief DCMI handle Structure definition
82 */
83 typedef struct
84 {
85 DCMI_TypeDef *Instance; /*!< DCMI Register base address */
86
87 DCMI_InitTypeDef Init; /*!< DCMI parameters */
88
89 HAL_LockTypeDef Lock; /*!< DCMI locking object */
90
91 __IO HAL_DCMI_StateTypeDef State; /*!< DCMI state */
92
93 __IO uint32_t XferCount; /*!< DMA transfer counter */
94
95 __IO uint32_t XferSize; /*!< DMA transfer size */
96
97 uint32_t XferTransferNumber; /*!< DMA transfer number */
98
99 uint32_t pBuffPtr; /*!< Pointer to DMA output buffer */
100
101 DMA_HandleTypeDef *DMA_Handle; /*!< Pointer to the DMA handler */
102
103 __IO uint32_t ErrorCode; /*!< DCMI Error code */
104
105 }DCMI_HandleTypeDef;
106 /**
107 * @}
108 */
109
110 /* Exported constants --------------------------------------------------------*/
111 /** @defgroup DCMI_Exported_Constants DCMI Exported Constants
112 * @{
113 */
114
115 /** @defgroup DCMI_Error_Code DCMI Error Code
116 * @{
117 */
118 #define HAL_DCMI_ERROR_NONE 0x00000000U /*!< No error */
119 #define HAL_DCMI_ERROR_OVR 0x00000001U /*!< Overrun error */
120 #define HAL_DCMI_ERROR_SYNC 0x00000002U /*!< Synchronization error */
121 #define HAL_DCMI_ERROR_TIMEOUT 0x00000020U /*!< Timeout error */
122 #define HAL_DCMI_ERROR_DMA 0x00000040U /*!< DMA error */
123 /**
124 * @}
125 */
126
127 /** @defgroup DCMI_Capture_Mode DCMI Capture Mode
128 * @{
129 */
130 #define DCMI_MODE_CONTINUOUS 0x00000000U /*!< The received data are transferred continuously
131 into the destination memory through the DMA */
132 #define DCMI_MODE_SNAPSHOT ((uint32_t)DCMI_CR_CM) /*!< Once activated, the interface waits for the start of
133 frame and then transfers a single frame through the DMA */
134 /**
135 * @}
136 */
137
138 /** @defgroup DCMI_Synchronization_Mode DCMI Synchronization Mode
139 * @{
140 */
141 #define DCMI_SYNCHRO_HARDWARE 0x00000000U /*!< Hardware synchronization data capture (frame/line start/stop)
142 is synchronized with the HSYNC/VSYNC signals */
143 #define DCMI_SYNCHRO_EMBEDDED ((uint32_t)DCMI_CR_ESS) /*!< Embedded synchronization data capture is synchronized with
144 synchronization codes embedded in the data flow */
145
146 /**
147 * @}
148 */
149
150 /** @defgroup DCMI_PIXCK_Polarity DCMI PIXCK Polarity
151 * @{
152 */
153 #define DCMI_PCKPOLARITY_FALLING 0x00000000U /*!< Pixel clock active on Falling edge */
154 #define DCMI_PCKPOLARITY_RISING ((uint32_t)DCMI_CR_PCKPOL) /*!< Pixel clock active on Rising edge */
155
156 /**
157 * @}
158 */
159
160 /** @defgroup DCMI_VSYNC_Polarity DCMI VSYNC Polarity
161 * @{
162 */
163 #define DCMI_VSPOLARITY_LOW 0x00000000U /*!< Vertical synchronization active Low */
164 #define DCMI_VSPOLARITY_HIGH ((uint32_t)DCMI_CR_VSPOL) /*!< Vertical synchronization active High */
165
166 /**
167 * @}
168 */
169
170 /** @defgroup DCMI_HSYNC_Polarity DCMI HSYNC Polarity
171 * @{
172 */
173 #define DCMI_HSPOLARITY_LOW 0x00000000U /*!< Horizontal synchronization active Low */
174 #define DCMI_HSPOLARITY_HIGH ((uint32_t)DCMI_CR_HSPOL) /*!< Horizontal synchronization active High */
175
176 /**
177 * @}
178 */
179
180 /** @defgroup DCMI_MODE_JPEG DCMI MODE JPEG
181 * @{
182 */
183 #define DCMI_JPEG_DISABLE 0x00000000U /*!< Mode JPEG Disabled */
184 #define DCMI_JPEG_ENABLE ((uint32_t)DCMI_CR_JPEG) /*!< Mode JPEG Enabled */
185
186 /**
187 * @}
188 */
189
190 /** @defgroup DCMI_Capture_Rate DCMI Capture Rate
191 * @{
192 */
193 #define DCMI_CR_ALL_FRAME 0x00000000U /*!< All frames are captured */
194 #define DCMI_CR_ALTERNATE_2_FRAME ((uint32_t)DCMI_CR_FCRC_0) /*!< Every alternate frame captured */
195 #define DCMI_CR_ALTERNATE_4_FRAME ((uint32_t)DCMI_CR_FCRC_1) /*!< One frame in 4 frames captured */
196
197 /**
198 * @}
199 */
200
201 /** @defgroup DCMI_Extended_Data_Mode DCMI Extended Data Mode
202 * @{
203 */
204 #define DCMI_EXTEND_DATA_8B 0x00000000U /*!< Interface captures 8-bit data on every pixel clock */
205 #define DCMI_EXTEND_DATA_10B ((uint32_t)DCMI_CR_EDM_0) /*!< Interface captures 10-bit data on every pixel clock */
206 #define DCMI_EXTEND_DATA_12B ((uint32_t)DCMI_CR_EDM_1) /*!< Interface captures 12-bit data on every pixel clock */
207 #define DCMI_EXTEND_DATA_14B ((uint32_t)(DCMI_CR_EDM_0 | DCMI_CR_EDM_1)) /*!< Interface captures 14-bit data on every pixel clock */
208
209 /**
210 * @}
211 */
212
213 /** @defgroup DCMI_Window_Coordinate DCMI Window Coordinate
214 * @{
215 */
216 #define DCMI_WINDOW_COORDINATE 0x3FFFU /*!< Window coordinate */
217
218 /**
219 * @}
220 */
221
222 /** @defgroup DCMI_Window_Height DCMI Window Height
223 * @{
224 */
225 #define DCMI_WINDOW_HEIGHT 0x1FFFU /*!< Window Height */
226
227 /**
228 * @}
229 */
230
231 /** @defgroup DCMI_Window_Vertical_Line DCMI Window Vertical Line
232 * @{
233 */
234 #define DCMI_POSITION_CWSIZE_VLINE (uint32_t)DCMI_CWSIZE_VLINE_Pos /*!< Required left shift to set crop window vertical line count */
235 #define DCMI_POSITION_CWSTRT_VST (uint32_t)DCMI_CWSTRT_VST_Pos /*!< Required left shift to set crop window vertical start line count */
236
237 /**
238 * @}
239 */
240
241 /** @defgroup DCMI_interrupt_sources DCMI interrupt sources
242 * @{
243 */
244 #define DCMI_IT_FRAME ((uint32_t)DCMI_IER_FRAME_IE) /*!< Capture complete interrupt */
245 #define DCMI_IT_OVR ((uint32_t)DCMI_IER_OVR_IE) /*!< Overrun interrupt */
246 #define DCMI_IT_ERR ((uint32_t)DCMI_IER_ERR_IE) /*!< Synchronization error interrupt */
247 #define DCMI_IT_VSYNC ((uint32_t)DCMI_IER_VSYNC_IE) /*!< VSYNC interrupt */
248 #define DCMI_IT_LINE ((uint32_t)DCMI_IER_LINE_IE) /*!< Line interrupt */
249 /**
250 * @}
251 */
252
253 /** @defgroup DCMI_Flags DCMI Flags
254 * @{
255 */
256
257 /**
258 * @brief DCMI SR register
259 */
260 #define DCMI_FLAG_HSYNC ((uint32_t)DCMI_SR_INDEX|DCMI_SR_HSYNC) /*!< HSYNC pin state (active line / synchronization between lines) */
261 #define DCMI_FLAG_VSYNC ((uint32_t)DCMI_SR_INDEX|DCMI_SR_VSYNC) /*!< VSYNC pin state (active frame / synchronization between frames) */
262 #define DCMI_FLAG_FNE ((uint32_t)DCMI_SR_INDEX|DCMI_SR_FNE) /*!< FIFO not empty flag */
263 /**
264 * @brief DCMI RIS register
265 */
266 #define DCMI_FLAG_FRAMERI ((uint32_t)DCMI_RISR_FRAME_RIS) /*!< Frame capture complete interrupt flag */
267 #define DCMI_FLAG_OVRRI ((uint32_t)DCMI_RISR_OVR_RIS) /*!< Overrun interrupt flag */
268 #define DCMI_FLAG_ERRRI ((uint32_t)DCMI_RISR_ERR_RIS) /*!< Synchronization error interrupt flag */
269 #define DCMI_FLAG_VSYNCRI ((uint32_t)DCMI_RISR_VSYNC_RIS) /*!< VSYNC interrupt flag */
270 #define DCMI_FLAG_LINERI ((uint32_t)DCMI_RISR_LINE_RIS) /*!< Line interrupt flag */
271 /**
272 * @brief DCMI MIS register
273 */
274 #define DCMI_FLAG_FRAMEMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_FRAME_MIS) /*!< DCMI Frame capture complete masked interrupt status */
275 #define DCMI_FLAG_OVRMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_OVR_MIS ) /*!< DCMI Overrun masked interrupt status */
276 #define DCMI_FLAG_ERRMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_ERR_MIS ) /*!< DCMI Synchronization error masked interrupt status */
277 #define DCMI_FLAG_VSYNCMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_VSYNC_MIS) /*!< DCMI VSYNC masked interrupt status */
278 #define DCMI_FLAG_LINEMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_LINE_MIS ) /*!< DCMI Line masked interrupt status */
279 /**
280 * @}
281 */
282
283 /**
284 * @}
285 */
286
287 /* Exported macro ------------------------------------------------------------*/
288 /** @defgroup DCMI_Exported_Macros DCMI Exported Macros
289 * @{
290 */
291
292 /** @brief Reset DCMI handle state
293 * @param __HANDLE__ specifies the DCMI handle.
294 * @retval None
295 */
296 #define __HAL_DCMI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DCMI_STATE_RESET)
297
298 /**
299 * @brief Enable the DCMI.
300 * @param __HANDLE__ DCMI handle
301 * @retval None
302 */
303 #define __HAL_DCMI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= DCMI_CR_ENABLE)
304
305 /**
306 * @brief Disable the DCMI.
307 * @param __HANDLE__ DCMI handle
308 * @retval None
309 */
310 #define __HAL_DCMI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(DCMI_CR_ENABLE))
311
312 /* Interrupt & Flag management */
313 /**
314 * @brief Get the DCMI pending flag.
315 * @param __HANDLE__ DCMI handle
316 * @param __FLAG__ Get the specified flag.
317 * This parameter can be one of the following values (no combination allowed)
318 * @arg DCMI_FLAG_HSYNC: HSYNC pin state (active line / synchronization between lines)
319 * @arg DCMI_FLAG_VSYNC: VSYNC pin state (active frame / synchronization between frames)
320 * @arg DCMI_FLAG_FNE: FIFO empty flag
321 * @arg DCMI_FLAG_FRAMERI: Frame capture complete flag mask
322 * @arg DCMI_FLAG_OVRRI: Overrun flag mask
323 * @arg DCMI_FLAG_ERRRI: Synchronization error flag mask
324 * @arg DCMI_FLAG_VSYNCRI: VSYNC flag mask
325 * @arg DCMI_FLAG_LINERI: Line flag mask
326 * @arg DCMI_FLAG_FRAMEMI: DCMI Capture complete masked interrupt status
327 * @arg DCMI_FLAG_OVRMI: DCMI Overrun masked interrupt status
328 * @arg DCMI_FLAG_ERRMI: DCMI Synchronization error masked interrupt status
329 * @arg DCMI_FLAG_VSYNCMI: DCMI VSYNC masked interrupt status
330 * @arg DCMI_FLAG_LINEMI: DCMI Line masked interrupt status
331 * @retval The state of FLAG.
332 */
333 #define __HAL_DCMI_GET_FLAG(__HANDLE__, __FLAG__)\
334 ((((__FLAG__) & (DCMI_SR_INDEX|DCMI_MIS_INDEX)) == 0x0U)? ((__HANDLE__)->Instance->RISR & (__FLAG__)) :\
335 (((__FLAG__) & DCMI_SR_INDEX) == 0x0U)? ((__HANDLE__)->Instance->MISR & (__FLAG__)) : ((__HANDLE__)->Instance->SR & (__FLAG__)))
336
337 /**
338 * @brief Clear the DCMI pending flags.
339 * @param __HANDLE__ DCMI handle
340 * @param __FLAG__ specifies the flag to clear.
341 * This parameter can be any combination of the following values:
342 * @arg DCMI_FLAG_FRAMERI: Frame capture complete flag mask
343 * @arg DCMI_FLAG_OVRRI: Overrun flag mask
344 * @arg DCMI_FLAG_ERRRI: Synchronization error flag mask
345 * @arg DCMI_FLAG_VSYNCRI: VSYNC flag mask
346 * @arg DCMI_FLAG_LINERI: Line flag mask
347 * @retval None
348 */
349 #define __HAL_DCMI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
350
351 /**
352 * @brief Enable the specified DCMI interrupts.
353 * @param __HANDLE__ DCMI handle
354 * @param __INTERRUPT__ specifies the DCMI interrupt sources to be enabled.
355 * This parameter can be any combination of the following values:
356 * @arg DCMI_IT_FRAME: Frame capture complete interrupt mask
357 * @arg DCMI_IT_OVR: Overrun interrupt mask
358 * @arg DCMI_IT_ERR: Synchronization error interrupt mask
359 * @arg DCMI_IT_VSYNC: VSYNC interrupt mask
360 * @arg DCMI_IT_LINE: Line interrupt mask
361 * @retval None
362 */
363 #define __HAL_DCMI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
364
365 /**
366 * @brief Disable the specified DCMI interrupts.
367 * @param __HANDLE__ DCMI handle
368 * @param __INTERRUPT__ specifies the DCMI interrupt sources to be enabled.
369 * This parameter can be any combination of the following values:
370 * @arg DCMI_IT_FRAME: Frame capture complete interrupt mask
371 * @arg DCMI_IT_OVR: Overrun interrupt mask
372 * @arg DCMI_IT_ERR: Synchronization error interrupt mask
373 * @arg DCMI_IT_VSYNC: VSYNC interrupt mask
374 * @arg DCMI_IT_LINE: Line interrupt mask
375 * @retval None
376 */
377 #define __HAL_DCMI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= ~(__INTERRUPT__))
378
379 /**
380 * @brief Check whether the specified DCMI interrupt has occurred or not.
381 * @param __HANDLE__ DCMI handle
382 * @param __INTERRUPT__ specifies the DCMI interrupt source to check.
383 * This parameter can be one of the following values:
384 * @arg DCMI_IT_FRAME: Frame capture complete interrupt mask
385 * @arg DCMI_IT_OVR: Overrun interrupt mask
386 * @arg DCMI_IT_ERR: Synchronization error interrupt mask
387 * @arg DCMI_IT_VSYNC: VSYNC interrupt mask
388 * @arg DCMI_IT_LINE: Line interrupt mask
389 * @retval The state of INTERRUPT.
390 */
391 #define __HAL_DCMI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->MISR & (__INTERRUPT__))
392
393 /**
394 * @}
395 */
396
397 /* Exported functions --------------------------------------------------------*/
398 /** @addtogroup DCMI_Exported_Functions DCMI Exported Functions
399 * @{
400 */
401
402 /** @addtogroup DCMI_Exported_Functions_Group1 Initialization and Configuration functions
403 * @{
404 */
405 /* Initialization and de-initialization functions *****************************/
406 HAL_StatusTypeDef HAL_DCMI_Init(DCMI_HandleTypeDef *hdcmi);
407 HAL_StatusTypeDef HAL_DCMI_DeInit(DCMI_HandleTypeDef *hdcmi);
408 void HAL_DCMI_MspInit(DCMI_HandleTypeDef* hdcmi);
409 void HAL_DCMI_MspDeInit(DCMI_HandleTypeDef* hdcmi);
410 /**
411 * @}
412 */
413
414 /** @addtogroup DCMI_Exported_Functions_Group2 IO operation functions
415 * @{
416 */
417 /* IO operation functions *****************************************************/
418 HAL_StatusTypeDef HAL_DCMI_Start_DMA(DCMI_HandleTypeDef* hdcmi, uint32_t DCMI_Mode, uint32_t pData, uint32_t Length);
419 HAL_StatusTypeDef HAL_DCMI_Stop(DCMI_HandleTypeDef* hdcmi);
420 HAL_StatusTypeDef HAL_DCMI_Suspend(DCMI_HandleTypeDef* hdcmi);
421 HAL_StatusTypeDef HAL_DCMI_Resume(DCMI_HandleTypeDef* hdcmi);
422 void HAL_DCMI_ErrorCallback(DCMI_HandleTypeDef *hdcmi);
423 void HAL_DCMI_LineEventCallback(DCMI_HandleTypeDef *hdcmi);
424 void HAL_DCMI_FrameEventCallback(DCMI_HandleTypeDef *hdcmi);
425 void HAL_DCMI_VsyncEventCallback(DCMI_HandleTypeDef *hdcmi);
426 void HAL_DCMI_VsyncCallback(DCMI_HandleTypeDef *hdcmi);
427 void HAL_DCMI_HsyncCallback(DCMI_HandleTypeDef *hdcmi);
428 void HAL_DCMI_IRQHandler(DCMI_HandleTypeDef *hdcmi);
429 /**
430 * @}
431 */
432
433 /** @addtogroup DCMI_Exported_Functions_Group3 Peripheral Control functions
434 * @{
435 */
436 /* Peripheral Control functions ***********************************************/
437 HAL_StatusTypeDef HAL_DCMI_ConfigCrop(DCMI_HandleTypeDef *hdcmi, uint32_t X0, uint32_t Y0, uint32_t XSize, uint32_t YSize);
438 HAL_StatusTypeDef HAL_DCMI_EnableCrop(DCMI_HandleTypeDef *hdcmi);
439 HAL_StatusTypeDef HAL_DCMI_DisableCrop(DCMI_HandleTypeDef *hdcmi);
440 /**
441 * @}
442 */
443
444 /** @addtogroup DCMI_Exported_Functions_Group4 Peripheral State functions
445 * @{
446 */
447 /* Peripheral State functions *************************************************/
448 HAL_DCMI_StateTypeDef HAL_DCMI_GetState(DCMI_HandleTypeDef *hdcmi);
449 uint32_t HAL_DCMI_GetError(DCMI_HandleTypeDef *hdcmi);
450 /**
451 * @}
452 */
453
454 /**
455 * @}
456 */
457
458 /* Private types -------------------------------------------------------------*/
459 /* Private variables ---------------------------------------------------------*/
460 /* Private constants ---------------------------------------------------------*/
461 /** @defgroup DCMI_Private_Constants DCMI Private Constants
462 * @{
463 */
464 #define DCMI_MIS_INDEX 0x1000U /*!< DCMI MIS register index */
465 #define DCMI_SR_INDEX 0x2000U /*!< DCMI SR register index */
466 /**
467 * @}
468 */
469 /* Private macro -------------------------------------------------------------*/
470 /** @defgroup DCMI_Private_Macros DCMI Private Macros
471 * @{
472 */
473 #define IS_DCMI_CAPTURE_MODE(MODE)(((MODE) == DCMI_MODE_CONTINUOUS) || \
474 ((MODE) == DCMI_MODE_SNAPSHOT))
475
476 #define IS_DCMI_SYNCHRO(MODE)(((MODE) == DCMI_SYNCHRO_HARDWARE) || \
477 ((MODE) == DCMI_SYNCHRO_EMBEDDED))
478
479 #define IS_DCMI_PCKPOLARITY(POLARITY)(((POLARITY) == DCMI_PCKPOLARITY_FALLING) || \
480 ((POLARITY) == DCMI_PCKPOLARITY_RISING))
481
482 #define IS_DCMI_VSPOLARITY(POLARITY)(((POLARITY) == DCMI_VSPOLARITY_LOW) || \
483 ((POLARITY) == DCMI_VSPOLARITY_HIGH))
484
485 #define IS_DCMI_HSPOLARITY(POLARITY)(((POLARITY) == DCMI_HSPOLARITY_LOW) || \
486 ((POLARITY) == DCMI_HSPOLARITY_HIGH))
487
488 #define IS_DCMI_MODE_JPEG(JPEG_MODE)(((JPEG_MODE) == DCMI_JPEG_DISABLE) || \
489 ((JPEG_MODE) == DCMI_JPEG_ENABLE))
490
491 #define IS_DCMI_CAPTURE_RATE(RATE) (((RATE) == DCMI_CR_ALL_FRAME) || \
492 ((RATE) == DCMI_CR_ALTERNATE_2_FRAME) || \
493 ((RATE) == DCMI_CR_ALTERNATE_4_FRAME))
494
495 #define IS_DCMI_EXTENDED_DATA(DATA)(((DATA) == DCMI_EXTEND_DATA_8B) || \
496 ((DATA) == DCMI_EXTEND_DATA_10B) || \
497 ((DATA) == DCMI_EXTEND_DATA_12B) || \
498 ((DATA) == DCMI_EXTEND_DATA_14B))
499
500 #define IS_DCMI_WINDOW_COORDINATE(COORDINATE) ((COORDINATE) <= DCMI_WINDOW_COORDINATE)
501
502 #define IS_DCMI_WINDOW_HEIGHT(HEIGHT) ((HEIGHT) <= DCMI_WINDOW_HEIGHT)
503
504 /**
505 * @}
506 */
507
508 /* Private functions ---------------------------------------------------------*/
509 /** @addtogroup DCMI_Private_Functions DCMI Private Functions
510 * @{
511 */
512
513 /**
514 * @}
515 */
516
517 #endif /* STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx ||\
518 STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx ||\
519 STM32F479xx */
520
521 /**
522 * @}
523 */
524
525 /**
526 * @}
527 */
528
529 #ifdef __cplusplus
530 }
531 #endif
532
533 #endif /* __STM32F4xx_HAL_DCMI_H */
534
535 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/