comparison Common/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cryp.h @ 128:c78bcbd5deda FlipDisplay

Added current STM32 standandard libraries in version independend folder structure
author Ideenmodellierer
date Sun, 17 Feb 2019 21:12:22 +0100
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127:1369f8660eaa 128:c78bcbd5deda
1 /**
2 ******************************************************************************
3 * @file stm32f4xx_hal_cryp.h
4 * @author MCD Application Team
5 * @brief Header file of CRYP HAL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
10 *
11 * Redistribution and use in source and binary forms, with or without modification,
12 * are permitted provided that the following conditions are met:
13 * 1. Redistributions of source code must retain the above copyright notice,
14 * this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright notice,
16 * this list of conditions and the following disclaimer in the documentation
17 * and/or other materials provided with the distribution.
18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 ******************************************************************************
34 */
35
36 /* Define to prevent recursive inclusion -------------------------------------*/
37 #ifndef __STM32F4xx_HAL_CRYP_H
38 #define __STM32F4xx_HAL_CRYP_H
39
40 #ifdef __cplusplus
41 extern "C" {
42 #endif
43
44 /* Includes ------------------------------------------------------------------*/
45 #include "stm32f4xx_hal_def.h"
46
47
48 #if defined(CRYP)
49
50 /** @addtogroup STM32F4xx_HAL_Driver
51 * @{
52 */
53
54 /** @addtogroup CRYP
55 * @{
56 */
57
58 /* Exported types ------------------------------------------------------------*/
59
60 /** @defgroup CRYP_Exported_Types CRYP Exported Types
61 * @{
62 */
63
64 /** @defgroup CRYP_Exported_Types_Group1 CRYP Configuration Structure definition
65 * @{
66 */
67
68 typedef struct
69 {
70 uint32_t DataType; /*!< 32-bit data, 16-bit data, 8-bit data or 1-bit string.
71 This parameter can be a value of @ref CRYP_Data_Type */
72
73 uint32_t KeySize; /*!< Used only in AES mode only : 128, 192 or 256 bit key length.
74 This parameter can be a value of @ref CRYP_Key_Size */
75
76 uint8_t* pKey; /*!< The key used for encryption/decryption */
77
78 uint8_t* pInitVect; /*!< The initialization vector used also as initialization
79 counter in CTR mode */
80
81 uint8_t IVSize; /*!< The size of initialization vector.
82 This parameter (called nonce size in CCM) is used only
83 in AES-128/192/256 encryption/decryption CCM mode */
84
85 uint8_t TagSize; /*!< The size of returned authentication TAG.
86 This parameter is used only in AES-128/192/256
87 encryption/decryption CCM mode */
88
89 uint8_t* Header; /*!< The header used in GCM and CCM modes */
90
91 uint32_t HeaderSize; /*!< The size of header buffer in bytes */
92
93 uint8_t* pScratch; /*!< Scratch buffer used to append the header. It's size must be equal to header size + 21 bytes.
94 This parameter is used only in AES-128/192/256 encryption/decryption CCM mode */
95 }CRYP_InitTypeDef;
96
97 /**
98 * @}
99 */
100
101 /** @defgroup CRYP_Exported_Types_Group2 CRYP State structures definition
102 * @{
103 */
104
105
106 typedef enum
107 {
108 HAL_CRYP_STATE_RESET = 0x00U, /*!< CRYP not yet initialized or disabled */
109 HAL_CRYP_STATE_READY = 0x01U, /*!< CRYP initialized and ready for use */
110 HAL_CRYP_STATE_BUSY = 0x02U, /*!< CRYP internal processing is ongoing */
111 HAL_CRYP_STATE_TIMEOUT = 0x03U, /*!< CRYP timeout state */
112 HAL_CRYP_STATE_ERROR = 0x04U /*!< CRYP error state */
113 }HAL_CRYP_STATETypeDef;
114
115 /**
116 * @}
117 */
118
119 /** @defgroup CRYP_Exported_Types_Group3 CRYP phase structures definition
120 * @{
121 */
122
123
124 typedef enum
125 {
126 HAL_CRYP_PHASE_READY = 0x01U, /*!< CRYP peripheral is ready for initialization. */
127 HAL_CRYP_PHASE_PROCESS = 0x02U, /*!< CRYP peripheral is in processing phase */
128 HAL_CRYP_PHASE_FINAL = 0x03U /*!< CRYP peripheral is in final phase
129 This is relevant only with CCM and GCM modes */
130 }HAL_PhaseTypeDef;
131
132 /**
133 * @}
134 */
135
136 /** @defgroup CRYP_Exported_Types_Group4 CRYP handle Structure definition
137 * @{
138 */
139
140 typedef struct
141 {
142 CRYP_TypeDef *Instance; /*!< CRYP registers base address */
143
144 CRYP_InitTypeDef Init; /*!< CRYP required parameters */
145
146 uint8_t *pCrypInBuffPtr; /*!< Pointer to CRYP processing (encryption, decryption,...) buffer */
147
148 uint8_t *pCrypOutBuffPtr; /*!< Pointer to CRYP processing (encryption, decryption,...) buffer */
149
150 __IO uint16_t CrypInCount; /*!< Counter of inputed data */
151
152 __IO uint16_t CrypOutCount; /*!< Counter of output data */
153
154 HAL_StatusTypeDef Status; /*!< CRYP peripheral status */
155
156 HAL_PhaseTypeDef Phase; /*!< CRYP peripheral phase */
157
158 DMA_HandleTypeDef *hdmain; /*!< CRYP In DMA handle parameters */
159
160 DMA_HandleTypeDef *hdmaout; /*!< CRYP Out DMA handle parameters */
161
162 HAL_LockTypeDef Lock; /*!< CRYP locking object */
163
164 __IO HAL_CRYP_STATETypeDef State; /*!< CRYP peripheral state */
165 }CRYP_HandleTypeDef;
166
167 /**
168 * @}
169 */
170
171 /**
172 * @}
173 */
174
175 /* Exported constants --------------------------------------------------------*/
176 /** @defgroup CRYP_Exported_Constants CRYP Exported Constants
177 * @{
178 */
179
180 /** @defgroup CRYP_Key_Size CRYP Key Size
181 * @{
182 */
183 #define CRYP_KEYSIZE_128B 0x00000000U
184 #define CRYP_KEYSIZE_192B CRYP_CR_KEYSIZE_0
185 #define CRYP_KEYSIZE_256B CRYP_CR_KEYSIZE_1
186 /**
187 * @}
188 */
189
190 /** @defgroup CRYP_Data_Type CRYP Data Type
191 * @{
192 */
193 #define CRYP_DATATYPE_32B 0x00000000U
194 #define CRYP_DATATYPE_16B CRYP_CR_DATATYPE_0
195 #define CRYP_DATATYPE_8B CRYP_CR_DATATYPE_1
196 #define CRYP_DATATYPE_1B CRYP_CR_DATATYPE
197 /**
198 * @}
199 */
200
201 /** @defgroup CRYP_Exported_Constants_Group3 CRYP CRYP_AlgoModeDirection
202 * @{
203 */
204 #define CRYP_CR_ALGOMODE_DIRECTION 0x0008003CU
205 #define CRYP_CR_ALGOMODE_TDES_ECB_ENCRYPT 0x00000000U
206 #define CRYP_CR_ALGOMODE_TDES_ECB_DECRYPT 0x00000004U
207 #define CRYP_CR_ALGOMODE_TDES_CBC_ENCRYPT 0x00000008U
208 #define CRYP_CR_ALGOMODE_TDES_CBC_DECRYPT 0x0000000CU
209 #define CRYP_CR_ALGOMODE_DES_ECB_ENCRYPT 0x00000010U
210 #define CRYP_CR_ALGOMODE_DES_ECB_DECRYPT 0x00000014U
211 #define CRYP_CR_ALGOMODE_DES_CBC_ENCRYPT 0x00000018U
212 #define CRYP_CR_ALGOMODE_DES_CBC_DECRYPT 0x0000001CU
213 #define CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT 0x00000020U
214 #define CRYP_CR_ALGOMODE_AES_ECB_DECRYPT 0x00000024U
215 #define CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT 0x00000028U
216 #define CRYP_CR_ALGOMODE_AES_CBC_DECRYPT 0x0000002CU
217 #define CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT 0x00000030U
218 #define CRYP_CR_ALGOMODE_AES_CTR_DECRYPT 0x00000034U
219 /**
220 * @}
221 */
222
223 /** @defgroup CRYP_Exported_Constants_Group4 CRYP CRYP_Interrupt
224 * @{
225 */
226 #define CRYP_IT_INI ((uint32_t)CRYP_IMSCR_INIM) /*!< Input FIFO Interrupt */
227 #define CRYP_IT_OUTI ((uint32_t)CRYP_IMSCR_OUTIM) /*!< Output FIFO Interrupt */
228 /**
229 * @}
230 */
231
232 /** @defgroup CRYP_Exported_Constants_Group5 CRYP CRYP_Flags
233 * @{
234 */
235 #define CRYP_FLAG_BUSY 0x00000010U /*!< The CRYP core is currently
236 processing a block of data
237 or a key preparation (for
238 AES decryption). */
239 #define CRYP_FLAG_IFEM 0x00000001U /*!< Input FIFO is empty */
240 #define CRYP_FLAG_IFNF 0x00000002U /*!< Input FIFO is not Full */
241 #define CRYP_FLAG_OFNE 0x00000004U /*!< Output FIFO is not empty */
242 #define CRYP_FLAG_OFFU 0x00000008U /*!< Output FIFO is Full */
243 #define CRYP_FLAG_OUTRIS 0x01000002U /*!< Output FIFO service raw
244 interrupt status */
245 #define CRYP_FLAG_INRIS 0x01000001U /*!< Input FIFO service raw
246 interrupt status */
247 /**
248 * @}
249 */
250
251 /**
252 * @}
253 */
254
255 /* Exported macro ------------------------------------------------------------*/
256 /** @defgroup CRYP_Exported_Macros CRYP Exported Macros
257 * @{
258 */
259
260 /** @brief Reset CRYP handle state
261 * @param __HANDLE__ specifies the CRYP handle.
262 * @retval None
263 */
264 #define __HAL_CRYP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRYP_STATE_RESET)
265
266 /**
267 * @brief Enable/Disable the CRYP peripheral.
268 * @param __HANDLE__ specifies the CRYP handle.
269 * @retval None
270 */
271 #define __HAL_CRYP_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRYP_CR_CRYPEN)
272 #define __HAL_CRYP_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~CRYP_CR_CRYPEN)
273
274 /**
275 * @brief Flush the data FIFO.
276 * @param __HANDLE__ specifies the CRYP handle.
277 * @retval None
278 */
279 #define __HAL_CRYP_FIFO_FLUSH(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRYP_CR_FFLUSH)
280
281 /**
282 * @brief Set the algorithm mode: AES-ECB, AES-CBC, AES-CTR, DES-ECB, DES-CBC.
283 * @param __HANDLE__ specifies the CRYP handle.
284 * @param MODE The algorithm mode.
285 * @retval None
286 */
287 #define __HAL_CRYP_SET_MODE(__HANDLE__, MODE) ((__HANDLE__)->Instance->CR |= (uint32_t)(MODE))
288
289 /** @brief Check whether the specified CRYP flag is set or not.
290 * @param __HANDLE__ specifies the CRYP handle.
291 * @param __FLAG__ specifies the flag to check.
292 * This parameter can be one of the following values:
293 * @arg CRYP_FLAG_BUSY: The CRYP core is currently processing a block of data
294 * or a key preparation (for AES decryption).
295 * @arg CRYP_FLAG_IFEM: Input FIFO is empty
296 * @arg CRYP_FLAG_IFNF: Input FIFO is not full
297 * @arg CRYP_FLAG_INRIS: Input FIFO service raw interrupt is pending
298 * @arg CRYP_FLAG_OFNE: Output FIFO is not empty
299 * @arg CRYP_FLAG_OFFU: Output FIFO is full
300 * @arg CRYP_FLAG_OUTRIS: Input FIFO service raw interrupt is pending
301 * @retval The new state of __FLAG__ (TRUE or FALSE).
302 */
303
304 #define __HAL_CRYP_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 24U)) == 0x01U)?((((__HANDLE__)->Instance->RISR) & ((__FLAG__) & CRYP_FLAG_MASK)) == ((__FLAG__) & CRYP_FLAG_MASK)): \
305 ((((__HANDLE__)->Instance->RISR) & ((__FLAG__) & CRYP_FLAG_MASK)) == ((__FLAG__) & CRYP_FLAG_MASK)))
306
307 /** @brief Check whether the specified CRYP interrupt is set or not.
308 * @param __HANDLE__ specifies the CRYP handle.
309 * @param __INTERRUPT__ specifies the interrupt to check.
310 * This parameter can be one of the following values:
311 * @arg CRYP_IT_INRIS: Input FIFO service raw interrupt is pending
312 * @arg CRYP_IT_OUTRIS: Output FIFO service raw interrupt is pending
313 * @retval The new state of __INTERRUPT__ (TRUE or FALSE).
314 */
315 #define __HAL_CRYP_GET_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->MISR & (__INTERRUPT__)) == (__INTERRUPT__))
316
317 /**
318 * @brief Enable the CRYP interrupt.
319 * @param __HANDLE__ specifies the CRYP handle.
320 * @param __INTERRUPT__ CRYP Interrupt.
321 * @retval None
322 */
323 #define __HAL_CRYP_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IMSCR) |= (__INTERRUPT__))
324
325 /**
326 * @brief Disable the CRYP interrupt.
327 * @param __HANDLE__ specifies the CRYP handle.
328 * @param __INTERRUPT__ CRYP interrupt.
329 * @retval None
330 */
331 #define __HAL_CRYP_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IMSCR) &= ~(__INTERRUPT__))
332
333 /**
334 * @}
335 */
336
337 /* Include CRYP HAL Extension module */
338 #include "stm32f4xx_hal_cryp_ex.h"
339
340 /* Exported functions --------------------------------------------------------*/
341 /** @defgroup CRYP_Exported_Functions CRYP Exported Functions
342 * @{
343 */
344
345 /** @addtogroup CRYP_Exported_Functions_Group1
346 * @{
347 */
348 HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp);
349 HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp);
350 void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp);
351 void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp);
352 /**
353 * @}
354 */
355
356 /** @addtogroup CRYP_Exported_Functions_Group2
357 * @{
358 */
359 /* AES encryption/decryption using polling ***********************************/
360 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout);
361 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout);
362 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout);
363 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout);
364 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout);
365 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout);
366
367 /* AES encryption/decryption using interrupt *********************************/
368 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
369 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
370 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
371 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
372 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
373 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
374
375 /* AES encryption/decryption using DMA ***************************************/
376 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
377 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
378 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
379 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
380 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
381 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
382 /**
383 * @}
384 */
385
386 /** @addtogroup CRYP_Exported_Functions_Group3
387 * @{
388 */
389 /* DES encryption/decryption using polling ***********************************/
390 HAL_StatusTypeDef HAL_CRYP_DESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout);
391 HAL_StatusTypeDef HAL_CRYP_DESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout);
392 HAL_StatusTypeDef HAL_CRYP_DESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout);
393 HAL_StatusTypeDef HAL_CRYP_DESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout);
394
395 /* DES encryption/decryption using interrupt *********************************/
396 HAL_StatusTypeDef HAL_CRYP_DESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
397 HAL_StatusTypeDef HAL_CRYP_DESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
398 HAL_StatusTypeDef HAL_CRYP_DESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
399 HAL_StatusTypeDef HAL_CRYP_DESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
400
401 /* DES encryption/decryption using DMA ***************************************/
402 HAL_StatusTypeDef HAL_CRYP_DESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
403 HAL_StatusTypeDef HAL_CRYP_DESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
404 HAL_StatusTypeDef HAL_CRYP_DESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
405 HAL_StatusTypeDef HAL_CRYP_DESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
406 /**
407 * @}
408 */
409
410 /** @addtogroup CRYP_Exported_Functions_Group4
411 * @{
412 */
413 /* TDES encryption/decryption using polling **********************************/
414 HAL_StatusTypeDef HAL_CRYP_TDESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout);
415 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout);
416 HAL_StatusTypeDef HAL_CRYP_TDESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout);
417 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout);
418
419 /* TDES encryption/decryption using interrupt ********************************/
420 HAL_StatusTypeDef HAL_CRYP_TDESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
421 HAL_StatusTypeDef HAL_CRYP_TDESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
422 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
423 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
424
425 /* TDES encryption/decryption using DMA **************************************/
426 HAL_StatusTypeDef HAL_CRYP_TDESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
427 HAL_StatusTypeDef HAL_CRYP_TDESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
428 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
429 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
430 /**
431 * @}
432 */
433
434 /** @addtogroup CRYP_Exported_Functions_Group5
435 * @{
436 */
437 void HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp);
438 void HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp);
439 void HAL_CRYP_ErrorCallback(CRYP_HandleTypeDef *hcryp);
440 /**
441 * @}
442 */
443
444 /** @addtogroup CRYP_Exported_Functions_Group6
445 * @{
446 */
447 void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp);
448 /**
449 * @}
450 */
451
452 /** @addtogroup CRYP_Exported_Functions_Group7
453 * @{
454 */
455 HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp);
456 /**
457 * @}
458 */
459
460 /**
461 * @}
462 */
463
464 /* Private types -------------------------------------------------------------*/
465 /** @defgroup CRYP_Private_Types CRYP Private Types
466 * @{
467 */
468
469 /**
470 * @}
471 */
472
473 /* Private variables ---------------------------------------------------------*/
474 /** @defgroup CRYP_Private_Variables CRYP Private Variables
475 * @{
476 */
477
478 /**
479 * @}
480 */
481
482 /* Private constants ---------------------------------------------------------*/
483 /** @defgroup CRYP_Private_Constants CRYP Private Constants
484 * @{
485 */
486 #define CRYP_FLAG_MASK 0x0000001FU
487 /**
488 * @}
489 */
490
491 /* Private macros ------------------------------------------------------------*/
492 /** @defgroup CRYP_Private_Macros CRYP Private Macros
493 * @{
494 */
495
496 #define IS_CRYP_KEYSIZE(__KEYSIZE__) (((__KEYSIZE__) == CRYP_KEYSIZE_128B) || \
497 ((__KEYSIZE__) == CRYP_KEYSIZE_192B) || \
498 ((__KEYSIZE__) == CRYP_KEYSIZE_256B))
499
500
501 #define IS_CRYP_DATATYPE(__DATATYPE__) (((__DATATYPE__) == CRYP_DATATYPE_32B) || \
502 ((__DATATYPE__) == CRYP_DATATYPE_16B) || \
503 ((__DATATYPE__) == CRYP_DATATYPE_8B) || \
504 ((__DATATYPE__) == CRYP_DATATYPE_1B))
505
506
507 /**
508 * @}
509 */
510
511 /* Private functions ---------------------------------------------------------*/
512 /** @defgroup CRYP_Private_Functions CRYP Private Functions
513 * @{
514 */
515
516 /**
517 * @}
518 */
519
520 #endif /* CRYP */
521
522 #if defined (AES)
523
524 /** @addtogroup STM32F4xx_HAL_Driver
525 * @{
526 */
527
528 /** @addtogroup CRYP
529 * @{
530 */
531
532 /* Exported types ------------------------------------------------------------*/
533 /** @defgroup CRYP_Exported_Types CRYP Exported Types
534 * @{
535 */
536
537 /**
538 * @brief CRYP Configuration Structure definition
539 */
540 typedef struct
541 {
542 uint32_t DataType; /*!< 32-bit data, 16-bit data, 8-bit data or 1-bit string.
543 This parameter can be a value of @ref CRYP_Data_Type */
544
545 uint32_t KeySize; /*!< 128 or 256-bit key length.
546 This parameter can be a value of @ref CRYP_Key_Size */
547
548 uint32_t OperatingMode; /*!< AES operating mode.
549 This parameter can be a value of @ref CRYP_AES_OperatingMode */
550
551 uint32_t ChainingMode; /*!< AES chaining mode.
552 This parameter can be a value of @ref CRYP_AES_ChainingMode */
553
554 uint32_t KeyWriteFlag; /*!< Allows to bypass or not key write-up before decryption.
555 This parameter can be a value of @ref CRYP_Key_Write */
556
557 uint32_t GCMCMACPhase; /*!< Indicates the processing phase of the Galois Counter Mode (GCM),
558 Galois Message Authentication Code (GMAC) or Cipher Message
559 Authentication Code (CMAC) or Counter with Cipher Mode (CCM) when
560 the latter is applicable.
561 This parameter can be a value of @ref CRYP_GCM_CMAC_Phase */
562
563 uint8_t* pKey; /*!< Encryption/Decryption Key */
564
565 uint8_t* pInitVect; /*!< Initialization Vector used for CTR, CBC, GCM/GMAC, CMAC,
566 (and CCM when applicable) modes */
567
568 uint8_t* Header; /*!< Header used in GCM/GMAC, CMAC (and CCM when applicable) modes */
569
570 uint64_t HeaderSize; /*!< Header size in bytes */
571
572 }CRYP_InitTypeDef;
573
574 /**
575 * @brief HAL CRYP State structures definition
576 */
577 typedef enum
578 {
579 HAL_CRYP_STATE_RESET = 0x00U, /*!< CRYP not yet initialized or disabled */
580 HAL_CRYP_STATE_READY = 0x01U, /*!< CRYP initialized and ready for use */
581 HAL_CRYP_STATE_BUSY = 0x02U, /*!< CRYP internal processing is ongoing */
582 HAL_CRYP_STATE_TIMEOUT = 0x03U, /*!< CRYP timeout state */
583 HAL_CRYP_STATE_ERROR = 0x04U, /*!< CRYP error state */
584 HAL_CRYP_STATE_SUSPENDED = 0x05U /*!< CRYP suspended */
585 }HAL_CRYP_STATETypeDef;
586
587 /**
588 * @brief HAL CRYP phase structures definition
589 */
590 typedef enum
591 {
592 HAL_CRYP_PHASE_READY = 0x01U, /*!< CRYP peripheral is ready for initialization. */
593 HAL_CRYP_PHASE_PROCESS = 0x02U, /*!< CRYP peripheral is in processing phase */
594 HAL_CRYP_PHASE_START = 0x03U, /*!< CRYP peripheral has been initialized but
595 GCM/GMAC/CMAC(/CCM) initialization phase has not started */
596 HAL_CRYP_PHASE_INIT_OVER = 0x04U, /*!< GCM/GMAC/CMAC(/CCM) init phase has been carried out */
597 HAL_CRYP_PHASE_HEADER_OVER = 0x05U, /*!< GCM/GMAC/CMAC(/CCM) header phase has been carried out */
598 HAL_CRYP_PHASE_PAYLOAD_OVER = 0x06U, /*!< GCM(/CCM) payload phase has been carried out */
599 HAL_CRYP_PHASE_FINAL_OVER = 0x07U, /*!< GCM/GMAC/CMAC(/CCM) final phase has been carried out */
600 HAL_CRYP_PHASE_HEADER_SUSPENDED = 0x08U, /*!< GCM/GMAC/CMAC(/CCM) header phase has been suspended */
601 HAL_CRYP_PHASE_PAYLOAD_SUSPENDED = 0x09U, /*!< GCM(/CCM) payload phase has been suspended */
602 HAL_CRYP_PHASE_NOT_USED = 0x0AU /*!< Phase is irrelevant to the current chaining mode */
603 }HAL_PhaseTypeDef;
604
605 /**
606 * @brief HAL CRYP mode suspend definitions
607 */
608 typedef enum
609 {
610 HAL_CRYP_SUSPEND_NONE = 0x00U, /*!< CRYP peripheral suspension not requested */
611 HAL_CRYP_SUSPEND = 0x01U /*!< CRYP peripheral suspension requested */
612 }HAL_SuspendTypeDef;
613
614
615 /**
616 * @brief HAL CRYP Error Codes definition
617 */
618 #define HAL_CRYP_ERROR_NONE 0x00000000U /*!< No error */
619 #define HAL_CRYP_WRITE_ERROR 0x00000001U /*!< Write error */
620 #define HAL_CRYP_READ_ERROR 0x00000002U /*!< Read error */
621 #define HAL_CRYP_DMA_ERROR 0x00000004U /*!< DMA error */
622 #define HAL_CRYP_BUSY_ERROR 0x00000008U /*!< Busy flag error */
623
624 /**
625 * @brief CRYP handle Structure definition
626 */
627 typedef struct
628 {
629 AES_TypeDef *Instance; /*!< Register base address */
630
631 CRYP_InitTypeDef Init; /*!< CRYP initialization parameters */
632
633 uint8_t *pCrypInBuffPtr; /*!< Pointer to CRYP processing (encryption, decryption,...) input buffer */
634
635 uint8_t *pCrypOutBuffPtr; /*!< Pointer to CRYP processing (encryption, decryption,...) output buffer */
636
637 uint32_t CrypInCount; /*!< Input data size in bytes or, after suspension, the remaining
638 number of bytes to process */
639
640 uint32_t CrypOutCount; /*!< Output data size in bytes */
641
642 HAL_PhaseTypeDef Phase; /*!< CRYP peripheral processing phase for GCM, GMAC, CMAC
643 (or CCM when applicable) modes.
644 Indicates the last phase carried out to ease
645 phase transitions */
646
647 DMA_HandleTypeDef *hdmain; /*!< CRYP peripheral Input DMA handle parameters */
648
649 DMA_HandleTypeDef *hdmaout; /*!< CRYP peripheral Output DMA handle parameters */
650
651 HAL_LockTypeDef Lock; /*!< CRYP locking object */
652
653 __IO HAL_CRYP_STATETypeDef State; /*!< CRYP peripheral state */
654
655 __IO uint32_t ErrorCode; /*!< CRYP peripheral error code */
656
657 HAL_SuspendTypeDef SuspendRequest; /*!< CRYP peripheral suspension request flag */
658 }CRYP_HandleTypeDef;
659
660 /**
661 * @}
662 */
663
664
665 /* Exported constants --------------------------------------------------------*/
666 /** @defgroup CRYP_Exported_Constants CRYP Exported Constants
667 * @{
668 */
669
670 /** @defgroup CRYP_Key_Size Key size selection
671 * @{
672 */
673 #define CRYP_KEYSIZE_128B 0x00000000U /*!< 128-bit long key */
674 #define CRYP_KEYSIZE_256B AES_CR_KEYSIZE /*!< 256-bit long key */
675 /**
676 * @}
677 */
678
679 /** @defgroup CRYP_Data_Type AES Data Type selection
680 * @{
681 */
682 #define CRYP_DATATYPE_32B 0x00000000U /*!< 32-bit data type (no swapping) */
683 #define CRYP_DATATYPE_16B AES_CR_DATATYPE_0 /*!< 16-bit data type (half-word swapping) */
684 #define CRYP_DATATYPE_8B AES_CR_DATATYPE_1 /*!< 8-bit data type (byte swapping) */
685 #define CRYP_DATATYPE_1B AES_CR_DATATYPE /*!< 1-bit data type (bit swapping) */
686 /**
687 * @}
688 */
689
690 /** @defgroup CRYP_AES_State AES Enable state
691 * @{
692 */
693 #define CRYP_AES_DISABLE 0x00000000U /*!< Disable AES */
694 #define CRYP_AES_ENABLE AES_CR_EN /*!< Enable AES */
695 /**
696 * @}
697 */
698
699 /** @defgroup CRYP_AES_OperatingMode AES operating mode
700 * @{
701 */
702 #define CRYP_ALGOMODE_ENCRYPT 0x00000000U /*!< Encryption mode */
703 #define CRYP_ALGOMODE_KEYDERIVATION AES_CR_MODE_0 /*!< Key derivation mode */
704 #define CRYP_ALGOMODE_DECRYPT AES_CR_MODE_1 /*!< Decryption */
705 #define CRYP_ALGOMODE_KEYDERIVATION_DECRYPT AES_CR_MODE /*!< Key derivation and decryption */
706 #define CRYP_ALGOMODE_TAG_GENERATION 0x00000000U /*!< GMAC or CMAC authentication tag generation */
707 /**
708 * @}
709 */
710
711 /** @defgroup CRYP_AES_ChainingMode AES chaining mode
712 * @{
713 */
714 #define CRYP_CHAINMODE_AES_ECB 0x00000000U /*!< Electronic codebook chaining algorithm */
715 #define CRYP_CHAINMODE_AES_CBC AES_CR_CHMOD_0 /*!< Cipher block chaining algorithm */
716 #define CRYP_CHAINMODE_AES_CTR AES_CR_CHMOD_1 /*!< Counter mode chaining algorithm */
717 #define CRYP_CHAINMODE_AES_GCM_GMAC (AES_CR_CHMOD_0 | AES_CR_CHMOD_1) /*!< Galois counter mode - Galois message authentication code */
718 #define CRYP_CHAINMODE_AES_CMAC AES_CR_CHMOD_2 /*!< Cipher message authentication code */
719 #if defined(AES_CR_NPBLB)
720 #define CRYP_CHAINMODE_AES_CCM_CMAC AES_CR_CHMOD_2 /*!< Counter with Cipher Mode - Cipher message authentication code */
721 #endif
722 /**
723 * @}
724 */
725
726 /** @defgroup CRYP_Key_Write AES decryption key write-up flag
727 * @{
728 */
729 #define CRYP_KEY_WRITE_ENABLE 0x00000000U /*!< Enable decryption key writing */
730 #define CRYP_KEY_WRITE_DISABLE 0x00000001U /*!< Disable decryption key writing */
731 /**
732 * @}
733 */
734
735 /** @defgroup CRYP_DMAIN DMA Input phase management enable state
736 * @{
737 */
738 #define CRYP_DMAIN_DISABLE 0x00000000U /*!< Disable DMA Input phase management */
739 #define CRYP_DMAIN_ENABLE AES_CR_DMAINEN /*!< Enable DMA Input phase management */
740 /**
741 * @}
742 */
743
744 /** @defgroup CRYP_DMAOUT DMA Output phase management enable state
745 * @{
746 */
747 #define CRYP_DMAOUT_DISABLE 0x00000000U /*!< Disable DMA Output phase management */
748 #define CRYP_DMAOUT_ENABLE AES_CR_DMAOUTEN /*!< Enable DMA Output phase management */
749 /**
750 * @}
751 */
752
753
754 /** @defgroup CRYP_GCM_CMAC_Phase GCM/GMAC and CMAC processing phase selection
755 * @{
756 */
757 #define CRYP_GCM_INIT_PHASE 0x00000000U /*!< GCM/GMAC (or CCM) init phase */
758 #define CRYP_GCMCMAC_HEADER_PHASE AES_CR_GCMPH_0 /*!< GCM/GMAC or (CCM/)CMAC header phase */
759 #define CRYP_GCM_PAYLOAD_PHASE AES_CR_GCMPH_1 /*!< GCM(/CCM) payload phase */
760 #define CRYP_GCMCMAC_FINAL_PHASE AES_CR_GCMPH /*!< GCM/GMAC or (CCM/)CMAC final phase */
761 /* Definitions duplication for code readibility's sake:
762 supported or not supported chain modes are not specified for each phase */
763 #define CRYP_INIT_PHASE 0x00000000U /*!< Init phase */
764 #define CRYP_HEADER_PHASE AES_CR_GCMPH_0 /*!< Header phase */
765 #define CRYP_PAYLOAD_PHASE AES_CR_GCMPH_1 /*!< Payload phase */
766 #define CRYP_FINAL_PHASE AES_CR_GCMPH /*!< Final phase */
767 /**
768 * @}
769 */
770
771 /** @defgroup CRYP_Flags AES status flags
772 * @{
773 */
774
775 #define CRYP_FLAG_BUSY AES_SR_BUSY /*!< GCM process suspension forbidden */
776 #define CRYP_FLAG_WRERR AES_SR_WRERR /*!< Write Error */
777 #define CRYP_FLAG_RDERR AES_SR_RDERR /*!< Read error */
778 #define CRYP_FLAG_CCF AES_SR_CCF /*!< Computation completed */
779 /**
780 * @}
781 */
782
783 /** @defgroup CRYP_Clear_Flags AES clearing flags
784 * @{
785 */
786
787 #define CRYP_CCF_CLEAR AES_CR_CCFC /*!< Computation Complete Flag Clear */
788 #define CRYP_ERR_CLEAR AES_CR_ERRC /*!< Error Flag Clear */
789 /**
790 * @}
791 */
792
793 /** @defgroup AES_Interrupts_Enable AES Interrupts Enable bits
794 * @{
795 */
796 #define CRYP_IT_CCFIE AES_CR_CCFIE /*!< Computation Complete interrupt enable */
797 #define CRYP_IT_ERRIE AES_CR_ERRIE /*!< Error interrupt enable */
798 /**
799 * @}
800 */
801
802 /** @defgroup CRYP_Interrupts_Flags AES Interrupts flags
803 * @{
804 */
805 #define CRYP_IT_WRERR AES_SR_WRERR /*!< Write Error */
806 #define CRYP_IT_RDERR AES_SR_RDERR /*!< Read Error */
807 #define CRYP_IT_CCF AES_SR_CCF /*!< Computation completed */
808 /**
809 * @}
810 */
811
812 /**
813 * @}
814 */
815
816 /* Exported macros -----------------------------------------------------------*/
817 /** @defgroup CRYP_Exported_Macros CRYP Exported Macros
818 * @{
819 */
820
821 /** @brief Reset CRYP handle state.
822 * @param __HANDLE__ specifies the CRYP handle.
823 * @retval None
824 */
825 #define __HAL_CRYP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRYP_STATE_RESET)
826
827 /**
828 * @brief Enable the CRYP AES peripheral.
829 * @retval None
830 */
831 #define __HAL_CRYP_ENABLE() (AES->CR |= AES_CR_EN)
832
833 /**
834 * @brief Disable the CRYP AES peripheral.
835 * @retval None
836 */
837 #define __HAL_CRYP_DISABLE() (AES->CR &= ~AES_CR_EN)
838
839 /**
840 * @brief Set the algorithm operating mode.
841 * @param __OPERATING_MODE__ specifies the operating mode
842 * This parameter can be one of the following values:
843 * @arg @ref CRYP_ALGOMODE_ENCRYPT encryption
844 * @arg @ref CRYP_ALGOMODE_KEYDERIVATION key derivation
845 * @arg @ref CRYP_ALGOMODE_DECRYPT decryption
846 * @arg @ref CRYP_ALGOMODE_KEYDERIVATION_DECRYPT key derivation and decryption
847 * @retval None
848 */
849 #define __HAL_CRYP_SET_OPERATINGMODE(__OPERATING_MODE__) MODIFY_REG(AES->CR, AES_CR_MODE, (__OPERATING_MODE__))
850
851
852 /**
853 * @brief Set the algorithm chaining mode.
854 * @param __CHAINING_MODE__ specifies the chaining mode
855 * This parameter can be one of the following values:
856 * @arg @ref CRYP_CHAINMODE_AES_ECB Electronic CodeBook
857 * @arg @ref CRYP_CHAINMODE_AES_CBC Cipher Block Chaining
858 * @arg @ref CRYP_CHAINMODE_AES_CTR CounTeR mode
859 * @arg @ref CRYP_CHAINMODE_AES_GCM_GMAC Galois Counter Mode or Galois Message Authentication Code
860 * @arg @ref CRYP_CHAINMODE_AES_CMAC Cipher Message Authentication Code (or Counter with Cipher Mode when applicable)
861 * @retval None
862 */
863 #define __HAL_CRYP_SET_CHAININGMODE(__CHAINING_MODE__) MODIFY_REG(AES->CR, AES_CR_CHMOD, (__CHAINING_MODE__))
864
865
866
867 /** @brief Check whether the specified CRYP status flag is set or not.
868 * @param __FLAG__ specifies the flag to check.
869 * This parameter can be one of the following values:
870 * @arg @ref CRYP_FLAG_BUSY GCM process suspension forbidden
871 * @arg @ref CRYP_IT_WRERR Write Error
872 * @arg @ref CRYP_IT_RDERR Read Error
873 * @arg @ref CRYP_IT_CCF Computation Complete
874 * @retval The state of __FLAG__ (TRUE or FALSE).
875 */
876 #define __HAL_CRYP_GET_FLAG(__FLAG__) ((AES->SR & (__FLAG__)) == (__FLAG__))
877
878
879 /** @brief Clear the CRYP pending status flag.
880 * @param __FLAG__ specifies the flag to clear.
881 * This parameter can be one of the following values:
882 * @arg @ref CRYP_ERR_CLEAR Read (RDERR) or Write Error (WRERR) Flag Clear
883 * @arg @ref CRYP_CCF_CLEAR Computation Complete Flag (CCF) Clear
884 * @retval None
885 */
886 #define __HAL_CRYP_CLEAR_FLAG(__FLAG__) SET_BIT(AES->CR, (__FLAG__))
887
888
889
890 /** @brief Check whether the specified CRYP interrupt source is enabled or not.
891 * @param __INTERRUPT__ CRYP interrupt source to check
892 * This parameter can be one of the following values:
893 * @arg @ref CRYP_IT_ERRIE Error interrupt (used for RDERR and WRERR)
894 * @arg @ref CRYP_IT_CCFIE Computation Complete interrupt
895 * @retval State of interruption (TRUE or FALSE).
896 */
897 #define __HAL_CRYP_GET_IT_SOURCE(__INTERRUPT__) ((AES->CR & (__INTERRUPT__)) == (__INTERRUPT__))
898
899
900 /** @brief Check whether the specified CRYP interrupt is set or not.
901 * @param __INTERRUPT__ specifies the interrupt to check.
902 * This parameter can be one of the following values:
903 * @arg @ref CRYP_IT_WRERR Write Error
904 * @arg @ref CRYP_IT_RDERR Read Error
905 * @arg @ref CRYP_IT_CCF Computation Complete
906 * @retval The state of __INTERRUPT__ (TRUE or FALSE).
907 */
908 #define __HAL_CRYP_GET_IT(__INTERRUPT__) ((AES->SR & (__INTERRUPT__)) == (__INTERRUPT__))
909
910
911
912 /** @brief Clear the CRYP pending interrupt.
913 * @param __INTERRUPT__ specifies the IT to clear.
914 * This parameter can be one of the following values:
915 * @arg @ref CRYP_ERR_CLEAR Read (RDERR) or Write Error (WRERR) Flag Clear
916 * @arg @ref CRYP_CCF_CLEAR Computation Complete Flag (CCF) Clear
917 * @retval None
918 */
919 #define __HAL_CRYP_CLEAR_IT(__INTERRUPT__) SET_BIT(AES->CR, (__INTERRUPT__))
920
921
922 /**
923 * @brief Enable the CRYP interrupt.
924 * @param __INTERRUPT__ CRYP Interrupt.
925 * This parameter can be one of the following values:
926 * @arg @ref CRYP_IT_ERRIE Error interrupt (used for RDERR and WRERR)
927 * @arg @ref CRYP_IT_CCFIE Computation Complete interrupt
928 * @retval None
929 */
930 #define __HAL_CRYP_ENABLE_IT(__INTERRUPT__) ((AES->CR) |= (__INTERRUPT__))
931
932
933 /**
934 * @brief Disable the CRYP interrupt.
935 * @param __INTERRUPT__ CRYP Interrupt.
936 * This parameter can be one of the following values:
937 * @arg @ref CRYP_IT_ERRIE Error interrupt (used for RDERR and WRERR)
938 * @arg @ref CRYP_IT_CCFIE Computation Complete interrupt
939 * @retval None
940 */
941 #define __HAL_CRYP_DISABLE_IT(__INTERRUPT__) ((AES->CR) &= ~(__INTERRUPT__))
942
943 /**
944 * @}
945 */
946
947 /* Private macros --------------------------------------------------------*/
948 /** @addtogroup CRYP_Private_Macros CRYP Private Macros
949 * @{
950 */
951
952 /**
953 * @brief Verify the key size length.
954 * @param __KEYSIZE__ Ciphering/deciphering algorithm key size.
955 * @retval SET (__KEYSIZE__ is a valid value) or RESET (__KEYSIZE__ is invalid)
956 */
957 #define IS_CRYP_KEYSIZE(__KEYSIZE__) (((__KEYSIZE__) == CRYP_KEYSIZE_128B) || \
958 ((__KEYSIZE__) == CRYP_KEYSIZE_256B))
959
960 /**
961 * @brief Verify the input data type.
962 * @param __DATATYPE__ Ciphering/deciphering algorithm input data type.
963 * @retval SET (__DATATYPE__ is valid) or RESET (__DATATYPE__ is invalid)
964 */
965 #define IS_CRYP_DATATYPE(__DATATYPE__) (((__DATATYPE__) == CRYP_DATATYPE_32B) || \
966 ((__DATATYPE__) == CRYP_DATATYPE_16B) || \
967 ((__DATATYPE__) == CRYP_DATATYPE_8B) || \
968 ((__DATATYPE__) == CRYP_DATATYPE_1B))
969
970 /**
971 * @brief Verify the CRYP AES IP running mode.
972 * @param __MODE__ CRYP AES IP running mode.
973 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
974 */
975 #define IS_CRYP_AES(__MODE__) (((__MODE__) == CRYP_AES_DISABLE) || \
976 ((__MODE__) == CRYP_AES_ENABLE))
977
978 /**
979 * @brief Verify the selected CRYP algorithm.
980 * @param __ALGOMODE__ Selected CRYP algorithm (ciphering, deciphering, key derivation or a combination of the latter).
981 * @retval SET (__ALGOMODE__ is valid) or RESET (__ALGOMODE__ is invalid)
982 */
983 #define IS_CRYP_ALGOMODE(__ALGOMODE__) (((__ALGOMODE__) == CRYP_ALGOMODE_ENCRYPT) || \
984 ((__ALGOMODE__) == CRYP_ALGOMODE_KEYDERIVATION) || \
985 ((__ALGOMODE__) == CRYP_ALGOMODE_DECRYPT) || \
986 ((__ALGOMODE__) == CRYP_ALGOMODE_TAG_GENERATION) || \
987 ((__ALGOMODE__) == CRYP_ALGOMODE_KEYDERIVATION_DECRYPT))
988
989 /**
990 * @brief Verify the selected CRYP chaining algorithm.
991 * @param __CHAINMODE__ Selected CRYP chaining algorithm.
992 * @retval SET (__CHAINMODE__ is valid) or RESET (__CHAINMODE__ is invalid)
993 */
994 #if defined(AES_CR_NPBLB)
995 #define IS_CRYP_CHAINMODE(__CHAINMODE__) (((__CHAINMODE__) == CRYP_CHAINMODE_AES_ECB) || \
996 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CBC) || \
997 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CTR) || \
998 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_GCM_GMAC) || \
999 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CCM_CMAC))
1000 #else
1001 #define IS_CRYP_CHAINMODE(__CHAINMODE__) (((__CHAINMODE__) == CRYP_CHAINMODE_AES_ECB) || \
1002 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CBC) || \
1003 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CTR) || \
1004 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_GCM_GMAC) || \
1005 ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CMAC))
1006 #endif
1007
1008 /**
1009 * @brief Verify the deciphering key write option.
1010 * @param __WRITE__ deciphering key write option.
1011 * @retval SET (__WRITE__ is valid) or RESET (__WRITE__ is invalid)
1012 */
1013 #define IS_CRYP_WRITE(__WRITE__) (((__WRITE__) == CRYP_KEY_WRITE_ENABLE) || \
1014 ((__WRITE__) == CRYP_KEY_WRITE_DISABLE))
1015
1016 /**
1017 * @brief Verify the CRYP input data DMA mode.
1018 * @param __MODE__ CRYP input data DMA mode.
1019 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
1020 */
1021 #define IS_CRYP_DMAIN(__MODE__) (((__MODE__) == CRYP_DMAIN_DISABLE) || \
1022 ((__MODE__) == CRYP_DMAIN_ENABLE))
1023
1024 /**
1025 * @brief Verify the CRYP output data DMA mode.
1026 * @param __MODE__ CRYP output data DMA mode.
1027 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
1028 */
1029 #define IS_CRYP_DMAOUT(__MODE__) (((__MODE__) == CRYP_DMAOUT_DISABLE) || \
1030 ((__MODE__) == CRYP_DMAOUT_ENABLE))
1031
1032 /**
1033 * @brief Verify the CRYP AES ciphering/deciphering/authentication algorithm phase.
1034 * @param __PHASE__ CRYP AES ciphering/deciphering/authentication algorithm phase.
1035 * @retval SET (__PHASE__ is valid) or RESET (__PHASE__ is invalid)
1036 */
1037 #define IS_CRYP_GCMCMAC_PHASE(__PHASE__) (((__PHASE__) == CRYP_GCM_INIT_PHASE) || \
1038 ((__PHASE__) == CRYP_GCMCMAC_HEADER_PHASE) || \
1039 ((__PHASE__) == CRYP_GCM_PAYLOAD_PHASE) || \
1040 ((__PHASE__) == CRYP_GCMCMAC_FINAL_PHASE))
1041
1042 /**
1043 * @}
1044 */
1045
1046 /* Include CRYP HAL Extended module */
1047 #include "stm32f4xx_hal_cryp_ex.h"
1048
1049 /* Exported functions --------------------------------------------------------*/
1050 /** @addtogroup CRYP_Exported_Functions CRYP Exported Functions
1051 * @{
1052 */
1053
1054 /** @addtogroup CRYP_Exported_Functions_Group1 Initialization and deinitialization functions
1055 * @{
1056 */
1057
1058 /* Initialization/de-initialization functions ********************************/
1059 HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp);
1060 HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp);
1061
1062 /* MSP initialization/de-initialization functions ****************************/
1063 void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp);
1064 void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp);
1065
1066 /**
1067 * @}
1068 */
1069
1070 /** @addtogroup CRYP_Exported_Functions_Group2 AES processing functions
1071 * @{
1072 */
1073
1074 /* AES encryption/decryption processing functions ****************************/
1075
1076 /* AES encryption/decryption using polling ***********************************/
1077 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout);
1078 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout);
1079 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout);
1080 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout);
1081 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout);
1082 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout);
1083
1084 /* AES encryption/decryption using interrupt *********************************/
1085 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
1086 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
1087 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
1088 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
1089 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
1090 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
1091
1092 /* AES encryption/decryption using DMA ***************************************/
1093 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
1094 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
1095 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
1096 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
1097 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData);
1098 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData);
1099
1100 /**
1101 * @}
1102 */
1103
1104 /** @addtogroup CRYP_Exported_Functions_Group3 Callback functions
1105 * @{
1106 */
1107 /* CallBack functions ********************************************************/
1108 void HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp);
1109 void HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp);
1110 void HAL_CRYP_ErrorCallback(CRYP_HandleTypeDef *hcryp);
1111
1112 /**
1113 * @}
1114 */
1115
1116 /** @addtogroup CRYP_Exported_Functions_Group4 CRYP IRQ handler
1117 * @{
1118 */
1119
1120 /* AES interrupt handling function *******************************************/
1121 void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp);
1122
1123 /**
1124 * @}
1125 */
1126
1127 /** @addtogroup CRYP_Exported_Functions_Group5 Peripheral State functions
1128 * @{
1129 */
1130
1131 /* Peripheral State functions ************************************************/
1132 HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp);
1133 uint32_t HAL_CRYP_GetError(CRYP_HandleTypeDef *hcryp);
1134
1135 /**
1136 * @}
1137 */
1138
1139 /**
1140 * @}
1141 */
1142
1143
1144 #endif /* AES */
1145
1146 /**
1147 * @}
1148 */
1149
1150 /**
1151 * @}
1152 */
1153
1154 #ifdef __cplusplus
1155 }
1156 #endif
1157
1158 #endif /* __STM32F4xx_HAL_CRYP_H */
1159
1160 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/