comparison Common/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_can.h @ 128:c78bcbd5deda FlipDisplay

Added current STM32 standandard libraries in version independend folder structure
author Ideenmodellierer
date Sun, 17 Feb 2019 21:12:22 +0100
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1 /**
2 ******************************************************************************
3 * @file stm32f4xx_hal_can.h
4 * @author MCD Application Team
5 * @brief Header file of CAN HAL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
10 *
11 * Redistribution and use in source and binary forms, with or without modification,
12 * are permitted provided that the following conditions are met:
13 * 1. Redistributions of source code must retain the above copyright notice,
14 * this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright notice,
16 * this list of conditions and the following disclaimer in the documentation
17 * and/or other materials provided with the distribution.
18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 ******************************************************************************
34 */
35
36 /* Define to prevent recursive inclusion -------------------------------------*/
37 #ifndef STM32F4xx_HAL_CAN_H
38 #define STM32F4xx_HAL_CAN_H
39
40 #ifdef __cplusplus
41 extern "C" {
42 #endif
43
44 /* Includes ------------------------------------------------------------------*/
45 #include "stm32f4xx_hal_def.h"
46
47 /** @addtogroup STM32F4xx_HAL_Driver
48 * @{
49 */
50
51 #if defined (CAN1)
52 /** @addtogroup CAN
53 * @{
54 */
55
56 /* Exported types ------------------------------------------------------------*/
57 /** @defgroup CAN_Exported_Types CAN Exported Types
58 * @{
59 */
60 /**
61 * @brief HAL State structures definition
62 */
63 typedef enum
64 {
65 HAL_CAN_STATE_RESET = 0x00U, /*!< CAN not yet initialized or disabled */
66 HAL_CAN_STATE_READY = 0x01U, /*!< CAN initialized and ready for use */
67 HAL_CAN_STATE_LISTENING = 0x02U, /*!< CAN receive process is ongoing */
68 HAL_CAN_STATE_SLEEP_PENDING = 0x03U, /*!< CAN sleep request is pending */
69 HAL_CAN_STATE_SLEEP_ACTIVE = 0x04U, /*!< CAN sleep mode is active */
70 HAL_CAN_STATE_ERROR = 0x05U /*!< CAN error state */
71
72 } HAL_CAN_StateTypeDef;
73
74 /**
75 * @brief CAN init structure definition
76 */
77 typedef struct
78 {
79 uint32_t Prescaler; /*!< Specifies the length of a time quantum.
80 This parameter must be a number between Min_Data = 1 and Max_Data = 1024. */
81
82 uint32_t Mode; /*!< Specifies the CAN operating mode.
83 This parameter can be a value of @ref CAN_operating_mode */
84
85 uint32_t SyncJumpWidth; /*!< Specifies the maximum number of time quanta the CAN hardware
86 is allowed to lengthen or shorten a bit to perform resynchronization.
87 This parameter can be a value of @ref CAN_synchronisation_jump_width */
88
89 uint32_t TimeSeg1; /*!< Specifies the number of time quanta in Bit Segment 1.
90 This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */
91
92 uint32_t TimeSeg2; /*!< Specifies the number of time quanta in Bit Segment 2.
93 This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */
94
95 FunctionalState TimeTriggeredMode; /*!< Enable or disable the time triggered communication mode.
96 This parameter can be set to ENABLE or DISABLE. */
97
98 FunctionalState AutoBusOff; /*!< Enable or disable the automatic bus-off management.
99 This parameter can be set to ENABLE or DISABLE. */
100
101 FunctionalState AutoWakeUp; /*!< Enable or disable the automatic wake-up mode.
102 This parameter can be set to ENABLE or DISABLE. */
103
104 FunctionalState AutoRetransmission; /*!< Enable or disable the non-automatic retransmission mode.
105 This parameter can be set to ENABLE or DISABLE. */
106
107 FunctionalState ReceiveFifoLocked; /*!< Enable or disable the Receive FIFO Locked mode.
108 This parameter can be set to ENABLE or DISABLE. */
109
110 FunctionalState TransmitFifoPriority;/*!< Enable or disable the transmit FIFO priority.
111 This parameter can be set to ENABLE or DISABLE. */
112
113 } CAN_InitTypeDef;
114
115 /**
116 * @brief CAN filter configuration structure definition
117 */
118 typedef struct
119 {
120 uint32_t FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit
121 configuration, first one for a 16-bit configuration).
122 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
123
124 uint32_t FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit
125 configuration, second one for a 16-bit configuration).
126 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
127
128 uint32_t FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number,
129 according to the mode (MSBs for a 32-bit configuration,
130 first one for a 16-bit configuration).
131 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
132
133 uint32_t FilterMaskIdLow; /*!< Specifies the filter mask number or identification number,
134 according to the mode (LSBs for a 32-bit configuration,
135 second one for a 16-bit configuration).
136 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
137
138 uint32_t FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1U) which will be assigned to the filter.
139 This parameter can be a value of @ref CAN_filter_FIFO */
140
141 uint32_t FilterBank; /*!< Specifies the filter bank which will be initialized.
142 For single CAN instance(14 dedicated filter banks),
143 this parameter must be a number between Min_Data = 0 and Max_Data = 13.
144 For dual CAN instances(28 filter banks shared),
145 this parameter must be a number between Min_Data = 0 and Max_Data = 27. */
146
147 uint32_t FilterMode; /*!< Specifies the filter mode to be initialized.
148 This parameter can be a value of @ref CAN_filter_mode */
149
150 uint32_t FilterScale; /*!< Specifies the filter scale.
151 This parameter can be a value of @ref CAN_filter_scale */
152
153 uint32_t FilterActivation; /*!< Enable or disable the filter.
154 This parameter can be set to ENABLE or DISABLE. */
155
156 uint32_t SlaveStartFilterBank; /*!< Select the start filter bank for the slave CAN instance.
157 For single CAN instances, this parameter is meaningless.
158 For dual CAN instances, all filter banks with lower index are assigned to master
159 CAN instance, whereas all filter banks with greater index are assigned to slave
160 CAN instance.
161 This parameter must be a number between Min_Data = 0 and Max_Data = 27. */
162
163 } CAN_FilterTypeDef;
164
165 /**
166 * @brief CAN Tx message header structure definition
167 */
168 typedef struct
169 {
170 uint32_t StdId; /*!< Specifies the standard identifier.
171 This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF. */
172
173 uint32_t ExtId; /*!< Specifies the extended identifier.
174 This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF. */
175
176 uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted.
177 This parameter can be a value of @ref CAN_identifier_type */
178
179 uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted.
180 This parameter can be a value of @ref CAN_remote_transmission_request */
181
182 uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted.
183 This parameter must be a number between Min_Data = 0 and Max_Data = 8. */
184
185 FunctionalState TransmitGlobalTime; /*!< Specifies whether the timestamp counter value captured on start
186 of frame transmission, is sent in DATA6 and DATA7 replacing pData[6] and pData[7].
187 @note: Time Triggered Communication Mode must be enabled.
188 @note: DLC must be programmed as 8 bytes, in order these 2 bytes are sent.
189 This parameter can be set to ENABLE or DISABLE. */
190
191 } CAN_TxHeaderTypeDef;
192
193 /**
194 * @brief CAN Rx message header structure definition
195 */
196 typedef struct
197 {
198 uint32_t StdId; /*!< Specifies the standard identifier.
199 This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF. */
200
201 uint32_t ExtId; /*!< Specifies the extended identifier.
202 This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF. */
203
204 uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted.
205 This parameter can be a value of @ref CAN_identifier_type */
206
207 uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted.
208 This parameter can be a value of @ref CAN_remote_transmission_request */
209
210 uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted.
211 This parameter must be a number between Min_Data = 0 and Max_Data = 8. */
212
213 uint32_t Timestamp; /*!< Specifies the timestamp counter value captured on start of frame reception.
214 @note: Time Triggered Communication Mode must be enabled.
215 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFFFF. */
216
217 uint32_t FilterMatchIndex; /*!< Specifies the index of matching acceptance filter element.
218 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF. */
219
220 } CAN_RxHeaderTypeDef;
221
222 /**
223 * @brief CAN handle Structure definition
224 */
225 typedef struct __CAN_HandleTypeDef
226 {
227 CAN_TypeDef *Instance; /*!< Register base address */
228
229 CAN_InitTypeDef Init; /*!< CAN required parameters */
230
231 __IO HAL_CAN_StateTypeDef State; /*!< CAN communication state */
232
233 __IO uint32_t ErrorCode; /*!< CAN Error code.
234 This parameter can be a value of @ref CAN_Error_Code */
235
236 } CAN_HandleTypeDef;
237
238 /**
239 * @}
240 */
241
242 /* Exported constants --------------------------------------------------------*/
243
244 /** @defgroup CAN_Exported_Constants CAN Exported Constants
245 * @{
246 */
247
248 /** @defgroup CAN_Error_Code CAN Error Code
249 * @{
250 */
251 #define HAL_CAN_ERROR_NONE (0x00000000U) /*!< No error */
252 #define HAL_CAN_ERROR_EWG (0x00000001U) /*!< Protocol Error Warning */
253 #define HAL_CAN_ERROR_EPV (0x00000002U) /*!< Error Passive */
254 #define HAL_CAN_ERROR_BOF (0x00000004U) /*!< Bus-off error */
255 #define HAL_CAN_ERROR_STF (0x00000008U) /*!< Stuff error */
256 #define HAL_CAN_ERROR_FOR (0x00000010U) /*!< Form error */
257 #define HAL_CAN_ERROR_ACK (0x00000020U) /*!< Acknowledgment error */
258 #define HAL_CAN_ERROR_BR (0x00000040U) /*!< Bit recessive error */
259 #define HAL_CAN_ERROR_BD (0x00000080U) /*!< Bit dominant error */
260 #define HAL_CAN_ERROR_CRC (0x00000100U) /*!< CRC error */
261 #define HAL_CAN_ERROR_RX_FOV0 (0x00000200U) /*!< Rx FIFO0 overrun error */
262 #define HAL_CAN_ERROR_RX_FOV1 (0x00000400U) /*!< Rx FIFO1 overrun error */
263 #define HAL_CAN_ERROR_TX_ALST0 (0x00000800U) /*!< TxMailbox 0 transmit failure due to arbitration lost */
264 #define HAL_CAN_ERROR_TX_TERR0 (0x00001000U) /*!< TxMailbox 1 transmit failure due to tranmit error */
265 #define HAL_CAN_ERROR_TX_ALST1 (0x00002000U) /*!< TxMailbox 0 transmit failure due to arbitration lost */
266 #define HAL_CAN_ERROR_TX_TERR1 (0x00004000U) /*!< TxMailbox 1 transmit failure due to tranmit error */
267 #define HAL_CAN_ERROR_TX_ALST2 (0x00008000U) /*!< TxMailbox 0 transmit failure due to arbitration lost */
268 #define HAL_CAN_ERROR_TX_TERR2 (0x00010000U) /*!< TxMailbox 1 transmit failure due to tranmit error */
269 #define HAL_CAN_ERROR_TIMEOUT (0x00020000U) /*!< Timeout error */
270 #define HAL_CAN_ERROR_NOT_INITIALIZED (0x00040000U) /*!< Peripheral not initialized */
271 #define HAL_CAN_ERROR_NOT_READY (0x00080000U) /*!< Peripheral not ready */
272 #define HAL_CAN_ERROR_NOT_STARTED (0x00100000U) /*!< Peripheral not started */
273 #define HAL_CAN_ERROR_PARAM (0x00200000U) /*!< Parameter error */
274
275 /**
276 * @}
277 */
278
279 /** @defgroup CAN_InitStatus CAN InitStatus
280 * @{
281 */
282 #define CAN_INITSTATUS_FAILED (0x00000000U) /*!< CAN initialization failed */
283 #define CAN_INITSTATUS_SUCCESS (0x00000001U) /*!< CAN initialization OK */
284 /**
285 * @}
286 */
287
288 /** @defgroup CAN_operating_mode CAN Operating Mode
289 * @{
290 */
291 #define CAN_MODE_NORMAL (0x00000000U) /*!< Normal mode */
292 #define CAN_MODE_LOOPBACK ((uint32_t)CAN_BTR_LBKM) /*!< Loopback mode */
293 #define CAN_MODE_SILENT ((uint32_t)CAN_BTR_SILM) /*!< Silent mode */
294 #define CAN_MODE_SILENT_LOOPBACK ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM)) /*!< Loopback combined with silent mode */
295 /**
296 * @}
297 */
298
299
300 /** @defgroup CAN_synchronisation_jump_width CAN Synchronization Jump Width
301 * @{
302 */
303 #define CAN_SJW_1TQ (0x00000000U) /*!< 1 time quantum */
304 #define CAN_SJW_2TQ ((uint32_t)CAN_BTR_SJW_0) /*!< 2 time quantum */
305 #define CAN_SJW_3TQ ((uint32_t)CAN_BTR_SJW_1) /*!< 3 time quantum */
306 #define CAN_SJW_4TQ ((uint32_t)CAN_BTR_SJW) /*!< 4 time quantum */
307 /**
308 * @}
309 */
310
311 /** @defgroup CAN_time_quantum_in_bit_segment_1 CAN Time Quantum in Bit Segment 1
312 * @{
313 */
314 #define CAN_BS1_1TQ (0x00000000U) /*!< 1 time quantum */
315 #define CAN_BS1_2TQ ((uint32_t)CAN_BTR_TS1_0) /*!< 2 time quantum */
316 #define CAN_BS1_3TQ ((uint32_t)CAN_BTR_TS1_1) /*!< 3 time quantum */
317 #define CAN_BS1_4TQ ((uint32_t)(CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 4 time quantum */
318 #define CAN_BS1_5TQ ((uint32_t)CAN_BTR_TS1_2) /*!< 5 time quantum */
319 #define CAN_BS1_6TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 6 time quantum */
320 #define CAN_BS1_7TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 7 time quantum */
321 #define CAN_BS1_8TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 8 time quantum */
322 #define CAN_BS1_9TQ ((uint32_t)CAN_BTR_TS1_3) /*!< 9 time quantum */
323 #define CAN_BS1_10TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_0)) /*!< 10 time quantum */
324 #define CAN_BS1_11TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1)) /*!< 11 time quantum */
325 #define CAN_BS1_12TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 12 time quantum */
326 #define CAN_BS1_13TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2)) /*!< 13 time quantum */
327 #define CAN_BS1_14TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 14 time quantum */
328 #define CAN_BS1_15TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 15 time quantum */
329 #define CAN_BS1_16TQ ((uint32_t)CAN_BTR_TS1) /*!< 16 time quantum */
330 /**
331 * @}
332 */
333
334 /** @defgroup CAN_time_quantum_in_bit_segment_2 CAN Time Quantum in Bit Segment 2
335 * @{
336 */
337 #define CAN_BS2_1TQ (0x00000000U) /*!< 1 time quantum */
338 #define CAN_BS2_2TQ ((uint32_t)CAN_BTR_TS2_0) /*!< 2 time quantum */
339 #define CAN_BS2_3TQ ((uint32_t)CAN_BTR_TS2_1) /*!< 3 time quantum */
340 #define CAN_BS2_4TQ ((uint32_t)(CAN_BTR_TS2_1 | CAN_BTR_TS2_0)) /*!< 4 time quantum */
341 #define CAN_BS2_5TQ ((uint32_t)CAN_BTR_TS2_2) /*!< 5 time quantum */
342 #define CAN_BS2_6TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_0)) /*!< 6 time quantum */
343 #define CAN_BS2_7TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_1)) /*!< 7 time quantum */
344 #define CAN_BS2_8TQ ((uint32_t)CAN_BTR_TS2) /*!< 8 time quantum */
345 /**
346 * @}
347 */
348
349 /** @defgroup CAN_filter_mode CAN Filter Mode
350 * @{
351 */
352 #define CAN_FILTERMODE_IDMASK (0x00000000U) /*!< Identifier mask mode */
353 #define CAN_FILTERMODE_IDLIST (0x00000001U) /*!< Identifier list mode */
354 /**
355 * @}
356 */
357
358 /** @defgroup CAN_filter_scale CAN Filter Scale
359 * @{
360 */
361 #define CAN_FILTERSCALE_16BIT (0x00000000U) /*!< Two 16-bit filters */
362 #define CAN_FILTERSCALE_32BIT (0x00000001U) /*!< One 32-bit filter */
363 /**
364 * @}
365 */
366
367 /** @defgroup CAN_filter_FIFO CAN Filter FIFO
368 * @{
369 */
370 #define CAN_FILTER_FIFO0 (0x00000000U) /*!< Filter FIFO 0 assignment for filter x */
371 #define CAN_FILTER_FIFO1 (0x00000001U) /*!< Filter FIFO 1 assignment for filter x */
372 /**
373 * @}
374 */
375
376 /** @defgroup CAN_identifier_type CAN Identifier Type
377 * @{
378 */
379 #define CAN_ID_STD (0x00000000U) /*!< Standard Id */
380 #define CAN_ID_EXT (0x00000004U) /*!< Extended Id */
381 /**
382 * @}
383 */
384
385 /** @defgroup CAN_remote_transmission_request CAN Remote Transmission Request
386 * @{
387 */
388 #define CAN_RTR_DATA (0x00000000U) /*!< Data frame */
389 #define CAN_RTR_REMOTE (0x00000002U) /*!< Remote frame */
390 /**
391 * @}
392 */
393
394 /** @defgroup CAN_receive_FIFO_number CAN Receive FIFO Number
395 * @{
396 */
397 #define CAN_RX_FIFO0 (0x00000000U) /*!< CAN receive FIFO 0 */
398 #define CAN_RX_FIFO1 (0x00000001U) /*!< CAN receive FIFO 1 */
399 /**
400 * @}
401 */
402
403 /** @defgroup CAN_Tx_Mailboxes CAN Tx Mailboxes
404 * @{
405 */
406 #define CAN_TX_MAILBOX0 (0x00000001U) /*!< Tx Mailbox 0 */
407 #define CAN_TX_MAILBOX1 (0x00000002U) /*!< Tx Mailbox 1 */
408 #define CAN_TX_MAILBOX2 (0x00000004U) /*!< Tx Mailbox 2 */
409 /**
410 * @}
411 */
412
413 /** @defgroup CAN_flags CAN Flags
414 * @{
415 */
416 /* Transmit Flags */
417 #define CAN_FLAG_RQCP0 (0x00000500U) /*!< Request complete MailBox 0 flag */
418 #define CAN_FLAG_TXOK0 (0x00000501U) /*!< Transmission OK MailBox 0 flag */
419 #define CAN_FLAG_ALST0 (0x00000502U) /*!< Arbitration Lost MailBox 0 flag */
420 #define CAN_FLAG_TERR0 (0x00000503U) /*!< Transmission error MailBox 0 flag */
421 #define CAN_FLAG_RQCP1 (0x00000508U) /*!< Request complete MailBox1 flag */
422 #define CAN_FLAG_TXOK1 (0x00000509U) /*!< Transmission OK MailBox 1 flag */
423 #define CAN_FLAG_ALST1 (0x0000050AU) /*!< Arbitration Lost MailBox 1 flag */
424 #define CAN_FLAG_TERR1 (0x0000050BU) /*!< Transmission error MailBox 1 flag */
425 #define CAN_FLAG_RQCP2 (0x00000510U) /*!< Request complete MailBox2 flag */
426 #define CAN_FLAG_TXOK2 (0x00000511U) /*!< Transmission OK MailBox 2 flag */
427 #define CAN_FLAG_ALST2 (0x00000512U) /*!< Arbitration Lost MailBox 2 flag */
428 #define CAN_FLAG_TERR2 (0x00000513U) /*!< Transmission error MailBox 2 flag */
429 #define CAN_FLAG_TME0 (0x0000051AU) /*!< Transmit mailbox 0 empty flag */
430 #define CAN_FLAG_TME1 (0x0000051BU) /*!< Transmit mailbox 1 empty flag */
431 #define CAN_FLAG_TME2 (0x0000051CU) /*!< Transmit mailbox 2 empty flag */
432 #define CAN_FLAG_LOW0 (0x0000051DU) /*!< Lowest priority mailbox 0 flag */
433 #define CAN_FLAG_LOW1 (0x0000051EU) /*!< Lowest priority mailbox 1 flag */
434 #define CAN_FLAG_LOW2 (0x0000051FU) /*!< Lowest priority mailbox 2 flag */
435
436 /* Receive Flags */
437 #define CAN_FLAG_FF0 (0x00000203U) /*!< RX FIFO 0 Full flag */
438 #define CAN_FLAG_FOV0 (0x00000204U) /*!< RX FIFO 0 Overrun flag */
439 #define CAN_FLAG_FF1 (0x00000403U) /*!< RX FIFO 1 Full flag */
440 #define CAN_FLAG_FOV1 (0x00000404U) /*!< RX FIFO 1 Overrun flag */
441
442 /* Operating Mode Flags */
443 #define CAN_FLAG_INAK (0x00000100U) /*!< Initialization acknowledge flag */
444 #define CAN_FLAG_SLAK (0x00000101U) /*!< Sleep acknowledge flag */
445 #define CAN_FLAG_ERRI (0x00000102U) /*!< Error flag */
446 #define CAN_FLAG_WKU (0x00000103U) /*!< Wake up interrupt flag */
447 #define CAN_FLAG_SLAKI (0x00000104U) /*!< Sleep acknowledge interrupt flag */
448
449 /* Error Flags */
450 #define CAN_FLAG_EWG (0x00000300U) /*!< Error warning flag */
451 #define CAN_FLAG_EPV (0x00000301U) /*!< Error passive flag */
452 #define CAN_FLAG_BOF (0x00000302U) /*!< Bus-Off flag */
453 /**
454 * @}
455 */
456
457
458 /** @defgroup CAN_Interrupts CAN Interrupts
459 * @{
460 */
461 /* Transmit Interrupt */
462 #define CAN_IT_TX_MAILBOX_EMPTY ((uint32_t)CAN_IER_TMEIE) /*!< Transmit mailbox empty interrupt */
463
464 /* Receive Interrupts */
465 #define CAN_IT_RX_FIFO0_MSG_PENDING ((uint32_t)CAN_IER_FMPIE0) /*!< FIFO 0 message pending interrupt */
466 #define CAN_IT_RX_FIFO0_FULL ((uint32_t)CAN_IER_FFIE0) /*!< FIFO 0 full interrupt */
467 #define CAN_IT_RX_FIFO0_OVERRUN ((uint32_t)CAN_IER_FOVIE0) /*!< FIFO 0 overrun interrupt */
468 #define CAN_IT_RX_FIFO1_MSG_PENDING ((uint32_t)CAN_IER_FMPIE1) /*!< FIFO 1 message pending interrupt */
469 #define CAN_IT_RX_FIFO1_FULL ((uint32_t)CAN_IER_FFIE1) /*!< FIFO 1 full interrupt */
470 #define CAN_IT_RX_FIFO1_OVERRUN ((uint32_t)CAN_IER_FOVIE1) /*!< FIFO 1 overrun interrupt */
471
472 /* Operating Mode Interrupts */
473 #define CAN_IT_WAKEUP ((uint32_t)CAN_IER_WKUIE) /*!< Wake-up interrupt */
474 #define CAN_IT_SLEEP_ACK ((uint32_t)CAN_IER_SLKIE) /*!< Sleep acknowledge interrupt */
475
476 /* Error Interrupts */
477 #define CAN_IT_ERROR_WARNING ((uint32_t)CAN_IER_EWGIE) /*!< Error warning interrupt */
478 #define CAN_IT_ERROR_PASSIVE ((uint32_t)CAN_IER_EPVIE) /*!< Error passive interrupt */
479 #define CAN_IT_BUSOFF ((uint32_t)CAN_IER_BOFIE) /*!< Bus-off interrupt */
480 #define CAN_IT_LAST_ERROR_CODE ((uint32_t)CAN_IER_LECIE) /*!< Last error code interrupt */
481 #define CAN_IT_ERROR ((uint32_t)CAN_IER_ERRIE) /*!< Error Interrupt */
482 /**
483 * @}
484 */
485
486 /**
487 * @}
488 */
489
490 /* Exported macros -----------------------------------------------------------*/
491 /** @defgroup CAN_Exported_Macros CAN Exported Macros
492 * @{
493 */
494
495 /** @brief Reset CAN handle state
496 * @param __HANDLE__ CAN handle.
497 * @retval None
498 */
499 #define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET)
500
501 /**
502 * @brief Enable the specified CAN interrupts.
503 * @param __HANDLE__ CAN handle.
504 * @param __INTERRUPT__ CAN Interrupt sources to enable.
505 * This parameter can be any combination of @arg CAN_Interrupts
506 * @retval None
507 */
508 #define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__))
509
510 /**
511 * @brief Disable the specified CAN interrupts.
512 * @param __HANDLE__ CAN handle.
513 * @param __INTERRUPT__ CAN Interrupt sources to disable.
514 * This parameter can be any combination of @arg CAN_Interrupts
515 * @retval None
516 */
517 #define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__))
518
519 /** @brief Check if the specified CAN interrupt source is enabled or disabled.
520 * @param __HANDLE__ specifies the CAN Handle.
521 * @param __INTERRUPT__ specifies the CAN interrupt source to check.
522 * This parameter can be a value of @arg CAN_Interrupts
523 * @retval The state of __IT__ (TRUE or FALSE).
524 */
525 #define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) & (__INTERRUPT__))
526
527 /** @brief Check whether the specified CAN flag is set or not.
528 * @param __HANDLE__ specifies the CAN Handle.
529 * @param __FLAG__ specifies the flag to check.
530 * This parameter can be one of @arg CAN_flags
531 * @retval The state of __FLAG__ (TRUE or FALSE).
532 */
533 #define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \
534 ((((__FLAG__) >> 8U) == 5U)? ((((__HANDLE__)->Instance->TSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
535 (((__FLAG__) >> 8U) == 2U)? ((((__HANDLE__)->Instance->RF0R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
536 (((__FLAG__) >> 8U) == 4U)? ((((__HANDLE__)->Instance->RF1R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
537 (((__FLAG__) >> 8U) == 1U)? ((((__HANDLE__)->Instance->MSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
538 (((__FLAG__) >> 8U) == 3U)? ((((__HANDLE__)->Instance->ESR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): 0U)
539
540 /** @brief Clear the specified CAN pending flag.
541 * @param __HANDLE__ specifies the CAN Handle.
542 * @param __FLAG__ specifies the flag to check.
543 * This parameter can be one of the following values:
544 * @arg CAN_FLAG_RQCP0: Request complete MailBox 0 Flag
545 * @arg CAN_FLAG_TXOK0: Transmission OK MailBox 0 Flag
546 * @arg CAN_FLAG_ALST0: Arbitration Lost MailBox 0 Flag
547 * @arg CAN_FLAG_TERR0: Transmission error MailBox 0 Flag
548 * @arg CAN_FLAG_RQCP1: Request complete MailBox 1 Flag
549 * @arg CAN_FLAG_TXOK1: Transmission OK MailBox 1 Flag
550 * @arg CAN_FLAG_ALST1: Arbitration Lost MailBox 1 Flag
551 * @arg CAN_FLAG_TERR1: Transmission error MailBox 1 Flag
552 * @arg CAN_FLAG_RQCP2: Request complete MailBox 2 Flag
553 * @arg CAN_FLAG_TXOK2: Transmission OK MailBox 2 Flag
554 * @arg CAN_FLAG_ALST2: Arbitration Lost MailBox 2 Flag
555 * @arg CAN_FLAG_TERR2: Transmission error MailBox 2 Flag
556 * @arg CAN_FLAG_FF0: RX FIFO 0 Full Flag
557 * @arg CAN_FLAG_FOV0: RX FIFO 0 Overrun Flag
558 * @arg CAN_FLAG_FF1: RX FIFO 1 Full Flag
559 * @arg CAN_FLAG_FOV1: RX FIFO 1 Overrun Flag
560 * @arg CAN_FLAG_WKUI: Wake up Interrupt Flag
561 * @arg CAN_FLAG_SLAKI: Sleep acknowledge Interrupt Flag
562 * @retval None
563 */
564 #define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \
565 ((((__FLAG__) >> 8U) == 5U)? (((__HANDLE__)->Instance->TSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
566 (((__FLAG__) >> 8U) == 2U)? (((__HANDLE__)->Instance->RF0R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
567 (((__FLAG__) >> 8U) == 4U)? (((__HANDLE__)->Instance->RF1R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
568 (((__FLAG__) >> 8U) == 1U)? (((__HANDLE__)->Instance->MSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): 0U)
569
570 /**
571 * @}
572 */
573
574 /* Exported functions --------------------------------------------------------*/
575 /** @addtogroup CAN_Exported_Functions CAN Exported Functions
576 * @{
577 */
578
579 /** @addtogroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions
580 * @brief Initialization and Configuration functions
581 * @{
582 */
583
584 /* Initialization and de-initialization functions *****************************/
585 HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan);
586 HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef *hcan);
587 void HAL_CAN_MspInit(CAN_HandleTypeDef *hcan);
588 void HAL_CAN_MspDeInit(CAN_HandleTypeDef *hcan);
589
590 /**
591 * @}
592 */
593
594 /** @addtogroup CAN_Exported_Functions_Group2 Configuration functions
595 * @brief Configuration functions
596 * @{
597 */
598
599 /* Configuration functions ****************************************************/
600 HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, CAN_FilterTypeDef *sFilterConfig);
601
602 /**
603 * @}
604 */
605
606 /** @addtogroup CAN_Exported_Functions_Group3 Control functions
607 * @brief Control functions
608 * @{
609 */
610
611 /* Control functions **********************************************************/
612 HAL_StatusTypeDef HAL_CAN_Start(CAN_HandleTypeDef *hcan);
613 HAL_StatusTypeDef HAL_CAN_Stop(CAN_HandleTypeDef *hcan);
614 HAL_StatusTypeDef HAL_CAN_RequestSleep(CAN_HandleTypeDef *hcan);
615 HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan);
616 uint32_t HAL_CAN_IsSleepActive(CAN_HandleTypeDef *hcan);
617 HAL_StatusTypeDef HAL_CAN_AddTxMessage(CAN_HandleTypeDef *hcan, CAN_TxHeaderTypeDef *pHeader, uint8_t aData[], uint32_t *pTxMailbox);
618 HAL_StatusTypeDef HAL_CAN_AbortTxRequest(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes);
619 uint32_t HAL_CAN_GetTxMailboxesFreeLevel(CAN_HandleTypeDef *hcan);
620 uint32_t HAL_CAN_IsTxMessagePending(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes);
621 uint32_t HAL_CAN_GetTxTimestamp(CAN_HandleTypeDef *hcan, uint32_t TxMailbox);
622 HAL_StatusTypeDef HAL_CAN_GetRxMessage(CAN_HandleTypeDef *hcan, uint32_t RxFifo, CAN_RxHeaderTypeDef *pHeader, uint8_t aData[]);
623 uint32_t HAL_CAN_GetRxFifoFillLevel(CAN_HandleTypeDef *hcan, uint32_t RxFifo);
624
625 /**
626 * @}
627 */
628
629 /** @addtogroup CAN_Exported_Functions_Group4 Interrupts management
630 * @brief Interrupts management
631 * @{
632 */
633 /* Interrupts management ******************************************************/
634 HAL_StatusTypeDef HAL_CAN_ActivateNotification(CAN_HandleTypeDef *hcan, uint32_t ActiveITs);
635 HAL_StatusTypeDef HAL_CAN_DeactivateNotification(CAN_HandleTypeDef *hcan, uint32_t InactiveITs);
636 void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan);
637
638 /**
639 * @}
640 */
641
642 /** @addtogroup CAN_Exported_Functions_Group5 Callback functions
643 * @brief Callback functions
644 * @{
645 */
646 /* Callbacks functions ********************************************************/
647
648 void HAL_CAN_TxMailbox0CompleteCallback(CAN_HandleTypeDef *hcan);
649 void HAL_CAN_TxMailbox1CompleteCallback(CAN_HandleTypeDef *hcan);
650 void HAL_CAN_TxMailbox2CompleteCallback(CAN_HandleTypeDef *hcan);
651 void HAL_CAN_TxMailbox0AbortCallback(CAN_HandleTypeDef *hcan);
652 void HAL_CAN_TxMailbox1AbortCallback(CAN_HandleTypeDef *hcan);
653 void HAL_CAN_TxMailbox2AbortCallback(CAN_HandleTypeDef *hcan);
654 void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan);
655 void HAL_CAN_RxFifo0FullCallback(CAN_HandleTypeDef *hcan);
656 void HAL_CAN_RxFifo1MsgPendingCallback(CAN_HandleTypeDef *hcan);
657 void HAL_CAN_RxFifo1FullCallback(CAN_HandleTypeDef *hcan);
658 void HAL_CAN_SleepCallback(CAN_HandleTypeDef *hcan);
659 void HAL_CAN_WakeUpFromRxMsgCallback(CAN_HandleTypeDef *hcan);
660 void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan);
661
662 /**
663 * @}
664 */
665
666 /** @addtogroup CAN_Exported_Functions_Group6 Peripheral State and Error functions
667 * @brief CAN Peripheral State functions
668 * @{
669 */
670 /* Peripheral State and Error functions ***************************************/
671 HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef *hcan);
672 uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan);
673 HAL_StatusTypeDef HAL_CAN_ResetError(CAN_HandleTypeDef *hcan);
674
675 /**
676 * @}
677 */
678
679 /**
680 * @}
681 */
682
683 /* Private types -------------------------------------------------------------*/
684 /** @defgroup CAN_Private_Types CAN Private Types
685 * @{
686 */
687
688 /**
689 * @}
690 */
691
692 /* Private variables ---------------------------------------------------------*/
693 /** @defgroup CAN_Private_Variables CAN Private Variables
694 * @{
695 */
696
697 /**
698 * @}
699 */
700
701 /* Private constants ---------------------------------------------------------*/
702 /** @defgroup CAN_Private_Constants CAN Private Constants
703 * @{
704 */
705 #define CAN_FLAG_MASK (0x000000FFU)
706 /**
707 * @}
708 */
709
710 /* Private Macros -----------------------------------------------------------*/
711 /** @defgroup CAN_Private_Macros CAN Private Macros
712 * @{
713 */
714
715 #define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \
716 ((MODE) == CAN_MODE_LOOPBACK)|| \
717 ((MODE) == CAN_MODE_SILENT) || \
718 ((MODE) == CAN_MODE_SILENT_LOOPBACK))
719 #define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) || ((SJW) == CAN_SJW_2TQ) || \
720 ((SJW) == CAN_SJW_3TQ) || ((SJW) == CAN_SJW_4TQ))
721 #define IS_CAN_BS1(BS1) (((BS1) == CAN_BS1_1TQ) || ((BS1) == CAN_BS1_2TQ) || \
722 ((BS1) == CAN_BS1_3TQ) || ((BS1) == CAN_BS1_4TQ) || \
723 ((BS1) == CAN_BS1_5TQ) || ((BS1) == CAN_BS1_6TQ) || \
724 ((BS1) == CAN_BS1_7TQ) || ((BS1) == CAN_BS1_8TQ) || \
725 ((BS1) == CAN_BS1_9TQ) || ((BS1) == CAN_BS1_10TQ)|| \
726 ((BS1) == CAN_BS1_11TQ)|| ((BS1) == CAN_BS1_12TQ)|| \
727 ((BS1) == CAN_BS1_13TQ)|| ((BS1) == CAN_BS1_14TQ)|| \
728 ((BS1) == CAN_BS1_15TQ)|| ((BS1) == CAN_BS1_16TQ))
729 #define IS_CAN_BS2(BS2) (((BS2) == CAN_BS2_1TQ) || ((BS2) == CAN_BS2_2TQ) || \
730 ((BS2) == CAN_BS2_3TQ) || ((BS2) == CAN_BS2_4TQ) || \
731 ((BS2) == CAN_BS2_5TQ) || ((BS2) == CAN_BS2_6TQ) || \
732 ((BS2) == CAN_BS2_7TQ) || ((BS2) == CAN_BS2_8TQ))
733 #define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1U) && ((PRESCALER) <= 1024U))
734 #define IS_CAN_FILTER_ID_HALFWORD(HALFWORD) ((HALFWORD) <= 0xFFFFU)
735 #define IS_CAN_FILTER_BANK_DUAL(BANK) ((BANK) <= 27U)
736 #define IS_CAN_FILTER_BANK_SINGLE(BANK) ((BANK) <= 13U)
737 #define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \
738 ((MODE) == CAN_FILTERMODE_IDLIST))
739 #define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) || \
740 ((SCALE) == CAN_FILTERSCALE_32BIT))
741 #define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) || \
742 ((FIFO) == CAN_FILTER_FIFO1))
743 #define IS_CAN_TX_MAILBOX(TRANSMITMAILBOX) (((TRANSMITMAILBOX) == CAN_TX_MAILBOX0 ) || \
744 ((TRANSMITMAILBOX) == CAN_TX_MAILBOX1 ) || \
745 ((TRANSMITMAILBOX) == CAN_TX_MAILBOX2 ))
746 #define IS_CAN_TX_MAILBOX_LIST(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= (CAN_TX_MAILBOX0 | CAN_TX_MAILBOX1 | CAN_TX_MAILBOX2))
747 #define IS_CAN_STDID(STDID) ((STDID) <= 0x7FFU)
748 #define IS_CAN_EXTID(EXTID) ((EXTID) <= 0x1FFFFFFFU)
749 #define IS_CAN_DLC(DLC) ((DLC) <= 8U)
750 #define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_ID_STD) || \
751 ((IDTYPE) == CAN_ID_EXT))
752 #define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE))
753 #define IS_CAN_RX_FIFO(FIFO) (((FIFO) == CAN_RX_FIFO0) || ((FIFO) == CAN_RX_FIFO1))
754 #define IS_CAN_IT(IT) ((IT) <= (CAN_IT_TX_MAILBOX_EMPTY | CAN_IT_RX_FIFO0_MSG_PENDING | \
755 CAN_IT_RX_FIFO0_FULL | CAN_IT_RX_FIFO0_OVERRUN | \
756 CAN_IT_RX_FIFO1_MSG_PENDING | CAN_IT_RX_FIFO1_FULL | \
757 CAN_IT_RX_FIFO1_OVERRUN | CAN_IT_WAKEUP | \
758 CAN_IT_SLEEP_ACK | CAN_IT_ERROR_WARNING | \
759 CAN_IT_ERROR_PASSIVE | CAN_IT_BUSOFF | \
760 CAN_IT_LAST_ERROR_CODE | CAN_IT_ERROR))
761
762 /**
763 * @}
764 */
765 /* End of private macros -----------------------------------------------------*/
766
767 /**
768 * @}
769 */
770
771
772 #endif /* CAN1 */
773 /**
774 * @}
775 */
776
777 #ifdef __cplusplus
778 }
779 #endif
780
781 #endif /* STM32F4xx_HAL_CAN_H */
782
783
784 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/