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Added current STM32 standandard libraries in version independend folder structure
author Ideenmodellierer
date Sun, 17 Feb 2019 21:12:22 +0100
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127:1369f8660eaa 128:c78bcbd5deda
1 /**
2 ******************************************************************************
3 * @file stm32f4xx_hal.h
4 * @author MCD Application Team
5 * @brief This file contains all the functions prototypes for the HAL
6 * module driver.
7 ******************************************************************************
8 * @attention
9 *
10 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
11 *
12 * Redistribution and use in source and binary forms, with or without modification,
13 * are permitted provided that the following conditions are met:
14 * 1. Redistributions of source code must retain the above copyright notice,
15 * this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright notice,
17 * this list of conditions and the following disclaimer in the documentation
18 * and/or other materials provided with the distribution.
19 * 3. Neither the name of STMicroelectronics nor the names of its contributors
20 * may be used to endorse or promote products derived from this software
21 * without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
30 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
31 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 *
34 ******************************************************************************
35 */
36
37 /* Define to prevent recursive inclusion -------------------------------------*/
38 #ifndef __STM32F4xx_HAL_H
39 #define __STM32F4xx_HAL_H
40
41 #ifdef __cplusplus
42 extern "C" {
43 #endif
44
45 /* Includes ------------------------------------------------------------------*/
46 #include "stm32f4xx_hal_conf.h"
47
48 /** @addtogroup STM32F4xx_HAL_Driver
49 * @{
50 */
51
52 /** @addtogroup HAL
53 * @{
54 */
55
56 /* Exported types ------------------------------------------------------------*/
57 /* Exported constants --------------------------------------------------------*/
58
59 /** @defgroup HAL_Exported_Constants HAL Exported Constants
60 * @{
61 */
62
63 /** @defgroup HAL_TICK_FREQ Tick Frequency
64 * @{
65 */
66 typedef enum
67 {
68 HAL_TICK_FREQ_10HZ = 100U,
69 HAL_TICK_FREQ_100HZ = 10U,
70 HAL_TICK_FREQ_1KHZ = 1U,
71 HAL_TICK_FREQ_DEFAULT = HAL_TICK_FREQ_1KHZ
72 } HAL_TickFreqTypeDef;
73 /**
74 * @}
75 */
76
77 /**
78 * @}
79 */
80
81 /* Exported macro ------------------------------------------------------------*/
82 /** @defgroup HAL_Exported_Macros HAL Exported Macros
83 * @{
84 */
85
86 /** @brief Freeze/Unfreeze Peripherals in Debug mode
87 */
88 #define __HAL_DBGMCU_FREEZE_TIM2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM2_STOP))
89 #define __HAL_DBGMCU_FREEZE_TIM3() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM3_STOP))
90 #define __HAL_DBGMCU_FREEZE_TIM4() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM4_STOP))
91 #define __HAL_DBGMCU_FREEZE_TIM5() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM5_STOP))
92 #define __HAL_DBGMCU_FREEZE_TIM6() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM6_STOP))
93 #define __HAL_DBGMCU_FREEZE_TIM7() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM7_STOP))
94 #define __HAL_DBGMCU_FREEZE_TIM12() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM12_STOP))
95 #define __HAL_DBGMCU_FREEZE_TIM13() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM13_STOP))
96 #define __HAL_DBGMCU_FREEZE_TIM14() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM14_STOP))
97 #define __HAL_DBGMCU_FREEZE_RTC() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_RTC_STOP))
98 #define __HAL_DBGMCU_FREEZE_WWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_WWDG_STOP))
99 #define __HAL_DBGMCU_FREEZE_IWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_IWDG_STOP))
100 #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
101 #define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
102 #define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
103 #define __HAL_DBGMCU_FREEZE_CAN1() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN1_STOP))
104 #define __HAL_DBGMCU_FREEZE_CAN2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN2_STOP))
105 #define __HAL_DBGMCU_FREEZE_TIM1() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM1_STOP))
106 #define __HAL_DBGMCU_FREEZE_TIM8() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM8_STOP))
107 #define __HAL_DBGMCU_FREEZE_TIM9() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM9_STOP))
108 #define __HAL_DBGMCU_FREEZE_TIM10() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM10_STOP))
109 #define __HAL_DBGMCU_FREEZE_TIM11() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM11_STOP))
110
111 #define __HAL_DBGMCU_UNFREEZE_TIM2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM2_STOP))
112 #define __HAL_DBGMCU_UNFREEZE_TIM3() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM3_STOP))
113 #define __HAL_DBGMCU_UNFREEZE_TIM4() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM4_STOP))
114 #define __HAL_DBGMCU_UNFREEZE_TIM5() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM5_STOP))
115 #define __HAL_DBGMCU_UNFREEZE_TIM6() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM6_STOP))
116 #define __HAL_DBGMCU_UNFREEZE_TIM7() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM7_STOP))
117 #define __HAL_DBGMCU_UNFREEZE_TIM12() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM12_STOP))
118 #define __HAL_DBGMCU_UNFREEZE_TIM13() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM13_STOP))
119 #define __HAL_DBGMCU_UNFREEZE_TIM14() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM14_STOP))
120 #define __HAL_DBGMCU_UNFREEZE_RTC() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_RTC_STOP))
121 #define __HAL_DBGMCU_UNFREEZE_WWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_WWDG_STOP))
122 #define __HAL_DBGMCU_UNFREEZE_IWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_IWDG_STOP))
123 #define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
124 #define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
125 #define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
126 #define __HAL_DBGMCU_UNFREEZE_CAN1() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN1_STOP))
127 #define __HAL_DBGMCU_UNFREEZE_CAN2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN2_STOP))
128 #define __HAL_DBGMCU_UNFREEZE_TIM1() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM1_STOP))
129 #define __HAL_DBGMCU_UNFREEZE_TIM8() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM8_STOP))
130 #define __HAL_DBGMCU_UNFREEZE_TIM9() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM9_STOP))
131 #define __HAL_DBGMCU_UNFREEZE_TIM10() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM10_STOP))
132 #define __HAL_DBGMCU_UNFREEZE_TIM11() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM11_STOP))
133
134 /** @brief Main Flash memory mapped at 0x00000000
135 */
136 #define __HAL_SYSCFG_REMAPMEMORY_FLASH() (SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE))
137
138 /** @brief System Flash memory mapped at 0x00000000
139 */
140 #define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
141 SYSCFG->MEMRMP |= SYSCFG_MEMRMP_MEM_MODE_0;\
142 }while(0);
143
144 /** @brief Embedded SRAM mapped at 0x00000000
145 */
146 #define __HAL_SYSCFG_REMAPMEMORY_SRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
147 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_0 | SYSCFG_MEMRMP_MEM_MODE_1);\
148 }while(0);
149
150 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)
151 /** @brief FSMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000
152 */
153 #define __HAL_SYSCFG_REMAPMEMORY_FSMC() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
154 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\
155 }while(0);
156 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
157
158 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
159 defined(STM32F469xx) || defined(STM32F479xx)
160 /** @brief FMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000
161 */
162 #define __HAL_SYSCFG_REMAPMEMORY_FMC() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
163 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\
164 }while(0);
165
166 /** @brief FMC/SDRAM Bank 1 and 2 mapped at 0x00000000
167 */
168 #define __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
169 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_2);\
170 }while(0);
171 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
172
173 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F413xx) || defined(STM32F423xx)
174 /** @defgroup Cortex_Lockup_Enable Cortex Lockup Enable
175 * @{
176 */
177 /** @brief SYSCFG Break Lockup lock
178 * Enables and locks the connection of Cortex-M4 LOCKUP (Hardfault) output to TIM1/8 input
179 * @note The selected configuration is locked and can be unlocked by system reset
180 */
181 #define __HAL_SYSCFG_BREAK_PVD_LOCK() do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_PVD_LOCK); \
182 SYSCFG->CFGR2 |= SYSCFG_CFGR2_PVD_LOCK; \
183 }while(0)
184 /**
185 * @}
186 */
187
188 /** @defgroup PVD_Lock_Enable PVD Lock
189 * @{
190 */
191 /** @brief SYSCFG Break PVD lock
192 * Enables and locks the PVD connection with Timer1/8 Break Input, , as well as the PVDE and PLS[2:0] in the PWR_CR register
193 * @note The selected configuration is locked and can be unlocked by system reset
194 */
195 #define __HAL_SYSCFG_BREAK_LOCKUP_LOCK() do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_LOCKUP_LOCK); \
196 SYSCFG->CFGR2 |= SYSCFG_CFGR2_LOCKUP_LOCK; \
197 }while(0)
198 /**
199 * @}
200 */
201 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx || STM32F413xx || STM32F423xx */
202 /**
203 * @}
204 */
205
206 /** @defgroup HAL_Private_Macros HAL Private Macros
207 * @{
208 */
209 #define IS_TICKFREQ(FREQ) (((FREQ) == HAL_TICK_FREQ_10HZ) || \
210 ((FREQ) == HAL_TICK_FREQ_100HZ) || \
211 ((FREQ) == HAL_TICK_FREQ_1KHZ))
212 /**
213 * @}
214 */
215
216 /* Exported functions --------------------------------------------------------*/
217 /** @addtogroup HAL_Exported_Functions
218 * @{
219 */
220 /** @addtogroup HAL_Exported_Functions_Group1
221 * @{
222 */
223 /* Initialization and Configuration functions ******************************/
224 HAL_StatusTypeDef HAL_Init(void);
225 HAL_StatusTypeDef HAL_DeInit(void);
226 void HAL_MspInit(void);
227 void HAL_MspDeInit(void);
228 HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority);
229 /**
230 * @}
231 */
232
233 /** @addtogroup HAL_Exported_Functions_Group2
234 * @{
235 */
236 /* Peripheral Control functions ************************************************/
237 void HAL_IncTick(void);
238 void HAL_Delay(uint32_t Delay);
239 uint32_t HAL_GetTick(void);
240 uint32_t HAL_GetTickPrio(void);
241 HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq);
242 HAL_TickFreqTypeDef HAL_GetTickFreq(void);
243 void HAL_SuspendTick(void);
244 void HAL_ResumeTick(void);
245 uint32_t HAL_GetHalVersion(void);
246 uint32_t HAL_GetREVID(void);
247 uint32_t HAL_GetDEVID(void);
248 void HAL_DBGMCU_EnableDBGSleepMode(void);
249 void HAL_DBGMCU_DisableDBGSleepMode(void);
250 void HAL_DBGMCU_EnableDBGStopMode(void);
251 void HAL_DBGMCU_DisableDBGStopMode(void);
252 void HAL_DBGMCU_EnableDBGStandbyMode(void);
253 void HAL_DBGMCU_DisableDBGStandbyMode(void);
254 void HAL_EnableCompensationCell(void);
255 void HAL_DisableCompensationCell(void);
256 void HAL_GetUID(uint32_t *UID);
257 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
258 defined(STM32F469xx) || defined(STM32F479xx)
259 void HAL_EnableMemorySwappingBank(void);
260 void HAL_DisableMemorySwappingBank(void);
261 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
262 /**
263 * @}
264 */
265
266 /**
267 * @}
268 */
269 /* Private types -------------------------------------------------------------*/
270 /* Private variables ---------------------------------------------------------*/
271 /** @defgroup HAL_Private_Variables HAL Private Variables
272 * @{
273 */
274 /**
275 * @}
276 */
277 /* Private constants ---------------------------------------------------------*/
278 /** @defgroup HAL_Private_Constants HAL Private Constants
279 * @{
280 */
281 /**
282 * @}
283 */
284 /* Private macros ------------------------------------------------------------*/
285 /* Private functions ---------------------------------------------------------*/
286 /**
287 * @}
288 */
289
290 /**
291 * @}
292 */
293
294 #ifdef __cplusplus
295 }
296 #endif
297
298 #endif /* __STM32F4xx_HAL_H */
299
300 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/