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Added current STM32 standandard libraries in version independend folder structure
author Ideenmodellierer
date Sun, 17 Feb 2019 21:12:22 +0100
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127:1369f8660eaa 128:c78bcbd5deda
1 /**
2 ******************************************************************************
3 * @file stm32f4xx_hal_can_legacy.h
4 * @author MCD Application Team
5 * @brief Header file of CAN HAL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
10 *
11 * Redistribution and use in source and binary forms, with or without modification,
12 * are permitted provided that the following conditions are met:
13 * 1. Redistributions of source code must retain the above copyright notice,
14 * this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright notice,
16 * this list of conditions and the following disclaimer in the documentation
17 * and/or other materials provided with the distribution.
18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 ******************************************************************************
34 */
35
36 /* Define to prevent recursive inclusion -------------------------------------*/
37 #ifndef __STM32F4xx_HAL_CAN_LEGACY_H
38 #define __STM32F4xx_HAL_CAN_LEGACY_H
39
40 #ifdef __cplusplus
41 extern "C" {
42 #endif
43
44 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
45 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
46 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) ||\
47 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\
48 defined(STM32F423xx)
49 /* Includes ------------------------------------------------------------------*/
50 #include "stm32f4xx_hal_def.h"
51
52 /** @addtogroup STM32F4xx_HAL_Driver
53 * @{
54 */
55
56 /** @addtogroup CAN
57 * @{
58 */
59
60 /* Exported types ------------------------------------------------------------*/
61 /** @defgroup CAN_Exported_Types CAN Exported Types
62 * @{
63 */
64
65 /**
66 * @brief HAL State structures definition
67 */
68 typedef enum
69 {
70 HAL_CAN_STATE_RESET = 0x00U, /*!< CAN not yet initialized or disabled */
71 HAL_CAN_STATE_READY = 0x01U, /*!< CAN initialized and ready for use */
72 HAL_CAN_STATE_BUSY = 0x02U, /*!< CAN process is ongoing */
73 HAL_CAN_STATE_BUSY_TX = 0x12U, /*!< CAN process is ongoing */
74 HAL_CAN_STATE_BUSY_RX0 = 0x22U, /*!< CAN process is ongoing */
75 HAL_CAN_STATE_BUSY_RX1 = 0x32U, /*!< CAN process is ongoing */
76 HAL_CAN_STATE_BUSY_TX_RX0 = 0x42U, /*!< CAN process is ongoing */
77 HAL_CAN_STATE_BUSY_TX_RX1 = 0x52U, /*!< CAN process is ongoing */
78 HAL_CAN_STATE_BUSY_RX0_RX1 = 0x62U, /*!< CAN process is ongoing */
79 HAL_CAN_STATE_BUSY_TX_RX0_RX1 = 0x72U, /*!< CAN process is ongoing */
80 HAL_CAN_STATE_TIMEOUT = 0x03U, /*!< CAN in Timeout state */
81 HAL_CAN_STATE_ERROR = 0x04U /*!< CAN error state */
82
83 }HAL_CAN_StateTypeDef;
84
85 /**
86 * @brief CAN init structure definition
87 */
88 typedef struct
89 {
90 uint32_t Prescaler; /*!< Specifies the length of a time quantum.
91 This parameter must be a number between Min_Data = 1 and Max_Data = 1024 */
92
93 uint32_t Mode; /*!< Specifies the CAN operating mode.
94 This parameter can be a value of @ref CAN_operating_mode */
95
96 uint32_t SJW; /*!< Specifies the maximum number of time quanta
97 the CAN hardware is allowed to lengthen or
98 shorten a bit to perform resynchronization.
99 This parameter can be a value of @ref CAN_synchronisation_jump_width */
100
101 uint32_t BS1; /*!< Specifies the number of time quanta in Bit Segment 1.
102 This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */
103
104 uint32_t BS2; /*!< Specifies the number of time quanta in Bit Segment 2.
105 This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */
106
107 uint32_t TTCM; /*!< Enable or disable the time triggered communication mode.
108 This parameter can be set to ENABLE or DISABLE. */
109
110 uint32_t ABOM; /*!< Enable or disable the automatic bus-off management.
111 This parameter can be set to ENABLE or DISABLE */
112
113 uint32_t AWUM; /*!< Enable or disable the automatic wake-up mode.
114 This parameter can be set to ENABLE or DISABLE */
115
116 uint32_t NART; /*!< Enable or disable the non-automatic retransmission mode.
117 This parameter can be set to ENABLE or DISABLE */
118
119 uint32_t RFLM; /*!< Enable or disable the receive FIFO Locked mode.
120 This parameter can be set to ENABLE or DISABLE */
121
122 uint32_t TXFP; /*!< Enable or disable the transmit FIFO priority.
123 This parameter can be set to ENABLE or DISABLE */
124 }CAN_InitTypeDef;
125
126 /**
127 * @brief CAN filter configuration structure definition
128 */
129 typedef struct
130 {
131 uint32_t FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit
132 configuration, first one for a 16-bit configuration).
133 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
134
135 uint32_t FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit
136 configuration, second one for a 16-bit configuration).
137 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
138
139 uint32_t FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number,
140 according to the mode (MSBs for a 32-bit configuration,
141 first one for a 16-bit configuration).
142 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
143
144 uint32_t FilterMaskIdLow; /*!< Specifies the filter mask number or identification number,
145 according to the mode (LSBs for a 32-bit configuration,
146 second one for a 16-bit configuration).
147 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
148
149 uint32_t FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1) which will be assigned to the filter.
150 This parameter can be a value of @ref CAN_filter_FIFO */
151
152 uint32_t FilterNumber; /*!< Specifies the filter which will be initialized.
153 This parameter must be a number between Min_Data = 0 and Max_Data = 27 */
154
155 uint32_t FilterMode; /*!< Specifies the filter mode to be initialized.
156 This parameter can be a value of @ref CAN_filter_mode */
157
158 uint32_t FilterScale; /*!< Specifies the filter scale.
159 This parameter can be a value of @ref CAN_filter_scale */
160
161 uint32_t FilterActivation; /*!< Enable or disable the filter.
162 This parameter can be set to ENABLE or DISABLE. */
163
164 uint32_t BankNumber; /*!< Select the start slave bank filter.
165 This parameter must be a number between Min_Data = 0 and Max_Data = 28 */
166
167 }CAN_FilterConfTypeDef;
168
169 /**
170 * @brief CAN Tx message structure definition
171 */
172 typedef struct
173 {
174 uint32_t StdId; /*!< Specifies the standard identifier.
175 This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */
176
177 uint32_t ExtId; /*!< Specifies the extended identifier.
178 This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */
179
180 uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted.
181 This parameter can be a value of @ref CAN_Identifier_Type */
182
183 uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted.
184 This parameter can be a value of @ref CAN_remote_transmission_request */
185
186 uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted.
187 This parameter must be a number between Min_Data = 0 and Max_Data = 8 */
188
189 uint8_t Data[8]; /*!< Contains the data to be transmitted.
190 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
191
192 }CanTxMsgTypeDef;
193
194 /**
195 * @brief CAN Rx message structure definition
196 */
197 typedef struct
198 {
199 uint32_t StdId; /*!< Specifies the standard identifier.
200 This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */
201
202 uint32_t ExtId; /*!< Specifies the extended identifier.
203 This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */
204
205 uint32_t IDE; /*!< Specifies the type of identifier for the message that will be received.
206 This parameter can be a value of @ref CAN_Identifier_Type */
207
208 uint32_t RTR; /*!< Specifies the type of frame for the received message.
209 This parameter can be a value of @ref CAN_remote_transmission_request */
210
211 uint32_t DLC; /*!< Specifies the length of the frame that will be received.
212 This parameter must be a number between Min_Data = 0 and Max_Data = 8 */
213
214 uint8_t Data[8]; /*!< Contains the data to be received.
215 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
216
217 uint32_t FMI; /*!< Specifies the index of the filter the message stored in the mailbox passes through.
218 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
219
220 uint32_t FIFONumber; /*!< Specifies the receive FIFO number.
221 This parameter can be CAN_FIFO0 or CAN_FIFO1 */
222
223 }CanRxMsgTypeDef;
224
225 /**
226 * @brief CAN handle Structure definition
227 */
228 typedef struct
229 {
230 CAN_TypeDef *Instance; /*!< Register base address */
231
232 CAN_InitTypeDef Init; /*!< CAN required parameters */
233
234 CanTxMsgTypeDef* pTxMsg; /*!< Pointer to transmit structure */
235
236 CanRxMsgTypeDef* pRxMsg; /*!< Pointer to reception structure for RX FIFO0 msg */
237
238 CanRxMsgTypeDef* pRx1Msg; /*!< Pointer to reception structure for RX FIFO1 msg */
239
240 __IO HAL_CAN_StateTypeDef State; /*!< CAN communication state */
241
242 HAL_LockTypeDef Lock; /*!< CAN locking object */
243
244 __IO uint32_t ErrorCode; /*!< CAN Error code */
245
246 }CAN_HandleTypeDef;
247
248 /**
249 * @}
250 */
251
252 /* Exported constants --------------------------------------------------------*/
253 /** @defgroup CAN_Exported_Constants CAN Exported Constants
254 * @{
255 */
256
257 /** @defgroup CAN_Error_Code CAN Error Code
258 * @{
259 */
260 #define HAL_CAN_ERROR_NONE 0x00000000U /*!< No error */
261 #define HAL_CAN_ERROR_EWG 0x00000001U /*!< EWG error */
262 #define HAL_CAN_ERROR_EPV 0x00000002U /*!< EPV error */
263 #define HAL_CAN_ERROR_BOF 0x00000004U /*!< BOF error */
264 #define HAL_CAN_ERROR_STF 0x00000008U /*!< Stuff error */
265 #define HAL_CAN_ERROR_FOR 0x00000010U /*!< Form error */
266 #define HAL_CAN_ERROR_ACK 0x00000020U /*!< Acknowledgment error */
267 #define HAL_CAN_ERROR_BR 0x00000040U /*!< Bit recessive */
268 #define HAL_CAN_ERROR_BD 0x00000080U /*!< LEC dominant */
269 #define HAL_CAN_ERROR_CRC 0x00000100U /*!< LEC transfer error */
270 #define HAL_CAN_ERROR_FOV0 0x00000200U /*!< FIFO0 overrun error */
271 #define HAL_CAN_ERROR_FOV1 0x00000400U /*!< FIFO1 overrun error */
272 #define HAL_CAN_ERROR_TXFAIL 0x00000800U /*!< Transmit failure */
273 /**
274 * @}
275 */
276
277 /** @defgroup CAN_InitStatus CAN InitStatus
278 * @{
279 */
280 #define CAN_INITSTATUS_FAILED ((uint8_t)0x00) /*!< CAN initialization failed */
281 #define CAN_INITSTATUS_SUCCESS ((uint8_t)0x01) /*!< CAN initialization OK */
282 /**
283 * @}
284 */
285
286 /** @defgroup CAN_operating_mode CAN Operating Mode
287 * @{
288 */
289 #define CAN_MODE_NORMAL 0x00000000U /*!< Normal mode */
290 #define CAN_MODE_LOOPBACK ((uint32_t)CAN_BTR_LBKM) /*!< Loopback mode */
291 #define CAN_MODE_SILENT ((uint32_t)CAN_BTR_SILM) /*!< Silent mode */
292 #define CAN_MODE_SILENT_LOOPBACK ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM)) /*!< Loopback combined with silent mode */
293 /**
294 * @}
295 */
296
297 /** @defgroup CAN_synchronisation_jump_width CAN Synchronisation Jump Width
298 * @{
299 */
300 #define CAN_SJW_1TQ 0x00000000U /*!< 1 time quantum */
301 #define CAN_SJW_2TQ ((uint32_t)CAN_BTR_SJW_0) /*!< 2 time quantum */
302 #define CAN_SJW_3TQ ((uint32_t)CAN_BTR_SJW_1) /*!< 3 time quantum */
303 #define CAN_SJW_4TQ ((uint32_t)CAN_BTR_SJW) /*!< 4 time quantum */
304 /**
305 * @}
306 */
307
308 /** @defgroup CAN_time_quantum_in_bit_segment_1 CAN Time Quantum in bit segment 1
309 * @{
310 */
311 #define CAN_BS1_1TQ 0x00000000U /*!< 1 time quantum */
312 #define CAN_BS1_2TQ ((uint32_t)CAN_BTR_TS1_0) /*!< 2 time quantum */
313 #define CAN_BS1_3TQ ((uint32_t)CAN_BTR_TS1_1) /*!< 3 time quantum */
314 #define CAN_BS1_4TQ ((uint32_t)(CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 4 time quantum */
315 #define CAN_BS1_5TQ ((uint32_t)CAN_BTR_TS1_2) /*!< 5 time quantum */
316 #define CAN_BS1_6TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 6 time quantum */
317 #define CAN_BS1_7TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 7 time quantum */
318 #define CAN_BS1_8TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 8 time quantum */
319 #define CAN_BS1_9TQ ((uint32_t)CAN_BTR_TS1_3) /*!< 9 time quantum */
320 #define CAN_BS1_10TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_0)) /*!< 10 time quantum */
321 #define CAN_BS1_11TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1)) /*!< 11 time quantum */
322 #define CAN_BS1_12TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 12 time quantum */
323 #define CAN_BS1_13TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2)) /*!< 13 time quantum */
324 #define CAN_BS1_14TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 14 time quantum */
325 #define CAN_BS1_15TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 15 time quantum */
326 #define CAN_BS1_16TQ ((uint32_t)CAN_BTR_TS1) /*!< 16 time quantum */
327 /**
328 * @}
329 */
330
331 /** @defgroup CAN_time_quantum_in_bit_segment_2 CAN Time Quantum in bit segment 2
332 * @{
333 */
334 #define CAN_BS2_1TQ 0x00000000U /*!< 1 time quantum */
335 #define CAN_BS2_2TQ ((uint32_t)CAN_BTR_TS2_0) /*!< 2 time quantum */
336 #define CAN_BS2_3TQ ((uint32_t)CAN_BTR_TS2_1) /*!< 3 time quantum */
337 #define CAN_BS2_4TQ ((uint32_t)(CAN_BTR_TS2_1 | CAN_BTR_TS2_0)) /*!< 4 time quantum */
338 #define CAN_BS2_5TQ ((uint32_t)CAN_BTR_TS2_2) /*!< 5 time quantum */
339 #define CAN_BS2_6TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_0)) /*!< 6 time quantum */
340 #define CAN_BS2_7TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_1)) /*!< 7 time quantum */
341 #define CAN_BS2_8TQ ((uint32_t)CAN_BTR_TS2) /*!< 8 time quantum */
342 /**
343 * @}
344 */
345
346 /** @defgroup CAN_filter_mode CAN Filter Mode
347 * @{
348 */
349 #define CAN_FILTERMODE_IDMASK ((uint8_t)0x00) /*!< Identifier mask mode */
350 #define CAN_FILTERMODE_IDLIST ((uint8_t)0x01) /*!< Identifier list mode */
351 /**
352 * @}
353 */
354
355 /** @defgroup CAN_filter_scale CAN Filter Scale
356 * @{
357 */
358 #define CAN_FILTERSCALE_16BIT ((uint8_t)0x00) /*!< Two 16-bit filters */
359 #define CAN_FILTERSCALE_32BIT ((uint8_t)0x01) /*!< One 32-bit filter */
360 /**
361 * @}
362 */
363
364 /** @defgroup CAN_filter_FIFO CAN Filter FIFO
365 * @{
366 */
367 #define CAN_FILTER_FIFO0 ((uint8_t)0x00) /*!< Filter FIFO 0 assignment for filter x */
368 #define CAN_FILTER_FIFO1 ((uint8_t)0x01) /*!< Filter FIFO 1 assignment for filter x */
369 /**
370 * @}
371 */
372
373 /** @defgroup CAN_Identifier_Type CAN Identifier Type
374 * @{
375 */
376 #define CAN_ID_STD 0x00000000U /*!< Standard Id */
377 #define CAN_ID_EXT 0x00000004U /*!< Extended Id */
378 /**
379 * @}
380 */
381
382 /** @defgroup CAN_remote_transmission_request CAN Remote Transmission Request
383 * @{
384 */
385 #define CAN_RTR_DATA 0x00000000U /*!< Data frame */
386 #define CAN_RTR_REMOTE 0x00000002U /*!< Remote frame */
387 /**
388 * @}
389 */
390
391 /** @defgroup CAN_receive_FIFO_number_constants CAN Receive FIFO Number Constants
392 * @{
393 */
394 #define CAN_FIFO0 ((uint8_t)0x00) /*!< CAN FIFO 0 used to receive */
395 #define CAN_FIFO1 ((uint8_t)0x01) /*!< CAN FIFO 1 used to receive */
396 /**
397 * @}
398 */
399
400 /** @defgroup CAN_flags CAN Flags
401 * @{
402 */
403 /* If the flag is 0x3XXXXXXX, it means that it can be used with CAN_GetFlagStatus()
404 and CAN_ClearFlag() functions. */
405 /* If the flag is 0x1XXXXXXX, it means that it can only be used with
406 CAN_GetFlagStatus() function. */
407
408 /* Transmit Flags */
409 #define CAN_FLAG_RQCP0 0x00000500U /*!< Request MailBox0 flag */
410 #define CAN_FLAG_RQCP1 0x00000508U /*!< Request MailBox1 flag */
411 #define CAN_FLAG_RQCP2 0x00000510U /*!< Request MailBox2 flag */
412 #define CAN_FLAG_TXOK0 0x00000501U /*!< Transmission OK MailBox0 flag */
413 #define CAN_FLAG_TXOK1 0x00000509U /*!< Transmission OK MailBox1 flag */
414 #define CAN_FLAG_TXOK2 0x00000511U /*!< Transmission OK MailBox2 flag */
415 #define CAN_FLAG_TME0 0x0000051AU /*!< Transmit mailbox 0 empty flag */
416 #define CAN_FLAG_TME1 0x0000051BU /*!< Transmit mailbox 0 empty flag */
417 #define CAN_FLAG_TME2 0x0000051CU /*!< Transmit mailbox 0 empty flag */
418
419 /* Receive Flags */
420 #define CAN_FLAG_FF0 0x00000203U /*!< FIFO 0 Full flag */
421 #define CAN_FLAG_FOV0 0x00000204U /*!< FIFO 0 Overrun flag */
422
423 #define CAN_FLAG_FF1 0x00000403U /*!< FIFO 1 Full flag */
424 #define CAN_FLAG_FOV1 0x00000404U /*!< FIFO 1 Overrun flag */
425
426 /* Operating Mode Flags */
427 #define CAN_FLAG_INAK 0x00000100U /*!< Initialization acknowledge flag */
428 #define CAN_FLAG_SLAK 0x00000101U /*!< Sleep acknowledge flag */
429 #define CAN_FLAG_ERRI 0x00000102U /*!< Error flag */
430 #define CAN_FLAG_WKU 0x00000103U /*!< Wake up flag */
431 #define CAN_FLAG_SLAKI 0x00000104U /*!< Sleep acknowledge flag */
432
433 /* @note When SLAK interrupt is disabled (SLKIE=0), no polling on SLAKI is possible.
434 In this case the SLAK bit can be polled.*/
435
436 /* Error Flags */
437 #define CAN_FLAG_EWG 0x00000300U /*!< Error warning flag */
438 #define CAN_FLAG_EPV 0x00000301U /*!< Error passive flag */
439 #define CAN_FLAG_BOF 0x00000302U /*!< Bus-Off flag */
440 /**
441 * @}
442 */
443
444 /** @defgroup CAN_Interrupts CAN Interrupts
445 * @{
446 */
447 #define CAN_IT_TME ((uint32_t)CAN_IER_TMEIE) /*!< Transmit mailbox empty interrupt */
448
449 /* Receive Interrupts */
450 #define CAN_IT_FMP0 ((uint32_t)CAN_IER_FMPIE0) /*!< FIFO 0 message pending interrupt */
451 #define CAN_IT_FF0 ((uint32_t)CAN_IER_FFIE0) /*!< FIFO 0 full interrupt */
452 #define CAN_IT_FOV0 ((uint32_t)CAN_IER_FOVIE0) /*!< FIFO 0 overrun interrupt */
453 #define CAN_IT_FMP1 ((uint32_t)CAN_IER_FMPIE1) /*!< FIFO 1 message pending interrupt */
454 #define CAN_IT_FF1 ((uint32_t)CAN_IER_FFIE1) /*!< FIFO 1 full interrupt */
455 #define CAN_IT_FOV1 ((uint32_t)CAN_IER_FOVIE1) /*!< FIFO 1 overrun interrupt */
456
457 /* Operating Mode Interrupts */
458 #define CAN_IT_WKU ((uint32_t)CAN_IER_WKUIE) /*!< Wake-up interrupt */
459 #define CAN_IT_SLK ((uint32_t)CAN_IER_SLKIE) /*!< Sleep acknowledge interrupt */
460
461 /* Error Interrupts */
462 #define CAN_IT_EWG ((uint32_t)CAN_IER_EWGIE) /*!< Error warning interrupt */
463 #define CAN_IT_EPV ((uint32_t)CAN_IER_EPVIE) /*!< Error passive interrupt */
464 #define CAN_IT_BOF ((uint32_t)CAN_IER_BOFIE) /*!< Bus-off interrupt */
465 #define CAN_IT_LEC ((uint32_t)CAN_IER_LECIE) /*!< Last error code interrupt */
466 #define CAN_IT_ERR ((uint32_t)CAN_IER_ERRIE) /*!< Error Interrupt */
467 /**
468 * @}
469 */
470
471 /** @defgroup CAN_Mailboxes_Definition CAN Mailboxes Definition
472 * @{
473 */
474 #define CAN_TXMAILBOX_0 ((uint8_t)0x00)
475 #define CAN_TXMAILBOX_1 ((uint8_t)0x01)
476 #define CAN_TXMAILBOX_2 ((uint8_t)0x02)
477 /**
478 * @}
479 */
480
481 /**
482 * @}
483 */
484
485 /* Exported macro ------------------------------------------------------------*/
486 /** @defgroup CAN_Exported_Macros CAN Exported Macros
487 * @{
488 */
489
490 /** @brief Reset CAN handle state
491 * @param __HANDLE__ specifies the CAN Handle.
492 * @retval None
493 */
494 #define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET)
495
496 /**
497 * @brief Enable the specified CAN interrupts.
498 * @param __HANDLE__ CAN handle
499 * @param __INTERRUPT__ CAN Interrupt
500 * @retval None
501 */
502 #define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__))
503
504 /**
505 * @brief Disable the specified CAN interrupts.
506 * @param __HANDLE__ CAN handle
507 * @param __INTERRUPT__ CAN Interrupt
508 * @retval None
509 */
510 #define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__))
511
512 /**
513 * @brief Return the number of pending received messages.
514 * @param __HANDLE__ CAN handle
515 * @param __FIFONUMBER__ Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
516 * @retval The number of pending message.
517 */
518 #define __HAL_CAN_MSG_PENDING(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
519 ((uint8_t)((__HANDLE__)->Instance->RF0R&0x03U)) : ((uint8_t)((__HANDLE__)->Instance->RF1R & 0x03U)))
520
521 /** @brief Check whether the specified CAN flag is set or not.
522 * @param __HANDLE__ CAN Handle
523 * @param __FLAG__ specifies the flag to check.
524 * This parameter can be one of the following values:
525 * @arg CAN_TSR_RQCP0: Request MailBox0 Flag
526 * @arg CAN_TSR_RQCP1: Request MailBox1 Flag
527 * @arg CAN_TSR_RQCP2: Request MailBox2 Flag
528 * @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
529 * @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
530 * @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
531 * @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
532 * @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
533 * @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
534 * @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
535 * @arg CAN_FLAG_FF0: FIFO 0 Full Flag
536 * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
537 * @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
538 * @arg CAN_FLAG_FF1: FIFO 1 Full Flag
539 * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
540 * @arg CAN_FLAG_WKU: Wake up Flag
541 * @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
542 * @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
543 * @arg CAN_FLAG_EWG: Error Warning Flag
544 * @arg CAN_FLAG_EPV: Error Passive Flag
545 * @arg CAN_FLAG_BOF: Bus-Off Flag
546 * @retval The new state of __FLAG__ (TRUE or FALSE).
547 */
548 #define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \
549 ((((__FLAG__) >> 8U) == 5U)? ((((__HANDLE__)->Instance->TSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
550 (((__FLAG__) >> 8U) == 2U)? ((((__HANDLE__)->Instance->RF0R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
551 (((__FLAG__) >> 8U) == 4U)? ((((__HANDLE__)->Instance->RF1R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
552 (((__FLAG__) >> 8U) == 1U)? ((((__HANDLE__)->Instance->MSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
553 ((((__HANDLE__)->Instance->ESR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))))
554
555 /** @brief Clear the specified CAN pending flag.
556 * @param __HANDLE__ CAN Handle.
557 * @param __FLAG__ specifies the flag to check.
558 * This parameter can be one of the following values:
559 * @arg CAN_TSR_RQCP0: Request MailBox0 Flag
560 * @arg CAN_TSR_RQCP1: Request MailBox1 Flag
561 * @arg CAN_TSR_RQCP2: Request MailBox2 Flag
562 * @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
563 * @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
564 * @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
565 * @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
566 * @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
567 * @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
568 * @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
569 * @arg CAN_FLAG_FF0: FIFO 0 Full Flag
570 * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
571 * @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
572 * @arg CAN_FLAG_FF1: FIFO 1 Full Flag
573 * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
574 * @arg CAN_FLAG_WKU: Wake up Flag
575 * @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
576 * @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
577 * @retval The new state of __FLAG__ (TRUE or FALSE).
578 */
579 #define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \
580 ((((__FLAG__) >> 8U) == 5U)? (((__HANDLE__)->Instance->TSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
581 (((__FLAG__) >> 8U) == 2U)? (((__HANDLE__)->Instance->RF0R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
582 (((__FLAG__) >> 8U) == 4U)? (((__HANDLE__)->Instance->RF1R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
583 (((__HANDLE__)->Instance->MSR) = ((uint32_t)1U << ((__FLAG__) & CAN_FLAG_MASK))))
584
585 /** @brief Check if the specified CAN interrupt source is enabled or disabled.
586 * @param __HANDLE__ CAN Handle
587 * @param __INTERRUPT__ specifies the CAN interrupt source to check.
588 * This parameter can be one of the following values:
589 * @arg CAN_IT_TME: Transmit mailbox empty interrupt enable
590 * @arg CAN_IT_FMP0: FIFO0 message pending interrupt enable
591 * @arg CAN_IT_FMP1: FIFO1 message pending interrupt enable
592 * @retval The new state of __IT__ (TRUE or FALSE).
593 */
594 #define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
595
596 /**
597 * @brief Check the transmission status of a CAN Frame.
598 * @param __HANDLE__ CAN Handle
599 * @param __TRANSMITMAILBOX__ the number of the mailbox that is used for transmission.
600 * @retval The new status of transmission (TRUE or FALSE).
601 */
602 #define __HAL_CAN_TRANSMIT_STATUS(__HANDLE__, __TRANSMITMAILBOX__)\
603 (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) == (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) :\
604 ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) == (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) :\
605 ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)) == (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)))
606
607 /**
608 * @brief Release the specified receive FIFO.
609 * @param __HANDLE__ CAN handle
610 * @param __FIFONUMBER__ Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
611 * @retval None
612 */
613 #define __HAL_CAN_FIFO_RELEASE(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
614 ((__HANDLE__)->Instance->RF0R = CAN_RF0R_RFOM0) : ((__HANDLE__)->Instance->RF1R = CAN_RF1R_RFOM1))
615
616 /**
617 * @brief Cancel a transmit request.
618 * @param __HANDLE__ CAN Handle
619 * @param __TRANSMITMAILBOX__ the number of the mailbox that is used for transmission.
620 * @retval None
621 */
622 #define __HAL_CAN_CANCEL_TRANSMIT(__HANDLE__, __TRANSMITMAILBOX__)\
623 (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((__HANDLE__)->Instance->TSR = CAN_TSR_ABRQ0) :\
624 ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((__HANDLE__)->Instance->TSR = CAN_TSR_ABRQ1) :\
625 ((__HANDLE__)->Instance->TSR = CAN_TSR_ABRQ2))
626
627 /**
628 * @brief Enable or disable the DBG Freeze for CAN.
629 * @param __HANDLE__ CAN Handle
630 * @param __NEWSTATE__ new state of the CAN peripheral.
631 * This parameter can be: ENABLE (CAN reception/transmission is frozen
632 * during debug. Reception FIFOs can still be accessed/controlled normally)
633 * or DISABLE (CAN is working during debug).
634 * @retval None
635 */
636 #define __HAL_CAN_DBG_FREEZE(__HANDLE__, __NEWSTATE__) (((__NEWSTATE__) == ENABLE)? \
637 ((__HANDLE__)->Instance->MCR |= CAN_MCR_DBF) : ((__HANDLE__)->Instance->MCR &= ~CAN_MCR_DBF))
638
639 /**
640 * @}
641 */
642
643 /* Exported functions --------------------------------------------------------*/
644 /** @addtogroup CAN_Exported_Functions
645 * @{
646 */
647
648 /** @addtogroup CAN_Exported_Functions_Group1
649 * @{
650 */
651 /* Initialization/de-initialization functions ***********************************/
652 HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan);
653 HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTypeDef* sFilterConfig);
654 HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan);
655 void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan);
656 void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan);
657 /**
658 * @}
659 */
660
661 /** @addtogroup CAN_Exported_Functions_Group2
662 * @{
663 */
664 /* I/O operation functions ******************************************************/
665 HAL_StatusTypeDef HAL_CAN_Transmit(CAN_HandleTypeDef *hcan, uint32_t Timeout);
666 HAL_StatusTypeDef HAL_CAN_Transmit_IT(CAN_HandleTypeDef *hcan);
667 HAL_StatusTypeDef HAL_CAN_Receive(CAN_HandleTypeDef *hcan, uint8_t FIFONumber, uint32_t Timeout);
668 HAL_StatusTypeDef HAL_CAN_Receive_IT(CAN_HandleTypeDef *hcan, uint8_t FIFONumber);
669 HAL_StatusTypeDef HAL_CAN_Sleep(CAN_HandleTypeDef *hcan);
670 HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan);
671 void HAL_CAN_IRQHandler(CAN_HandleTypeDef* hcan);
672 void HAL_CAN_TxCpltCallback(CAN_HandleTypeDef* hcan);
673 void HAL_CAN_RxCpltCallback(CAN_HandleTypeDef* hcan);
674 void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan);
675 /**
676 * @}
677 */
678
679 /** @addtogroup CAN_Exported_Functions_Group3
680 * @{
681 */
682 /* Peripheral State functions ***************************************************/
683 uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan);
684 HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan);
685 /**
686 * @}
687 */
688
689 /**
690 * @}
691 */
692
693 /* Private types -------------------------------------------------------------*/
694 /** @defgroup CAN_Private_Types CAN Private Types
695 * @{
696 */
697
698 /**
699 * @}
700 */
701
702 /* Private variables ---------------------------------------------------------*/
703 /** @defgroup CAN_Private_Variables CAN Private Variables
704 * @{
705 */
706
707 /**
708 * @}
709 */
710
711 /* Private constants ---------------------------------------------------------*/
712 /** @defgroup CAN_Private_Constants CAN Private Constants
713 * @{
714 */
715 #define CAN_TXSTATUS_NOMAILBOX ((uint8_t)0x04) /*!< CAN cell did not provide CAN_TxStatus_NoMailBox */
716 #define CAN_FLAG_MASK 0x000000FFU
717 /**
718 * @}
719 */
720
721 /* Private macros ------------------------------------------------------------*/
722 /** @defgroup CAN_Private_Macros CAN Private Macros
723 * @{
724 */
725 #define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \
726 ((MODE) == CAN_MODE_LOOPBACK)|| \
727 ((MODE) == CAN_MODE_SILENT) || \
728 ((MODE) == CAN_MODE_SILENT_LOOPBACK))
729 #define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) || ((SJW) == CAN_SJW_2TQ)|| \
730 ((SJW) == CAN_SJW_3TQ) || ((SJW) == CAN_SJW_4TQ))
731 #define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16TQ)
732 #define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8TQ)
733 #define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1U) && ((PRESCALER) <= 1024U))
734 #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27U)
735 #define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \
736 ((MODE) == CAN_FILTERMODE_IDLIST))
737 #define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) || \
738 ((SCALE) == CAN_FILTERSCALE_32BIT))
739 #define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) || \
740 ((FIFO) == CAN_FILTER_FIFO1))
741 #define IS_CAN_BANKNUMBER(BANKNUMBER) ((BANKNUMBER) <= 28U)
742
743 #define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02))
744 #define IS_CAN_STDID(STDID) ((STDID) <= ((uint32_t)0x7FFU))
745 #define IS_CAN_EXTID(EXTID) ((EXTID) <= 0x1FFFFFFFU)
746 #define IS_CAN_DLC(DLC) ((DLC) <= ((uint8_t)0x08))
747
748 #define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_ID_STD) || \
749 ((IDTYPE) == CAN_ID_EXT))
750 #define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE))
751 #define IS_CAN_FIFO(FIFO) (((FIFO) == CAN_FIFO0) || ((FIFO) == CAN_FIFO1))
752
753 /**
754 * @}
755 */
756
757 /* Private functions ---------------------------------------------------------*/
758 /** @defgroup CAN_Private_Functions CAN Private Functions
759 * @{
760 */
761
762 /**
763 * @}
764 */
765
766 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx ||\
767 STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx ||\
768 STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
769
770 /**
771 * @}
772 */
773
774 /**
775 * @}
776 */
777
778 #ifdef __cplusplus
779 }
780 #endif
781
782 #endif /* __STM32F4xx_HAL_CAN_LEGACY_H */
783
784
785 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/