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comparison Common/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h @ 128:c78bcbd5deda FlipDisplay
Added current STM32 standandard libraries in version independend folder structure
| author | Ideenmodellierer |
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| date | Sun, 17 Feb 2019 21:12:22 +0100 |
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| 127:1369f8660eaa | 128:c78bcbd5deda |
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| 1 /** | |
| 2 ****************************************************************************** | |
| 3 * @file stm32_hal_legacy.h | |
| 4 * @author MCD Application Team | |
| 5 * @brief This file contains aliases definition for the STM32Cube HAL constants | |
| 6 * macros and functions maintained for legacy purpose. | |
| 7 ****************************************************************************** | |
| 8 * @attention | |
| 9 * | |
| 10 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> | |
| 11 * | |
| 12 * Redistribution and use in source and binary forms, with or without modification, | |
| 13 * are permitted provided that the following conditions are met: | |
| 14 * 1. Redistributions of source code must retain the above copyright notice, | |
| 15 * this list of conditions and the following disclaimer. | |
| 16 * 2. Redistributions in binary form must reproduce the above copyright notice, | |
| 17 * this list of conditions and the following disclaimer in the documentation | |
| 18 * and/or other materials provided with the distribution. | |
| 19 * 3. Neither the name of STMicroelectronics nor the names of its contributors | |
| 20 * may be used to endorse or promote products derived from this software | |
| 21 * without specific prior written permission. | |
| 22 * | |
| 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
| 24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
| 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | |
| 26 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE | |
| 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
| 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | |
| 29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | |
| 30 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | |
| 31 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
| 32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
| 33 * | |
| 34 ****************************************************************************** | |
| 35 */ | |
| 36 | |
| 37 /* Define to prevent recursive inclusion -------------------------------------*/ | |
| 38 #ifndef __STM32_HAL_LEGACY | |
| 39 #define __STM32_HAL_LEGACY | |
| 40 | |
| 41 #ifdef __cplusplus | |
| 42 extern "C" { | |
| 43 #endif | |
| 44 | |
| 45 /* Includes ------------------------------------------------------------------*/ | |
| 46 /* Exported types ------------------------------------------------------------*/ | |
| 47 /* Exported constants --------------------------------------------------------*/ | |
| 48 | |
| 49 /** @defgroup HAL_AES_Aliased_Defines HAL CRYP Aliased Defines maintained for legacy purpose | |
| 50 * @{ | |
| 51 */ | |
| 52 #define AES_FLAG_RDERR CRYP_FLAG_RDERR | |
| 53 #define AES_FLAG_WRERR CRYP_FLAG_WRERR | |
| 54 #define AES_CLEARFLAG_CCF CRYP_CLEARFLAG_CCF | |
| 55 #define AES_CLEARFLAG_RDERR CRYP_CLEARFLAG_RDERR | |
| 56 #define AES_CLEARFLAG_WRERR CRYP_CLEARFLAG_WRERR | |
| 57 | |
| 58 /** | |
| 59 * @} | |
| 60 */ | |
| 61 | |
| 62 /** @defgroup HAL_ADC_Aliased_Defines HAL ADC Aliased Defines maintained for legacy purpose | |
| 63 * @{ | |
| 64 */ | |
| 65 #define ADC_RESOLUTION12b ADC_RESOLUTION_12B | |
| 66 #define ADC_RESOLUTION10b ADC_RESOLUTION_10B | |
| 67 #define ADC_RESOLUTION8b ADC_RESOLUTION_8B | |
| 68 #define ADC_RESOLUTION6b ADC_RESOLUTION_6B | |
| 69 #define OVR_DATA_OVERWRITTEN ADC_OVR_DATA_OVERWRITTEN | |
| 70 #define OVR_DATA_PRESERVED ADC_OVR_DATA_PRESERVED | |
| 71 #define EOC_SINGLE_CONV ADC_EOC_SINGLE_CONV | |
| 72 #define EOC_SEQ_CONV ADC_EOC_SEQ_CONV | |
| 73 #define EOC_SINGLE_SEQ_CONV ADC_EOC_SINGLE_SEQ_CONV | |
| 74 #define REGULAR_GROUP ADC_REGULAR_GROUP | |
| 75 #define INJECTED_GROUP ADC_INJECTED_GROUP | |
| 76 #define REGULAR_INJECTED_GROUP ADC_REGULAR_INJECTED_GROUP | |
| 77 #define AWD_EVENT ADC_AWD_EVENT | |
| 78 #define AWD1_EVENT ADC_AWD1_EVENT | |
| 79 #define AWD2_EVENT ADC_AWD2_EVENT | |
| 80 #define AWD3_EVENT ADC_AWD3_EVENT | |
| 81 #define OVR_EVENT ADC_OVR_EVENT | |
| 82 #define JQOVF_EVENT ADC_JQOVF_EVENT | |
| 83 #define ALL_CHANNELS ADC_ALL_CHANNELS | |
| 84 #define REGULAR_CHANNELS ADC_REGULAR_CHANNELS | |
| 85 #define INJECTED_CHANNELS ADC_INJECTED_CHANNELS | |
| 86 #define SYSCFG_FLAG_SENSOR_ADC ADC_FLAG_SENSOR | |
| 87 #define SYSCFG_FLAG_VREF_ADC ADC_FLAG_VREFINT | |
| 88 #define ADC_CLOCKPRESCALER_PCLK_DIV1 ADC_CLOCK_SYNC_PCLK_DIV1 | |
| 89 #define ADC_CLOCKPRESCALER_PCLK_DIV2 ADC_CLOCK_SYNC_PCLK_DIV2 | |
| 90 #define ADC_CLOCKPRESCALER_PCLK_DIV4 ADC_CLOCK_SYNC_PCLK_DIV4 | |
| 91 #define ADC_CLOCKPRESCALER_PCLK_DIV6 ADC_CLOCK_SYNC_PCLK_DIV6 | |
| 92 #define ADC_CLOCKPRESCALER_PCLK_DIV8 ADC_CLOCK_SYNC_PCLK_DIV8 | |
| 93 #define ADC_EXTERNALTRIG0_T6_TRGO ADC_EXTERNALTRIGCONV_T6_TRGO | |
| 94 #define ADC_EXTERNALTRIG1_T21_CC2 ADC_EXTERNALTRIGCONV_T21_CC2 | |
| 95 #define ADC_EXTERNALTRIG2_T2_TRGO ADC_EXTERNALTRIGCONV_T2_TRGO | |
| 96 #define ADC_EXTERNALTRIG3_T2_CC4 ADC_EXTERNALTRIGCONV_T2_CC4 | |
| 97 #define ADC_EXTERNALTRIG4_T22_TRGO ADC_EXTERNALTRIGCONV_T22_TRGO | |
| 98 #define ADC_EXTERNALTRIG7_EXT_IT11 ADC_EXTERNALTRIGCONV_EXT_IT11 | |
| 99 #define ADC_CLOCK_ASYNC ADC_CLOCK_ASYNC_DIV1 | |
| 100 #define ADC_EXTERNALTRIG_EDGE_NONE ADC_EXTERNALTRIGCONVEDGE_NONE | |
| 101 #define ADC_EXTERNALTRIG_EDGE_RISING ADC_EXTERNALTRIGCONVEDGE_RISING | |
| 102 #define ADC_EXTERNALTRIG_EDGE_FALLING ADC_EXTERNALTRIGCONVEDGE_FALLING | |
| 103 #define ADC_EXTERNALTRIG_EDGE_RISINGFALLING ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING | |
| 104 #define ADC_SAMPLETIME_2CYCLE_5 ADC_SAMPLETIME_2CYCLES_5 | |
| 105 | |
| 106 #define HAL_ADC_STATE_BUSY_REG HAL_ADC_STATE_REG_BUSY | |
| 107 #define HAL_ADC_STATE_BUSY_INJ HAL_ADC_STATE_INJ_BUSY | |
| 108 #define HAL_ADC_STATE_EOC_REG HAL_ADC_STATE_REG_EOC | |
| 109 #define HAL_ADC_STATE_EOC_INJ HAL_ADC_STATE_INJ_EOC | |
| 110 #define HAL_ADC_STATE_ERROR HAL_ADC_STATE_ERROR_INTERNAL | |
| 111 #define HAL_ADC_STATE_BUSY HAL_ADC_STATE_BUSY_INTERNAL | |
| 112 #define HAL_ADC_STATE_AWD HAL_ADC_STATE_AWD1 | |
| 113 /** | |
| 114 * @} | |
| 115 */ | |
| 116 | |
| 117 /** @defgroup HAL_CEC_Aliased_Defines HAL CEC Aliased Defines maintained for legacy purpose | |
| 118 * @{ | |
| 119 */ | |
| 120 | |
| 121 #define __HAL_CEC_GET_IT __HAL_CEC_GET_FLAG | |
| 122 | |
| 123 /** | |
| 124 * @} | |
| 125 */ | |
| 126 | |
| 127 /** @defgroup HAL_COMP_Aliased_Defines HAL COMP Aliased Defines maintained for legacy purpose | |
| 128 * @{ | |
| 129 */ | |
| 130 #define COMP_WINDOWMODE_DISABLED COMP_WINDOWMODE_DISABLE | |
| 131 #define COMP_WINDOWMODE_ENABLED COMP_WINDOWMODE_ENABLE | |
| 132 #define COMP_EXTI_LINE_COMP1_EVENT COMP_EXTI_LINE_COMP1 | |
| 133 #define COMP_EXTI_LINE_COMP2_EVENT COMP_EXTI_LINE_COMP2 | |
| 134 #define COMP_EXTI_LINE_COMP3_EVENT COMP_EXTI_LINE_COMP3 | |
| 135 #define COMP_EXTI_LINE_COMP4_EVENT COMP_EXTI_LINE_COMP4 | |
| 136 #define COMP_EXTI_LINE_COMP5_EVENT COMP_EXTI_LINE_COMP5 | |
| 137 #define COMP_EXTI_LINE_COMP6_EVENT COMP_EXTI_LINE_COMP6 | |
| 138 #define COMP_EXTI_LINE_COMP7_EVENT COMP_EXTI_LINE_COMP7 | |
| 139 #if defined(STM32L0) | |
| 140 #define COMP_LPTIMCONNECTION_ENABLED ((uint32_t)0x00000003U) /*!< COMPX output generic naming: connected to LPTIM input 1 for COMP1, LPTIM input 2 for COMP2 */ | |
| 141 #endif | |
| 142 #define COMP_OUTPUT_COMP6TIM2OCREFCLR COMP_OUTPUT_COMP6_TIM2OCREFCLR | |
| 143 #if defined(STM32F373xC) || defined(STM32F378xx) | |
| 144 #define COMP_OUTPUT_TIM3IC1 COMP_OUTPUT_COMP1_TIM3IC1 | |
| 145 #define COMP_OUTPUT_TIM3OCREFCLR COMP_OUTPUT_COMP1_TIM3OCREFCLR | |
| 146 #endif /* STM32F373xC || STM32F378xx */ | |
| 147 | |
| 148 #if defined(STM32L0) || defined(STM32L4) | |
| 149 #define COMP_WINDOWMODE_ENABLE COMP_WINDOWMODE_COMP1_INPUT_PLUS_COMMON | |
| 150 | |
| 151 #define COMP_NONINVERTINGINPUT_IO1 COMP_INPUT_PLUS_IO1 | |
| 152 #define COMP_NONINVERTINGINPUT_IO2 COMP_INPUT_PLUS_IO2 | |
| 153 #define COMP_NONINVERTINGINPUT_IO3 COMP_INPUT_PLUS_IO3 | |
| 154 #define COMP_NONINVERTINGINPUT_IO4 COMP_INPUT_PLUS_IO4 | |
| 155 #define COMP_NONINVERTINGINPUT_IO5 COMP_INPUT_PLUS_IO5 | |
| 156 #define COMP_NONINVERTINGINPUT_IO6 COMP_INPUT_PLUS_IO6 | |
| 157 | |
| 158 #define COMP_INVERTINGINPUT_1_4VREFINT COMP_INPUT_MINUS_1_4VREFINT | |
| 159 #define COMP_INVERTINGINPUT_1_2VREFINT COMP_INPUT_MINUS_1_2VREFINT | |
| 160 #define COMP_INVERTINGINPUT_3_4VREFINT COMP_INPUT_MINUS_3_4VREFINT | |
| 161 #define COMP_INVERTINGINPUT_VREFINT COMP_INPUT_MINUS_VREFINT | |
| 162 #define COMP_INVERTINGINPUT_DAC1_CH1 COMP_INPUT_MINUS_DAC1_CH1 | |
| 163 #define COMP_INVERTINGINPUT_DAC1_CH2 COMP_INPUT_MINUS_DAC1_CH2 | |
| 164 #define COMP_INVERTINGINPUT_DAC1 COMP_INPUT_MINUS_DAC1_CH1 | |
| 165 #define COMP_INVERTINGINPUT_DAC2 COMP_INPUT_MINUS_DAC1_CH2 | |
| 166 #define COMP_INVERTINGINPUT_IO1 COMP_INPUT_MINUS_IO1 | |
| 167 #if defined(STM32L0) | |
| 168 /* Issue fixed on STM32L0 COMP driver: only 2 dedicated IO (IO1 and IO2), */ | |
| 169 /* IO2 was wrongly assigned to IO shared with DAC and IO3 was corresponding */ | |
| 170 /* to the second dedicated IO (only for COMP2). */ | |
| 171 #define COMP_INVERTINGINPUT_IO2 COMP_INPUT_MINUS_DAC1_CH2 | |
| 172 #define COMP_INVERTINGINPUT_IO3 COMP_INPUT_MINUS_IO2 | |
| 173 #else | |
| 174 #define COMP_INVERTINGINPUT_IO2 COMP_INPUT_MINUS_IO2 | |
| 175 #define COMP_INVERTINGINPUT_IO3 COMP_INPUT_MINUS_IO3 | |
| 176 #endif | |
| 177 #define COMP_INVERTINGINPUT_IO4 COMP_INPUT_MINUS_IO4 | |
| 178 #define COMP_INVERTINGINPUT_IO5 COMP_INPUT_MINUS_IO5 | |
| 179 | |
| 180 #define COMP_OUTPUTLEVEL_LOW COMP_OUTPUT_LEVEL_LOW | |
| 181 #define COMP_OUTPUTLEVEL_HIGH COMP_OUTPUT_LEVEL_HIGH | |
| 182 | |
| 183 /* Note: Literal "COMP_FLAG_LOCK" kept for legacy purpose. */ | |
| 184 /* To check COMP lock state, use macro "__HAL_COMP_IS_LOCKED()". */ | |
| 185 #if defined(COMP_CSR_LOCK) | |
| 186 #define COMP_FLAG_LOCK COMP_CSR_LOCK | |
| 187 #elif defined(COMP_CSR_COMP1LOCK) | |
| 188 #define COMP_FLAG_LOCK COMP_CSR_COMP1LOCK | |
| 189 #elif defined(COMP_CSR_COMPxLOCK) | |
| 190 #define COMP_FLAG_LOCK COMP_CSR_COMPxLOCK | |
| 191 #endif | |
| 192 | |
| 193 #if defined(STM32L4) | |
| 194 #define COMP_BLANKINGSRCE_TIM1OC5 COMP_BLANKINGSRC_TIM1_OC5_COMP1 | |
| 195 #define COMP_BLANKINGSRCE_TIM2OC3 COMP_BLANKINGSRC_TIM2_OC3_COMP1 | |
| 196 #define COMP_BLANKINGSRCE_TIM3OC3 COMP_BLANKINGSRC_TIM3_OC3_COMP1 | |
| 197 #define COMP_BLANKINGSRCE_TIM3OC4 COMP_BLANKINGSRC_TIM3_OC4_COMP2 | |
| 198 #define COMP_BLANKINGSRCE_TIM8OC5 COMP_BLANKINGSRC_TIM8_OC5_COMP2 | |
| 199 #define COMP_BLANKINGSRCE_TIM15OC1 COMP_BLANKINGSRC_TIM15_OC1_COMP2 | |
| 200 #define COMP_BLANKINGSRCE_NONE COMP_BLANKINGSRC_NONE | |
| 201 #endif | |
| 202 | |
| 203 #if defined(STM32L0) | |
| 204 #define COMP_MODE_HIGHSPEED COMP_POWERMODE_MEDIUMSPEED | |
| 205 #define COMP_MODE_LOWSPEED COMP_POWERMODE_ULTRALOWPOWER | |
| 206 #else | |
| 207 #define COMP_MODE_HIGHSPEED COMP_POWERMODE_HIGHSPEED | |
| 208 #define COMP_MODE_MEDIUMSPEED COMP_POWERMODE_MEDIUMSPEED | |
| 209 #define COMP_MODE_LOWPOWER COMP_POWERMODE_LOWPOWER | |
| 210 #define COMP_MODE_ULTRALOWPOWER COMP_POWERMODE_ULTRALOWPOWER | |
| 211 #endif | |
| 212 | |
| 213 #endif | |
| 214 /** | |
| 215 * @} | |
| 216 */ | |
| 217 | |
| 218 /** @defgroup HAL_CORTEX_Aliased_Defines HAL CORTEX Aliased Defines maintained for legacy purpose | |
| 219 * @{ | |
| 220 */ | |
| 221 #define __HAL_CORTEX_SYSTICKCLK_CONFIG HAL_SYSTICK_CLKSourceConfig | |
| 222 /** | |
| 223 * @} | |
| 224 */ | |
| 225 | |
| 226 /** @defgroup HAL_CRC_Aliased_Defines HAL CRC Aliased Defines maintained for legacy purpose | |
| 227 * @{ | |
| 228 */ | |
| 229 | |
| 230 #define CRC_OUTPUTDATA_INVERSION_DISABLED CRC_OUTPUTDATA_INVERSION_DISABLE | |
| 231 #define CRC_OUTPUTDATA_INVERSION_ENABLED CRC_OUTPUTDATA_INVERSION_ENABLE | |
| 232 | |
| 233 /** | |
| 234 * @} | |
| 235 */ | |
| 236 | |
| 237 /** @defgroup HAL_DAC_Aliased_Defines HAL DAC Aliased Defines maintained for legacy purpose | |
| 238 * @{ | |
| 239 */ | |
| 240 | |
| 241 #define DAC1_CHANNEL_1 DAC_CHANNEL_1 | |
| 242 #define DAC1_CHANNEL_2 DAC_CHANNEL_2 | |
| 243 #define DAC2_CHANNEL_1 DAC_CHANNEL_1 | |
| 244 #define DAC_WAVE_NONE 0x00000000U | |
| 245 #define DAC_WAVE_NOISE DAC_CR_WAVE1_0 | |
| 246 #define DAC_WAVE_TRIANGLE DAC_CR_WAVE1_1 | |
| 247 #define DAC_WAVEGENERATION_NONE DAC_WAVE_NONE | |
| 248 #define DAC_WAVEGENERATION_NOISE DAC_WAVE_NOISE | |
| 249 #define DAC_WAVEGENERATION_TRIANGLE DAC_WAVE_TRIANGLE | |
| 250 | |
| 251 /** | |
| 252 * @} | |
| 253 */ | |
| 254 | |
| 255 /** @defgroup HAL_DMA_Aliased_Defines HAL DMA Aliased Defines maintained for legacy purpose | |
| 256 * @{ | |
| 257 */ | |
| 258 #define HAL_REMAPDMA_ADC_DMA_CH2 DMA_REMAP_ADC_DMA_CH2 | |
| 259 #define HAL_REMAPDMA_USART1_TX_DMA_CH4 DMA_REMAP_USART1_TX_DMA_CH4 | |
| 260 #define HAL_REMAPDMA_USART1_RX_DMA_CH5 DMA_REMAP_USART1_RX_DMA_CH5 | |
| 261 #define HAL_REMAPDMA_TIM16_DMA_CH4 DMA_REMAP_TIM16_DMA_CH4 | |
| 262 #define HAL_REMAPDMA_TIM17_DMA_CH2 DMA_REMAP_TIM17_DMA_CH2 | |
| 263 #define HAL_REMAPDMA_USART3_DMA_CH32 DMA_REMAP_USART3_DMA_CH32 | |
| 264 #define HAL_REMAPDMA_TIM16_DMA_CH6 DMA_REMAP_TIM16_DMA_CH6 | |
| 265 #define HAL_REMAPDMA_TIM17_DMA_CH7 DMA_REMAP_TIM17_DMA_CH7 | |
| 266 #define HAL_REMAPDMA_SPI2_DMA_CH67 DMA_REMAP_SPI2_DMA_CH67 | |
| 267 #define HAL_REMAPDMA_USART2_DMA_CH67 DMA_REMAP_USART2_DMA_CH67 | |
| 268 #define HAL_REMAPDMA_I2C1_DMA_CH76 DMA_REMAP_I2C1_DMA_CH76 | |
| 269 #define HAL_REMAPDMA_TIM1_DMA_CH6 DMA_REMAP_TIM1_DMA_CH6 | |
| 270 #define HAL_REMAPDMA_TIM2_DMA_CH7 DMA_REMAP_TIM2_DMA_CH7 | |
| 271 #define HAL_REMAPDMA_TIM3_DMA_CH6 DMA_REMAP_TIM3_DMA_CH6 | |
| 272 | |
| 273 #define IS_HAL_REMAPDMA IS_DMA_REMAP | |
| 274 #define __HAL_REMAPDMA_CHANNEL_ENABLE __HAL_DMA_REMAP_CHANNEL_ENABLE | |
| 275 #define __HAL_REMAPDMA_CHANNEL_DISABLE __HAL_DMA_REMAP_CHANNEL_DISABLE | |
| 276 | |
| 277 | |
| 278 | |
| 279 /** | |
| 280 * @} | |
| 281 */ | |
| 282 | |
| 283 /** @defgroup HAL_FLASH_Aliased_Defines HAL FLASH Aliased Defines maintained for legacy purpose | |
| 284 * @{ | |
| 285 */ | |
| 286 | |
| 287 #define TYPEPROGRAM_BYTE FLASH_TYPEPROGRAM_BYTE | |
| 288 #define TYPEPROGRAM_HALFWORD FLASH_TYPEPROGRAM_HALFWORD | |
| 289 #define TYPEPROGRAM_WORD FLASH_TYPEPROGRAM_WORD | |
| 290 #define TYPEPROGRAM_DOUBLEWORD FLASH_TYPEPROGRAM_DOUBLEWORD | |
| 291 #define TYPEERASE_SECTORS FLASH_TYPEERASE_SECTORS | |
| 292 #define TYPEERASE_PAGES FLASH_TYPEERASE_PAGES | |
| 293 #define TYPEERASE_PAGEERASE FLASH_TYPEERASE_PAGES | |
| 294 #define TYPEERASE_MASSERASE FLASH_TYPEERASE_MASSERASE | |
| 295 #define WRPSTATE_DISABLE OB_WRPSTATE_DISABLE | |
| 296 #define WRPSTATE_ENABLE OB_WRPSTATE_ENABLE | |
| 297 #define HAL_FLASH_TIMEOUT_VALUE FLASH_TIMEOUT_VALUE | |
| 298 #define OBEX_PCROP OPTIONBYTE_PCROP | |
| 299 #define OBEX_BOOTCONFIG OPTIONBYTE_BOOTCONFIG | |
| 300 #define PCROPSTATE_DISABLE OB_PCROP_STATE_DISABLE | |
| 301 #define PCROPSTATE_ENABLE OB_PCROP_STATE_ENABLE | |
| 302 #define TYPEERASEDATA_BYTE FLASH_TYPEERASEDATA_BYTE | |
| 303 #define TYPEERASEDATA_HALFWORD FLASH_TYPEERASEDATA_HALFWORD | |
| 304 #define TYPEERASEDATA_WORD FLASH_TYPEERASEDATA_WORD | |
| 305 #define TYPEPROGRAMDATA_BYTE FLASH_TYPEPROGRAMDATA_BYTE | |
| 306 #define TYPEPROGRAMDATA_HALFWORD FLASH_TYPEPROGRAMDATA_HALFWORD | |
| 307 #define TYPEPROGRAMDATA_WORD FLASH_TYPEPROGRAMDATA_WORD | |
| 308 #define TYPEPROGRAMDATA_FASTBYTE FLASH_TYPEPROGRAMDATA_FASTBYTE | |
| 309 #define TYPEPROGRAMDATA_FASTHALFWORD FLASH_TYPEPROGRAMDATA_FASTHALFWORD | |
| 310 #define TYPEPROGRAMDATA_FASTWORD FLASH_TYPEPROGRAMDATA_FASTWORD | |
| 311 #define PAGESIZE FLASH_PAGE_SIZE | |
| 312 #define TYPEPROGRAM_FASTBYTE FLASH_TYPEPROGRAM_BYTE | |
| 313 #define TYPEPROGRAM_FASTHALFWORD FLASH_TYPEPROGRAM_HALFWORD | |
| 314 #define TYPEPROGRAM_FASTWORD FLASH_TYPEPROGRAM_WORD | |
| 315 #define VOLTAGE_RANGE_1 FLASH_VOLTAGE_RANGE_1 | |
| 316 #define VOLTAGE_RANGE_2 FLASH_VOLTAGE_RANGE_2 | |
| 317 #define VOLTAGE_RANGE_3 FLASH_VOLTAGE_RANGE_3 | |
| 318 #define VOLTAGE_RANGE_4 FLASH_VOLTAGE_RANGE_4 | |
| 319 #define TYPEPROGRAM_FAST FLASH_TYPEPROGRAM_FAST | |
| 320 #define TYPEPROGRAM_FAST_AND_LAST FLASH_TYPEPROGRAM_FAST_AND_LAST | |
| 321 #define WRPAREA_BANK1_AREAA OB_WRPAREA_BANK1_AREAA | |
| 322 #define WRPAREA_BANK1_AREAB OB_WRPAREA_BANK1_AREAB | |
| 323 #define WRPAREA_BANK2_AREAA OB_WRPAREA_BANK2_AREAA | |
| 324 #define WRPAREA_BANK2_AREAB OB_WRPAREA_BANK2_AREAB | |
| 325 #define IWDG_STDBY_FREEZE OB_IWDG_STDBY_FREEZE | |
| 326 #define IWDG_STDBY_ACTIVE OB_IWDG_STDBY_RUN | |
| 327 #define IWDG_STOP_FREEZE OB_IWDG_STOP_FREEZE | |
| 328 #define IWDG_STOP_ACTIVE OB_IWDG_STOP_RUN | |
| 329 #define FLASH_ERROR_NONE HAL_FLASH_ERROR_NONE | |
| 330 #define FLASH_ERROR_RD HAL_FLASH_ERROR_RD | |
| 331 #define FLASH_ERROR_PG HAL_FLASH_ERROR_PROG | |
| 332 #define FLASH_ERROR_PGP HAL_FLASH_ERROR_PGS | |
| 333 #define FLASH_ERROR_WRP HAL_FLASH_ERROR_WRP | |
| 334 #define FLASH_ERROR_OPTV HAL_FLASH_ERROR_OPTV | |
| 335 #define FLASH_ERROR_OPTVUSR HAL_FLASH_ERROR_OPTVUSR | |
| 336 #define FLASH_ERROR_PROG HAL_FLASH_ERROR_PROG | |
| 337 #define FLASH_ERROR_OP HAL_FLASH_ERROR_OPERATION | |
| 338 #define FLASH_ERROR_PGA HAL_FLASH_ERROR_PGA | |
| 339 #define FLASH_ERROR_SIZE HAL_FLASH_ERROR_SIZE | |
| 340 #define FLASH_ERROR_SIZ HAL_FLASH_ERROR_SIZE | |
| 341 #define FLASH_ERROR_PGS HAL_FLASH_ERROR_PGS | |
| 342 #define FLASH_ERROR_MIS HAL_FLASH_ERROR_MIS | |
| 343 #define FLASH_ERROR_FAST HAL_FLASH_ERROR_FAST | |
| 344 #define FLASH_ERROR_FWWERR HAL_FLASH_ERROR_FWWERR | |
| 345 #define FLASH_ERROR_NOTZERO HAL_FLASH_ERROR_NOTZERO | |
| 346 #define FLASH_ERROR_OPERATION HAL_FLASH_ERROR_OPERATION | |
| 347 #define FLASH_ERROR_ERS HAL_FLASH_ERROR_ERS | |
| 348 #define OB_WDG_SW OB_IWDG_SW | |
| 349 #define OB_WDG_HW OB_IWDG_HW | |
| 350 #define OB_SDADC12_VDD_MONITOR_SET OB_SDACD_VDD_MONITOR_SET | |
| 351 #define OB_SDADC12_VDD_MONITOR_RESET OB_SDACD_VDD_MONITOR_RESET | |
| 352 #define OB_RAM_PARITY_CHECK_SET OB_SRAM_PARITY_SET | |
| 353 #define OB_RAM_PARITY_CHECK_RESET OB_SRAM_PARITY_RESET | |
| 354 #define IS_OB_SDADC12_VDD_MONITOR IS_OB_SDACD_VDD_MONITOR | |
| 355 #define OB_RDP_LEVEL0 OB_RDP_LEVEL_0 | |
| 356 #define OB_RDP_LEVEL1 OB_RDP_LEVEL_1 | |
| 357 #define OB_RDP_LEVEL2 OB_RDP_LEVEL_2 | |
| 358 | |
| 359 /** | |
| 360 * @} | |
| 361 */ | |
| 362 | |
| 363 /** @defgroup HAL_SYSCFG_Aliased_Defines HAL SYSCFG Aliased Defines maintained for legacy purpose | |
| 364 * @{ | |
| 365 */ | |
| 366 | |
| 367 #define HAL_SYSCFG_FASTMODEPLUS_I2C_PA9 I2C_FASTMODEPLUS_PA9 | |
| 368 #define HAL_SYSCFG_FASTMODEPLUS_I2C_PA10 I2C_FASTMODEPLUS_PA10 | |
| 369 #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB6 I2C_FASTMODEPLUS_PB6 | |
| 370 #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB7 I2C_FASTMODEPLUS_PB7 | |
| 371 #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB8 I2C_FASTMODEPLUS_PB8 | |
| 372 #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB9 I2C_FASTMODEPLUS_PB9 | |
| 373 #define HAL_SYSCFG_FASTMODEPLUS_I2C1 I2C_FASTMODEPLUS_I2C1 | |
| 374 #define HAL_SYSCFG_FASTMODEPLUS_I2C2 I2C_FASTMODEPLUS_I2C2 | |
| 375 #define HAL_SYSCFG_FASTMODEPLUS_I2C3 I2C_FASTMODEPLUS_I2C3 | |
| 376 /** | |
| 377 * @} | |
| 378 */ | |
| 379 | |
| 380 | |
| 381 /** @defgroup LL_FMC_Aliased_Defines LL FMC Aliased Defines maintained for compatibility purpose | |
| 382 * @{ | |
| 383 */ | |
| 384 #if defined(STM32L4) || defined(STM32F7) || defined(STM32H7) || defined(STM32G4) | |
| 385 #define FMC_NAND_PCC_WAIT_FEATURE_DISABLE FMC_NAND_WAIT_FEATURE_DISABLE | |
| 386 #define FMC_NAND_PCC_WAIT_FEATURE_ENABLE FMC_NAND_WAIT_FEATURE_ENABLE | |
| 387 #define FMC_NAND_PCC_MEM_BUS_WIDTH_8 FMC_NAND_MEM_BUS_WIDTH_8 | |
| 388 #define FMC_NAND_PCC_MEM_BUS_WIDTH_16 FMC_NAND_MEM_BUS_WIDTH_16 | |
| 389 #else | |
| 390 #define FMC_NAND_WAIT_FEATURE_DISABLE FMC_NAND_PCC_WAIT_FEATURE_DISABLE | |
| 391 #define FMC_NAND_WAIT_FEATURE_ENABLE FMC_NAND_PCC_WAIT_FEATURE_ENABLE | |
| 392 #define FMC_NAND_MEM_BUS_WIDTH_8 FMC_NAND_PCC_MEM_BUS_WIDTH_8 | |
| 393 #define FMC_NAND_MEM_BUS_WIDTH_16 FMC_NAND_PCC_MEM_BUS_WIDTH_16 | |
| 394 #endif | |
| 395 /** | |
| 396 * @} | |
| 397 */ | |
| 398 | |
| 399 /** @defgroup LL_FSMC_Aliased_Defines LL FSMC Aliased Defines maintained for legacy purpose | |
| 400 * @{ | |
| 401 */ | |
| 402 | |
| 403 #define FSMC_NORSRAM_TYPEDEF FSMC_NORSRAM_TypeDef | |
| 404 #define FSMC_NORSRAM_EXTENDED_TYPEDEF FSMC_NORSRAM_EXTENDED_TypeDef | |
| 405 /** | |
| 406 * @} | |
| 407 */ | |
| 408 | |
| 409 /** @defgroup HAL_GPIO_Aliased_Macros HAL GPIO Aliased Macros maintained for legacy purpose | |
| 410 * @{ | |
| 411 */ | |
| 412 #define GET_GPIO_SOURCE GPIO_GET_INDEX | |
| 413 #define GET_GPIO_INDEX GPIO_GET_INDEX | |
| 414 | |
| 415 #if defined(STM32F4) | |
| 416 #define GPIO_AF12_SDMMC GPIO_AF12_SDIO | |
| 417 #define GPIO_AF12_SDMMC1 GPIO_AF12_SDIO | |
| 418 #endif | |
| 419 | |
| 420 #if defined(STM32F7) | |
| 421 #define GPIO_AF12_SDIO GPIO_AF12_SDMMC1 | |
| 422 #define GPIO_AF12_SDMMC GPIO_AF12_SDMMC1 | |
| 423 #endif | |
| 424 | |
| 425 #if defined(STM32L4) | |
| 426 #define GPIO_AF12_SDIO GPIO_AF12_SDMMC1 | |
| 427 #define GPIO_AF12_SDMMC GPIO_AF12_SDMMC1 | |
| 428 #endif | |
| 429 | |
| 430 #define GPIO_AF0_LPTIM GPIO_AF0_LPTIM1 | |
| 431 #define GPIO_AF1_LPTIM GPIO_AF1_LPTIM1 | |
| 432 #define GPIO_AF2_LPTIM GPIO_AF2_LPTIM1 | |
| 433 | |
| 434 #if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7) || defined(STM32G4) | |
| 435 #define GPIO_SPEED_LOW GPIO_SPEED_FREQ_LOW | |
| 436 #define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM | |
| 437 #define GPIO_SPEED_FAST GPIO_SPEED_FREQ_HIGH | |
| 438 #define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_VERY_HIGH | |
| 439 #endif /* STM32L0 || STM32L4 || STM32F4 || STM32F2 || STM32F7 || STM32G4 */ | |
| 440 | |
| 441 #if defined(STM32L1) | |
| 442 #define GPIO_SPEED_VERY_LOW GPIO_SPEED_FREQ_LOW | |
| 443 #define GPIO_SPEED_LOW GPIO_SPEED_FREQ_MEDIUM | |
| 444 #define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_HIGH | |
| 445 #define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_VERY_HIGH | |
| 446 #endif /* STM32L1 */ | |
| 447 | |
| 448 #if defined(STM32F0) || defined(STM32F3) || defined(STM32F1) | |
| 449 #define GPIO_SPEED_LOW GPIO_SPEED_FREQ_LOW | |
| 450 #define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM | |
| 451 #define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_HIGH | |
| 452 #endif /* STM32F0 || STM32F3 || STM32F1 */ | |
| 453 | |
| 454 #define GPIO_AF6_DFSDM GPIO_AF6_DFSDM1 | |
| 455 /** | |
| 456 * @} | |
| 457 */ | |
| 458 | |
| 459 /** @defgroup HAL_JPEG_Aliased_Macros HAL JPEG Aliased Macros maintained for legacy purpose | |
| 460 * @{ | |
| 461 */ | |
| 462 | |
| 463 #if defined(STM32H7) | |
| 464 #define __HAL_RCC_JPEG_CLK_ENABLE __HAL_RCC_JPGDECEN_CLK_ENABLE | |
| 465 #define __HAL_RCC_JPEG_CLK_DISABLE __HAL_RCC_JPGDECEN_CLK_DISABLE | |
| 466 #define __HAL_RCC_JPEG_FORCE_RESET __HAL_RCC_JPGDECRST_FORCE_RESET | |
| 467 #define __HAL_RCC_JPEG_RELEASE_RESET __HAL_RCC_JPGDECRST_RELEASE_RESET | |
| 468 #define __HAL_RCC_JPEG_CLK_SLEEP_ENABLE __HAL_RCC_JPGDEC_CLK_SLEEP_ENABLE | |
| 469 #define __HAL_RCC_JPEG_CLK_SLEEP_DISABLE __HAL_RCC_JPGDEC_CLK_SLEEP_DISABLE | |
| 470 | |
| 471 #define DMA_REQUEST_DAC1 DMA_REQUEST_DAC1_CH1 | |
| 472 #define DMA_REQUEST_DAC2 DMA_REQUEST_DAC1_CH2 | |
| 473 | |
| 474 #define BDMA_REQUEST_LP_UART1_RX BDMA_REQUEST_LPUART1_RX | |
| 475 #define BDMA_REQUEST_LP_UART1_TX BDMA_REQUEST_LPUART1_TX | |
| 476 | |
| 477 #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH0_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH0_EVT | |
| 478 #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH1_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH1_EVT | |
| 479 #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH2_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH2_EVT | |
| 480 #define HAL_DMAMUX1_REQUEST_GEN_LPTIM1_OUT HAL_DMAMUX1_REQ_GEN_LPTIM1_OUT | |
| 481 #define HAL_DMAMUX1_REQUEST_GEN_LPTIM2_OUT HAL_DMAMUX1_REQ_GEN_LPTIM2_OUT | |
| 482 #define HAL_DMAMUX1_REQUEST_GEN_LPTIM3_OUT HAL_DMAMUX1_REQ_GEN_LPTIM3_OUT | |
| 483 #define HAL_DMAMUX1_REQUEST_GEN_EXTI0 HAL_DMAMUX1_REQ_GEN_EXTI0 | |
| 484 #define HAL_DMAMUX1_REQUEST_GEN_TIM12_TRGO HAL_DMAMUX1_REQ_GEN_TIM12_TRGO | |
| 485 | |
| 486 #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH0_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH0_EVT | |
| 487 #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH1_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH1_EVT | |
| 488 #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH2_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH2_EVT | |
| 489 #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH3_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH3_EVT | |
| 490 #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH4_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH4_EVT | |
| 491 #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH5_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH5_EVT | |
| 492 #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH6_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH6_EVT | |
| 493 #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_RX_WKUP HAL_DMAMUX2_REQ_GEN_LPUART1_RX_WKUP | |
| 494 #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_TX_WKUP HAL_DMAMUX2_REQ_GEN_LPUART1_TX_WKUP | |
| 495 #define HAL_DMAMUX2_REQUEST_GEN_LPTIM2_WKUP HAL_DMAMUX2_REQ_GEN_LPTIM2_WKUP | |
| 496 #define HAL_DMAMUX2_REQUEST_GEN_LPTIM2_OUT HAL_DMAMUX2_REQ_GEN_LPTIM2_OUT | |
| 497 #define HAL_DMAMUX2_REQUEST_GEN_LPTIM3_WKUP HAL_DMAMUX2_REQ_GEN_LPTIM3_WKUP | |
| 498 #define HAL_DMAMUX2_REQUEST_GEN_LPTIM3_OUT HAL_DMAMUX2_REQ_GEN_LPTIM3_OUT | |
| 499 #define HAL_DMAMUX2_REQUEST_GEN_LPTIM4_WKUP HAL_DMAMUX2_REQ_GEN_LPTIM4_WKUP | |
| 500 #define HAL_DMAMUX2_REQUEST_GEN_LPTIM5_WKUP HAL_DMAMUX2_REQ_GEN_LPTIM5_WKUP | |
| 501 #define HAL_DMAMUX2_REQUEST_GEN_I2C4_WKUP HAL_DMAMUX2_REQ_GEN_I2C4_WKUP | |
| 502 #define HAL_DMAMUX2_REQUEST_GEN_SPI6_WKUP HAL_DMAMUX2_REQ_GEN_SPI6_WKUP | |
| 503 #define HAL_DMAMUX2_REQUEST_GEN_COMP1_OUT HAL_DMAMUX2_REQ_GEN_COMP1_OUT | |
| 504 #define HAL_DMAMUX2_REQUEST_GEN_COMP2_OUT HAL_DMAMUX2_REQ_GEN_COMP2_OUT | |
| 505 #define HAL_DMAMUX2_REQUEST_GEN_RTC_WKUP HAL_DMAMUX2_REQ_GEN_RTC_WKUP | |
| 506 #define HAL_DMAMUX2_REQUEST_GEN_EXTI0 HAL_DMAMUX2_REQ_GEN_EXTI0 | |
| 507 #define HAL_DMAMUX2_REQUEST_GEN_EXTI2 HAL_DMAMUX2_REQ_GEN_EXTI2 | |
| 508 #define HAL_DMAMUX2_REQUEST_GEN_I2C4_IT_EVT HAL_DMAMUX2_REQ_GEN_I2C4_IT_EVT | |
| 509 #define HAL_DMAMUX2_REQUEST_GEN_SPI6_IT HAL_DMAMUX2_REQ_GEN_SPI6_IT | |
| 510 #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_TX_IT HAL_DMAMUX2_REQ_GEN_LPUART1_TX_IT | |
| 511 #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_RX_IT HAL_DMAMUX2_REQ_GEN_LPUART1_RX_IT | |
| 512 #define HAL_DMAMUX2_REQUEST_GEN_ADC3_IT HAL_DMAMUX2_REQ_GEN_ADC3_IT | |
| 513 #define HAL_DMAMUX2_REQUEST_GEN_ADC3_AWD1_OUT HAL_DMAMUX2_REQ_GEN_ADC3_AWD1_OUT | |
| 514 #define HAL_DMAMUX2_REQUEST_GEN_BDMA_CH0_IT HAL_DMAMUX2_REQ_GEN_BDMA_CH0_IT | |
| 515 #define HAL_DMAMUX2_REQUEST_GEN_BDMA_CH1_IT HAL_DMAMUX2_REQ_GEN_BDMA_CH1_IT | |
| 516 | |
| 517 #define HAL_DMAMUX_REQUEST_GEN_NO_EVENT HAL_DMAMUX_REQ_GEN_NO_EVENT | |
| 518 #define HAL_DMAMUX_REQUEST_GEN_RISING HAL_DMAMUX_REQ_GEN_RISING | |
| 519 #define HAL_DMAMUX_REQUEST_GEN_FALLING HAL_DMAMUX_REQ_GEN_FALLING | |
| 520 #define HAL_DMAMUX_REQUEST_GEN_RISING_FALLING HAL_DMAMUX_REQ_GEN_RISING_FALLING | |
| 521 | |
| 522 | |
| 523 #endif /* STM32H7 */ | |
| 524 | |
| 525 | |
| 526 /** | |
| 527 * @} | |
| 528 */ | |
| 529 | |
| 530 | |
| 531 /** @defgroup HAL_HRTIM_Aliased_Macros HAL HRTIM Aliased Macros maintained for legacy purpose | |
| 532 * @{ | |
| 533 */ | |
| 534 #define HRTIM_TIMDELAYEDPROTECTION_DISABLED HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DISABLED | |
| 535 #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_EEV6 | |
| 536 #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_EEV6 | |
| 537 #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV6 | |
| 538 #define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV6 | |
| 539 #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_DEEV7 | |
| 540 #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_DEEV7 | |
| 541 #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV7 | |
| 542 #define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV7 | |
| 543 | |
| 544 #define __HAL_HRTIM_SetCounter __HAL_HRTIM_SETCOUNTER | |
| 545 #define __HAL_HRTIM_GetCounter __HAL_HRTIM_GETCOUNTER | |
| 546 #define __HAL_HRTIM_SetPeriod __HAL_HRTIM_SETPERIOD | |
| 547 #define __HAL_HRTIM_GetPeriod __HAL_HRTIM_GETPERIOD | |
| 548 #define __HAL_HRTIM_SetClockPrescaler __HAL_HRTIM_SETCLOCKPRESCALER | |
| 549 #define __HAL_HRTIM_GetClockPrescaler __HAL_HRTIM_GETCLOCKPRESCALER | |
| 550 #define __HAL_HRTIM_SetCompare __HAL_HRTIM_SETCOMPARE | |
| 551 #define __HAL_HRTIM_GetCompare __HAL_HRTIM_GETCOMPARE | |
| 552 /** | |
| 553 * @} | |
| 554 */ | |
| 555 | |
| 556 /** @defgroup HAL_I2C_Aliased_Defines HAL I2C Aliased Defines maintained for legacy purpose | |
| 557 * @{ | |
| 558 */ | |
| 559 #define I2C_DUALADDRESS_DISABLED I2C_DUALADDRESS_DISABLE | |
| 560 #define I2C_DUALADDRESS_ENABLED I2C_DUALADDRESS_ENABLE | |
| 561 #define I2C_GENERALCALL_DISABLED I2C_GENERALCALL_DISABLE | |
| 562 #define I2C_GENERALCALL_ENABLED I2C_GENERALCALL_ENABLE | |
| 563 #define I2C_NOSTRETCH_DISABLED I2C_NOSTRETCH_DISABLE | |
| 564 #define I2C_NOSTRETCH_ENABLED I2C_NOSTRETCH_ENABLE | |
| 565 #define I2C_ANALOGFILTER_ENABLED I2C_ANALOGFILTER_ENABLE | |
| 566 #define I2C_ANALOGFILTER_DISABLED I2C_ANALOGFILTER_DISABLE | |
| 567 #if defined(STM32F0) || defined(STM32F1) || defined(STM32F3) || defined(STM32G0) || defined(STM32L4) || defined(STM32L1) || defined(STM32F7) | |
| 568 #define HAL_I2C_STATE_MEM_BUSY_TX HAL_I2C_STATE_BUSY_TX | |
| 569 #define HAL_I2C_STATE_MEM_BUSY_RX HAL_I2C_STATE_BUSY_RX | |
| 570 #define HAL_I2C_STATE_MASTER_BUSY_TX HAL_I2C_STATE_BUSY_TX | |
| 571 #define HAL_I2C_STATE_MASTER_BUSY_RX HAL_I2C_STATE_BUSY_RX | |
| 572 #define HAL_I2C_STATE_SLAVE_BUSY_TX HAL_I2C_STATE_BUSY_TX | |
| 573 #define HAL_I2C_STATE_SLAVE_BUSY_RX HAL_I2C_STATE_BUSY_RX | |
| 574 #endif | |
| 575 /** | |
| 576 * @} | |
| 577 */ | |
| 578 | |
| 579 /** @defgroup HAL_IRDA_Aliased_Defines HAL IRDA Aliased Defines maintained for legacy purpose | |
| 580 * @{ | |
| 581 */ | |
| 582 #define IRDA_ONE_BIT_SAMPLE_DISABLED IRDA_ONE_BIT_SAMPLE_DISABLE | |
| 583 #define IRDA_ONE_BIT_SAMPLE_ENABLED IRDA_ONE_BIT_SAMPLE_ENABLE | |
| 584 | |
| 585 /** | |
| 586 * @} | |
| 587 */ | |
| 588 | |
| 589 /** @defgroup HAL_IWDG_Aliased_Defines HAL IWDG Aliased Defines maintained for legacy purpose | |
| 590 * @{ | |
| 591 */ | |
| 592 #define KR_KEY_RELOAD IWDG_KEY_RELOAD | |
| 593 #define KR_KEY_ENABLE IWDG_KEY_ENABLE | |
| 594 #define KR_KEY_EWA IWDG_KEY_WRITE_ACCESS_ENABLE | |
| 595 #define KR_KEY_DWA IWDG_KEY_WRITE_ACCESS_DISABLE | |
| 596 /** | |
| 597 * @} | |
| 598 */ | |
| 599 | |
| 600 /** @defgroup HAL_LPTIM_Aliased_Defines HAL LPTIM Aliased Defines maintained for legacy purpose | |
| 601 * @{ | |
| 602 */ | |
| 603 | |
| 604 #define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSISTION LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION | |
| 605 #define LPTIM_CLOCKSAMPLETIME_2TRANSISTIONS LPTIM_CLOCKSAMPLETIME_2TRANSITIONS | |
| 606 #define LPTIM_CLOCKSAMPLETIME_4TRANSISTIONS LPTIM_CLOCKSAMPLETIME_4TRANSITIONS | |
| 607 #define LPTIM_CLOCKSAMPLETIME_8TRANSISTIONS LPTIM_CLOCKSAMPLETIME_8TRANSITIONS | |
| 608 | |
| 609 #define LPTIM_CLOCKPOLARITY_RISINGEDGE LPTIM_CLOCKPOLARITY_RISING | |
| 610 #define LPTIM_CLOCKPOLARITY_FALLINGEDGE LPTIM_CLOCKPOLARITY_FALLING | |
| 611 #define LPTIM_CLOCKPOLARITY_BOTHEDGES LPTIM_CLOCKPOLARITY_RISING_FALLING | |
| 612 | |
| 613 #define LPTIM_TRIGSAMPLETIME_DIRECTTRANSISTION LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION | |
| 614 #define LPTIM_TRIGSAMPLETIME_2TRANSISTIONS LPTIM_TRIGSAMPLETIME_2TRANSITIONS | |
| 615 #define LPTIM_TRIGSAMPLETIME_4TRANSISTIONS LPTIM_TRIGSAMPLETIME_4TRANSITIONS | |
| 616 #define LPTIM_TRIGSAMPLETIME_8TRANSISTIONS LPTIM_TRIGSAMPLETIME_8TRANSITIONS | |
| 617 | |
| 618 /* The following 3 definition have also been present in a temporary version of lptim.h */ | |
| 619 /* They need to be renamed also to the right name, just in case */ | |
| 620 #define LPTIM_TRIGSAMPLETIME_2TRANSITION LPTIM_TRIGSAMPLETIME_2TRANSITIONS | |
| 621 #define LPTIM_TRIGSAMPLETIME_4TRANSITION LPTIM_TRIGSAMPLETIME_4TRANSITIONS | |
| 622 #define LPTIM_TRIGSAMPLETIME_8TRANSITION LPTIM_TRIGSAMPLETIME_8TRANSITIONS | |
| 623 | |
| 624 /** | |
| 625 * @} | |
| 626 */ | |
| 627 | |
| 628 /** @defgroup HAL_NAND_Aliased_Defines HAL NAND Aliased Defines maintained for legacy purpose | |
| 629 * @{ | |
| 630 */ | |
| 631 #define HAL_NAND_Read_Page HAL_NAND_Read_Page_8b | |
| 632 #define HAL_NAND_Write_Page HAL_NAND_Write_Page_8b | |
| 633 #define HAL_NAND_Read_SpareArea HAL_NAND_Read_SpareArea_8b | |
| 634 #define HAL_NAND_Write_SpareArea HAL_NAND_Write_SpareArea_8b | |
| 635 | |
| 636 #define NAND_AddressTypedef NAND_AddressTypeDef | |
| 637 | |
| 638 #define __ARRAY_ADDRESS ARRAY_ADDRESS | |
| 639 #define __ADDR_1st_CYCLE ADDR_1ST_CYCLE | |
| 640 #define __ADDR_2nd_CYCLE ADDR_2ND_CYCLE | |
| 641 #define __ADDR_3rd_CYCLE ADDR_3RD_CYCLE | |
| 642 #define __ADDR_4th_CYCLE ADDR_4TH_CYCLE | |
| 643 /** | |
| 644 * @} | |
| 645 */ | |
| 646 | |
| 647 /** @defgroup HAL_NOR_Aliased_Defines HAL NOR Aliased Defines maintained for legacy purpose | |
| 648 * @{ | |
| 649 */ | |
| 650 #define NOR_StatusTypedef HAL_NOR_StatusTypeDef | |
| 651 #define NOR_SUCCESS HAL_NOR_STATUS_SUCCESS | |
| 652 #define NOR_ONGOING HAL_NOR_STATUS_ONGOING | |
| 653 #define NOR_ERROR HAL_NOR_STATUS_ERROR | |
| 654 #define NOR_TIMEOUT HAL_NOR_STATUS_TIMEOUT | |
| 655 | |
| 656 #define __NOR_WRITE NOR_WRITE | |
| 657 #define __NOR_ADDR_SHIFT NOR_ADDR_SHIFT | |
| 658 /** | |
| 659 * @} | |
| 660 */ | |
| 661 | |
| 662 /** @defgroup HAL_OPAMP_Aliased_Defines HAL OPAMP Aliased Defines maintained for legacy purpose | |
| 663 * @{ | |
| 664 */ | |
| 665 | |
| 666 #define OPAMP_NONINVERTINGINPUT_VP0 OPAMP_NONINVERTINGINPUT_IO0 | |
| 667 #define OPAMP_NONINVERTINGINPUT_VP1 OPAMP_NONINVERTINGINPUT_IO1 | |
| 668 #define OPAMP_NONINVERTINGINPUT_VP2 OPAMP_NONINVERTINGINPUT_IO2 | |
| 669 #define OPAMP_NONINVERTINGINPUT_VP3 OPAMP_NONINVERTINGINPUT_IO3 | |
| 670 | |
| 671 #define OPAMP_SEC_NONINVERTINGINPUT_VP0 OPAMP_SEC_NONINVERTINGINPUT_IO0 | |
| 672 #define OPAMP_SEC_NONINVERTINGINPUT_VP1 OPAMP_SEC_NONINVERTINGINPUT_IO1 | |
| 673 #define OPAMP_SEC_NONINVERTINGINPUT_VP2 OPAMP_SEC_NONINVERTINGINPUT_IO2 | |
| 674 #define OPAMP_SEC_NONINVERTINGINPUT_VP3 OPAMP_SEC_NONINVERTINGINPUT_IO3 | |
| 675 | |
| 676 #define OPAMP_INVERTINGINPUT_VM0 OPAMP_INVERTINGINPUT_IO0 | |
| 677 #define OPAMP_INVERTINGINPUT_VM1 OPAMP_INVERTINGINPUT_IO1 | |
| 678 | |
| 679 #define IOPAMP_INVERTINGINPUT_VM0 OPAMP_INVERTINGINPUT_IO0 | |
| 680 #define IOPAMP_INVERTINGINPUT_VM1 OPAMP_INVERTINGINPUT_IO1 | |
| 681 | |
| 682 #define OPAMP_SEC_INVERTINGINPUT_VM0 OPAMP_SEC_INVERTINGINPUT_IO0 | |
| 683 #define OPAMP_SEC_INVERTINGINPUT_VM1 OPAMP_SEC_INVERTINGINPUT_IO1 | |
| 684 | |
| 685 #define OPAMP_INVERTINGINPUT_VINM OPAMP_SEC_INVERTINGINPUT_IO1 | |
| 686 | |
| 687 #define OPAMP_PGACONNECT_NO OPAMP_PGA_CONNECT_INVERTINGINPUT_NO | |
| 688 #define OPAMP_PGACONNECT_VM0 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0 | |
| 689 #define OPAMP_PGACONNECT_VM1 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO1 | |
| 690 | |
| 691 /** | |
| 692 * @} | |
| 693 */ | |
| 694 | |
| 695 /** @defgroup HAL_I2S_Aliased_Defines HAL I2S Aliased Defines maintained for legacy purpose | |
| 696 * @{ | |
| 697 */ | |
| 698 #define I2S_STANDARD_PHILLIPS I2S_STANDARD_PHILIPS | |
| 699 #if defined(STM32F7) | |
| 700 #define I2S_CLOCK_SYSCLK I2S_CLOCK_PLL | |
| 701 #endif | |
| 702 /** | |
| 703 * @} | |
| 704 */ | |
| 705 | |
| 706 /** @defgroup HAL_PCCARD_Aliased_Defines HAL PCCARD Aliased Defines maintained for legacy purpose | |
| 707 * @{ | |
| 708 */ | |
| 709 | |
| 710 /* Compact Flash-ATA registers description */ | |
| 711 #define CF_DATA ATA_DATA | |
| 712 #define CF_SECTOR_COUNT ATA_SECTOR_COUNT | |
| 713 #define CF_SECTOR_NUMBER ATA_SECTOR_NUMBER | |
| 714 #define CF_CYLINDER_LOW ATA_CYLINDER_LOW | |
| 715 #define CF_CYLINDER_HIGH ATA_CYLINDER_HIGH | |
| 716 #define CF_CARD_HEAD ATA_CARD_HEAD | |
| 717 #define CF_STATUS_CMD ATA_STATUS_CMD | |
| 718 #define CF_STATUS_CMD_ALTERNATE ATA_STATUS_CMD_ALTERNATE | |
| 719 #define CF_COMMON_DATA_AREA ATA_COMMON_DATA_AREA | |
| 720 | |
| 721 /* Compact Flash-ATA commands */ | |
| 722 #define CF_READ_SECTOR_CMD ATA_READ_SECTOR_CMD | |
| 723 #define CF_WRITE_SECTOR_CMD ATA_WRITE_SECTOR_CMD | |
| 724 #define CF_ERASE_SECTOR_CMD ATA_ERASE_SECTOR_CMD | |
| 725 #define CF_IDENTIFY_CMD ATA_IDENTIFY_CMD | |
| 726 | |
| 727 #define PCCARD_StatusTypedef HAL_PCCARD_StatusTypeDef | |
| 728 #define PCCARD_SUCCESS HAL_PCCARD_STATUS_SUCCESS | |
| 729 #define PCCARD_ONGOING HAL_PCCARD_STATUS_ONGOING | |
| 730 #define PCCARD_ERROR HAL_PCCARD_STATUS_ERROR | |
| 731 #define PCCARD_TIMEOUT HAL_PCCARD_STATUS_TIMEOUT | |
| 732 /** | |
| 733 * @} | |
| 734 */ | |
| 735 | |
| 736 /** @defgroup HAL_RTC_Aliased_Defines HAL RTC Aliased Defines maintained for legacy purpose | |
| 737 * @{ | |
| 738 */ | |
| 739 | |
| 740 #define FORMAT_BIN RTC_FORMAT_BIN | |
| 741 #define FORMAT_BCD RTC_FORMAT_BCD | |
| 742 | |
| 743 #define RTC_ALARMSUBSECONDMASK_None RTC_ALARMSUBSECONDMASK_NONE | |
| 744 #define RTC_TAMPERERASEBACKUP_DISABLED RTC_TAMPER_ERASE_BACKUP_DISABLE | |
| 745 #define RTC_TAMPERMASK_FLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE | |
| 746 #define RTC_TAMPERMASK_FLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE | |
| 747 | |
| 748 #define RTC_MASKTAMPERFLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE | |
| 749 #define RTC_MASKTAMPERFLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE | |
| 750 #define RTC_TAMPERERASEBACKUP_ENABLED RTC_TAMPER_ERASE_BACKUP_ENABLE | |
| 751 #define RTC_TAMPER1_2_INTERRUPT RTC_ALL_TAMPER_INTERRUPT | |
| 752 #define RTC_TAMPER1_2_3_INTERRUPT RTC_ALL_TAMPER_INTERRUPT | |
| 753 | |
| 754 #define RTC_TIMESTAMPPIN_PC13 RTC_TIMESTAMPPIN_DEFAULT | |
| 755 #define RTC_TIMESTAMPPIN_PA0 RTC_TIMESTAMPPIN_POS1 | |
| 756 #define RTC_TIMESTAMPPIN_PI8 RTC_TIMESTAMPPIN_POS1 | |
| 757 #define RTC_TIMESTAMPPIN_PC1 RTC_TIMESTAMPPIN_POS2 | |
| 758 | |
| 759 #define RTC_OUTPUT_REMAP_PC13 RTC_OUTPUT_REMAP_NONE | |
| 760 #define RTC_OUTPUT_REMAP_PB14 RTC_OUTPUT_REMAP_POS1 | |
| 761 #define RTC_OUTPUT_REMAP_PB2 RTC_OUTPUT_REMAP_POS1 | |
| 762 | |
| 763 #define RTC_TAMPERPIN_PC13 RTC_TAMPERPIN_DEFAULT | |
| 764 #define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1 | |
| 765 #define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1 | |
| 766 | |
| 767 /** | |
| 768 * @} | |
| 769 */ | |
| 770 | |
| 771 | |
| 772 /** @defgroup HAL_SMARTCARD_Aliased_Defines HAL SMARTCARD Aliased Defines maintained for legacy purpose | |
| 773 * @{ | |
| 774 */ | |
| 775 #define SMARTCARD_NACK_ENABLED SMARTCARD_NACK_ENABLE | |
| 776 #define SMARTCARD_NACK_DISABLED SMARTCARD_NACK_DISABLE | |
| 777 | |
| 778 #define SMARTCARD_ONEBIT_SAMPLING_DISABLED SMARTCARD_ONE_BIT_SAMPLE_DISABLE | |
| 779 #define SMARTCARD_ONEBIT_SAMPLING_ENABLED SMARTCARD_ONE_BIT_SAMPLE_ENABLE | |
| 780 #define SMARTCARD_ONEBIT_SAMPLING_DISABLE SMARTCARD_ONE_BIT_SAMPLE_DISABLE | |
| 781 #define SMARTCARD_ONEBIT_SAMPLING_ENABLE SMARTCARD_ONE_BIT_SAMPLE_ENABLE | |
| 782 | |
| 783 #define SMARTCARD_TIMEOUT_DISABLED SMARTCARD_TIMEOUT_DISABLE | |
| 784 #define SMARTCARD_TIMEOUT_ENABLED SMARTCARD_TIMEOUT_ENABLE | |
| 785 | |
| 786 #define SMARTCARD_LASTBIT_DISABLED SMARTCARD_LASTBIT_DISABLE | |
| 787 #define SMARTCARD_LASTBIT_ENABLED SMARTCARD_LASTBIT_ENABLE | |
| 788 /** | |
| 789 * @} | |
| 790 */ | |
| 791 | |
| 792 | |
| 793 /** @defgroup HAL_SMBUS_Aliased_Defines HAL SMBUS Aliased Defines maintained for legacy purpose | |
| 794 * @{ | |
| 795 */ | |
| 796 #define SMBUS_DUALADDRESS_DISABLED SMBUS_DUALADDRESS_DISABLE | |
| 797 #define SMBUS_DUALADDRESS_ENABLED SMBUS_DUALADDRESS_ENABLE | |
| 798 #define SMBUS_GENERALCALL_DISABLED SMBUS_GENERALCALL_DISABLE | |
| 799 #define SMBUS_GENERALCALL_ENABLED SMBUS_GENERALCALL_ENABLE | |
| 800 #define SMBUS_NOSTRETCH_DISABLED SMBUS_NOSTRETCH_DISABLE | |
| 801 #define SMBUS_NOSTRETCH_ENABLED SMBUS_NOSTRETCH_ENABLE | |
| 802 #define SMBUS_ANALOGFILTER_ENABLED SMBUS_ANALOGFILTER_ENABLE | |
| 803 #define SMBUS_ANALOGFILTER_DISABLED SMBUS_ANALOGFILTER_DISABLE | |
| 804 #define SMBUS_PEC_DISABLED SMBUS_PEC_DISABLE | |
| 805 #define SMBUS_PEC_ENABLED SMBUS_PEC_ENABLE | |
| 806 #define HAL_SMBUS_STATE_SLAVE_LISTEN HAL_SMBUS_STATE_LISTEN | |
| 807 /** | |
| 808 * @} | |
| 809 */ | |
| 810 | |
| 811 /** @defgroup HAL_SPI_Aliased_Defines HAL SPI Aliased Defines maintained for legacy purpose | |
| 812 * @{ | |
| 813 */ | |
| 814 #define SPI_TIMODE_DISABLED SPI_TIMODE_DISABLE | |
| 815 #define SPI_TIMODE_ENABLED SPI_TIMODE_ENABLE | |
| 816 | |
| 817 #define SPI_CRCCALCULATION_DISABLED SPI_CRCCALCULATION_DISABLE | |
| 818 #define SPI_CRCCALCULATION_ENABLED SPI_CRCCALCULATION_ENABLE | |
| 819 | |
| 820 #define SPI_NSS_PULSE_DISABLED SPI_NSS_PULSE_DISABLE | |
| 821 #define SPI_NSS_PULSE_ENABLED SPI_NSS_PULSE_ENABLE | |
| 822 | |
| 823 /** | |
| 824 * @} | |
| 825 */ | |
| 826 | |
| 827 /** @defgroup HAL_TIM_Aliased_Defines HAL TIM Aliased Defines maintained for legacy purpose | |
| 828 * @{ | |
| 829 */ | |
| 830 #define CCER_CCxE_MASK TIM_CCER_CCxE_MASK | |
| 831 #define CCER_CCxNE_MASK TIM_CCER_CCxNE_MASK | |
| 832 | |
| 833 #define TIM_DMABase_CR1 TIM_DMABASE_CR1 | |
| 834 #define TIM_DMABase_CR2 TIM_DMABASE_CR2 | |
| 835 #define TIM_DMABase_SMCR TIM_DMABASE_SMCR | |
| 836 #define TIM_DMABase_DIER TIM_DMABASE_DIER | |
| 837 #define TIM_DMABase_SR TIM_DMABASE_SR | |
| 838 #define TIM_DMABase_EGR TIM_DMABASE_EGR | |
| 839 #define TIM_DMABase_CCMR1 TIM_DMABASE_CCMR1 | |
| 840 #define TIM_DMABase_CCMR2 TIM_DMABASE_CCMR2 | |
| 841 #define TIM_DMABase_CCER TIM_DMABASE_CCER | |
| 842 #define TIM_DMABase_CNT TIM_DMABASE_CNT | |
| 843 #define TIM_DMABase_PSC TIM_DMABASE_PSC | |
| 844 #define TIM_DMABase_ARR TIM_DMABASE_ARR | |
| 845 #define TIM_DMABase_RCR TIM_DMABASE_RCR | |
| 846 #define TIM_DMABase_CCR1 TIM_DMABASE_CCR1 | |
| 847 #define TIM_DMABase_CCR2 TIM_DMABASE_CCR2 | |
| 848 #define TIM_DMABase_CCR3 TIM_DMABASE_CCR3 | |
| 849 #define TIM_DMABase_CCR4 TIM_DMABASE_CCR4 | |
| 850 #define TIM_DMABase_BDTR TIM_DMABASE_BDTR | |
| 851 #define TIM_DMABase_DCR TIM_DMABASE_DCR | |
| 852 #define TIM_DMABase_DMAR TIM_DMABASE_DMAR | |
| 853 #define TIM_DMABase_OR1 TIM_DMABASE_OR1 | |
| 854 #define TIM_DMABase_CCMR3 TIM_DMABASE_CCMR3 | |
| 855 #define TIM_DMABase_CCR5 TIM_DMABASE_CCR5 | |
| 856 #define TIM_DMABase_CCR6 TIM_DMABASE_CCR6 | |
| 857 #define TIM_DMABase_OR2 TIM_DMABASE_OR2 | |
| 858 #define TIM_DMABase_OR3 TIM_DMABASE_OR3 | |
| 859 #define TIM_DMABase_OR TIM_DMABASE_OR | |
| 860 | |
| 861 #define TIM_EventSource_Update TIM_EVENTSOURCE_UPDATE | |
| 862 #define TIM_EventSource_CC1 TIM_EVENTSOURCE_CC1 | |
| 863 #define TIM_EventSource_CC2 TIM_EVENTSOURCE_CC2 | |
| 864 #define TIM_EventSource_CC3 TIM_EVENTSOURCE_CC3 | |
| 865 #define TIM_EventSource_CC4 TIM_EVENTSOURCE_CC4 | |
| 866 #define TIM_EventSource_COM TIM_EVENTSOURCE_COM | |
| 867 #define TIM_EventSource_Trigger TIM_EVENTSOURCE_TRIGGER | |
| 868 #define TIM_EventSource_Break TIM_EVENTSOURCE_BREAK | |
| 869 #define TIM_EventSource_Break2 TIM_EVENTSOURCE_BREAK2 | |
| 870 | |
| 871 #define TIM_DMABurstLength_1Transfer TIM_DMABURSTLENGTH_1TRANSFER | |
| 872 #define TIM_DMABurstLength_2Transfers TIM_DMABURSTLENGTH_2TRANSFERS | |
| 873 #define TIM_DMABurstLength_3Transfers TIM_DMABURSTLENGTH_3TRANSFERS | |
| 874 #define TIM_DMABurstLength_4Transfers TIM_DMABURSTLENGTH_4TRANSFERS | |
| 875 #define TIM_DMABurstLength_5Transfers TIM_DMABURSTLENGTH_5TRANSFERS | |
| 876 #define TIM_DMABurstLength_6Transfers TIM_DMABURSTLENGTH_6TRANSFERS | |
| 877 #define TIM_DMABurstLength_7Transfers TIM_DMABURSTLENGTH_7TRANSFERS | |
| 878 #define TIM_DMABurstLength_8Transfers TIM_DMABURSTLENGTH_8TRANSFERS | |
| 879 #define TIM_DMABurstLength_9Transfers TIM_DMABURSTLENGTH_9TRANSFERS | |
| 880 #define TIM_DMABurstLength_10Transfers TIM_DMABURSTLENGTH_10TRANSFERS | |
| 881 #define TIM_DMABurstLength_11Transfers TIM_DMABURSTLENGTH_11TRANSFERS | |
| 882 #define TIM_DMABurstLength_12Transfers TIM_DMABURSTLENGTH_12TRANSFERS | |
| 883 #define TIM_DMABurstLength_13Transfers TIM_DMABURSTLENGTH_13TRANSFERS | |
| 884 #define TIM_DMABurstLength_14Transfers TIM_DMABURSTLENGTH_14TRANSFERS | |
| 885 #define TIM_DMABurstLength_15Transfers TIM_DMABURSTLENGTH_15TRANSFERS | |
| 886 #define TIM_DMABurstLength_16Transfers TIM_DMABURSTLENGTH_16TRANSFERS | |
| 887 #define TIM_DMABurstLength_17Transfers TIM_DMABURSTLENGTH_17TRANSFERS | |
| 888 #define TIM_DMABurstLength_18Transfers TIM_DMABURSTLENGTH_18TRANSFERS | |
| 889 | |
| 890 /** | |
| 891 * @} | |
| 892 */ | |
| 893 | |
| 894 /** @defgroup HAL_TSC_Aliased_Defines HAL TSC Aliased Defines maintained for legacy purpose | |
| 895 * @{ | |
| 896 */ | |
| 897 #define TSC_SYNC_POL_FALL TSC_SYNC_POLARITY_FALLING | |
| 898 #define TSC_SYNC_POL_RISE_HIGH TSC_SYNC_POLARITY_RISING | |
| 899 /** | |
| 900 * @} | |
| 901 */ | |
| 902 | |
| 903 /** @defgroup HAL_UART_Aliased_Defines HAL UART Aliased Defines maintained for legacy purpose | |
| 904 * @{ | |
| 905 */ | |
| 906 #define UART_ONEBIT_SAMPLING_DISABLED UART_ONE_BIT_SAMPLE_DISABLE | |
| 907 #define UART_ONEBIT_SAMPLING_ENABLED UART_ONE_BIT_SAMPLE_ENABLE | |
| 908 #define UART_ONE_BIT_SAMPLE_DISABLED UART_ONE_BIT_SAMPLE_DISABLE | |
| 909 #define UART_ONE_BIT_SAMPLE_ENABLED UART_ONE_BIT_SAMPLE_ENABLE | |
| 910 | |
| 911 #define __HAL_UART_ONEBIT_ENABLE __HAL_UART_ONE_BIT_SAMPLE_ENABLE | |
| 912 #define __HAL_UART_ONEBIT_DISABLE __HAL_UART_ONE_BIT_SAMPLE_DISABLE | |
| 913 | |
| 914 #define __DIV_SAMPLING16 UART_DIV_SAMPLING16 | |
| 915 #define __DIVMANT_SAMPLING16 UART_DIVMANT_SAMPLING16 | |
| 916 #define __DIVFRAQ_SAMPLING16 UART_DIVFRAQ_SAMPLING16 | |
| 917 #define __UART_BRR_SAMPLING16 UART_BRR_SAMPLING16 | |
| 918 | |
| 919 #define __DIV_SAMPLING8 UART_DIV_SAMPLING8 | |
| 920 #define __DIVMANT_SAMPLING8 UART_DIVMANT_SAMPLING8 | |
| 921 #define __DIVFRAQ_SAMPLING8 UART_DIVFRAQ_SAMPLING8 | |
| 922 #define __UART_BRR_SAMPLING8 UART_BRR_SAMPLING8 | |
| 923 | |
| 924 #define __DIV_LPUART UART_DIV_LPUART | |
| 925 | |
| 926 #define UART_WAKEUPMETHODE_IDLELINE UART_WAKEUPMETHOD_IDLELINE | |
| 927 #define UART_WAKEUPMETHODE_ADDRESSMARK UART_WAKEUPMETHOD_ADDRESSMARK | |
| 928 | |
| 929 /** | |
| 930 * @} | |
| 931 */ | |
| 932 | |
| 933 | |
| 934 /** @defgroup HAL_USART_Aliased_Defines HAL USART Aliased Defines maintained for legacy purpose | |
| 935 * @{ | |
| 936 */ | |
| 937 | |
| 938 #define USART_CLOCK_DISABLED USART_CLOCK_DISABLE | |
| 939 #define USART_CLOCK_ENABLED USART_CLOCK_ENABLE | |
| 940 | |
| 941 #define USARTNACK_ENABLED USART_NACK_ENABLE | |
| 942 #define USARTNACK_DISABLED USART_NACK_DISABLE | |
| 943 /** | |
| 944 * @} | |
| 945 */ | |
| 946 | |
| 947 /** @defgroup HAL_WWDG_Aliased_Defines HAL WWDG Aliased Defines maintained for legacy purpose | |
| 948 * @{ | |
| 949 */ | |
| 950 #define CFR_BASE WWDG_CFR_BASE | |
| 951 | |
| 952 /** | |
| 953 * @} | |
| 954 */ | |
| 955 | |
| 956 /** @defgroup HAL_CAN_Aliased_Defines HAL CAN Aliased Defines maintained for legacy purpose | |
| 957 * @{ | |
| 958 */ | |
| 959 #define CAN_FilterFIFO0 CAN_FILTER_FIFO0 | |
| 960 #define CAN_FilterFIFO1 CAN_FILTER_FIFO1 | |
| 961 #define CAN_IT_RQCP0 CAN_IT_TME | |
| 962 #define CAN_IT_RQCP1 CAN_IT_TME | |
| 963 #define CAN_IT_RQCP2 CAN_IT_TME | |
| 964 #define INAK_TIMEOUT CAN_TIMEOUT_VALUE | |
| 965 #define SLAK_TIMEOUT CAN_TIMEOUT_VALUE | |
| 966 #define CAN_TXSTATUS_FAILED ((uint8_t)0x00U) | |
| 967 #define CAN_TXSTATUS_OK ((uint8_t)0x01U) | |
| 968 #define CAN_TXSTATUS_PENDING ((uint8_t)0x02U) | |
| 969 | |
| 970 /** | |
| 971 * @} | |
| 972 */ | |
| 973 | |
| 974 /** @defgroup HAL_ETH_Aliased_Defines HAL ETH Aliased Defines maintained for legacy purpose | |
| 975 * @{ | |
| 976 */ | |
| 977 | |
| 978 #define VLAN_TAG ETH_VLAN_TAG | |
| 979 #define MIN_ETH_PAYLOAD ETH_MIN_ETH_PAYLOAD | |
| 980 #define MAX_ETH_PAYLOAD ETH_MAX_ETH_PAYLOAD | |
| 981 #define JUMBO_FRAME_PAYLOAD ETH_JUMBO_FRAME_PAYLOAD | |
| 982 #define MACMIIAR_CR_MASK ETH_MACMIIAR_CR_MASK | |
| 983 #define MACCR_CLEAR_MASK ETH_MACCR_CLEAR_MASK | |
| 984 #define MACFCR_CLEAR_MASK ETH_MACFCR_CLEAR_MASK | |
| 985 #define DMAOMR_CLEAR_MASK ETH_DMAOMR_CLEAR_MASK | |
| 986 | |
| 987 #define ETH_MMCCR 0x00000100U | |
| 988 #define ETH_MMCRIR 0x00000104U | |
| 989 #define ETH_MMCTIR 0x00000108U | |
| 990 #define ETH_MMCRIMR 0x0000010CU | |
| 991 #define ETH_MMCTIMR 0x00000110U | |
| 992 #define ETH_MMCTGFSCCR 0x0000014CU | |
| 993 #define ETH_MMCTGFMSCCR 0x00000150U | |
| 994 #define ETH_MMCTGFCR 0x00000168U | |
| 995 #define ETH_MMCRFCECR 0x00000194U | |
| 996 #define ETH_MMCRFAECR 0x00000198U | |
| 997 #define ETH_MMCRGUFCR 0x000001C4U | |
| 998 | |
| 999 #define ETH_MAC_TXFIFO_FULL 0x02000000U /* Tx FIFO full */ | |
| 1000 #define ETH_MAC_TXFIFONOT_EMPTY 0x01000000U /* Tx FIFO not empty */ | |
| 1001 #define ETH_MAC_TXFIFO_WRITE_ACTIVE 0x00400000U /* Tx FIFO write active */ | |
| 1002 #define ETH_MAC_TXFIFO_IDLE 0x00000000U /* Tx FIFO read status: Idle */ | |
| 1003 #define ETH_MAC_TXFIFO_READ 0x00100000U /* Tx FIFO read status: Read (transferring data to the MAC transmitter) */ | |
| 1004 #define ETH_MAC_TXFIFO_WAITING 0x00200000U /* Tx FIFO read status: Waiting for TxStatus from MAC transmitter */ | |
| 1005 #define ETH_MAC_TXFIFO_WRITING 0x00300000U /* Tx FIFO read status: Writing the received TxStatus or flushing the TxFIFO */ | |
| 1006 #define ETH_MAC_TRANSMISSION_PAUSE 0x00080000U /* MAC transmitter in pause */ | |
| 1007 #define ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE 0x00000000U /* MAC transmit frame controller: Idle */ | |
| 1008 #define ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING 0x00020000U /* MAC transmit frame controller: Waiting for Status of previous frame or IFG/backoff period to be over */ | |
| 1009 #define ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF 0x00040000U /* MAC transmit frame controller: Generating and transmitting a Pause control frame (in full duplex mode) */ | |
| 1010 #define ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING 0x00060000U /* MAC transmit frame controller: Transferring input frame for transmission */ | |
| 1011 #define ETH_MAC_MII_TRANSMIT_ACTIVE 0x00010000U /* MAC MII transmit engine active */ | |
| 1012 #define ETH_MAC_RXFIFO_EMPTY 0x00000000U /* Rx FIFO fill level: empty */ | |
| 1013 #define ETH_MAC_RXFIFO_BELOW_THRESHOLD 0x00000100U /* Rx FIFO fill level: fill-level below flow-control de-activate threshold */ | |
| 1014 #define ETH_MAC_RXFIFO_ABOVE_THRESHOLD 0x00000200U /* Rx FIFO fill level: fill-level above flow-control activate threshold */ | |
| 1015 #define ETH_MAC_RXFIFO_FULL 0x00000300U /* Rx FIFO fill level: full */ | |
| 1016 #if defined(STM32F1) | |
| 1017 #else | |
| 1018 #define ETH_MAC_READCONTROLLER_IDLE 0x00000000U /* Rx FIFO read controller IDLE state */ | |
| 1019 #define ETH_MAC_READCONTROLLER_READING_DATA 0x00000020U /* Rx FIFO read controller Reading frame data */ | |
| 1020 #define ETH_MAC_READCONTROLLER_READING_STATUS 0x00000040U /* Rx FIFO read controller Reading frame status (or time-stamp) */ | |
| 1021 #endif | |
| 1022 #define ETH_MAC_READCONTROLLER_FLUSHING 0x00000060U /* Rx FIFO read controller Flushing the frame data and status */ | |
| 1023 #define ETH_MAC_RXFIFO_WRITE_ACTIVE 0x00000010U /* Rx FIFO write controller active */ | |
| 1024 #define ETH_MAC_SMALL_FIFO_NOTACTIVE 0x00000000U /* MAC small FIFO read / write controllers not active */ | |
| 1025 #define ETH_MAC_SMALL_FIFO_READ_ACTIVE 0x00000002U /* MAC small FIFO read controller active */ | |
| 1026 #define ETH_MAC_SMALL_FIFO_WRITE_ACTIVE 0x00000004U /* MAC small FIFO write controller active */ | |
| 1027 #define ETH_MAC_SMALL_FIFO_RW_ACTIVE 0x00000006U /* MAC small FIFO read / write controllers active */ | |
| 1028 #define ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE 0x00000001U /* MAC MII receive protocol engine active */ | |
| 1029 | |
| 1030 /** | |
| 1031 * @} | |
| 1032 */ | |
| 1033 | |
| 1034 /** @defgroup HAL_DCMI_Aliased_Defines HAL DCMI Aliased Defines maintained for legacy purpose | |
| 1035 * @{ | |
| 1036 */ | |
| 1037 #define HAL_DCMI_ERROR_OVF HAL_DCMI_ERROR_OVR | |
| 1038 #define DCMI_IT_OVF DCMI_IT_OVR | |
| 1039 #define DCMI_FLAG_OVFRI DCMI_FLAG_OVRRI | |
| 1040 #define DCMI_FLAG_OVFMI DCMI_FLAG_OVRMI | |
| 1041 | |
| 1042 #define HAL_DCMI_ConfigCROP HAL_DCMI_ConfigCrop | |
| 1043 #define HAL_DCMI_EnableCROP HAL_DCMI_EnableCrop | |
| 1044 #define HAL_DCMI_DisableCROP HAL_DCMI_DisableCrop | |
| 1045 | |
| 1046 /** | |
| 1047 * @} | |
| 1048 */ | |
| 1049 | |
| 1050 #if defined(STM32L4) || defined(STM32F7) || defined(STM32F427xx) || defined(STM32F437xx) ||\ | |
| 1051 defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) | |
| 1052 /** @defgroup HAL_DMA2D_Aliased_Defines HAL DMA2D Aliased Defines maintained for legacy purpose | |
| 1053 * @{ | |
| 1054 */ | |
| 1055 #define DMA2D_ARGB8888 DMA2D_OUTPUT_ARGB8888 | |
| 1056 #define DMA2D_RGB888 DMA2D_OUTPUT_RGB888 | |
| 1057 #define DMA2D_RGB565 DMA2D_OUTPUT_RGB565 | |
| 1058 #define DMA2D_ARGB1555 DMA2D_OUTPUT_ARGB1555 | |
| 1059 #define DMA2D_ARGB4444 DMA2D_OUTPUT_ARGB4444 | |
| 1060 | |
| 1061 #define CM_ARGB8888 DMA2D_INPUT_ARGB8888 | |
| 1062 #define CM_RGB888 DMA2D_INPUT_RGB888 | |
| 1063 #define CM_RGB565 DMA2D_INPUT_RGB565 | |
| 1064 #define CM_ARGB1555 DMA2D_INPUT_ARGB1555 | |
| 1065 #define CM_ARGB4444 DMA2D_INPUT_ARGB4444 | |
| 1066 #define CM_L8 DMA2D_INPUT_L8 | |
| 1067 #define CM_AL44 DMA2D_INPUT_AL44 | |
| 1068 #define CM_AL88 DMA2D_INPUT_AL88 | |
| 1069 #define CM_L4 DMA2D_INPUT_L4 | |
| 1070 #define CM_A8 DMA2D_INPUT_A8 | |
| 1071 #define CM_A4 DMA2D_INPUT_A4 | |
| 1072 /** | |
| 1073 * @} | |
| 1074 */ | |
| 1075 #endif /* STM32L4 || STM32F7*/ | |
| 1076 | |
| 1077 /** @defgroup HAL_PPP_Aliased_Defines HAL PPP Aliased Defines maintained for legacy purpose | |
| 1078 * @{ | |
| 1079 */ | |
| 1080 | |
| 1081 /** | |
| 1082 * @} | |
| 1083 */ | |
| 1084 | |
| 1085 /* Exported functions --------------------------------------------------------*/ | |
| 1086 | |
| 1087 /** @defgroup HAL_CRYP_Aliased_Functions HAL CRYP Aliased Functions maintained for legacy purpose | |
| 1088 * @{ | |
| 1089 */ | |
| 1090 #define HAL_CRYP_ComputationCpltCallback HAL_CRYPEx_ComputationCpltCallback | |
| 1091 /** | |
| 1092 * @} | |
| 1093 */ | |
| 1094 | |
| 1095 /** @defgroup HAL_HASH_Aliased_Functions HAL HASH Aliased Functions maintained for legacy purpose | |
| 1096 * @{ | |
| 1097 */ | |
| 1098 #define HAL_HASH_STATETypeDef HAL_HASH_StateTypeDef | |
| 1099 #define HAL_HASHPhaseTypeDef HAL_HASH_PhaseTypeDef | |
| 1100 #define HAL_HMAC_MD5_Finish HAL_HASH_MD5_Finish | |
| 1101 #define HAL_HMAC_SHA1_Finish HAL_HASH_SHA1_Finish | |
| 1102 #define HAL_HMAC_SHA224_Finish HAL_HASH_SHA224_Finish | |
| 1103 #define HAL_HMAC_SHA256_Finish HAL_HASH_SHA256_Finish | |
| 1104 | |
| 1105 /*HASH Algorithm Selection*/ | |
| 1106 | |
| 1107 #define HASH_AlgoSelection_SHA1 HASH_ALGOSELECTION_SHA1 | |
| 1108 #define HASH_AlgoSelection_SHA224 HASH_ALGOSELECTION_SHA224 | |
| 1109 #define HASH_AlgoSelection_SHA256 HASH_ALGOSELECTION_SHA256 | |
| 1110 #define HASH_AlgoSelection_MD5 HASH_ALGOSELECTION_MD5 | |
| 1111 | |
| 1112 #define HASH_AlgoMode_HASH HASH_ALGOMODE_HASH | |
| 1113 #define HASH_AlgoMode_HMAC HASH_ALGOMODE_HMAC | |
| 1114 | |
| 1115 #define HASH_HMACKeyType_ShortKey HASH_HMAC_KEYTYPE_SHORTKEY | |
| 1116 #define HASH_HMACKeyType_LongKey HASH_HMAC_KEYTYPE_LONGKEY | |
| 1117 /** | |
| 1118 * @} | |
| 1119 */ | |
| 1120 | |
| 1121 /** @defgroup HAL_Aliased_Functions HAL Generic Aliased Functions maintained for legacy purpose | |
| 1122 * @{ | |
| 1123 */ | |
| 1124 #define HAL_EnableDBGSleepMode HAL_DBGMCU_EnableDBGSleepMode | |
| 1125 #define HAL_DisableDBGSleepMode HAL_DBGMCU_DisableDBGSleepMode | |
| 1126 #define HAL_EnableDBGStopMode HAL_DBGMCU_EnableDBGStopMode | |
| 1127 #define HAL_DisableDBGStopMode HAL_DBGMCU_DisableDBGStopMode | |
| 1128 #define HAL_EnableDBGStandbyMode HAL_DBGMCU_EnableDBGStandbyMode | |
| 1129 #define HAL_DisableDBGStandbyMode HAL_DBGMCU_DisableDBGStandbyMode | |
| 1130 #define HAL_DBG_LowPowerConfig(Periph, cmd) (((cmd)==ENABLE)? HAL_DBGMCU_DBG_EnableLowPowerConfig(Periph) : HAL_DBGMCU_DBG_DisableLowPowerConfig(Periph)) | |
| 1131 #define HAL_VREFINT_OutputSelect HAL_SYSCFG_VREFINT_OutputSelect | |
| 1132 #define HAL_Lock_Cmd(cmd) (((cmd)==ENABLE) ? HAL_SYSCFG_Enable_Lock_VREFINT() : HAL_SYSCFG_Disable_Lock_VREFINT()) | |
| 1133 #if defined(STM32L0) | |
| 1134 #else | |
| 1135 #define HAL_VREFINT_Cmd(cmd) (((cmd)==ENABLE)? HAL_SYSCFG_EnableVREFINT() : HAL_SYSCFG_DisableVREFINT()) | |
| 1136 #endif | |
| 1137 #define HAL_ADC_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINT() : HAL_ADCEx_DisableVREFINT()) | |
| 1138 #define HAL_ADC_EnableBufferSensor_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINTTempSensor() : HAL_ADCEx_DisableVREFINTTempSensor()) | |
| 1139 /** | |
| 1140 * @} | |
| 1141 */ | |
| 1142 | |
| 1143 /** @defgroup HAL_FLASH_Aliased_Functions HAL FLASH Aliased Functions maintained for legacy purpose | |
| 1144 * @{ | |
| 1145 */ | |
| 1146 #define FLASH_HalfPageProgram HAL_FLASHEx_HalfPageProgram | |
| 1147 #define FLASH_EnableRunPowerDown HAL_FLASHEx_EnableRunPowerDown | |
| 1148 #define FLASH_DisableRunPowerDown HAL_FLASHEx_DisableRunPowerDown | |
| 1149 #define HAL_DATA_EEPROMEx_Unlock HAL_FLASHEx_DATAEEPROM_Unlock | |
| 1150 #define HAL_DATA_EEPROMEx_Lock HAL_FLASHEx_DATAEEPROM_Lock | |
| 1151 #define HAL_DATA_EEPROMEx_Erase HAL_FLASHEx_DATAEEPROM_Erase | |
| 1152 #define HAL_DATA_EEPROMEx_Program HAL_FLASHEx_DATAEEPROM_Program | |
| 1153 | |
| 1154 /** | |
| 1155 * @} | |
| 1156 */ | |
| 1157 | |
| 1158 /** @defgroup HAL_I2C_Aliased_Functions HAL I2C Aliased Functions maintained for legacy purpose | |
| 1159 * @{ | |
| 1160 */ | |
| 1161 #define HAL_I2CEx_AnalogFilter_Config HAL_I2CEx_ConfigAnalogFilter | |
| 1162 #define HAL_I2CEx_DigitalFilter_Config HAL_I2CEx_ConfigDigitalFilter | |
| 1163 #define HAL_FMPI2CEx_AnalogFilter_Config HAL_FMPI2CEx_ConfigAnalogFilter | |
| 1164 #define HAL_FMPI2CEx_DigitalFilter_Config HAL_FMPI2CEx_ConfigDigitalFilter | |
| 1165 | |
| 1166 #define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd)==ENABLE)? HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus)) | |
| 1167 /** | |
| 1168 * @} | |
| 1169 */ | |
| 1170 | |
| 1171 /** @defgroup HAL_PWR_Aliased HAL PWR Aliased maintained for legacy purpose | |
| 1172 * @{ | |
| 1173 */ | |
| 1174 #define HAL_PWR_PVDConfig HAL_PWR_ConfigPVD | |
| 1175 #define HAL_PWR_DisableBkUpReg HAL_PWREx_DisableBkUpReg | |
| 1176 #define HAL_PWR_DisableFlashPowerDown HAL_PWREx_DisableFlashPowerDown | |
| 1177 #define HAL_PWR_DisableVddio2Monitor HAL_PWREx_DisableVddio2Monitor | |
| 1178 #define HAL_PWR_EnableBkUpReg HAL_PWREx_EnableBkUpReg | |
| 1179 #define HAL_PWR_EnableFlashPowerDown HAL_PWREx_EnableFlashPowerDown | |
| 1180 #define HAL_PWR_EnableVddio2Monitor HAL_PWREx_EnableVddio2Monitor | |
| 1181 #define HAL_PWR_PVD_PVM_IRQHandler HAL_PWREx_PVD_PVM_IRQHandler | |
| 1182 #define HAL_PWR_PVDLevelConfig HAL_PWR_ConfigPVD | |
| 1183 #define HAL_PWR_Vddio2Monitor_IRQHandler HAL_PWREx_Vddio2Monitor_IRQHandler | |
| 1184 #define HAL_PWR_Vddio2MonitorCallback HAL_PWREx_Vddio2MonitorCallback | |
| 1185 #define HAL_PWREx_ActivateOverDrive HAL_PWREx_EnableOverDrive | |
| 1186 #define HAL_PWREx_DeactivateOverDrive HAL_PWREx_DisableOverDrive | |
| 1187 #define HAL_PWREx_DisableSDADCAnalog HAL_PWREx_DisableSDADC | |
| 1188 #define HAL_PWREx_EnableSDADCAnalog HAL_PWREx_EnableSDADC | |
| 1189 #define HAL_PWREx_PVMConfig HAL_PWREx_ConfigPVM | |
| 1190 | |
| 1191 #define PWR_MODE_NORMAL PWR_PVD_MODE_NORMAL | |
| 1192 #define PWR_MODE_IT_RISING PWR_PVD_MODE_IT_RISING | |
| 1193 #define PWR_MODE_IT_FALLING PWR_PVD_MODE_IT_FALLING | |
| 1194 #define PWR_MODE_IT_RISING_FALLING PWR_PVD_MODE_IT_RISING_FALLING | |
| 1195 #define PWR_MODE_EVENT_RISING PWR_PVD_MODE_EVENT_RISING | |
| 1196 #define PWR_MODE_EVENT_FALLING PWR_PVD_MODE_EVENT_FALLING | |
| 1197 #define PWR_MODE_EVENT_RISING_FALLING PWR_PVD_MODE_EVENT_RISING_FALLING | |
| 1198 | |
| 1199 #define CR_OFFSET_BB PWR_CR_OFFSET_BB | |
| 1200 #define CSR_OFFSET_BB PWR_CSR_OFFSET_BB | |
| 1201 #define PMODE_BIT_NUMBER VOS_BIT_NUMBER | |
| 1202 #define CR_PMODE_BB CR_VOS_BB | |
| 1203 | |
| 1204 #define DBP_BitNumber DBP_BIT_NUMBER | |
| 1205 #define PVDE_BitNumber PVDE_BIT_NUMBER | |
| 1206 #define PMODE_BitNumber PMODE_BIT_NUMBER | |
| 1207 #define EWUP_BitNumber EWUP_BIT_NUMBER | |
| 1208 #define FPDS_BitNumber FPDS_BIT_NUMBER | |
| 1209 #define ODEN_BitNumber ODEN_BIT_NUMBER | |
| 1210 #define ODSWEN_BitNumber ODSWEN_BIT_NUMBER | |
| 1211 #define MRLVDS_BitNumber MRLVDS_BIT_NUMBER | |
| 1212 #define LPLVDS_BitNumber LPLVDS_BIT_NUMBER | |
| 1213 #define BRE_BitNumber BRE_BIT_NUMBER | |
| 1214 | |
| 1215 #define PWR_MODE_EVT PWR_PVD_MODE_NORMAL | |
| 1216 | |
| 1217 /** | |
| 1218 * @} | |
| 1219 */ | |
| 1220 | |
| 1221 /** @defgroup HAL_SMBUS_Aliased_Functions HAL SMBUS Aliased Functions maintained for legacy purpose | |
| 1222 * @{ | |
| 1223 */ | |
| 1224 #define HAL_SMBUS_Slave_Listen_IT HAL_SMBUS_EnableListen_IT | |
| 1225 #define HAL_SMBUS_SlaveAddrCallback HAL_SMBUS_AddrCallback | |
| 1226 #define HAL_SMBUS_SlaveListenCpltCallback HAL_SMBUS_ListenCpltCallback | |
| 1227 /** | |
| 1228 * @} | |
| 1229 */ | |
| 1230 | |
| 1231 /** @defgroup HAL_SPI_Aliased_Functions HAL SPI Aliased Functions maintained for legacy purpose | |
| 1232 * @{ | |
| 1233 */ | |
| 1234 #define HAL_SPI_FlushRxFifo HAL_SPIEx_FlushRxFifo | |
| 1235 /** | |
| 1236 * @} | |
| 1237 */ | |
| 1238 | |
| 1239 /** @defgroup HAL_TIM_Aliased_Functions HAL TIM Aliased Functions maintained for legacy purpose | |
| 1240 * @{ | |
| 1241 */ | |
| 1242 #define HAL_TIM_DMADelayPulseCplt TIM_DMADelayPulseCplt | |
| 1243 #define HAL_TIM_DMAError TIM_DMAError | |
| 1244 #define HAL_TIM_DMACaptureCplt TIM_DMACaptureCplt | |
| 1245 #define HAL_TIMEx_DMACommutationCplt TIMEx_DMACommutationCplt | |
| 1246 /** | |
| 1247 * @} | |
| 1248 */ | |
| 1249 | |
| 1250 /** @defgroup HAL_UART_Aliased_Functions HAL UART Aliased Functions maintained for legacy purpose | |
| 1251 * @{ | |
| 1252 */ | |
| 1253 #define HAL_UART_WakeupCallback HAL_UARTEx_WakeupCallback | |
| 1254 /** | |
| 1255 * @} | |
| 1256 */ | |
| 1257 | |
| 1258 /** @defgroup HAL_LTDC_Aliased_Functions HAL LTDC Aliased Functions maintained for legacy purpose | |
| 1259 * @{ | |
| 1260 */ | |
| 1261 #define HAL_LTDC_LineEvenCallback HAL_LTDC_LineEventCallback | |
| 1262 #define HAL_LTDC_Relaod HAL_LTDC_Reload | |
| 1263 #define HAL_LTDC_StructInitFromVideoConfig HAL_LTDCEx_StructInitFromVideoConfig | |
| 1264 #define HAL_LTDC_StructInitFromAdaptedCommandConfig HAL_LTDCEx_StructInitFromAdaptedCommandConfig | |
| 1265 /** | |
| 1266 * @} | |
| 1267 */ | |
| 1268 | |
| 1269 | |
| 1270 /** @defgroup HAL_PPP_Aliased_Functions HAL PPP Aliased Functions maintained for legacy purpose | |
| 1271 * @{ | |
| 1272 */ | |
| 1273 | |
| 1274 /** | |
| 1275 * @} | |
| 1276 */ | |
| 1277 | |
| 1278 /* Exported macros ------------------------------------------------------------*/ | |
| 1279 | |
| 1280 /** @defgroup HAL_AES_Aliased_Macros HAL CRYP Aliased Macros maintained for legacy purpose | |
| 1281 * @{ | |
| 1282 */ | |
| 1283 #define AES_IT_CC CRYP_IT_CC | |
| 1284 #define AES_IT_ERR CRYP_IT_ERR | |
| 1285 #define AES_FLAG_CCF CRYP_FLAG_CCF | |
| 1286 /** | |
| 1287 * @} | |
| 1288 */ | |
| 1289 | |
| 1290 /** @defgroup HAL_Aliased_Macros HAL Generic Aliased Macros maintained for legacy purpose | |
| 1291 * @{ | |
| 1292 */ | |
| 1293 #define __HAL_GET_BOOT_MODE __HAL_SYSCFG_GET_BOOT_MODE | |
| 1294 #define __HAL_REMAPMEMORY_FLASH __HAL_SYSCFG_REMAPMEMORY_FLASH | |
| 1295 #define __HAL_REMAPMEMORY_SYSTEMFLASH __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH | |
| 1296 #define __HAL_REMAPMEMORY_SRAM __HAL_SYSCFG_REMAPMEMORY_SRAM | |
| 1297 #define __HAL_REMAPMEMORY_FMC __HAL_SYSCFG_REMAPMEMORY_FMC | |
| 1298 #define __HAL_REMAPMEMORY_FMC_SDRAM __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM | |
| 1299 #define __HAL_REMAPMEMORY_FSMC __HAL_SYSCFG_REMAPMEMORY_FSMC | |
| 1300 #define __HAL_REMAPMEMORY_QUADSPI __HAL_SYSCFG_REMAPMEMORY_QUADSPI | |
| 1301 #define __HAL_FMC_BANK __HAL_SYSCFG_FMC_BANK | |
| 1302 #define __HAL_GET_FLAG __HAL_SYSCFG_GET_FLAG | |
| 1303 #define __HAL_CLEAR_FLAG __HAL_SYSCFG_CLEAR_FLAG | |
| 1304 #define __HAL_VREFINT_OUT_ENABLE __HAL_SYSCFG_VREFINT_OUT_ENABLE | |
| 1305 #define __HAL_VREFINT_OUT_DISABLE __HAL_SYSCFG_VREFINT_OUT_DISABLE | |
| 1306 #define __HAL_SYSCFG_SRAM2_WRP_ENABLE __HAL_SYSCFG_SRAM2_WRP_0_31_ENABLE | |
| 1307 | |
| 1308 #define SYSCFG_FLAG_VREF_READY SYSCFG_FLAG_VREFINT_READY | |
| 1309 #define SYSCFG_FLAG_RC48 RCC_FLAG_HSI48 | |
| 1310 #define IS_SYSCFG_FASTMODEPLUS_CONFIG IS_I2C_FASTMODEPLUS | |
| 1311 #define UFB_MODE_BitNumber UFB_MODE_BIT_NUMBER | |
| 1312 #define CMP_PD_BitNumber CMP_PD_BIT_NUMBER | |
| 1313 | |
| 1314 /** | |
| 1315 * @} | |
| 1316 */ | |
| 1317 | |
| 1318 | |
| 1319 /** @defgroup HAL_ADC_Aliased_Macros HAL ADC Aliased Macros maintained for legacy purpose | |
| 1320 * @{ | |
| 1321 */ | |
| 1322 #define __ADC_ENABLE __HAL_ADC_ENABLE | |
| 1323 #define __ADC_DISABLE __HAL_ADC_DISABLE | |
| 1324 #define __HAL_ADC_ENABLING_CONDITIONS ADC_ENABLING_CONDITIONS | |
| 1325 #define __HAL_ADC_DISABLING_CONDITIONS ADC_DISABLING_CONDITIONS | |
| 1326 #define __HAL_ADC_IS_ENABLED ADC_IS_ENABLE | |
| 1327 #define __ADC_IS_ENABLED ADC_IS_ENABLE | |
| 1328 #define __HAL_ADC_IS_SOFTWARE_START_REGULAR ADC_IS_SOFTWARE_START_REGULAR | |
| 1329 #define __HAL_ADC_IS_SOFTWARE_START_INJECTED ADC_IS_SOFTWARE_START_INJECTED | |
| 1330 #define __HAL_ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED | |
| 1331 #define __HAL_ADC_IS_CONVERSION_ONGOING_REGULAR ADC_IS_CONVERSION_ONGOING_REGULAR | |
| 1332 #define __HAL_ADC_IS_CONVERSION_ONGOING_INJECTED ADC_IS_CONVERSION_ONGOING_INJECTED | |
| 1333 #define __HAL_ADC_IS_CONVERSION_ONGOING ADC_IS_CONVERSION_ONGOING | |
| 1334 #define __HAL_ADC_CLEAR_ERRORCODE ADC_CLEAR_ERRORCODE | |
| 1335 | |
| 1336 #define __HAL_ADC_GET_RESOLUTION ADC_GET_RESOLUTION | |
| 1337 #define __HAL_ADC_JSQR_RK ADC_JSQR_RK | |
| 1338 #define __HAL_ADC_CFGR_AWD1CH ADC_CFGR_AWD1CH_SHIFT | |
| 1339 #define __HAL_ADC_CFGR_AWD23CR ADC_CFGR_AWD23CR | |
| 1340 #define __HAL_ADC_CFGR_INJECT_AUTO_CONVERSION ADC_CFGR_INJECT_AUTO_CONVERSION | |
| 1341 #define __HAL_ADC_CFGR_INJECT_CONTEXT_QUEUE ADC_CFGR_INJECT_CONTEXT_QUEUE | |
| 1342 #define __HAL_ADC_CFGR_INJECT_DISCCONTINUOUS ADC_CFGR_INJECT_DISCCONTINUOUS | |
| 1343 #define __HAL_ADC_CFGR_REG_DISCCONTINUOUS ADC_CFGR_REG_DISCCONTINUOUS | |
| 1344 #define __HAL_ADC_CFGR_DISCONTINUOUS_NUM ADC_CFGR_DISCONTINUOUS_NUM | |
| 1345 #define __HAL_ADC_CFGR_AUTOWAIT ADC_CFGR_AUTOWAIT | |
| 1346 #define __HAL_ADC_CFGR_CONTINUOUS ADC_CFGR_CONTINUOUS | |
| 1347 #define __HAL_ADC_CFGR_OVERRUN ADC_CFGR_OVERRUN | |
| 1348 #define __HAL_ADC_CFGR_DMACONTREQ ADC_CFGR_DMACONTREQ | |
| 1349 #define __HAL_ADC_CFGR_EXTSEL ADC_CFGR_EXTSEL_SET | |
| 1350 #define __HAL_ADC_JSQR_JEXTSEL ADC_JSQR_JEXTSEL_SET | |
| 1351 #define __HAL_ADC_OFR_CHANNEL ADC_OFR_CHANNEL | |
| 1352 #define __HAL_ADC_DIFSEL_CHANNEL ADC_DIFSEL_CHANNEL | |
| 1353 #define __HAL_ADC_CALFACT_DIFF_SET ADC_CALFACT_DIFF_SET | |
| 1354 #define __HAL_ADC_CALFACT_DIFF_GET ADC_CALFACT_DIFF_GET | |
| 1355 #define __HAL_ADC_TRX_HIGHTHRESHOLD ADC_TRX_HIGHTHRESHOLD | |
| 1356 | |
| 1357 #define __HAL_ADC_OFFSET_SHIFT_RESOLUTION ADC_OFFSET_SHIFT_RESOLUTION | |
| 1358 #define __HAL_ADC_AWD1THRESHOLD_SHIFT_RESOLUTION ADC_AWD1THRESHOLD_SHIFT_RESOLUTION | |
| 1359 #define __HAL_ADC_AWD23THRESHOLD_SHIFT_RESOLUTION ADC_AWD23THRESHOLD_SHIFT_RESOLUTION | |
| 1360 #define __HAL_ADC_COMMON_REGISTER ADC_COMMON_REGISTER | |
| 1361 #define __HAL_ADC_COMMON_CCR_MULTI ADC_COMMON_CCR_MULTI | |
| 1362 #define __HAL_ADC_MULTIMODE_IS_ENABLED ADC_MULTIMODE_IS_ENABLE | |
| 1363 #define __ADC_MULTIMODE_IS_ENABLED ADC_MULTIMODE_IS_ENABLE | |
| 1364 #define __HAL_ADC_NONMULTIMODE_OR_MULTIMODEMASTER ADC_NONMULTIMODE_OR_MULTIMODEMASTER | |
| 1365 #define __HAL_ADC_COMMON_ADC_OTHER ADC_COMMON_ADC_OTHER | |
| 1366 #define __HAL_ADC_MULTI_SLAVE ADC_MULTI_SLAVE | |
| 1367 | |
| 1368 #define __HAL_ADC_SQR1_L ADC_SQR1_L_SHIFT | |
| 1369 #define __HAL_ADC_JSQR_JL ADC_JSQR_JL_SHIFT | |
| 1370 #define __HAL_ADC_JSQR_RK_JL ADC_JSQR_RK_JL | |
| 1371 #define __HAL_ADC_CR1_DISCONTINUOUS_NUM ADC_CR1_DISCONTINUOUS_NUM | |
| 1372 #define __HAL_ADC_CR1_SCAN ADC_CR1_SCAN_SET | |
| 1373 #define __HAL_ADC_CONVCYCLES_MAX_RANGE ADC_CONVCYCLES_MAX_RANGE | |
| 1374 #define __HAL_ADC_CLOCK_PRESCALER_RANGE ADC_CLOCK_PRESCALER_RANGE | |
| 1375 #define __HAL_ADC_GET_CLOCK_PRESCALER ADC_GET_CLOCK_PRESCALER | |
| 1376 | |
| 1377 #define __HAL_ADC_SQR1 ADC_SQR1 | |
| 1378 #define __HAL_ADC_SMPR1 ADC_SMPR1 | |
| 1379 #define __HAL_ADC_SMPR2 ADC_SMPR2 | |
| 1380 #define __HAL_ADC_SQR3_RK ADC_SQR3_RK | |
| 1381 #define __HAL_ADC_SQR2_RK ADC_SQR2_RK | |
| 1382 #define __HAL_ADC_SQR1_RK ADC_SQR1_RK | |
| 1383 #define __HAL_ADC_CR2_CONTINUOUS ADC_CR2_CONTINUOUS | |
| 1384 #define __HAL_ADC_CR1_DISCONTINUOUS ADC_CR1_DISCONTINUOUS | |
| 1385 #define __HAL_ADC_CR1_SCANCONV ADC_CR1_SCANCONV | |
| 1386 #define __HAL_ADC_CR2_EOCSelection ADC_CR2_EOCSelection | |
| 1387 #define __HAL_ADC_CR2_DMAContReq ADC_CR2_DMAContReq | |
| 1388 #define __HAL_ADC_JSQR ADC_JSQR | |
| 1389 | |
| 1390 #define __HAL_ADC_CHSELR_CHANNEL ADC_CHSELR_CHANNEL | |
| 1391 #define __HAL_ADC_CFGR1_REG_DISCCONTINUOUS ADC_CFGR1_REG_DISCCONTINUOUS | |
| 1392 #define __HAL_ADC_CFGR1_AUTOOFF ADC_CFGR1_AUTOOFF | |
| 1393 #define __HAL_ADC_CFGR1_AUTOWAIT ADC_CFGR1_AUTOWAIT | |
| 1394 #define __HAL_ADC_CFGR1_CONTINUOUS ADC_CFGR1_CONTINUOUS | |
| 1395 #define __HAL_ADC_CFGR1_OVERRUN ADC_CFGR1_OVERRUN | |
| 1396 #define __HAL_ADC_CFGR1_SCANDIR ADC_CFGR1_SCANDIR | |
| 1397 #define __HAL_ADC_CFGR1_DMACONTREQ ADC_CFGR1_DMACONTREQ | |
| 1398 | |
| 1399 /** | |
| 1400 * @} | |
| 1401 */ | |
| 1402 | |
| 1403 /** @defgroup HAL_DAC_Aliased_Macros HAL DAC Aliased Macros maintained for legacy purpose | |
| 1404 * @{ | |
| 1405 */ | |
| 1406 #define __HAL_DHR12R1_ALIGNEMENT DAC_DHR12R1_ALIGNMENT | |
| 1407 #define __HAL_DHR12R2_ALIGNEMENT DAC_DHR12R2_ALIGNMENT | |
| 1408 #define __HAL_DHR12RD_ALIGNEMENT DAC_DHR12RD_ALIGNMENT | |
| 1409 #define IS_DAC_GENERATE_WAVE IS_DAC_WAVE | |
| 1410 | |
| 1411 /** | |
| 1412 * @} | |
| 1413 */ | |
| 1414 | |
| 1415 /** @defgroup HAL_DBGMCU_Aliased_Macros HAL DBGMCU Aliased Macros maintained for legacy purpose | |
| 1416 * @{ | |
| 1417 */ | |
| 1418 #define __HAL_FREEZE_TIM1_DBGMCU __HAL_DBGMCU_FREEZE_TIM1 | |
| 1419 #define __HAL_UNFREEZE_TIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM1 | |
| 1420 #define __HAL_FREEZE_TIM2_DBGMCU __HAL_DBGMCU_FREEZE_TIM2 | |
| 1421 #define __HAL_UNFREEZE_TIM2_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM2 | |
| 1422 #define __HAL_FREEZE_TIM3_DBGMCU __HAL_DBGMCU_FREEZE_TIM3 | |
| 1423 #define __HAL_UNFREEZE_TIM3_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM3 | |
| 1424 #define __HAL_FREEZE_TIM4_DBGMCU __HAL_DBGMCU_FREEZE_TIM4 | |
| 1425 #define __HAL_UNFREEZE_TIM4_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM4 | |
| 1426 #define __HAL_FREEZE_TIM5_DBGMCU __HAL_DBGMCU_FREEZE_TIM5 | |
| 1427 #define __HAL_UNFREEZE_TIM5_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM5 | |
| 1428 #define __HAL_FREEZE_TIM6_DBGMCU __HAL_DBGMCU_FREEZE_TIM6 | |
| 1429 #define __HAL_UNFREEZE_TIM6_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM6 | |
| 1430 #define __HAL_FREEZE_TIM7_DBGMCU __HAL_DBGMCU_FREEZE_TIM7 | |
| 1431 #define __HAL_UNFREEZE_TIM7_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM7 | |
| 1432 #define __HAL_FREEZE_TIM8_DBGMCU __HAL_DBGMCU_FREEZE_TIM8 | |
| 1433 #define __HAL_UNFREEZE_TIM8_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM8 | |
| 1434 | |
| 1435 #define __HAL_FREEZE_TIM9_DBGMCU __HAL_DBGMCU_FREEZE_TIM9 | |
| 1436 #define __HAL_UNFREEZE_TIM9_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM9 | |
| 1437 #define __HAL_FREEZE_TIM10_DBGMCU __HAL_DBGMCU_FREEZE_TIM10 | |
| 1438 #define __HAL_UNFREEZE_TIM10_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM10 | |
| 1439 #define __HAL_FREEZE_TIM11_DBGMCU __HAL_DBGMCU_FREEZE_TIM11 | |
| 1440 #define __HAL_UNFREEZE_TIM11_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM11 | |
| 1441 #define __HAL_FREEZE_TIM12_DBGMCU __HAL_DBGMCU_FREEZE_TIM12 | |
| 1442 #define __HAL_UNFREEZE_TIM12_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM12 | |
| 1443 #define __HAL_FREEZE_TIM13_DBGMCU __HAL_DBGMCU_FREEZE_TIM13 | |
| 1444 #define __HAL_UNFREEZE_TIM13_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM13 | |
| 1445 #define __HAL_FREEZE_TIM14_DBGMCU __HAL_DBGMCU_FREEZE_TIM14 | |
| 1446 #define __HAL_UNFREEZE_TIM14_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM14 | |
| 1447 #define __HAL_FREEZE_CAN2_DBGMCU __HAL_DBGMCU_FREEZE_CAN2 | |
| 1448 #define __HAL_UNFREEZE_CAN2_DBGMCU __HAL_DBGMCU_UNFREEZE_CAN2 | |
| 1449 | |
| 1450 | |
| 1451 #define __HAL_FREEZE_TIM15_DBGMCU __HAL_DBGMCU_FREEZE_TIM15 | |
| 1452 #define __HAL_UNFREEZE_TIM15_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM15 | |
| 1453 #define __HAL_FREEZE_TIM16_DBGMCU __HAL_DBGMCU_FREEZE_TIM16 | |
| 1454 #define __HAL_UNFREEZE_TIM16_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM16 | |
| 1455 #define __HAL_FREEZE_TIM17_DBGMCU __HAL_DBGMCU_FREEZE_TIM17 | |
| 1456 #define __HAL_UNFREEZE_TIM17_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM17 | |
| 1457 #define __HAL_FREEZE_RTC_DBGMCU __HAL_DBGMCU_FREEZE_RTC | |
| 1458 #define __HAL_UNFREEZE_RTC_DBGMCU __HAL_DBGMCU_UNFREEZE_RTC | |
| 1459 #define __HAL_FREEZE_WWDG_DBGMCU __HAL_DBGMCU_FREEZE_WWDG | |
| 1460 #define __HAL_UNFREEZE_WWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_WWDG | |
| 1461 #define __HAL_FREEZE_IWDG_DBGMCU __HAL_DBGMCU_FREEZE_IWDG | |
| 1462 #define __HAL_UNFREEZE_IWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_IWDG | |
| 1463 #define __HAL_FREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT | |
| 1464 #define __HAL_UNFREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT | |
| 1465 #define __HAL_FREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT | |
| 1466 #define __HAL_UNFREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT | |
| 1467 #define __HAL_FREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT | |
| 1468 #define __HAL_UNFREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT | |
| 1469 #define __HAL_FREEZE_CAN1_DBGMCU __HAL_DBGMCU_FREEZE_CAN1 | |
| 1470 #define __HAL_UNFREEZE_CAN1_DBGMCU __HAL_DBGMCU_UNFREEZE_CAN1 | |
| 1471 #define __HAL_FREEZE_LPTIM1_DBGMCU __HAL_DBGMCU_FREEZE_LPTIM1 | |
| 1472 #define __HAL_UNFREEZE_LPTIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_LPTIM1 | |
| 1473 #define __HAL_FREEZE_LPTIM2_DBGMCU __HAL_DBGMCU_FREEZE_LPTIM2 | |
| 1474 #define __HAL_UNFREEZE_LPTIM2_DBGMCU __HAL_DBGMCU_UNFREEZE_LPTIM2 | |
| 1475 | |
| 1476 /** | |
| 1477 * @} | |
| 1478 */ | |
| 1479 | |
| 1480 /** @defgroup HAL_COMP_Aliased_Macros HAL COMP Aliased Macros maintained for legacy purpose | |
| 1481 * @{ | |
| 1482 */ | |
| 1483 #if defined(STM32F3) | |
| 1484 #define COMP_START __HAL_COMP_ENABLE | |
| 1485 #define COMP_STOP __HAL_COMP_DISABLE | |
| 1486 #define COMP_LOCK __HAL_COMP_LOCK | |
| 1487 | |
| 1488 #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) | |
| 1489 #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \ | |
| 1490 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \ | |
| 1491 __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE()) | |
| 1492 #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \ | |
| 1493 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : \ | |
| 1494 __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE()) | |
| 1495 #define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() : \ | |
| 1496 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : \ | |
| 1497 __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE()) | |
| 1498 #define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() : \ | |
| 1499 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : \ | |
| 1500 __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE()) | |
| 1501 #define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : \ | |
| 1502 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : \ | |
| 1503 __HAL_COMP_COMP6_EXTI_ENABLE_IT()) | |
| 1504 #define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() : \ | |
| 1505 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : \ | |
| 1506 __HAL_COMP_COMP6_EXTI_DISABLE_IT()) | |
| 1507 #define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : \ | |
| 1508 ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : \ | |
| 1509 __HAL_COMP_COMP6_EXTI_GET_FLAG()) | |
| 1510 #define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \ | |
| 1511 ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \ | |
| 1512 __HAL_COMP_COMP6_EXTI_CLEAR_FLAG()) | |
| 1513 # endif | |
| 1514 # if defined(STM32F302xE) || defined(STM32F302xC) | |
| 1515 #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \ | |
| 1516 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \ | |
| 1517 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \ | |
| 1518 __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE()) | |
| 1519 #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \ | |
| 1520 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \ | |
| 1521 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : \ | |
| 1522 __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE()) | |
| 1523 #define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \ | |
| 1524 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() : \ | |
| 1525 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : \ | |
| 1526 __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE()) | |
| 1527 #define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \ | |
| 1528 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() : \ | |
| 1529 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : \ | |
| 1530 __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE()) | |
| 1531 #define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \ | |
| 1532 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : \ | |
| 1533 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : \ | |
| 1534 __HAL_COMP_COMP6_EXTI_ENABLE_IT()) | |
| 1535 #define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \ | |
| 1536 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() : \ | |
| 1537 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : \ | |
| 1538 __HAL_COMP_COMP6_EXTI_DISABLE_IT()) | |
| 1539 #define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \ | |
| 1540 ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : \ | |
| 1541 ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : \ | |
| 1542 __HAL_COMP_COMP6_EXTI_GET_FLAG()) | |
| 1543 #define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \ | |
| 1544 ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \ | |
| 1545 ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \ | |
| 1546 __HAL_COMP_COMP6_EXTI_CLEAR_FLAG()) | |
| 1547 # endif | |
| 1548 # if defined(STM32F303xE) || defined(STM32F398xx) || defined(STM32F303xC) || defined(STM32F358xx) | |
| 1549 #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \ | |
| 1550 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \ | |
| 1551 ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_RISING_EDGE() : \ | |
| 1552 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \ | |
| 1553 ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_RISING_EDGE() : \ | |
| 1554 ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE() : \ | |
| 1555 __HAL_COMP_COMP7_EXTI_ENABLE_RISING_EDGE()) | |
| 1556 #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \ | |
| 1557 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \ | |
| 1558 ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_RISING_EDGE() : \ | |
| 1559 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : \ | |
| 1560 ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_RISING_EDGE() : \ | |
| 1561 ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE() : \ | |
| 1562 __HAL_COMP_COMP7_EXTI_DISABLE_RISING_EDGE()) | |
| 1563 #define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \ | |
| 1564 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() : \ | |
| 1565 ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_FALLING_EDGE() : \ | |
| 1566 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : \ | |
| 1567 ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_FALLING_EDGE() : \ | |
| 1568 ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE() : \ | |
| 1569 __HAL_COMP_COMP7_EXTI_ENABLE_FALLING_EDGE()) | |
| 1570 #define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \ | |
| 1571 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() : \ | |
| 1572 ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_FALLING_EDGE() : \ | |
| 1573 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : \ | |
| 1574 ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_FALLING_EDGE() : \ | |
| 1575 ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE() : \ | |
| 1576 __HAL_COMP_COMP7_EXTI_DISABLE_FALLING_EDGE()) | |
| 1577 #define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \ | |
| 1578 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : \ | |
| 1579 ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_IT() : \ | |
| 1580 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : \ | |
| 1581 ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_IT() : \ | |
| 1582 ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_IT() : \ | |
| 1583 __HAL_COMP_COMP7_EXTI_ENABLE_IT()) | |
| 1584 #define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \ | |
| 1585 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() : \ | |
| 1586 ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_IT() : \ | |
| 1587 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : \ | |
| 1588 ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_IT() : \ | |
| 1589 ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_IT() : \ | |
| 1590 __HAL_COMP_COMP7_EXTI_DISABLE_IT()) | |
| 1591 #define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \ | |
| 1592 ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : \ | |
| 1593 ((__FLAG__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_GET_FLAG() : \ | |
| 1594 ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : \ | |
| 1595 ((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_GET_FLAG() : \ | |
| 1596 ((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_GET_FLAG() : \ | |
| 1597 __HAL_COMP_COMP7_EXTI_GET_FLAG()) | |
| 1598 #define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \ | |
| 1599 ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \ | |
| 1600 ((__FLAG__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_CLEAR_FLAG() : \ | |
| 1601 ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \ | |
| 1602 ((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_CLEAR_FLAG() : \ | |
| 1603 ((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_CLEAR_FLAG() : \ | |
| 1604 __HAL_COMP_COMP7_EXTI_CLEAR_FLAG()) | |
| 1605 # endif | |
| 1606 # if defined(STM32F373xC) ||defined(STM32F378xx) | |
| 1607 #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \ | |
| 1608 __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE()) | |
| 1609 #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \ | |
| 1610 __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE()) | |
| 1611 #define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \ | |
| 1612 __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE()) | |
| 1613 #define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \ | |
| 1614 __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE()) | |
| 1615 #define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \ | |
| 1616 __HAL_COMP_COMP2_EXTI_ENABLE_IT()) | |
| 1617 #define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \ | |
| 1618 __HAL_COMP_COMP2_EXTI_DISABLE_IT()) | |
| 1619 #define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \ | |
| 1620 __HAL_COMP_COMP2_EXTI_GET_FLAG()) | |
| 1621 #define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \ | |
| 1622 __HAL_COMP_COMP2_EXTI_CLEAR_FLAG()) | |
| 1623 # endif | |
| 1624 #else | |
| 1625 #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \ | |
| 1626 __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE()) | |
| 1627 #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \ | |
| 1628 __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE()) | |
| 1629 #define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \ | |
| 1630 __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE()) | |
| 1631 #define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \ | |
| 1632 __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE()) | |
| 1633 #define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \ | |
| 1634 __HAL_COMP_COMP2_EXTI_ENABLE_IT()) | |
| 1635 #define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \ | |
| 1636 __HAL_COMP_COMP2_EXTI_DISABLE_IT()) | |
| 1637 #define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \ | |
| 1638 __HAL_COMP_COMP2_EXTI_GET_FLAG()) | |
| 1639 #define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \ | |
| 1640 __HAL_COMP_COMP2_EXTI_CLEAR_FLAG()) | |
| 1641 #endif | |
| 1642 | |
| 1643 #define __HAL_COMP_GET_EXTI_LINE COMP_GET_EXTI_LINE | |
| 1644 | |
| 1645 #if defined(STM32L0) || defined(STM32L4) | |
| 1646 /* Note: On these STM32 families, the only argument of this macro */ | |
| 1647 /* is COMP_FLAG_LOCK. */ | |
| 1648 /* This macro is replaced by __HAL_COMP_IS_LOCKED with only HAL handle */ | |
| 1649 /* argument. */ | |
| 1650 #define __HAL_COMP_GET_FLAG(__HANDLE__, __FLAG__) (__HAL_COMP_IS_LOCKED(__HANDLE__)) | |
| 1651 #endif | |
| 1652 /** | |
| 1653 * @} | |
| 1654 */ | |
| 1655 | |
| 1656 #if defined(STM32L0) || defined(STM32L4) | |
| 1657 /** @defgroup HAL_COMP_Aliased_Functions HAL COMP Aliased Functions maintained for legacy purpose | |
| 1658 * @{ | |
| 1659 */ | |
| 1660 #define HAL_COMP_Start_IT HAL_COMP_Start /* Function considered as legacy as EXTI event or IT configuration is done into HAL_COMP_Init() */ | |
| 1661 #define HAL_COMP_Stop_IT HAL_COMP_Stop /* Function considered as legacy as EXTI event or IT configuration is done into HAL_COMP_Init() */ | |
| 1662 /** | |
| 1663 * @} | |
| 1664 */ | |
| 1665 #endif | |
| 1666 | |
| 1667 /** @defgroup HAL_DAC_Aliased_Macros HAL DAC Aliased Macros maintained for legacy purpose | |
| 1668 * @{ | |
| 1669 */ | |
| 1670 | |
| 1671 #define IS_DAC_WAVE(WAVE) (((WAVE) == DAC_WAVE_NONE) || \ | |
| 1672 ((WAVE) == DAC_WAVE_NOISE)|| \ | |
| 1673 ((WAVE) == DAC_WAVE_TRIANGLE)) | |
| 1674 | |
| 1675 /** | |
| 1676 * @} | |
| 1677 */ | |
| 1678 | |
| 1679 /** @defgroup HAL_FLASH_Aliased_Macros HAL FLASH Aliased Macros maintained for legacy purpose | |
| 1680 * @{ | |
| 1681 */ | |
| 1682 | |
| 1683 #define IS_WRPAREA IS_OB_WRPAREA | |
| 1684 #define IS_TYPEPROGRAM IS_FLASH_TYPEPROGRAM | |
| 1685 #define IS_TYPEPROGRAMFLASH IS_FLASH_TYPEPROGRAM | |
| 1686 #define IS_TYPEERASE IS_FLASH_TYPEERASE | |
| 1687 #define IS_NBSECTORS IS_FLASH_NBSECTORS | |
| 1688 #define IS_OB_WDG_SOURCE IS_OB_IWDG_SOURCE | |
| 1689 | |
| 1690 /** | |
| 1691 * @} | |
| 1692 */ | |
| 1693 | |
| 1694 /** @defgroup HAL_I2C_Aliased_Macros HAL I2C Aliased Macros maintained for legacy purpose | |
| 1695 * @{ | |
| 1696 */ | |
| 1697 | |
| 1698 #define __HAL_I2C_RESET_CR2 I2C_RESET_CR2 | |
| 1699 #define __HAL_I2C_GENERATE_START I2C_GENERATE_START | |
| 1700 #if defined(STM32F1) | |
| 1701 #define __HAL_I2C_FREQ_RANGE I2C_FREQRANGE | |
| 1702 #else | |
| 1703 #define __HAL_I2C_FREQ_RANGE I2C_FREQ_RANGE | |
| 1704 #endif /* STM32F1 */ | |
| 1705 #define __HAL_I2C_RISE_TIME I2C_RISE_TIME | |
| 1706 #define __HAL_I2C_SPEED_STANDARD I2C_SPEED_STANDARD | |
| 1707 #define __HAL_I2C_SPEED_FAST I2C_SPEED_FAST | |
| 1708 #define __HAL_I2C_SPEED I2C_SPEED | |
| 1709 #define __HAL_I2C_7BIT_ADD_WRITE I2C_7BIT_ADD_WRITE | |
| 1710 #define __HAL_I2C_7BIT_ADD_READ I2C_7BIT_ADD_READ | |
| 1711 #define __HAL_I2C_10BIT_ADDRESS I2C_10BIT_ADDRESS | |
| 1712 #define __HAL_I2C_10BIT_HEADER_WRITE I2C_10BIT_HEADER_WRITE | |
| 1713 #define __HAL_I2C_10BIT_HEADER_READ I2C_10BIT_HEADER_READ | |
| 1714 #define __HAL_I2C_MEM_ADD_MSB I2C_MEM_ADD_MSB | |
| 1715 #define __HAL_I2C_MEM_ADD_LSB I2C_MEM_ADD_LSB | |
| 1716 #define __HAL_I2C_FREQRANGE I2C_FREQRANGE | |
| 1717 /** | |
| 1718 * @} | |
| 1719 */ | |
| 1720 | |
| 1721 /** @defgroup HAL_I2S_Aliased_Macros HAL I2S Aliased Macros maintained for legacy purpose | |
| 1722 * @{ | |
| 1723 */ | |
| 1724 | |
| 1725 #define IS_I2S_INSTANCE IS_I2S_ALL_INSTANCE | |
| 1726 #define IS_I2S_INSTANCE_EXT IS_I2S_ALL_INSTANCE_EXT | |
| 1727 | |
| 1728 /** | |
| 1729 * @} | |
| 1730 */ | |
| 1731 | |
| 1732 /** @defgroup HAL_IRDA_Aliased_Macros HAL IRDA Aliased Macros maintained for legacy purpose | |
| 1733 * @{ | |
| 1734 */ | |
| 1735 | |
| 1736 #define __IRDA_DISABLE __HAL_IRDA_DISABLE | |
| 1737 #define __IRDA_ENABLE __HAL_IRDA_ENABLE | |
| 1738 | |
| 1739 #define __HAL_IRDA_GETCLOCKSOURCE IRDA_GETCLOCKSOURCE | |
| 1740 #define __HAL_IRDA_MASK_COMPUTATION IRDA_MASK_COMPUTATION | |
| 1741 #define __IRDA_GETCLOCKSOURCE IRDA_GETCLOCKSOURCE | |
| 1742 #define __IRDA_MASK_COMPUTATION IRDA_MASK_COMPUTATION | |
| 1743 | |
| 1744 #define IS_IRDA_ONEBIT_SAMPLE IS_IRDA_ONE_BIT_SAMPLE | |
| 1745 | |
| 1746 | |
| 1747 /** | |
| 1748 * @} | |
| 1749 */ | |
| 1750 | |
| 1751 | |
| 1752 /** @defgroup HAL_IWDG_Aliased_Macros HAL IWDG Aliased Macros maintained for legacy purpose | |
| 1753 * @{ | |
| 1754 */ | |
| 1755 #define __HAL_IWDG_ENABLE_WRITE_ACCESS IWDG_ENABLE_WRITE_ACCESS | |
| 1756 #define __HAL_IWDG_DISABLE_WRITE_ACCESS IWDG_DISABLE_WRITE_ACCESS | |
| 1757 /** | |
| 1758 * @} | |
| 1759 */ | |
| 1760 | |
| 1761 | |
| 1762 /** @defgroup HAL_LPTIM_Aliased_Macros HAL LPTIM Aliased Macros maintained for legacy purpose | |
| 1763 * @{ | |
| 1764 */ | |
| 1765 | |
| 1766 #define __HAL_LPTIM_ENABLE_INTERRUPT __HAL_LPTIM_ENABLE_IT | |
| 1767 #define __HAL_LPTIM_DISABLE_INTERRUPT __HAL_LPTIM_DISABLE_IT | |
| 1768 #define __HAL_LPTIM_GET_ITSTATUS __HAL_LPTIM_GET_IT_SOURCE | |
| 1769 | |
| 1770 /** | |
| 1771 * @} | |
| 1772 */ | |
| 1773 | |
| 1774 | |
| 1775 /** @defgroup HAL_OPAMP_Aliased_Macros HAL OPAMP Aliased Macros maintained for legacy purpose | |
| 1776 * @{ | |
| 1777 */ | |
| 1778 #define __OPAMP_CSR_OPAXPD OPAMP_CSR_OPAXPD | |
| 1779 #define __OPAMP_CSR_S3SELX OPAMP_CSR_S3SELX | |
| 1780 #define __OPAMP_CSR_S4SELX OPAMP_CSR_S4SELX | |
| 1781 #define __OPAMP_CSR_S5SELX OPAMP_CSR_S5SELX | |
| 1782 #define __OPAMP_CSR_S6SELX OPAMP_CSR_S6SELX | |
| 1783 #define __OPAMP_CSR_OPAXCAL_L OPAMP_CSR_OPAXCAL_L | |
| 1784 #define __OPAMP_CSR_OPAXCAL_H OPAMP_CSR_OPAXCAL_H | |
| 1785 #define __OPAMP_CSR_OPAXLPM OPAMP_CSR_OPAXLPM | |
| 1786 #define __OPAMP_CSR_ALL_SWITCHES OPAMP_CSR_ALL_SWITCHES | |
| 1787 #define __OPAMP_CSR_ANAWSELX OPAMP_CSR_ANAWSELX | |
| 1788 #define __OPAMP_CSR_OPAXCALOUT OPAMP_CSR_OPAXCALOUT | |
| 1789 #define __OPAMP_OFFSET_TRIM_BITSPOSITION OPAMP_OFFSET_TRIM_BITSPOSITION | |
| 1790 #define __OPAMP_OFFSET_TRIM_SET OPAMP_OFFSET_TRIM_SET | |
| 1791 | |
| 1792 /** | |
| 1793 * @} | |
| 1794 */ | |
| 1795 | |
| 1796 | |
| 1797 /** @defgroup HAL_PWR_Aliased_Macros HAL PWR Aliased Macros maintained for legacy purpose | |
| 1798 * @{ | |
| 1799 */ | |
| 1800 #define __HAL_PVD_EVENT_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_EVENT | |
| 1801 #define __HAL_PVD_EVENT_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_EVENT | |
| 1802 #define __HAL_PVD_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE | |
| 1803 #define __HAL_PVD_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE | |
| 1804 #define __HAL_PVD_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE | |
| 1805 #define __HAL_PVD_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE | |
| 1806 #define __HAL_PVM_EVENT_DISABLE __HAL_PWR_PVM_EVENT_DISABLE | |
| 1807 #define __HAL_PVM_EVENT_ENABLE __HAL_PWR_PVM_EVENT_ENABLE | |
| 1808 #define __HAL_PVM_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVM_EXTI_FALLINGTRIGGER_DISABLE | |
| 1809 #define __HAL_PVM_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVM_EXTI_FALLINGTRIGGER_ENABLE | |
| 1810 #define __HAL_PVM_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVM_EXTI_RISINGTRIGGER_DISABLE | |
| 1811 #define __HAL_PVM_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVM_EXTI_RISINGTRIGGER_ENABLE | |
| 1812 #define __HAL_PWR_INTERNALWAKEUP_DISABLE HAL_PWREx_DisableInternalWakeUpLine | |
| 1813 #define __HAL_PWR_INTERNALWAKEUP_ENABLE HAL_PWREx_EnableInternalWakeUpLine | |
| 1814 #define __HAL_PWR_PULL_UP_DOWN_CONFIG_DISABLE HAL_PWREx_DisablePullUpPullDownConfig | |
| 1815 #define __HAL_PWR_PULL_UP_DOWN_CONFIG_ENABLE HAL_PWREx_EnablePullUpPullDownConfig | |
| 1816 #define __HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER() do { __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); } while(0) | |
| 1817 #define __HAL_PWR_PVD_EXTI_EVENT_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_EVENT | |
| 1818 #define __HAL_PWR_PVD_EXTI_EVENT_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_EVENT | |
| 1819 #define __HAL_PWR_PVD_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE | |
| 1820 #define __HAL_PWR_PVD_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE | |
| 1821 #define __HAL_PWR_PVD_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE | |
| 1822 #define __HAL_PWR_PVD_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE | |
| 1823 #define __HAL_PWR_PVD_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE | |
| 1824 #define __HAL_PWR_PVD_EXTI_SET_RISING_EDGE_TRIGGER __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE | |
| 1825 #define __HAL_PWR_PVM_DISABLE() do { HAL_PWREx_DisablePVM1();HAL_PWREx_DisablePVM2();HAL_PWREx_DisablePVM3();HAL_PWREx_DisablePVM4(); } while(0) | |
| 1826 #define __HAL_PWR_PVM_ENABLE() do { HAL_PWREx_EnablePVM1();HAL_PWREx_EnablePVM2();HAL_PWREx_EnablePVM3();HAL_PWREx_EnablePVM4(); } while(0) | |
| 1827 #define __HAL_PWR_SRAM2CONTENT_PRESERVE_DISABLE HAL_PWREx_DisableSRAM2ContentRetention | |
| 1828 #define __HAL_PWR_SRAM2CONTENT_PRESERVE_ENABLE HAL_PWREx_EnableSRAM2ContentRetention | |
| 1829 #define __HAL_PWR_VDDIO2_DISABLE HAL_PWREx_DisableVddIO2 | |
| 1830 #define __HAL_PWR_VDDIO2_ENABLE HAL_PWREx_EnableVddIO2 | |
| 1831 #define __HAL_PWR_VDDIO2_EXTI_CLEAR_EGDE_TRIGGER __HAL_PWR_VDDIO2_EXTI_DISABLE_FALLING_EDGE | |
| 1832 #define __HAL_PWR_VDDIO2_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_PWR_VDDIO2_EXTI_ENABLE_FALLING_EDGE | |
| 1833 #define __HAL_PWR_VDDUSB_DISABLE HAL_PWREx_DisableVddUSB | |
| 1834 #define __HAL_PWR_VDDUSB_ENABLE HAL_PWREx_EnableVddUSB | |
| 1835 | |
| 1836 #if defined (STM32F4) | |
| 1837 #define __HAL_PVD_EXTI_ENABLE_IT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_ENABLE_IT() | |
| 1838 #define __HAL_PVD_EXTI_DISABLE_IT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_DISABLE_IT() | |
| 1839 #define __HAL_PVD_EXTI_GET_FLAG(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_GET_FLAG() | |
| 1840 #define __HAL_PVD_EXTI_CLEAR_FLAG(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_CLEAR_FLAG() | |
| 1841 #define __HAL_PVD_EXTI_GENERATE_SWIT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_GENERATE_SWIT() | |
| 1842 #else | |
| 1843 #define __HAL_PVD_EXTI_CLEAR_FLAG __HAL_PWR_PVD_EXTI_CLEAR_FLAG | |
| 1844 #define __HAL_PVD_EXTI_DISABLE_IT __HAL_PWR_PVD_EXTI_DISABLE_IT | |
| 1845 #define __HAL_PVD_EXTI_ENABLE_IT __HAL_PWR_PVD_EXTI_ENABLE_IT | |
| 1846 #define __HAL_PVD_EXTI_GENERATE_SWIT __HAL_PWR_PVD_EXTI_GENERATE_SWIT | |
| 1847 #define __HAL_PVD_EXTI_GET_FLAG __HAL_PWR_PVD_EXTI_GET_FLAG | |
| 1848 #endif /* STM32F4 */ | |
| 1849 /** | |
| 1850 * @} | |
| 1851 */ | |
| 1852 | |
| 1853 | |
| 1854 /** @defgroup HAL_RCC_Aliased HAL RCC Aliased maintained for legacy purpose | |
| 1855 * @{ | |
| 1856 */ | |
| 1857 | |
| 1858 #define RCC_StopWakeUpClock_MSI RCC_STOP_WAKEUPCLOCK_MSI | |
| 1859 #define RCC_StopWakeUpClock_HSI RCC_STOP_WAKEUPCLOCK_HSI | |
| 1860 | |
| 1861 #define HAL_RCC_CCSCallback HAL_RCC_CSSCallback | |
| 1862 #define HAL_RC48_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_RCCEx_EnableHSI48_VREFINT() : HAL_RCCEx_DisableHSI48_VREFINT()) | |
| 1863 | |
| 1864 #define __ADC_CLK_DISABLE __HAL_RCC_ADC_CLK_DISABLE | |
| 1865 #define __ADC_CLK_ENABLE __HAL_RCC_ADC_CLK_ENABLE | |
| 1866 #define __ADC_CLK_SLEEP_DISABLE __HAL_RCC_ADC_CLK_SLEEP_DISABLE | |
| 1867 #define __ADC_CLK_SLEEP_ENABLE __HAL_RCC_ADC_CLK_SLEEP_ENABLE | |
| 1868 #define __ADC_FORCE_RESET __HAL_RCC_ADC_FORCE_RESET | |
| 1869 #define __ADC_RELEASE_RESET __HAL_RCC_ADC_RELEASE_RESET | |
| 1870 #define __ADC1_CLK_DISABLE __HAL_RCC_ADC1_CLK_DISABLE | |
| 1871 #define __ADC1_CLK_ENABLE __HAL_RCC_ADC1_CLK_ENABLE | |
| 1872 #define __ADC1_FORCE_RESET __HAL_RCC_ADC1_FORCE_RESET | |
| 1873 #define __ADC1_RELEASE_RESET __HAL_RCC_ADC1_RELEASE_RESET | |
| 1874 #define __ADC1_CLK_SLEEP_ENABLE __HAL_RCC_ADC1_CLK_SLEEP_ENABLE | |
| 1875 #define __ADC1_CLK_SLEEP_DISABLE __HAL_RCC_ADC1_CLK_SLEEP_DISABLE | |
| 1876 #define __ADC2_CLK_DISABLE __HAL_RCC_ADC2_CLK_DISABLE | |
| 1877 #define __ADC2_CLK_ENABLE __HAL_RCC_ADC2_CLK_ENABLE | |
| 1878 #define __ADC2_FORCE_RESET __HAL_RCC_ADC2_FORCE_RESET | |
| 1879 #define __ADC2_RELEASE_RESET __HAL_RCC_ADC2_RELEASE_RESET | |
| 1880 #define __ADC3_CLK_DISABLE __HAL_RCC_ADC3_CLK_DISABLE | |
| 1881 #define __ADC3_CLK_ENABLE __HAL_RCC_ADC3_CLK_ENABLE | |
| 1882 #define __ADC3_FORCE_RESET __HAL_RCC_ADC3_FORCE_RESET | |
| 1883 #define __ADC3_RELEASE_RESET __HAL_RCC_ADC3_RELEASE_RESET | |
| 1884 #define __AES_CLK_DISABLE __HAL_RCC_AES_CLK_DISABLE | |
| 1885 #define __AES_CLK_ENABLE __HAL_RCC_AES_CLK_ENABLE | |
| 1886 #define __AES_CLK_SLEEP_DISABLE __HAL_RCC_AES_CLK_SLEEP_DISABLE | |
| 1887 #define __AES_CLK_SLEEP_ENABLE __HAL_RCC_AES_CLK_SLEEP_ENABLE | |
| 1888 #define __AES_FORCE_RESET __HAL_RCC_AES_FORCE_RESET | |
| 1889 #define __AES_RELEASE_RESET __HAL_RCC_AES_RELEASE_RESET | |
| 1890 #define __CRYP_CLK_SLEEP_ENABLE __HAL_RCC_CRYP_CLK_SLEEP_ENABLE | |
| 1891 #define __CRYP_CLK_SLEEP_DISABLE __HAL_RCC_CRYP_CLK_SLEEP_DISABLE | |
| 1892 #define __CRYP_CLK_ENABLE __HAL_RCC_CRYP_CLK_ENABLE | |
| 1893 #define __CRYP_CLK_DISABLE __HAL_RCC_CRYP_CLK_DISABLE | |
| 1894 #define __CRYP_FORCE_RESET __HAL_RCC_CRYP_FORCE_RESET | |
| 1895 #define __CRYP_RELEASE_RESET __HAL_RCC_CRYP_RELEASE_RESET | |
| 1896 #define __AFIO_CLK_DISABLE __HAL_RCC_AFIO_CLK_DISABLE | |
| 1897 #define __AFIO_CLK_ENABLE __HAL_RCC_AFIO_CLK_ENABLE | |
| 1898 #define __AFIO_FORCE_RESET __HAL_RCC_AFIO_FORCE_RESET | |
| 1899 #define __AFIO_RELEASE_RESET __HAL_RCC_AFIO_RELEASE_RESET | |
| 1900 #define __AHB_FORCE_RESET __HAL_RCC_AHB_FORCE_RESET | |
| 1901 #define __AHB_RELEASE_RESET __HAL_RCC_AHB_RELEASE_RESET | |
| 1902 #define __AHB1_FORCE_RESET __HAL_RCC_AHB1_FORCE_RESET | |
| 1903 #define __AHB1_RELEASE_RESET __HAL_RCC_AHB1_RELEASE_RESET | |
| 1904 #define __AHB2_FORCE_RESET __HAL_RCC_AHB2_FORCE_RESET | |
| 1905 #define __AHB2_RELEASE_RESET __HAL_RCC_AHB2_RELEASE_RESET | |
| 1906 #define __AHB3_FORCE_RESET __HAL_RCC_AHB3_FORCE_RESET | |
| 1907 #define __AHB3_RELEASE_RESET __HAL_RCC_AHB3_RELEASE_RESET | |
| 1908 #define __APB1_FORCE_RESET __HAL_RCC_APB1_FORCE_RESET | |
| 1909 #define __APB1_RELEASE_RESET __HAL_RCC_APB1_RELEASE_RESET | |
| 1910 #define __APB2_FORCE_RESET __HAL_RCC_APB2_FORCE_RESET | |
| 1911 #define __APB2_RELEASE_RESET __HAL_RCC_APB2_RELEASE_RESET | |
| 1912 #define __BKP_CLK_DISABLE __HAL_RCC_BKP_CLK_DISABLE | |
| 1913 #define __BKP_CLK_ENABLE __HAL_RCC_BKP_CLK_ENABLE | |
| 1914 #define __BKP_FORCE_RESET __HAL_RCC_BKP_FORCE_RESET | |
| 1915 #define __BKP_RELEASE_RESET __HAL_RCC_BKP_RELEASE_RESET | |
| 1916 #define __CAN1_CLK_DISABLE __HAL_RCC_CAN1_CLK_DISABLE | |
| 1917 #define __CAN1_CLK_ENABLE __HAL_RCC_CAN1_CLK_ENABLE | |
| 1918 #define __CAN1_CLK_SLEEP_DISABLE __HAL_RCC_CAN1_CLK_SLEEP_DISABLE | |
| 1919 #define __CAN1_CLK_SLEEP_ENABLE __HAL_RCC_CAN1_CLK_SLEEP_ENABLE | |
| 1920 #define __CAN1_FORCE_RESET __HAL_RCC_CAN1_FORCE_RESET | |
| 1921 #define __CAN1_RELEASE_RESET __HAL_RCC_CAN1_RELEASE_RESET | |
| 1922 #define __CAN_CLK_DISABLE __HAL_RCC_CAN1_CLK_DISABLE | |
| 1923 #define __CAN_CLK_ENABLE __HAL_RCC_CAN1_CLK_ENABLE | |
| 1924 #define __CAN_FORCE_RESET __HAL_RCC_CAN1_FORCE_RESET | |
| 1925 #define __CAN_RELEASE_RESET __HAL_RCC_CAN1_RELEASE_RESET | |
| 1926 #define __CAN2_CLK_DISABLE __HAL_RCC_CAN2_CLK_DISABLE | |
| 1927 #define __CAN2_CLK_ENABLE __HAL_RCC_CAN2_CLK_ENABLE | |
| 1928 #define __CAN2_FORCE_RESET __HAL_RCC_CAN2_FORCE_RESET | |
| 1929 #define __CAN2_RELEASE_RESET __HAL_RCC_CAN2_RELEASE_RESET | |
| 1930 #define __CEC_CLK_DISABLE __HAL_RCC_CEC_CLK_DISABLE | |
| 1931 #define __CEC_CLK_ENABLE __HAL_RCC_CEC_CLK_ENABLE | |
| 1932 #define __COMP_CLK_DISABLE __HAL_RCC_COMP_CLK_DISABLE | |
| 1933 #define __COMP_CLK_ENABLE __HAL_RCC_COMP_CLK_ENABLE | |
| 1934 #define __COMP_FORCE_RESET __HAL_RCC_COMP_FORCE_RESET | |
| 1935 #define __COMP_RELEASE_RESET __HAL_RCC_COMP_RELEASE_RESET | |
| 1936 #define __COMP_CLK_SLEEP_ENABLE __HAL_RCC_COMP_CLK_SLEEP_ENABLE | |
| 1937 #define __COMP_CLK_SLEEP_DISABLE __HAL_RCC_COMP_CLK_SLEEP_DISABLE | |
| 1938 #define __CEC_FORCE_RESET __HAL_RCC_CEC_FORCE_RESET | |
| 1939 #define __CEC_RELEASE_RESET __HAL_RCC_CEC_RELEASE_RESET | |
| 1940 #define __CRC_CLK_DISABLE __HAL_RCC_CRC_CLK_DISABLE | |
| 1941 #define __CRC_CLK_ENABLE __HAL_RCC_CRC_CLK_ENABLE | |
| 1942 #define __CRC_CLK_SLEEP_DISABLE __HAL_RCC_CRC_CLK_SLEEP_DISABLE | |
| 1943 #define __CRC_CLK_SLEEP_ENABLE __HAL_RCC_CRC_CLK_SLEEP_ENABLE | |
| 1944 #define __CRC_FORCE_RESET __HAL_RCC_CRC_FORCE_RESET | |
| 1945 #define __CRC_RELEASE_RESET __HAL_RCC_CRC_RELEASE_RESET | |
| 1946 #define __DAC_CLK_DISABLE __HAL_RCC_DAC_CLK_DISABLE | |
| 1947 #define __DAC_CLK_ENABLE __HAL_RCC_DAC_CLK_ENABLE | |
| 1948 #define __DAC_FORCE_RESET __HAL_RCC_DAC_FORCE_RESET | |
| 1949 #define __DAC_RELEASE_RESET __HAL_RCC_DAC_RELEASE_RESET | |
| 1950 #define __DAC1_CLK_DISABLE __HAL_RCC_DAC1_CLK_DISABLE | |
| 1951 #define __DAC1_CLK_ENABLE __HAL_RCC_DAC1_CLK_ENABLE | |
| 1952 #define __DAC1_CLK_SLEEP_DISABLE __HAL_RCC_DAC1_CLK_SLEEP_DISABLE | |
| 1953 #define __DAC1_CLK_SLEEP_ENABLE __HAL_RCC_DAC1_CLK_SLEEP_ENABLE | |
| 1954 #define __DAC1_FORCE_RESET __HAL_RCC_DAC1_FORCE_RESET | |
| 1955 #define __DAC1_RELEASE_RESET __HAL_RCC_DAC1_RELEASE_RESET | |
| 1956 #define __DBGMCU_CLK_ENABLE __HAL_RCC_DBGMCU_CLK_ENABLE | |
| 1957 #define __DBGMCU_CLK_DISABLE __HAL_RCC_DBGMCU_CLK_DISABLE | |
| 1958 #define __DBGMCU_FORCE_RESET __HAL_RCC_DBGMCU_FORCE_RESET | |
| 1959 #define __DBGMCU_RELEASE_RESET __HAL_RCC_DBGMCU_RELEASE_RESET | |
| 1960 #define __DFSDM_CLK_DISABLE __HAL_RCC_DFSDM_CLK_DISABLE | |
| 1961 #define __DFSDM_CLK_ENABLE __HAL_RCC_DFSDM_CLK_ENABLE | |
| 1962 #define __DFSDM_CLK_SLEEP_DISABLE __HAL_RCC_DFSDM_CLK_SLEEP_DISABLE | |
| 1963 #define __DFSDM_CLK_SLEEP_ENABLE __HAL_RCC_DFSDM_CLK_SLEEP_ENABLE | |
| 1964 #define __DFSDM_FORCE_RESET __HAL_RCC_DFSDM_FORCE_RESET | |
| 1965 #define __DFSDM_RELEASE_RESET __HAL_RCC_DFSDM_RELEASE_RESET | |
| 1966 #define __DMA1_CLK_DISABLE __HAL_RCC_DMA1_CLK_DISABLE | |
| 1967 #define __DMA1_CLK_ENABLE __HAL_RCC_DMA1_CLK_ENABLE | |
| 1968 #define __DMA1_CLK_SLEEP_DISABLE __HAL_RCC_DMA1_CLK_SLEEP_DISABLE | |
| 1969 #define __DMA1_CLK_SLEEP_ENABLE __HAL_RCC_DMA1_CLK_SLEEP_ENABLE | |
| 1970 #define __DMA1_FORCE_RESET __HAL_RCC_DMA1_FORCE_RESET | |
| 1971 #define __DMA1_RELEASE_RESET __HAL_RCC_DMA1_RELEASE_RESET | |
| 1972 #define __DMA2_CLK_DISABLE __HAL_RCC_DMA2_CLK_DISABLE | |
| 1973 #define __DMA2_CLK_ENABLE __HAL_RCC_DMA2_CLK_ENABLE | |
| 1974 #define __DMA2_CLK_SLEEP_DISABLE __HAL_RCC_DMA2_CLK_SLEEP_DISABLE | |
| 1975 #define __DMA2_CLK_SLEEP_ENABLE __HAL_RCC_DMA2_CLK_SLEEP_ENABLE | |
| 1976 #define __DMA2_FORCE_RESET __HAL_RCC_DMA2_FORCE_RESET | |
| 1977 #define __DMA2_RELEASE_RESET __HAL_RCC_DMA2_RELEASE_RESET | |
| 1978 #define __ETHMAC_CLK_DISABLE __HAL_RCC_ETHMAC_CLK_DISABLE | |
| 1979 #define __ETHMAC_CLK_ENABLE __HAL_RCC_ETHMAC_CLK_ENABLE | |
| 1980 #define __ETHMAC_FORCE_RESET __HAL_RCC_ETHMAC_FORCE_RESET | |
| 1981 #define __ETHMAC_RELEASE_RESET __HAL_RCC_ETHMAC_RELEASE_RESET | |
| 1982 #define __ETHMACRX_CLK_DISABLE __HAL_RCC_ETHMACRX_CLK_DISABLE | |
| 1983 #define __ETHMACRX_CLK_ENABLE __HAL_RCC_ETHMACRX_CLK_ENABLE | |
| 1984 #define __ETHMACTX_CLK_DISABLE __HAL_RCC_ETHMACTX_CLK_DISABLE | |
| 1985 #define __ETHMACTX_CLK_ENABLE __HAL_RCC_ETHMACTX_CLK_ENABLE | |
| 1986 #define __FIREWALL_CLK_DISABLE __HAL_RCC_FIREWALL_CLK_DISABLE | |
| 1987 #define __FIREWALL_CLK_ENABLE __HAL_RCC_FIREWALL_CLK_ENABLE | |
| 1988 #define __FLASH_CLK_DISABLE __HAL_RCC_FLASH_CLK_DISABLE | |
| 1989 #define __FLASH_CLK_ENABLE __HAL_RCC_FLASH_CLK_ENABLE | |
| 1990 #define __FLASH_CLK_SLEEP_DISABLE __HAL_RCC_FLASH_CLK_SLEEP_DISABLE | |
| 1991 #define __FLASH_CLK_SLEEP_ENABLE __HAL_RCC_FLASH_CLK_SLEEP_ENABLE | |
| 1992 #define __FLASH_FORCE_RESET __HAL_RCC_FLASH_FORCE_RESET | |
| 1993 #define __FLASH_RELEASE_RESET __HAL_RCC_FLASH_RELEASE_RESET | |
| 1994 #define __FLITF_CLK_DISABLE __HAL_RCC_FLITF_CLK_DISABLE | |
| 1995 #define __FLITF_CLK_ENABLE __HAL_RCC_FLITF_CLK_ENABLE | |
| 1996 #define __FLITF_FORCE_RESET __HAL_RCC_FLITF_FORCE_RESET | |
| 1997 #define __FLITF_RELEASE_RESET __HAL_RCC_FLITF_RELEASE_RESET | |
| 1998 #define __FLITF_CLK_SLEEP_ENABLE __HAL_RCC_FLITF_CLK_SLEEP_ENABLE | |
| 1999 #define __FLITF_CLK_SLEEP_DISABLE __HAL_RCC_FLITF_CLK_SLEEP_DISABLE | |
| 2000 #define __FMC_CLK_DISABLE __HAL_RCC_FMC_CLK_DISABLE | |
| 2001 #define __FMC_CLK_ENABLE __HAL_RCC_FMC_CLK_ENABLE | |
| 2002 #define __FMC_CLK_SLEEP_DISABLE __HAL_RCC_FMC_CLK_SLEEP_DISABLE | |
| 2003 #define __FMC_CLK_SLEEP_ENABLE __HAL_RCC_FMC_CLK_SLEEP_ENABLE | |
| 2004 #define __FMC_FORCE_RESET __HAL_RCC_FMC_FORCE_RESET | |
| 2005 #define __FMC_RELEASE_RESET __HAL_RCC_FMC_RELEASE_RESET | |
| 2006 #define __FSMC_CLK_DISABLE __HAL_RCC_FSMC_CLK_DISABLE | |
| 2007 #define __FSMC_CLK_ENABLE __HAL_RCC_FSMC_CLK_ENABLE | |
| 2008 #define __GPIOA_CLK_DISABLE __HAL_RCC_GPIOA_CLK_DISABLE | |
| 2009 #define __GPIOA_CLK_ENABLE __HAL_RCC_GPIOA_CLK_ENABLE | |
| 2010 #define __GPIOA_CLK_SLEEP_DISABLE __HAL_RCC_GPIOA_CLK_SLEEP_DISABLE | |
| 2011 #define __GPIOA_CLK_SLEEP_ENABLE __HAL_RCC_GPIOA_CLK_SLEEP_ENABLE | |
| 2012 #define __GPIOA_FORCE_RESET __HAL_RCC_GPIOA_FORCE_RESET | |
| 2013 #define __GPIOA_RELEASE_RESET __HAL_RCC_GPIOA_RELEASE_RESET | |
| 2014 #define __GPIOB_CLK_DISABLE __HAL_RCC_GPIOB_CLK_DISABLE | |
| 2015 #define __GPIOB_CLK_ENABLE __HAL_RCC_GPIOB_CLK_ENABLE | |
| 2016 #define __GPIOB_CLK_SLEEP_DISABLE __HAL_RCC_GPIOB_CLK_SLEEP_DISABLE | |
| 2017 #define __GPIOB_CLK_SLEEP_ENABLE __HAL_RCC_GPIOB_CLK_SLEEP_ENABLE | |
| 2018 #define __GPIOB_FORCE_RESET __HAL_RCC_GPIOB_FORCE_RESET | |
| 2019 #define __GPIOB_RELEASE_RESET __HAL_RCC_GPIOB_RELEASE_RESET | |
| 2020 #define __GPIOC_CLK_DISABLE __HAL_RCC_GPIOC_CLK_DISABLE | |
| 2021 #define __GPIOC_CLK_ENABLE __HAL_RCC_GPIOC_CLK_ENABLE | |
| 2022 #define __GPIOC_CLK_SLEEP_DISABLE __HAL_RCC_GPIOC_CLK_SLEEP_DISABLE | |
| 2023 #define __GPIOC_CLK_SLEEP_ENABLE __HAL_RCC_GPIOC_CLK_SLEEP_ENABLE | |
| 2024 #define __GPIOC_FORCE_RESET __HAL_RCC_GPIOC_FORCE_RESET | |
| 2025 #define __GPIOC_RELEASE_RESET __HAL_RCC_GPIOC_RELEASE_RESET | |
| 2026 #define __GPIOD_CLK_DISABLE __HAL_RCC_GPIOD_CLK_DISABLE | |
| 2027 #define __GPIOD_CLK_ENABLE __HAL_RCC_GPIOD_CLK_ENABLE | |
| 2028 #define __GPIOD_CLK_SLEEP_DISABLE __HAL_RCC_GPIOD_CLK_SLEEP_DISABLE | |
| 2029 #define __GPIOD_CLK_SLEEP_ENABLE __HAL_RCC_GPIOD_CLK_SLEEP_ENABLE | |
| 2030 #define __GPIOD_FORCE_RESET __HAL_RCC_GPIOD_FORCE_RESET | |
| 2031 #define __GPIOD_RELEASE_RESET __HAL_RCC_GPIOD_RELEASE_RESET | |
| 2032 #define __GPIOE_CLK_DISABLE __HAL_RCC_GPIOE_CLK_DISABLE | |
| 2033 #define __GPIOE_CLK_ENABLE __HAL_RCC_GPIOE_CLK_ENABLE | |
| 2034 #define __GPIOE_CLK_SLEEP_DISABLE __HAL_RCC_GPIOE_CLK_SLEEP_DISABLE | |
| 2035 #define __GPIOE_CLK_SLEEP_ENABLE __HAL_RCC_GPIOE_CLK_SLEEP_ENABLE | |
| 2036 #define __GPIOE_FORCE_RESET __HAL_RCC_GPIOE_FORCE_RESET | |
| 2037 #define __GPIOE_RELEASE_RESET __HAL_RCC_GPIOE_RELEASE_RESET | |
| 2038 #define __GPIOF_CLK_DISABLE __HAL_RCC_GPIOF_CLK_DISABLE | |
| 2039 #define __GPIOF_CLK_ENABLE __HAL_RCC_GPIOF_CLK_ENABLE | |
| 2040 #define __GPIOF_CLK_SLEEP_DISABLE __HAL_RCC_GPIOF_CLK_SLEEP_DISABLE | |
| 2041 #define __GPIOF_CLK_SLEEP_ENABLE __HAL_RCC_GPIOF_CLK_SLEEP_ENABLE | |
| 2042 #define __GPIOF_FORCE_RESET __HAL_RCC_GPIOF_FORCE_RESET | |
| 2043 #define __GPIOF_RELEASE_RESET __HAL_RCC_GPIOF_RELEASE_RESET | |
| 2044 #define __GPIOG_CLK_DISABLE __HAL_RCC_GPIOG_CLK_DISABLE | |
| 2045 #define __GPIOG_CLK_ENABLE __HAL_RCC_GPIOG_CLK_ENABLE | |
| 2046 #define __GPIOG_CLK_SLEEP_DISABLE __HAL_RCC_GPIOG_CLK_SLEEP_DISABLE | |
| 2047 #define __GPIOG_CLK_SLEEP_ENABLE __HAL_RCC_GPIOG_CLK_SLEEP_ENABLE | |
| 2048 #define __GPIOG_FORCE_RESET __HAL_RCC_GPIOG_FORCE_RESET | |
| 2049 #define __GPIOG_RELEASE_RESET __HAL_RCC_GPIOG_RELEASE_RESET | |
| 2050 #define __GPIOH_CLK_DISABLE __HAL_RCC_GPIOH_CLK_DISABLE | |
| 2051 #define __GPIOH_CLK_ENABLE __HAL_RCC_GPIOH_CLK_ENABLE | |
| 2052 #define __GPIOH_CLK_SLEEP_DISABLE __HAL_RCC_GPIOH_CLK_SLEEP_DISABLE | |
| 2053 #define __GPIOH_CLK_SLEEP_ENABLE __HAL_RCC_GPIOH_CLK_SLEEP_ENABLE | |
| 2054 #define __GPIOH_FORCE_RESET __HAL_RCC_GPIOH_FORCE_RESET | |
| 2055 #define __GPIOH_RELEASE_RESET __HAL_RCC_GPIOH_RELEASE_RESET | |
| 2056 #define __I2C1_CLK_DISABLE __HAL_RCC_I2C1_CLK_DISABLE | |
| 2057 #define __I2C1_CLK_ENABLE __HAL_RCC_I2C1_CLK_ENABLE | |
| 2058 #define __I2C1_CLK_SLEEP_DISABLE __HAL_RCC_I2C1_CLK_SLEEP_DISABLE | |
| 2059 #define __I2C1_CLK_SLEEP_ENABLE __HAL_RCC_I2C1_CLK_SLEEP_ENABLE | |
| 2060 #define __I2C1_FORCE_RESET __HAL_RCC_I2C1_FORCE_RESET | |
| 2061 #define __I2C1_RELEASE_RESET __HAL_RCC_I2C1_RELEASE_RESET | |
| 2062 #define __I2C2_CLK_DISABLE __HAL_RCC_I2C2_CLK_DISABLE | |
| 2063 #define __I2C2_CLK_ENABLE __HAL_RCC_I2C2_CLK_ENABLE | |
| 2064 #define __I2C2_CLK_SLEEP_DISABLE __HAL_RCC_I2C2_CLK_SLEEP_DISABLE | |
| 2065 #define __I2C2_CLK_SLEEP_ENABLE __HAL_RCC_I2C2_CLK_SLEEP_ENABLE | |
| 2066 #define __I2C2_FORCE_RESET __HAL_RCC_I2C2_FORCE_RESET | |
| 2067 #define __I2C2_RELEASE_RESET __HAL_RCC_I2C2_RELEASE_RESET | |
| 2068 #define __I2C3_CLK_DISABLE __HAL_RCC_I2C3_CLK_DISABLE | |
| 2069 #define __I2C3_CLK_ENABLE __HAL_RCC_I2C3_CLK_ENABLE | |
| 2070 #define __I2C3_CLK_SLEEP_DISABLE __HAL_RCC_I2C3_CLK_SLEEP_DISABLE | |
| 2071 #define __I2C3_CLK_SLEEP_ENABLE __HAL_RCC_I2C3_CLK_SLEEP_ENABLE | |
| 2072 #define __I2C3_FORCE_RESET __HAL_RCC_I2C3_FORCE_RESET | |
| 2073 #define __I2C3_RELEASE_RESET __HAL_RCC_I2C3_RELEASE_RESET | |
| 2074 #define __LCD_CLK_DISABLE __HAL_RCC_LCD_CLK_DISABLE | |
| 2075 #define __LCD_CLK_ENABLE __HAL_RCC_LCD_CLK_ENABLE | |
| 2076 #define __LCD_CLK_SLEEP_DISABLE __HAL_RCC_LCD_CLK_SLEEP_DISABLE | |
| 2077 #define __LCD_CLK_SLEEP_ENABLE __HAL_RCC_LCD_CLK_SLEEP_ENABLE | |
| 2078 #define __LCD_FORCE_RESET __HAL_RCC_LCD_FORCE_RESET | |
| 2079 #define __LCD_RELEASE_RESET __HAL_RCC_LCD_RELEASE_RESET | |
| 2080 #define __LPTIM1_CLK_DISABLE __HAL_RCC_LPTIM1_CLK_DISABLE | |
| 2081 #define __LPTIM1_CLK_ENABLE __HAL_RCC_LPTIM1_CLK_ENABLE | |
| 2082 #define __LPTIM1_CLK_SLEEP_DISABLE __HAL_RCC_LPTIM1_CLK_SLEEP_DISABLE | |
| 2083 #define __LPTIM1_CLK_SLEEP_ENABLE __HAL_RCC_LPTIM1_CLK_SLEEP_ENABLE | |
| 2084 #define __LPTIM1_FORCE_RESET __HAL_RCC_LPTIM1_FORCE_RESET | |
| 2085 #define __LPTIM1_RELEASE_RESET __HAL_RCC_LPTIM1_RELEASE_RESET | |
| 2086 #define __LPTIM2_CLK_DISABLE __HAL_RCC_LPTIM2_CLK_DISABLE | |
| 2087 #define __LPTIM2_CLK_ENABLE __HAL_RCC_LPTIM2_CLK_ENABLE | |
| 2088 #define __LPTIM2_CLK_SLEEP_DISABLE __HAL_RCC_LPTIM2_CLK_SLEEP_DISABLE | |
| 2089 #define __LPTIM2_CLK_SLEEP_ENABLE __HAL_RCC_LPTIM2_CLK_SLEEP_ENABLE | |
| 2090 #define __LPTIM2_FORCE_RESET __HAL_RCC_LPTIM2_FORCE_RESET | |
| 2091 #define __LPTIM2_RELEASE_RESET __HAL_RCC_LPTIM2_RELEASE_RESET | |
| 2092 #define __LPUART1_CLK_DISABLE __HAL_RCC_LPUART1_CLK_DISABLE | |
| 2093 #define __LPUART1_CLK_ENABLE __HAL_RCC_LPUART1_CLK_ENABLE | |
| 2094 #define __LPUART1_CLK_SLEEP_DISABLE __HAL_RCC_LPUART1_CLK_SLEEP_DISABLE | |
| 2095 #define __LPUART1_CLK_SLEEP_ENABLE __HAL_RCC_LPUART1_CLK_SLEEP_ENABLE | |
| 2096 #define __LPUART1_FORCE_RESET __HAL_RCC_LPUART1_FORCE_RESET | |
| 2097 #define __LPUART1_RELEASE_RESET __HAL_RCC_LPUART1_RELEASE_RESET | |
| 2098 #define __OPAMP_CLK_DISABLE __HAL_RCC_OPAMP_CLK_DISABLE | |
| 2099 #define __OPAMP_CLK_ENABLE __HAL_RCC_OPAMP_CLK_ENABLE | |
| 2100 #define __OPAMP_CLK_SLEEP_DISABLE __HAL_RCC_OPAMP_CLK_SLEEP_DISABLE | |
| 2101 #define __OPAMP_CLK_SLEEP_ENABLE __HAL_RCC_OPAMP_CLK_SLEEP_ENABLE | |
| 2102 #define __OPAMP_FORCE_RESET __HAL_RCC_OPAMP_FORCE_RESET | |
| 2103 #define __OPAMP_RELEASE_RESET __HAL_RCC_OPAMP_RELEASE_RESET | |
| 2104 #define __OTGFS_CLK_DISABLE __HAL_RCC_OTGFS_CLK_DISABLE | |
| 2105 #define __OTGFS_CLK_ENABLE __HAL_RCC_OTGFS_CLK_ENABLE | |
| 2106 #define __OTGFS_CLK_SLEEP_DISABLE __HAL_RCC_OTGFS_CLK_SLEEP_DISABLE | |
| 2107 #define __OTGFS_CLK_SLEEP_ENABLE __HAL_RCC_OTGFS_CLK_SLEEP_ENABLE | |
| 2108 #define __OTGFS_FORCE_RESET __HAL_RCC_OTGFS_FORCE_RESET | |
| 2109 #define __OTGFS_RELEASE_RESET __HAL_RCC_OTGFS_RELEASE_RESET | |
| 2110 #define __PWR_CLK_DISABLE __HAL_RCC_PWR_CLK_DISABLE | |
| 2111 #define __PWR_CLK_ENABLE __HAL_RCC_PWR_CLK_ENABLE | |
| 2112 #define __PWR_CLK_SLEEP_DISABLE __HAL_RCC_PWR_CLK_SLEEP_DISABLE | |
| 2113 #define __PWR_CLK_SLEEP_ENABLE __HAL_RCC_PWR_CLK_SLEEP_ENABLE | |
| 2114 #define __PWR_FORCE_RESET __HAL_RCC_PWR_FORCE_RESET | |
| 2115 #define __PWR_RELEASE_RESET __HAL_RCC_PWR_RELEASE_RESET | |
| 2116 #define __QSPI_CLK_DISABLE __HAL_RCC_QSPI_CLK_DISABLE | |
| 2117 #define __QSPI_CLK_ENABLE __HAL_RCC_QSPI_CLK_ENABLE | |
| 2118 #define __QSPI_CLK_SLEEP_DISABLE __HAL_RCC_QSPI_CLK_SLEEP_DISABLE | |
| 2119 #define __QSPI_CLK_SLEEP_ENABLE __HAL_RCC_QSPI_CLK_SLEEP_ENABLE | |
| 2120 #define __QSPI_FORCE_RESET __HAL_RCC_QSPI_FORCE_RESET | |
| 2121 #define __QSPI_RELEASE_RESET __HAL_RCC_QSPI_RELEASE_RESET | |
| 2122 | |
| 2123 #if defined(STM32WB) | |
| 2124 #define __HAL_RCC_QSPI_CLK_DISABLE __HAL_RCC_QUADSPI_CLK_DISABLE | |
| 2125 #define __HAL_RCC_QSPI_CLK_ENABLE __HAL_RCC_QUADSPI_CLK_ENABLE | |
| 2126 #define __HAL_RCC_QSPI_CLK_SLEEP_DISABLE __HAL_RCC_QUADSPI_CLK_SLEEP_DISABLE | |
| 2127 #define __HAL_RCC_QSPI_CLK_SLEEP_ENABLE __HAL_RCC_QUADSPI_CLK_SLEEP_ENABLE | |
| 2128 #define __HAL_RCC_QSPI_FORCE_RESET __HAL_RCC_QUADSPI_FORCE_RESET | |
| 2129 #define __HAL_RCC_QSPI_RELEASE_RESET __HAL_RCC_QUADSPI_RELEASE_RESET | |
| 2130 #define __HAL_RCC_QSPI_IS_CLK_ENABLED __HAL_RCC_QUADSPI_IS_CLK_ENABLED | |
| 2131 #define __HAL_RCC_QSPI_IS_CLK_DISABLED __HAL_RCC_QUADSPI_IS_CLK_DISABLED | |
| 2132 #define __HAL_RCC_QSPI_IS_CLK_SLEEP_ENABLED __HAL_RCC_QUADSPI_IS_CLK_SLEEP_ENABLED | |
| 2133 #define __HAL_RCC_QSPI_IS_CLK_SLEEP_DISABLED __HAL_RCC_QUADSPI_IS_CLK_SLEEP_DISABLED | |
| 2134 #define QSPI_IRQHandler QUADSPI_IRQHandler | |
| 2135 #endif /* __HAL_RCC_QUADSPI_CLK_ENABLE */ | |
| 2136 | |
| 2137 #define __RNG_CLK_DISABLE __HAL_RCC_RNG_CLK_DISABLE | |
| 2138 #define __RNG_CLK_ENABLE __HAL_RCC_RNG_CLK_ENABLE | |
| 2139 #define __RNG_CLK_SLEEP_DISABLE __HAL_RCC_RNG_CLK_SLEEP_DISABLE | |
| 2140 #define __RNG_CLK_SLEEP_ENABLE __HAL_RCC_RNG_CLK_SLEEP_ENABLE | |
| 2141 #define __RNG_FORCE_RESET __HAL_RCC_RNG_FORCE_RESET | |
| 2142 #define __RNG_RELEASE_RESET __HAL_RCC_RNG_RELEASE_RESET | |
| 2143 #define __SAI1_CLK_DISABLE __HAL_RCC_SAI1_CLK_DISABLE | |
| 2144 #define __SAI1_CLK_ENABLE __HAL_RCC_SAI1_CLK_ENABLE | |
| 2145 #define __SAI1_CLK_SLEEP_DISABLE __HAL_RCC_SAI1_CLK_SLEEP_DISABLE | |
| 2146 #define __SAI1_CLK_SLEEP_ENABLE __HAL_RCC_SAI1_CLK_SLEEP_ENABLE | |
| 2147 #define __SAI1_FORCE_RESET __HAL_RCC_SAI1_FORCE_RESET | |
| 2148 #define __SAI1_RELEASE_RESET __HAL_RCC_SAI1_RELEASE_RESET | |
| 2149 #define __SAI2_CLK_DISABLE __HAL_RCC_SAI2_CLK_DISABLE | |
| 2150 #define __SAI2_CLK_ENABLE __HAL_RCC_SAI2_CLK_ENABLE | |
| 2151 #define __SAI2_CLK_SLEEP_DISABLE __HAL_RCC_SAI2_CLK_SLEEP_DISABLE | |
| 2152 #define __SAI2_CLK_SLEEP_ENABLE __HAL_RCC_SAI2_CLK_SLEEP_ENABLE | |
| 2153 #define __SAI2_FORCE_RESET __HAL_RCC_SAI2_FORCE_RESET | |
| 2154 #define __SAI2_RELEASE_RESET __HAL_RCC_SAI2_RELEASE_RESET | |
| 2155 #define __SDIO_CLK_DISABLE __HAL_RCC_SDIO_CLK_DISABLE | |
| 2156 #define __SDIO_CLK_ENABLE __HAL_RCC_SDIO_CLK_ENABLE | |
| 2157 #define __SDMMC_CLK_DISABLE __HAL_RCC_SDMMC_CLK_DISABLE | |
| 2158 #define __SDMMC_CLK_ENABLE __HAL_RCC_SDMMC_CLK_ENABLE | |
| 2159 #define __SDMMC_CLK_SLEEP_DISABLE __HAL_RCC_SDMMC_CLK_SLEEP_DISABLE | |
| 2160 #define __SDMMC_CLK_SLEEP_ENABLE __HAL_RCC_SDMMC_CLK_SLEEP_ENABLE | |
| 2161 #define __SDMMC_FORCE_RESET __HAL_RCC_SDMMC_FORCE_RESET | |
| 2162 #define __SDMMC_RELEASE_RESET __HAL_RCC_SDMMC_RELEASE_RESET | |
| 2163 #define __SPI1_CLK_DISABLE __HAL_RCC_SPI1_CLK_DISABLE | |
| 2164 #define __SPI1_CLK_ENABLE __HAL_RCC_SPI1_CLK_ENABLE | |
| 2165 #define __SPI1_CLK_SLEEP_DISABLE __HAL_RCC_SPI1_CLK_SLEEP_DISABLE | |
| 2166 #define __SPI1_CLK_SLEEP_ENABLE __HAL_RCC_SPI1_CLK_SLEEP_ENABLE | |
| 2167 #define __SPI1_FORCE_RESET __HAL_RCC_SPI1_FORCE_RESET | |
| 2168 #define __SPI1_RELEASE_RESET __HAL_RCC_SPI1_RELEASE_RESET | |
| 2169 #define __SPI2_CLK_DISABLE __HAL_RCC_SPI2_CLK_DISABLE | |
| 2170 #define __SPI2_CLK_ENABLE __HAL_RCC_SPI2_CLK_ENABLE | |
| 2171 #define __SPI2_CLK_SLEEP_DISABLE __HAL_RCC_SPI2_CLK_SLEEP_DISABLE | |
| 2172 #define __SPI2_CLK_SLEEP_ENABLE __HAL_RCC_SPI2_CLK_SLEEP_ENABLE | |
| 2173 #define __SPI2_FORCE_RESET __HAL_RCC_SPI2_FORCE_RESET | |
| 2174 #define __SPI2_RELEASE_RESET __HAL_RCC_SPI2_RELEASE_RESET | |
| 2175 #define __SPI3_CLK_DISABLE __HAL_RCC_SPI3_CLK_DISABLE | |
| 2176 #define __SPI3_CLK_ENABLE __HAL_RCC_SPI3_CLK_ENABLE | |
| 2177 #define __SPI3_CLK_SLEEP_DISABLE __HAL_RCC_SPI3_CLK_SLEEP_DISABLE | |
| 2178 #define __SPI3_CLK_SLEEP_ENABLE __HAL_RCC_SPI3_CLK_SLEEP_ENABLE | |
| 2179 #define __SPI3_FORCE_RESET __HAL_RCC_SPI3_FORCE_RESET | |
| 2180 #define __SPI3_RELEASE_RESET __HAL_RCC_SPI3_RELEASE_RESET | |
| 2181 #define __SRAM_CLK_DISABLE __HAL_RCC_SRAM_CLK_DISABLE | |
| 2182 #define __SRAM_CLK_ENABLE __HAL_RCC_SRAM_CLK_ENABLE | |
| 2183 #define __SRAM1_CLK_SLEEP_DISABLE __HAL_RCC_SRAM1_CLK_SLEEP_DISABLE | |
| 2184 #define __SRAM1_CLK_SLEEP_ENABLE __HAL_RCC_SRAM1_CLK_SLEEP_ENABLE | |
| 2185 #define __SRAM2_CLK_SLEEP_DISABLE __HAL_RCC_SRAM2_CLK_SLEEP_DISABLE | |
| 2186 #define __SRAM2_CLK_SLEEP_ENABLE __HAL_RCC_SRAM2_CLK_SLEEP_ENABLE | |
| 2187 #define __SWPMI1_CLK_DISABLE __HAL_RCC_SWPMI1_CLK_DISABLE | |
| 2188 #define __SWPMI1_CLK_ENABLE __HAL_RCC_SWPMI1_CLK_ENABLE | |
| 2189 #define __SWPMI1_CLK_SLEEP_DISABLE __HAL_RCC_SWPMI1_CLK_SLEEP_DISABLE | |
| 2190 #define __SWPMI1_CLK_SLEEP_ENABLE __HAL_RCC_SWPMI1_CLK_SLEEP_ENABLE | |
| 2191 #define __SWPMI1_FORCE_RESET __HAL_RCC_SWPMI1_FORCE_RESET | |
| 2192 #define __SWPMI1_RELEASE_RESET __HAL_RCC_SWPMI1_RELEASE_RESET | |
| 2193 #define __SYSCFG_CLK_DISABLE __HAL_RCC_SYSCFG_CLK_DISABLE | |
| 2194 #define __SYSCFG_CLK_ENABLE __HAL_RCC_SYSCFG_CLK_ENABLE | |
| 2195 #define __SYSCFG_CLK_SLEEP_DISABLE __HAL_RCC_SYSCFG_CLK_SLEEP_DISABLE | |
| 2196 #define __SYSCFG_CLK_SLEEP_ENABLE __HAL_RCC_SYSCFG_CLK_SLEEP_ENABLE | |
| 2197 #define __SYSCFG_FORCE_RESET __HAL_RCC_SYSCFG_FORCE_RESET | |
| 2198 #define __SYSCFG_RELEASE_RESET __HAL_RCC_SYSCFG_RELEASE_RESET | |
| 2199 #define __TIM1_CLK_DISABLE __HAL_RCC_TIM1_CLK_DISABLE | |
| 2200 #define __TIM1_CLK_ENABLE __HAL_RCC_TIM1_CLK_ENABLE | |
| 2201 #define __TIM1_CLK_SLEEP_DISABLE __HAL_RCC_TIM1_CLK_SLEEP_DISABLE | |
| 2202 #define __TIM1_CLK_SLEEP_ENABLE __HAL_RCC_TIM1_CLK_SLEEP_ENABLE | |
| 2203 #define __TIM1_FORCE_RESET __HAL_RCC_TIM1_FORCE_RESET | |
| 2204 #define __TIM1_RELEASE_RESET __HAL_RCC_TIM1_RELEASE_RESET | |
| 2205 #define __TIM10_CLK_DISABLE __HAL_RCC_TIM10_CLK_DISABLE | |
| 2206 #define __TIM10_CLK_ENABLE __HAL_RCC_TIM10_CLK_ENABLE | |
| 2207 #define __TIM10_FORCE_RESET __HAL_RCC_TIM10_FORCE_RESET | |
| 2208 #define __TIM10_RELEASE_RESET __HAL_RCC_TIM10_RELEASE_RESET | |
| 2209 #define __TIM11_CLK_DISABLE __HAL_RCC_TIM11_CLK_DISABLE | |
| 2210 #define __TIM11_CLK_ENABLE __HAL_RCC_TIM11_CLK_ENABLE | |
| 2211 #define __TIM11_FORCE_RESET __HAL_RCC_TIM11_FORCE_RESET | |
| 2212 #define __TIM11_RELEASE_RESET __HAL_RCC_TIM11_RELEASE_RESET | |
| 2213 #define __TIM12_CLK_DISABLE __HAL_RCC_TIM12_CLK_DISABLE | |
| 2214 #define __TIM12_CLK_ENABLE __HAL_RCC_TIM12_CLK_ENABLE | |
| 2215 #define __TIM12_FORCE_RESET __HAL_RCC_TIM12_FORCE_RESET | |
| 2216 #define __TIM12_RELEASE_RESET __HAL_RCC_TIM12_RELEASE_RESET | |
| 2217 #define __TIM13_CLK_DISABLE __HAL_RCC_TIM13_CLK_DISABLE | |
| 2218 #define __TIM13_CLK_ENABLE __HAL_RCC_TIM13_CLK_ENABLE | |
| 2219 #define __TIM13_FORCE_RESET __HAL_RCC_TIM13_FORCE_RESET | |
| 2220 #define __TIM13_RELEASE_RESET __HAL_RCC_TIM13_RELEASE_RESET | |
| 2221 #define __TIM14_CLK_DISABLE __HAL_RCC_TIM14_CLK_DISABLE | |
| 2222 #define __TIM14_CLK_ENABLE __HAL_RCC_TIM14_CLK_ENABLE | |
| 2223 #define __TIM14_FORCE_RESET __HAL_RCC_TIM14_FORCE_RESET | |
| 2224 #define __TIM14_RELEASE_RESET __HAL_RCC_TIM14_RELEASE_RESET | |
| 2225 #define __TIM15_CLK_DISABLE __HAL_RCC_TIM15_CLK_DISABLE | |
| 2226 #define __TIM15_CLK_ENABLE __HAL_RCC_TIM15_CLK_ENABLE | |
| 2227 #define __TIM15_CLK_SLEEP_DISABLE __HAL_RCC_TIM15_CLK_SLEEP_DISABLE | |
| 2228 #define __TIM15_CLK_SLEEP_ENABLE __HAL_RCC_TIM15_CLK_SLEEP_ENABLE | |
| 2229 #define __TIM15_FORCE_RESET __HAL_RCC_TIM15_FORCE_RESET | |
| 2230 #define __TIM15_RELEASE_RESET __HAL_RCC_TIM15_RELEASE_RESET | |
| 2231 #define __TIM16_CLK_DISABLE __HAL_RCC_TIM16_CLK_DISABLE | |
| 2232 #define __TIM16_CLK_ENABLE __HAL_RCC_TIM16_CLK_ENABLE | |
| 2233 #define __TIM16_CLK_SLEEP_DISABLE __HAL_RCC_TIM16_CLK_SLEEP_DISABLE | |
| 2234 #define __TIM16_CLK_SLEEP_ENABLE __HAL_RCC_TIM16_CLK_SLEEP_ENABLE | |
| 2235 #define __TIM16_FORCE_RESET __HAL_RCC_TIM16_FORCE_RESET | |
| 2236 #define __TIM16_RELEASE_RESET __HAL_RCC_TIM16_RELEASE_RESET | |
| 2237 #define __TIM17_CLK_DISABLE __HAL_RCC_TIM17_CLK_DISABLE | |
| 2238 #define __TIM17_CLK_ENABLE __HAL_RCC_TIM17_CLK_ENABLE | |
| 2239 #define __TIM17_CLK_SLEEP_DISABLE __HAL_RCC_TIM17_CLK_SLEEP_DISABLE | |
| 2240 #define __TIM17_CLK_SLEEP_ENABLE __HAL_RCC_TIM17_CLK_SLEEP_ENABLE | |
| 2241 #define __TIM17_FORCE_RESET __HAL_RCC_TIM17_FORCE_RESET | |
| 2242 #define __TIM17_RELEASE_RESET __HAL_RCC_TIM17_RELEASE_RESET | |
| 2243 #define __TIM2_CLK_DISABLE __HAL_RCC_TIM2_CLK_DISABLE | |
| 2244 #define __TIM2_CLK_ENABLE __HAL_RCC_TIM2_CLK_ENABLE | |
| 2245 #define __TIM2_CLK_SLEEP_DISABLE __HAL_RCC_TIM2_CLK_SLEEP_DISABLE | |
| 2246 #define __TIM2_CLK_SLEEP_ENABLE __HAL_RCC_TIM2_CLK_SLEEP_ENABLE | |
| 2247 #define __TIM2_FORCE_RESET __HAL_RCC_TIM2_FORCE_RESET | |
| 2248 #define __TIM2_RELEASE_RESET __HAL_RCC_TIM2_RELEASE_RESET | |
| 2249 #define __TIM3_CLK_DISABLE __HAL_RCC_TIM3_CLK_DISABLE | |
| 2250 #define __TIM3_CLK_ENABLE __HAL_RCC_TIM3_CLK_ENABLE | |
| 2251 #define __TIM3_CLK_SLEEP_DISABLE __HAL_RCC_TIM3_CLK_SLEEP_DISABLE | |
| 2252 #define __TIM3_CLK_SLEEP_ENABLE __HAL_RCC_TIM3_CLK_SLEEP_ENABLE | |
| 2253 #define __TIM3_FORCE_RESET __HAL_RCC_TIM3_FORCE_RESET | |
| 2254 #define __TIM3_RELEASE_RESET __HAL_RCC_TIM3_RELEASE_RESET | |
| 2255 #define __TIM4_CLK_DISABLE __HAL_RCC_TIM4_CLK_DISABLE | |
| 2256 #define __TIM4_CLK_ENABLE __HAL_RCC_TIM4_CLK_ENABLE | |
| 2257 #define __TIM4_CLK_SLEEP_DISABLE __HAL_RCC_TIM4_CLK_SLEEP_DISABLE | |
| 2258 #define __TIM4_CLK_SLEEP_ENABLE __HAL_RCC_TIM4_CLK_SLEEP_ENABLE | |
| 2259 #define __TIM4_FORCE_RESET __HAL_RCC_TIM4_FORCE_RESET | |
| 2260 #define __TIM4_RELEASE_RESET __HAL_RCC_TIM4_RELEASE_RESET | |
| 2261 #define __TIM5_CLK_DISABLE __HAL_RCC_TIM5_CLK_DISABLE | |
| 2262 #define __TIM5_CLK_ENABLE __HAL_RCC_TIM5_CLK_ENABLE | |
| 2263 #define __TIM5_CLK_SLEEP_DISABLE __HAL_RCC_TIM5_CLK_SLEEP_DISABLE | |
| 2264 #define __TIM5_CLK_SLEEP_ENABLE __HAL_RCC_TIM5_CLK_SLEEP_ENABLE | |
| 2265 #define __TIM5_FORCE_RESET __HAL_RCC_TIM5_FORCE_RESET | |
| 2266 #define __TIM5_RELEASE_RESET __HAL_RCC_TIM5_RELEASE_RESET | |
| 2267 #define __TIM6_CLK_DISABLE __HAL_RCC_TIM6_CLK_DISABLE | |
| 2268 #define __TIM6_CLK_ENABLE __HAL_RCC_TIM6_CLK_ENABLE | |
| 2269 #define __TIM6_CLK_SLEEP_DISABLE __HAL_RCC_TIM6_CLK_SLEEP_DISABLE | |
| 2270 #define __TIM6_CLK_SLEEP_ENABLE __HAL_RCC_TIM6_CLK_SLEEP_ENABLE | |
| 2271 #define __TIM6_FORCE_RESET __HAL_RCC_TIM6_FORCE_RESET | |
| 2272 #define __TIM6_RELEASE_RESET __HAL_RCC_TIM6_RELEASE_RESET | |
| 2273 #define __TIM7_CLK_DISABLE __HAL_RCC_TIM7_CLK_DISABLE | |
| 2274 #define __TIM7_CLK_ENABLE __HAL_RCC_TIM7_CLK_ENABLE | |
| 2275 #define __TIM7_CLK_SLEEP_DISABLE __HAL_RCC_TIM7_CLK_SLEEP_DISABLE | |
| 2276 #define __TIM7_CLK_SLEEP_ENABLE __HAL_RCC_TIM7_CLK_SLEEP_ENABLE | |
| 2277 #define __TIM7_FORCE_RESET __HAL_RCC_TIM7_FORCE_RESET | |
| 2278 #define __TIM7_RELEASE_RESET __HAL_RCC_TIM7_RELEASE_RESET | |
| 2279 #define __TIM8_CLK_DISABLE __HAL_RCC_TIM8_CLK_DISABLE | |
| 2280 #define __TIM8_CLK_ENABLE __HAL_RCC_TIM8_CLK_ENABLE | |
| 2281 #define __TIM8_CLK_SLEEP_DISABLE __HAL_RCC_TIM8_CLK_SLEEP_DISABLE | |
| 2282 #define __TIM8_CLK_SLEEP_ENABLE __HAL_RCC_TIM8_CLK_SLEEP_ENABLE | |
| 2283 #define __TIM8_FORCE_RESET __HAL_RCC_TIM8_FORCE_RESET | |
| 2284 #define __TIM8_RELEASE_RESET __HAL_RCC_TIM8_RELEASE_RESET | |
| 2285 #define __TIM9_CLK_DISABLE __HAL_RCC_TIM9_CLK_DISABLE | |
| 2286 #define __TIM9_CLK_ENABLE __HAL_RCC_TIM9_CLK_ENABLE | |
| 2287 #define __TIM9_FORCE_RESET __HAL_RCC_TIM9_FORCE_RESET | |
| 2288 #define __TIM9_RELEASE_RESET __HAL_RCC_TIM9_RELEASE_RESET | |
| 2289 #define __TSC_CLK_DISABLE __HAL_RCC_TSC_CLK_DISABLE | |
| 2290 #define __TSC_CLK_ENABLE __HAL_RCC_TSC_CLK_ENABLE | |
| 2291 #define __TSC_CLK_SLEEP_DISABLE __HAL_RCC_TSC_CLK_SLEEP_DISABLE | |
| 2292 #define __TSC_CLK_SLEEP_ENABLE __HAL_RCC_TSC_CLK_SLEEP_ENABLE | |
| 2293 #define __TSC_FORCE_RESET __HAL_RCC_TSC_FORCE_RESET | |
| 2294 #define __TSC_RELEASE_RESET __HAL_RCC_TSC_RELEASE_RESET | |
| 2295 #define __UART4_CLK_DISABLE __HAL_RCC_UART4_CLK_DISABLE | |
| 2296 #define __UART4_CLK_ENABLE __HAL_RCC_UART4_CLK_ENABLE | |
| 2297 #define __UART4_CLK_SLEEP_DISABLE __HAL_RCC_UART4_CLK_SLEEP_DISABLE | |
| 2298 #define __UART4_CLK_SLEEP_ENABLE __HAL_RCC_UART4_CLK_SLEEP_ENABLE | |
| 2299 #define __UART4_FORCE_RESET __HAL_RCC_UART4_FORCE_RESET | |
| 2300 #define __UART4_RELEASE_RESET __HAL_RCC_UART4_RELEASE_RESET | |
| 2301 #define __UART5_CLK_DISABLE __HAL_RCC_UART5_CLK_DISABLE | |
| 2302 #define __UART5_CLK_ENABLE __HAL_RCC_UART5_CLK_ENABLE | |
| 2303 #define __UART5_CLK_SLEEP_DISABLE __HAL_RCC_UART5_CLK_SLEEP_DISABLE | |
| 2304 #define __UART5_CLK_SLEEP_ENABLE __HAL_RCC_UART5_CLK_SLEEP_ENABLE | |
| 2305 #define __UART5_FORCE_RESET __HAL_RCC_UART5_FORCE_RESET | |
| 2306 #define __UART5_RELEASE_RESET __HAL_RCC_UART5_RELEASE_RESET | |
| 2307 #define __USART1_CLK_DISABLE __HAL_RCC_USART1_CLK_DISABLE | |
| 2308 #define __USART1_CLK_ENABLE __HAL_RCC_USART1_CLK_ENABLE | |
| 2309 #define __USART1_CLK_SLEEP_DISABLE __HAL_RCC_USART1_CLK_SLEEP_DISABLE | |
| 2310 #define __USART1_CLK_SLEEP_ENABLE __HAL_RCC_USART1_CLK_SLEEP_ENABLE | |
| 2311 #define __USART1_FORCE_RESET __HAL_RCC_USART1_FORCE_RESET | |
| 2312 #define __USART1_RELEASE_RESET __HAL_RCC_USART1_RELEASE_RESET | |
| 2313 #define __USART2_CLK_DISABLE __HAL_RCC_USART2_CLK_DISABLE | |
| 2314 #define __USART2_CLK_ENABLE __HAL_RCC_USART2_CLK_ENABLE | |
| 2315 #define __USART2_CLK_SLEEP_DISABLE __HAL_RCC_USART2_CLK_SLEEP_DISABLE | |
| 2316 #define __USART2_CLK_SLEEP_ENABLE __HAL_RCC_USART2_CLK_SLEEP_ENABLE | |
| 2317 #define __USART2_FORCE_RESET __HAL_RCC_USART2_FORCE_RESET | |
| 2318 #define __USART2_RELEASE_RESET __HAL_RCC_USART2_RELEASE_RESET | |
| 2319 #define __USART3_CLK_DISABLE __HAL_RCC_USART3_CLK_DISABLE | |
| 2320 #define __USART3_CLK_ENABLE __HAL_RCC_USART3_CLK_ENABLE | |
| 2321 #define __USART3_CLK_SLEEP_DISABLE __HAL_RCC_USART3_CLK_SLEEP_DISABLE | |
| 2322 #define __USART3_CLK_SLEEP_ENABLE __HAL_RCC_USART3_CLK_SLEEP_ENABLE | |
| 2323 #define __USART3_FORCE_RESET __HAL_RCC_USART3_FORCE_RESET | |
| 2324 #define __USART3_RELEASE_RESET __HAL_RCC_USART3_RELEASE_RESET | |
| 2325 #define __USART4_CLK_DISABLE __HAL_RCC_UART4_CLK_DISABLE | |
| 2326 #define __USART4_CLK_ENABLE __HAL_RCC_UART4_CLK_ENABLE | |
| 2327 #define __USART4_CLK_SLEEP_ENABLE __HAL_RCC_UART4_CLK_SLEEP_ENABLE | |
| 2328 #define __USART4_CLK_SLEEP_DISABLE __HAL_RCC_UART4_CLK_SLEEP_DISABLE | |
| 2329 #define __USART4_FORCE_RESET __HAL_RCC_UART4_FORCE_RESET | |
| 2330 #define __USART4_RELEASE_RESET __HAL_RCC_UART4_RELEASE_RESET | |
| 2331 #define __USART5_CLK_DISABLE __HAL_RCC_UART5_CLK_DISABLE | |
| 2332 #define __USART5_CLK_ENABLE __HAL_RCC_UART5_CLK_ENABLE | |
| 2333 #define __USART5_CLK_SLEEP_ENABLE __HAL_RCC_UART5_CLK_SLEEP_ENABLE | |
| 2334 #define __USART5_CLK_SLEEP_DISABLE __HAL_RCC_UART5_CLK_SLEEP_DISABLE | |
| 2335 #define __USART5_FORCE_RESET __HAL_RCC_UART5_FORCE_RESET | |
| 2336 #define __USART5_RELEASE_RESET __HAL_RCC_UART5_RELEASE_RESET | |
| 2337 #define __USART7_CLK_DISABLE __HAL_RCC_UART7_CLK_DISABLE | |
| 2338 #define __USART7_CLK_ENABLE __HAL_RCC_UART7_CLK_ENABLE | |
| 2339 #define __USART7_FORCE_RESET __HAL_RCC_UART7_FORCE_RESET | |
| 2340 #define __USART7_RELEASE_RESET __HAL_RCC_UART7_RELEASE_RESET | |
| 2341 #define __USART8_CLK_DISABLE __HAL_RCC_UART8_CLK_DISABLE | |
| 2342 #define __USART8_CLK_ENABLE __HAL_RCC_UART8_CLK_ENABLE | |
| 2343 #define __USART8_FORCE_RESET __HAL_RCC_UART8_FORCE_RESET | |
| 2344 #define __USART8_RELEASE_RESET __HAL_RCC_UART8_RELEASE_RESET | |
| 2345 #define __USB_CLK_DISABLE __HAL_RCC_USB_CLK_DISABLE | |
| 2346 #define __USB_CLK_ENABLE __HAL_RCC_USB_CLK_ENABLE | |
| 2347 #define __USB_FORCE_RESET __HAL_RCC_USB_FORCE_RESET | |
| 2348 #define __USB_CLK_SLEEP_ENABLE __HAL_RCC_USB_CLK_SLEEP_ENABLE | |
| 2349 #define __USB_CLK_SLEEP_DISABLE __HAL_RCC_USB_CLK_SLEEP_DISABLE | |
| 2350 #define __USB_OTG_FS_CLK_DISABLE __HAL_RCC_USB_OTG_FS_CLK_DISABLE | |
| 2351 #define __USB_OTG_FS_CLK_ENABLE __HAL_RCC_USB_OTG_FS_CLK_ENABLE | |
| 2352 #define __USB_RELEASE_RESET __HAL_RCC_USB_RELEASE_RESET | |
| 2353 #define __WWDG_CLK_DISABLE __HAL_RCC_WWDG_CLK_DISABLE | |
| 2354 #define __WWDG_CLK_ENABLE __HAL_RCC_WWDG_CLK_ENABLE | |
| 2355 #define __WWDG_CLK_SLEEP_DISABLE __HAL_RCC_WWDG_CLK_SLEEP_DISABLE | |
| 2356 #define __WWDG_CLK_SLEEP_ENABLE __HAL_RCC_WWDG_CLK_SLEEP_ENABLE | |
| 2357 #define __WWDG_FORCE_RESET __HAL_RCC_WWDG_FORCE_RESET | |
| 2358 #define __WWDG_RELEASE_RESET __HAL_RCC_WWDG_RELEASE_RESET | |
| 2359 #define __TIM21_CLK_ENABLE __HAL_RCC_TIM21_CLK_ENABLE | |
| 2360 #define __TIM21_CLK_DISABLE __HAL_RCC_TIM21_CLK_DISABLE | |
| 2361 #define __TIM21_FORCE_RESET __HAL_RCC_TIM21_FORCE_RESET | |
| 2362 #define __TIM21_RELEASE_RESET __HAL_RCC_TIM21_RELEASE_RESET | |
| 2363 #define __TIM21_CLK_SLEEP_ENABLE __HAL_RCC_TIM21_CLK_SLEEP_ENABLE | |
| 2364 #define __TIM21_CLK_SLEEP_DISABLE __HAL_RCC_TIM21_CLK_SLEEP_DISABLE | |
| 2365 #define __TIM22_CLK_ENABLE __HAL_RCC_TIM22_CLK_ENABLE | |
| 2366 #define __TIM22_CLK_DISABLE __HAL_RCC_TIM22_CLK_DISABLE | |
| 2367 #define __TIM22_FORCE_RESET __HAL_RCC_TIM22_FORCE_RESET | |
| 2368 #define __TIM22_RELEASE_RESET __HAL_RCC_TIM22_RELEASE_RESET | |
| 2369 #define __TIM22_CLK_SLEEP_ENABLE __HAL_RCC_TIM22_CLK_SLEEP_ENABLE | |
| 2370 #define __TIM22_CLK_SLEEP_DISABLE __HAL_RCC_TIM22_CLK_SLEEP_DISABLE | |
| 2371 #define __CRS_CLK_DISABLE __HAL_RCC_CRS_CLK_DISABLE | |
| 2372 #define __CRS_CLK_ENABLE __HAL_RCC_CRS_CLK_ENABLE | |
| 2373 #define __CRS_CLK_SLEEP_DISABLE __HAL_RCC_CRS_CLK_SLEEP_DISABLE | |
| 2374 #define __CRS_CLK_SLEEP_ENABLE __HAL_RCC_CRS_CLK_SLEEP_ENABLE | |
| 2375 #define __CRS_FORCE_RESET __HAL_RCC_CRS_FORCE_RESET | |
| 2376 #define __CRS_RELEASE_RESET __HAL_RCC_CRS_RELEASE_RESET | |
| 2377 #define __RCC_BACKUPRESET_FORCE __HAL_RCC_BACKUPRESET_FORCE | |
| 2378 #define __RCC_BACKUPRESET_RELEASE __HAL_RCC_BACKUPRESET_RELEASE | |
| 2379 | |
| 2380 #define __USB_OTG_FS_FORCE_RESET __HAL_RCC_USB_OTG_FS_FORCE_RESET | |
| 2381 #define __USB_OTG_FS_RELEASE_RESET __HAL_RCC_USB_OTG_FS_RELEASE_RESET | |
| 2382 #define __USB_OTG_FS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE | |
| 2383 #define __USB_OTG_FS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE | |
| 2384 #define __USB_OTG_HS_CLK_DISABLE __HAL_RCC_USB_OTG_HS_CLK_DISABLE | |
| 2385 #define __USB_OTG_HS_CLK_ENABLE __HAL_RCC_USB_OTG_HS_CLK_ENABLE | |
| 2386 #define __USB_OTG_HS_ULPI_CLK_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE | |
| 2387 #define __USB_OTG_HS_ULPI_CLK_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE | |
| 2388 #define __TIM9_CLK_SLEEP_ENABLE __HAL_RCC_TIM9_CLK_SLEEP_ENABLE | |
| 2389 #define __TIM9_CLK_SLEEP_DISABLE __HAL_RCC_TIM9_CLK_SLEEP_DISABLE | |
| 2390 #define __TIM10_CLK_SLEEP_ENABLE __HAL_RCC_TIM10_CLK_SLEEP_ENABLE | |
| 2391 #define __TIM10_CLK_SLEEP_DISABLE __HAL_RCC_TIM10_CLK_SLEEP_DISABLE | |
| 2392 #define __TIM11_CLK_SLEEP_ENABLE __HAL_RCC_TIM11_CLK_SLEEP_ENABLE | |
| 2393 #define __TIM11_CLK_SLEEP_DISABLE __HAL_RCC_TIM11_CLK_SLEEP_DISABLE | |
| 2394 #define __ETHMACPTP_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACPTP_CLK_SLEEP_ENABLE | |
| 2395 #define __ETHMACPTP_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACPTP_CLK_SLEEP_DISABLE | |
| 2396 #define __ETHMACPTP_CLK_ENABLE __HAL_RCC_ETHMACPTP_CLK_ENABLE | |
| 2397 #define __ETHMACPTP_CLK_DISABLE __HAL_RCC_ETHMACPTP_CLK_DISABLE | |
| 2398 #define __HASH_CLK_ENABLE __HAL_RCC_HASH_CLK_ENABLE | |
| 2399 #define __HASH_FORCE_RESET __HAL_RCC_HASH_FORCE_RESET | |
| 2400 #define __HASH_RELEASE_RESET __HAL_RCC_HASH_RELEASE_RESET | |
| 2401 #define __HASH_CLK_SLEEP_ENABLE __HAL_RCC_HASH_CLK_SLEEP_ENABLE | |
| 2402 #define __HASH_CLK_SLEEP_DISABLE __HAL_RCC_HASH_CLK_SLEEP_DISABLE | |
| 2403 #define __HASH_CLK_DISABLE __HAL_RCC_HASH_CLK_DISABLE | |
| 2404 #define __SPI5_CLK_ENABLE __HAL_RCC_SPI5_CLK_ENABLE | |
| 2405 #define __SPI5_CLK_DISABLE __HAL_RCC_SPI5_CLK_DISABLE | |
| 2406 #define __SPI5_FORCE_RESET __HAL_RCC_SPI5_FORCE_RESET | |
| 2407 #define __SPI5_RELEASE_RESET __HAL_RCC_SPI5_RELEASE_RESET | |
| 2408 #define __SPI5_CLK_SLEEP_ENABLE __HAL_RCC_SPI5_CLK_SLEEP_ENABLE | |
| 2409 #define __SPI5_CLK_SLEEP_DISABLE __HAL_RCC_SPI5_CLK_SLEEP_DISABLE | |
| 2410 #define __SPI6_CLK_ENABLE __HAL_RCC_SPI6_CLK_ENABLE | |
| 2411 #define __SPI6_CLK_DISABLE __HAL_RCC_SPI6_CLK_DISABLE | |
| 2412 #define __SPI6_FORCE_RESET __HAL_RCC_SPI6_FORCE_RESET | |
| 2413 #define __SPI6_RELEASE_RESET __HAL_RCC_SPI6_RELEASE_RESET | |
| 2414 #define __SPI6_CLK_SLEEP_ENABLE __HAL_RCC_SPI6_CLK_SLEEP_ENABLE | |
| 2415 #define __SPI6_CLK_SLEEP_DISABLE __HAL_RCC_SPI6_CLK_SLEEP_DISABLE | |
| 2416 #define __LTDC_CLK_ENABLE __HAL_RCC_LTDC_CLK_ENABLE | |
| 2417 #define __LTDC_CLK_DISABLE __HAL_RCC_LTDC_CLK_DISABLE | |
| 2418 #define __LTDC_FORCE_RESET __HAL_RCC_LTDC_FORCE_RESET | |
| 2419 #define __LTDC_RELEASE_RESET __HAL_RCC_LTDC_RELEASE_RESET | |
| 2420 #define __LTDC_CLK_SLEEP_ENABLE __HAL_RCC_LTDC_CLK_SLEEP_ENABLE | |
| 2421 #define __ETHMAC_CLK_SLEEP_ENABLE __HAL_RCC_ETHMAC_CLK_SLEEP_ENABLE | |
| 2422 #define __ETHMAC_CLK_SLEEP_DISABLE __HAL_RCC_ETHMAC_CLK_SLEEP_DISABLE | |
| 2423 #define __ETHMACTX_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACTX_CLK_SLEEP_ENABLE | |
| 2424 #define __ETHMACTX_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACTX_CLK_SLEEP_DISABLE | |
| 2425 #define __ETHMACRX_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACRX_CLK_SLEEP_ENABLE | |
| 2426 #define __ETHMACRX_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACRX_CLK_SLEEP_DISABLE | |
| 2427 #define __TIM12_CLK_SLEEP_ENABLE __HAL_RCC_TIM12_CLK_SLEEP_ENABLE | |
| 2428 #define __TIM12_CLK_SLEEP_DISABLE __HAL_RCC_TIM12_CLK_SLEEP_DISABLE | |
| 2429 #define __TIM13_CLK_SLEEP_ENABLE __HAL_RCC_TIM13_CLK_SLEEP_ENABLE | |
| 2430 #define __TIM13_CLK_SLEEP_DISABLE __HAL_RCC_TIM13_CLK_SLEEP_DISABLE | |
| 2431 #define __TIM14_CLK_SLEEP_ENABLE __HAL_RCC_TIM14_CLK_SLEEP_ENABLE | |
| 2432 #define __TIM14_CLK_SLEEP_DISABLE __HAL_RCC_TIM14_CLK_SLEEP_DISABLE | |
| 2433 #define __BKPSRAM_CLK_ENABLE __HAL_RCC_BKPSRAM_CLK_ENABLE | |
| 2434 #define __BKPSRAM_CLK_DISABLE __HAL_RCC_BKPSRAM_CLK_DISABLE | |
| 2435 #define __BKPSRAM_CLK_SLEEP_ENABLE __HAL_RCC_BKPSRAM_CLK_SLEEP_ENABLE | |
| 2436 #define __BKPSRAM_CLK_SLEEP_DISABLE __HAL_RCC_BKPSRAM_CLK_SLEEP_DISABLE | |
| 2437 #define __CCMDATARAMEN_CLK_ENABLE __HAL_RCC_CCMDATARAMEN_CLK_ENABLE | |
| 2438 #define __CCMDATARAMEN_CLK_DISABLE __HAL_RCC_CCMDATARAMEN_CLK_DISABLE | |
| 2439 #define __USART6_CLK_ENABLE __HAL_RCC_USART6_CLK_ENABLE | |
| 2440 #define __USART6_CLK_DISABLE __HAL_RCC_USART6_CLK_DISABLE | |
| 2441 #define __USART6_FORCE_RESET __HAL_RCC_USART6_FORCE_RESET | |
| 2442 #define __USART6_RELEASE_RESET __HAL_RCC_USART6_RELEASE_RESET | |
| 2443 #define __USART6_CLK_SLEEP_ENABLE __HAL_RCC_USART6_CLK_SLEEP_ENABLE | |
| 2444 #define __USART6_CLK_SLEEP_DISABLE __HAL_RCC_USART6_CLK_SLEEP_DISABLE | |
| 2445 #define __SPI4_CLK_ENABLE __HAL_RCC_SPI4_CLK_ENABLE | |
| 2446 #define __SPI4_CLK_DISABLE __HAL_RCC_SPI4_CLK_DISABLE | |
| 2447 #define __SPI4_FORCE_RESET __HAL_RCC_SPI4_FORCE_RESET | |
| 2448 #define __SPI4_RELEASE_RESET __HAL_RCC_SPI4_RELEASE_RESET | |
| 2449 #define __SPI4_CLK_SLEEP_ENABLE __HAL_RCC_SPI4_CLK_SLEEP_ENABLE | |
| 2450 #define __SPI4_CLK_SLEEP_DISABLE __HAL_RCC_SPI4_CLK_SLEEP_DISABLE | |
| 2451 #define __GPIOI_CLK_ENABLE __HAL_RCC_GPIOI_CLK_ENABLE | |
| 2452 #define __GPIOI_CLK_DISABLE __HAL_RCC_GPIOI_CLK_DISABLE | |
| 2453 #define __GPIOI_FORCE_RESET __HAL_RCC_GPIOI_FORCE_RESET | |
| 2454 #define __GPIOI_RELEASE_RESET __HAL_RCC_GPIOI_RELEASE_RESET | |
| 2455 #define __GPIOI_CLK_SLEEP_ENABLE __HAL_RCC_GPIOI_CLK_SLEEP_ENABLE | |
| 2456 #define __GPIOI_CLK_SLEEP_DISABLE __HAL_RCC_GPIOI_CLK_SLEEP_DISABLE | |
| 2457 #define __GPIOJ_CLK_ENABLE __HAL_RCC_GPIOJ_CLK_ENABLE | |
| 2458 #define __GPIOJ_CLK_DISABLE __HAL_RCC_GPIOJ_CLK_DISABLE | |
| 2459 #define __GPIOJ_FORCE_RESET __HAL_RCC_GPIOJ_FORCE_RESET | |
| 2460 #define __GPIOJ_RELEASE_RESET __HAL_RCC_GPIOJ_RELEASE_RESET | |
| 2461 #define __GPIOJ_CLK_SLEEP_ENABLE __HAL_RCC_GPIOJ_CLK_SLEEP_ENABLE | |
| 2462 #define __GPIOJ_CLK_SLEEP_DISABLE __HAL_RCC_GPIOJ_CLK_SLEEP_DISABLE | |
| 2463 #define __GPIOK_CLK_ENABLE __HAL_RCC_GPIOK_CLK_ENABLE | |
| 2464 #define __GPIOK_CLK_DISABLE __HAL_RCC_GPIOK_CLK_DISABLE | |
| 2465 #define __GPIOK_RELEASE_RESET __HAL_RCC_GPIOK_RELEASE_RESET | |
| 2466 #define __GPIOK_CLK_SLEEP_ENABLE __HAL_RCC_GPIOK_CLK_SLEEP_ENABLE | |
| 2467 #define __GPIOK_CLK_SLEEP_DISABLE __HAL_RCC_GPIOK_CLK_SLEEP_DISABLE | |
| 2468 #define __ETH_CLK_ENABLE __HAL_RCC_ETH_CLK_ENABLE | |
| 2469 #define __ETH_CLK_DISABLE __HAL_RCC_ETH_CLK_DISABLE | |
| 2470 #define __DCMI_CLK_ENABLE __HAL_RCC_DCMI_CLK_ENABLE | |
| 2471 #define __DCMI_CLK_DISABLE __HAL_RCC_DCMI_CLK_DISABLE | |
| 2472 #define __DCMI_FORCE_RESET __HAL_RCC_DCMI_FORCE_RESET | |
| 2473 #define __DCMI_RELEASE_RESET __HAL_RCC_DCMI_RELEASE_RESET | |
| 2474 #define __DCMI_CLK_SLEEP_ENABLE __HAL_RCC_DCMI_CLK_SLEEP_ENABLE | |
| 2475 #define __DCMI_CLK_SLEEP_DISABLE __HAL_RCC_DCMI_CLK_SLEEP_DISABLE | |
| 2476 #define __UART7_CLK_ENABLE __HAL_RCC_UART7_CLK_ENABLE | |
| 2477 #define __UART7_CLK_DISABLE __HAL_RCC_UART7_CLK_DISABLE | |
| 2478 #define __UART7_RELEASE_RESET __HAL_RCC_UART7_RELEASE_RESET | |
| 2479 #define __UART7_FORCE_RESET __HAL_RCC_UART7_FORCE_RESET | |
| 2480 #define __UART7_CLK_SLEEP_ENABLE __HAL_RCC_UART7_CLK_SLEEP_ENABLE | |
| 2481 #define __UART7_CLK_SLEEP_DISABLE __HAL_RCC_UART7_CLK_SLEEP_DISABLE | |
| 2482 #define __UART8_CLK_ENABLE __HAL_RCC_UART8_CLK_ENABLE | |
| 2483 #define __UART8_CLK_DISABLE __HAL_RCC_UART8_CLK_DISABLE | |
| 2484 #define __UART8_FORCE_RESET __HAL_RCC_UART8_FORCE_RESET | |
| 2485 #define __UART8_RELEASE_RESET __HAL_RCC_UART8_RELEASE_RESET | |
| 2486 #define __UART8_CLK_SLEEP_ENABLE __HAL_RCC_UART8_CLK_SLEEP_ENABLE | |
| 2487 #define __UART8_CLK_SLEEP_DISABLE __HAL_RCC_UART8_CLK_SLEEP_DISABLE | |
| 2488 #define __OTGHS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE | |
| 2489 #define __OTGHS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE | |
| 2490 #define __OTGHS_FORCE_RESET __HAL_RCC_USB_OTG_HS_FORCE_RESET | |
| 2491 #define __OTGHS_RELEASE_RESET __HAL_RCC_USB_OTG_HS_RELEASE_RESET | |
| 2492 #define __OTGHSULPI_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE | |
| 2493 #define __OTGHSULPI_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE | |
| 2494 #define __HAL_RCC_OTGHS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE | |
| 2495 #define __HAL_RCC_OTGHS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE | |
| 2496 #define __HAL_RCC_OTGHS_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_ENABLED | |
| 2497 #define __HAL_RCC_OTGHS_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_DISABLED | |
| 2498 #define __HAL_RCC_OTGHS_FORCE_RESET __HAL_RCC_USB_OTG_HS_FORCE_RESET | |
| 2499 #define __HAL_RCC_OTGHS_RELEASE_RESET __HAL_RCC_USB_OTG_HS_RELEASE_RESET | |
| 2500 #define __HAL_RCC_OTGHSULPI_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE | |
| 2501 #define __HAL_RCC_OTGHSULPI_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE | |
| 2502 #define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_ENABLED | |
| 2503 #define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_DISABLED | |
| 2504 #define __SRAM3_CLK_SLEEP_ENABLE __HAL_RCC_SRAM3_CLK_SLEEP_ENABLE | |
| 2505 #define __CAN2_CLK_SLEEP_ENABLE __HAL_RCC_CAN2_CLK_SLEEP_ENABLE | |
| 2506 #define __CAN2_CLK_SLEEP_DISABLE __HAL_RCC_CAN2_CLK_SLEEP_DISABLE | |
| 2507 #define __DAC_CLK_SLEEP_ENABLE __HAL_RCC_DAC_CLK_SLEEP_ENABLE | |
| 2508 #define __DAC_CLK_SLEEP_DISABLE __HAL_RCC_DAC_CLK_SLEEP_DISABLE | |
| 2509 #define __ADC2_CLK_SLEEP_ENABLE __HAL_RCC_ADC2_CLK_SLEEP_ENABLE | |
| 2510 #define __ADC2_CLK_SLEEP_DISABLE __HAL_RCC_ADC2_CLK_SLEEP_DISABLE | |
| 2511 #define __ADC3_CLK_SLEEP_ENABLE __HAL_RCC_ADC3_CLK_SLEEP_ENABLE | |
| 2512 #define __ADC3_CLK_SLEEP_DISABLE __HAL_RCC_ADC3_CLK_SLEEP_DISABLE | |
| 2513 #define __FSMC_FORCE_RESET __HAL_RCC_FSMC_FORCE_RESET | |
| 2514 #define __FSMC_RELEASE_RESET __HAL_RCC_FSMC_RELEASE_RESET | |
| 2515 #define __FSMC_CLK_SLEEP_ENABLE __HAL_RCC_FSMC_CLK_SLEEP_ENABLE | |
| 2516 #define __FSMC_CLK_SLEEP_DISABLE __HAL_RCC_FSMC_CLK_SLEEP_DISABLE | |
| 2517 #define __SDIO_FORCE_RESET __HAL_RCC_SDIO_FORCE_RESET | |
| 2518 #define __SDIO_RELEASE_RESET __HAL_RCC_SDIO_RELEASE_RESET | |
| 2519 #define __SDIO_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE | |
| 2520 #define __SDIO_CLK_SLEEP_ENABLE __HAL_RCC_SDIO_CLK_SLEEP_ENABLE | |
| 2521 #define __DMA2D_CLK_ENABLE __HAL_RCC_DMA2D_CLK_ENABLE | |
| 2522 #define __DMA2D_CLK_DISABLE __HAL_RCC_DMA2D_CLK_DISABLE | |
| 2523 #define __DMA2D_FORCE_RESET __HAL_RCC_DMA2D_FORCE_RESET | |
| 2524 #define __DMA2D_RELEASE_RESET __HAL_RCC_DMA2D_RELEASE_RESET | |
| 2525 #define __DMA2D_CLK_SLEEP_ENABLE __HAL_RCC_DMA2D_CLK_SLEEP_ENABLE | |
| 2526 #define __DMA2D_CLK_SLEEP_DISABLE __HAL_RCC_DMA2D_CLK_SLEEP_DISABLE | |
| 2527 | |
| 2528 /* alias define maintained for legacy */ | |
| 2529 #define __HAL_RCC_OTGFS_FORCE_RESET __HAL_RCC_USB_OTG_FS_FORCE_RESET | |
| 2530 #define __HAL_RCC_OTGFS_RELEASE_RESET __HAL_RCC_USB_OTG_FS_RELEASE_RESET | |
| 2531 | |
| 2532 #define __ADC12_CLK_ENABLE __HAL_RCC_ADC12_CLK_ENABLE | |
| 2533 #define __ADC12_CLK_DISABLE __HAL_RCC_ADC12_CLK_DISABLE | |
| 2534 #define __ADC34_CLK_ENABLE __HAL_RCC_ADC34_CLK_ENABLE | |
| 2535 #define __ADC34_CLK_DISABLE __HAL_RCC_ADC34_CLK_DISABLE | |
| 2536 #define __DAC2_CLK_ENABLE __HAL_RCC_DAC2_CLK_ENABLE | |
| 2537 #define __DAC2_CLK_DISABLE __HAL_RCC_DAC2_CLK_DISABLE | |
| 2538 #define __TIM18_CLK_ENABLE __HAL_RCC_TIM18_CLK_ENABLE | |
| 2539 #define __TIM18_CLK_DISABLE __HAL_RCC_TIM18_CLK_DISABLE | |
| 2540 #define __TIM19_CLK_ENABLE __HAL_RCC_TIM19_CLK_ENABLE | |
| 2541 #define __TIM19_CLK_DISABLE __HAL_RCC_TIM19_CLK_DISABLE | |
| 2542 #define __TIM20_CLK_ENABLE __HAL_RCC_TIM20_CLK_ENABLE | |
| 2543 #define __TIM20_CLK_DISABLE __HAL_RCC_TIM20_CLK_DISABLE | |
| 2544 #define __HRTIM1_CLK_ENABLE __HAL_RCC_HRTIM1_CLK_ENABLE | |
| 2545 #define __HRTIM1_CLK_DISABLE __HAL_RCC_HRTIM1_CLK_DISABLE | |
| 2546 #define __SDADC1_CLK_ENABLE __HAL_RCC_SDADC1_CLK_ENABLE | |
| 2547 #define __SDADC2_CLK_ENABLE __HAL_RCC_SDADC2_CLK_ENABLE | |
| 2548 #define __SDADC3_CLK_ENABLE __HAL_RCC_SDADC3_CLK_ENABLE | |
| 2549 #define __SDADC1_CLK_DISABLE __HAL_RCC_SDADC1_CLK_DISABLE | |
| 2550 #define __SDADC2_CLK_DISABLE __HAL_RCC_SDADC2_CLK_DISABLE | |
| 2551 #define __SDADC3_CLK_DISABLE __HAL_RCC_SDADC3_CLK_DISABLE | |
| 2552 | |
| 2553 #define __ADC12_FORCE_RESET __HAL_RCC_ADC12_FORCE_RESET | |
| 2554 #define __ADC12_RELEASE_RESET __HAL_RCC_ADC12_RELEASE_RESET | |
| 2555 #define __ADC34_FORCE_RESET __HAL_RCC_ADC34_FORCE_RESET | |
| 2556 #define __ADC34_RELEASE_RESET __HAL_RCC_ADC34_RELEASE_RESET | |
| 2557 #define __DAC2_FORCE_RESET __HAL_RCC_DAC2_FORCE_RESET | |
| 2558 #define __DAC2_RELEASE_RESET __HAL_RCC_DAC2_RELEASE_RESET | |
| 2559 #define __TIM18_FORCE_RESET __HAL_RCC_TIM18_FORCE_RESET | |
| 2560 #define __TIM18_RELEASE_RESET __HAL_RCC_TIM18_RELEASE_RESET | |
| 2561 #define __TIM19_FORCE_RESET __HAL_RCC_TIM19_FORCE_RESET | |
| 2562 #define __TIM19_RELEASE_RESET __HAL_RCC_TIM19_RELEASE_RESET | |
| 2563 #define __TIM20_FORCE_RESET __HAL_RCC_TIM20_FORCE_RESET | |
| 2564 #define __TIM20_RELEASE_RESET __HAL_RCC_TIM20_RELEASE_RESET | |
| 2565 #define __HRTIM1_FORCE_RESET __HAL_RCC_HRTIM1_FORCE_RESET | |
| 2566 #define __HRTIM1_RELEASE_RESET __HAL_RCC_HRTIM1_RELEASE_RESET | |
| 2567 #define __SDADC1_FORCE_RESET __HAL_RCC_SDADC1_FORCE_RESET | |
| 2568 #define __SDADC2_FORCE_RESET __HAL_RCC_SDADC2_FORCE_RESET | |
| 2569 #define __SDADC3_FORCE_RESET __HAL_RCC_SDADC3_FORCE_RESET | |
| 2570 #define __SDADC1_RELEASE_RESET __HAL_RCC_SDADC1_RELEASE_RESET | |
| 2571 #define __SDADC2_RELEASE_RESET __HAL_RCC_SDADC2_RELEASE_RESET | |
| 2572 #define __SDADC3_RELEASE_RESET __HAL_RCC_SDADC3_RELEASE_RESET | |
| 2573 | |
| 2574 #define __ADC1_IS_CLK_ENABLED __HAL_RCC_ADC1_IS_CLK_ENABLED | |
| 2575 #define __ADC1_IS_CLK_DISABLED __HAL_RCC_ADC1_IS_CLK_DISABLED | |
| 2576 #define __ADC12_IS_CLK_ENABLED __HAL_RCC_ADC12_IS_CLK_ENABLED | |
| 2577 #define __ADC12_IS_CLK_DISABLED __HAL_RCC_ADC12_IS_CLK_DISABLED | |
| 2578 #define __ADC34_IS_CLK_ENABLED __HAL_RCC_ADC34_IS_CLK_ENABLED | |
| 2579 #define __ADC34_IS_CLK_DISABLED __HAL_RCC_ADC34_IS_CLK_DISABLED | |
| 2580 #define __CEC_IS_CLK_ENABLED __HAL_RCC_CEC_IS_CLK_ENABLED | |
| 2581 #define __CEC_IS_CLK_DISABLED __HAL_RCC_CEC_IS_CLK_DISABLED | |
| 2582 #define __CRC_IS_CLK_ENABLED __HAL_RCC_CRC_IS_CLK_ENABLED | |
| 2583 #define __CRC_IS_CLK_DISABLED __HAL_RCC_CRC_IS_CLK_DISABLED | |
| 2584 #define __DAC1_IS_CLK_ENABLED __HAL_RCC_DAC1_IS_CLK_ENABLED | |
| 2585 #define __DAC1_IS_CLK_DISABLED __HAL_RCC_DAC1_IS_CLK_DISABLED | |
| 2586 #define __DAC2_IS_CLK_ENABLED __HAL_RCC_DAC2_IS_CLK_ENABLED | |
| 2587 #define __DAC2_IS_CLK_DISABLED __HAL_RCC_DAC2_IS_CLK_DISABLED | |
| 2588 #define __DMA1_IS_CLK_ENABLED __HAL_RCC_DMA1_IS_CLK_ENABLED | |
| 2589 #define __DMA1_IS_CLK_DISABLED __HAL_RCC_DMA1_IS_CLK_DISABLED | |
| 2590 #define __DMA2_IS_CLK_ENABLED __HAL_RCC_DMA2_IS_CLK_ENABLED | |
| 2591 #define __DMA2_IS_CLK_DISABLED __HAL_RCC_DMA2_IS_CLK_DISABLED | |
| 2592 #define __FLITF_IS_CLK_ENABLED __HAL_RCC_FLITF_IS_CLK_ENABLED | |
| 2593 #define __FLITF_IS_CLK_DISABLED __HAL_RCC_FLITF_IS_CLK_DISABLED | |
| 2594 #define __FMC_IS_CLK_ENABLED __HAL_RCC_FMC_IS_CLK_ENABLED | |
| 2595 #define __FMC_IS_CLK_DISABLED __HAL_RCC_FMC_IS_CLK_DISABLED | |
| 2596 #define __GPIOA_IS_CLK_ENABLED __HAL_RCC_GPIOA_IS_CLK_ENABLED | |
| 2597 #define __GPIOA_IS_CLK_DISABLED __HAL_RCC_GPIOA_IS_CLK_DISABLED | |
| 2598 #define __GPIOB_IS_CLK_ENABLED __HAL_RCC_GPIOB_IS_CLK_ENABLED | |
| 2599 #define __GPIOB_IS_CLK_DISABLED __HAL_RCC_GPIOB_IS_CLK_DISABLED | |
| 2600 #define __GPIOC_IS_CLK_ENABLED __HAL_RCC_GPIOC_IS_CLK_ENABLED | |
| 2601 #define __GPIOC_IS_CLK_DISABLED __HAL_RCC_GPIOC_IS_CLK_DISABLED | |
| 2602 #define __GPIOD_IS_CLK_ENABLED __HAL_RCC_GPIOD_IS_CLK_ENABLED | |
| 2603 #define __GPIOD_IS_CLK_DISABLED __HAL_RCC_GPIOD_IS_CLK_DISABLED | |
| 2604 #define __GPIOE_IS_CLK_ENABLED __HAL_RCC_GPIOE_IS_CLK_ENABLED | |
| 2605 #define __GPIOE_IS_CLK_DISABLED __HAL_RCC_GPIOE_IS_CLK_DISABLED | |
| 2606 #define __GPIOF_IS_CLK_ENABLED __HAL_RCC_GPIOF_IS_CLK_ENABLED | |
| 2607 #define __GPIOF_IS_CLK_DISABLED __HAL_RCC_GPIOF_IS_CLK_DISABLED | |
| 2608 #define __GPIOG_IS_CLK_ENABLED __HAL_RCC_GPIOG_IS_CLK_ENABLED | |
| 2609 #define __GPIOG_IS_CLK_DISABLED __HAL_RCC_GPIOG_IS_CLK_DISABLED | |
| 2610 #define __GPIOH_IS_CLK_ENABLED __HAL_RCC_GPIOH_IS_CLK_ENABLED | |
| 2611 #define __GPIOH_IS_CLK_DISABLED __HAL_RCC_GPIOH_IS_CLK_DISABLED | |
| 2612 #define __HRTIM1_IS_CLK_ENABLED __HAL_RCC_HRTIM1_IS_CLK_ENABLED | |
| 2613 #define __HRTIM1_IS_CLK_DISABLED __HAL_RCC_HRTIM1_IS_CLK_DISABLED | |
| 2614 #define __I2C1_IS_CLK_ENABLED __HAL_RCC_I2C1_IS_CLK_ENABLED | |
| 2615 #define __I2C1_IS_CLK_DISABLED __HAL_RCC_I2C1_IS_CLK_DISABLED | |
| 2616 #define __I2C2_IS_CLK_ENABLED __HAL_RCC_I2C2_IS_CLK_ENABLED | |
| 2617 #define __I2C2_IS_CLK_DISABLED __HAL_RCC_I2C2_IS_CLK_DISABLED | |
| 2618 #define __I2C3_IS_CLK_ENABLED __HAL_RCC_I2C3_IS_CLK_ENABLED | |
| 2619 #define __I2C3_IS_CLK_DISABLED __HAL_RCC_I2C3_IS_CLK_DISABLED | |
| 2620 #define __PWR_IS_CLK_ENABLED __HAL_RCC_PWR_IS_CLK_ENABLED | |
| 2621 #define __PWR_IS_CLK_DISABLED __HAL_RCC_PWR_IS_CLK_DISABLED | |
| 2622 #define __SYSCFG_IS_CLK_ENABLED __HAL_RCC_SYSCFG_IS_CLK_ENABLED | |
| 2623 #define __SYSCFG_IS_CLK_DISABLED __HAL_RCC_SYSCFG_IS_CLK_DISABLED | |
| 2624 #define __SPI1_IS_CLK_ENABLED __HAL_RCC_SPI1_IS_CLK_ENABLED | |
| 2625 #define __SPI1_IS_CLK_DISABLED __HAL_RCC_SPI1_IS_CLK_DISABLED | |
| 2626 #define __SPI2_IS_CLK_ENABLED __HAL_RCC_SPI2_IS_CLK_ENABLED | |
| 2627 #define __SPI2_IS_CLK_DISABLED __HAL_RCC_SPI2_IS_CLK_DISABLED | |
| 2628 #define __SPI3_IS_CLK_ENABLED __HAL_RCC_SPI3_IS_CLK_ENABLED | |
| 2629 #define __SPI3_IS_CLK_DISABLED __HAL_RCC_SPI3_IS_CLK_DISABLED | |
| 2630 #define __SPI4_IS_CLK_ENABLED __HAL_RCC_SPI4_IS_CLK_ENABLED | |
| 2631 #define __SPI4_IS_CLK_DISABLED __HAL_RCC_SPI4_IS_CLK_DISABLED | |
| 2632 #define __SDADC1_IS_CLK_ENABLED __HAL_RCC_SDADC1_IS_CLK_ENABLED | |
| 2633 #define __SDADC1_IS_CLK_DISABLED __HAL_RCC_SDADC1_IS_CLK_DISABLED | |
| 2634 #define __SDADC2_IS_CLK_ENABLED __HAL_RCC_SDADC2_IS_CLK_ENABLED | |
| 2635 #define __SDADC2_IS_CLK_DISABLED __HAL_RCC_SDADC2_IS_CLK_DISABLED | |
| 2636 #define __SDADC3_IS_CLK_ENABLED __HAL_RCC_SDADC3_IS_CLK_ENABLED | |
| 2637 #define __SDADC3_IS_CLK_DISABLED __HAL_RCC_SDADC3_IS_CLK_DISABLED | |
| 2638 #define __SRAM_IS_CLK_ENABLED __HAL_RCC_SRAM_IS_CLK_ENABLED | |
| 2639 #define __SRAM_IS_CLK_DISABLED __HAL_RCC_SRAM_IS_CLK_DISABLED | |
| 2640 #define __TIM1_IS_CLK_ENABLED __HAL_RCC_TIM1_IS_CLK_ENABLED | |
| 2641 #define __TIM1_IS_CLK_DISABLED __HAL_RCC_TIM1_IS_CLK_DISABLED | |
| 2642 #define __TIM2_IS_CLK_ENABLED __HAL_RCC_TIM2_IS_CLK_ENABLED | |
| 2643 #define __TIM2_IS_CLK_DISABLED __HAL_RCC_TIM2_IS_CLK_DISABLED | |
| 2644 #define __TIM3_IS_CLK_ENABLED __HAL_RCC_TIM3_IS_CLK_ENABLED | |
| 2645 #define __TIM3_IS_CLK_DISABLED __HAL_RCC_TIM3_IS_CLK_DISABLED | |
| 2646 #define __TIM4_IS_CLK_ENABLED __HAL_RCC_TIM4_IS_CLK_ENABLED | |
| 2647 #define __TIM4_IS_CLK_DISABLED __HAL_RCC_TIM4_IS_CLK_DISABLED | |
| 2648 #define __TIM5_IS_CLK_ENABLED __HAL_RCC_TIM5_IS_CLK_ENABLED | |
| 2649 #define __TIM5_IS_CLK_DISABLED __HAL_RCC_TIM5_IS_CLK_DISABLED | |
| 2650 #define __TIM6_IS_CLK_ENABLED __HAL_RCC_TIM6_IS_CLK_ENABLED | |
| 2651 #define __TIM6_IS_CLK_DISABLED __HAL_RCC_TIM6_IS_CLK_DISABLED | |
| 2652 #define __TIM7_IS_CLK_ENABLED __HAL_RCC_TIM7_IS_CLK_ENABLED | |
| 2653 #define __TIM7_IS_CLK_DISABLED __HAL_RCC_TIM7_IS_CLK_DISABLED | |
| 2654 #define __TIM8_IS_CLK_ENABLED __HAL_RCC_TIM8_IS_CLK_ENABLED | |
| 2655 #define __TIM8_IS_CLK_DISABLED __HAL_RCC_TIM8_IS_CLK_DISABLED | |
| 2656 #define __TIM12_IS_CLK_ENABLED __HAL_RCC_TIM12_IS_CLK_ENABLED | |
| 2657 #define __TIM12_IS_CLK_DISABLED __HAL_RCC_TIM12_IS_CLK_DISABLED | |
| 2658 #define __TIM13_IS_CLK_ENABLED __HAL_RCC_TIM13_IS_CLK_ENABLED | |
| 2659 #define __TIM13_IS_CLK_DISABLED __HAL_RCC_TIM13_IS_CLK_DISABLED | |
| 2660 #define __TIM14_IS_CLK_ENABLED __HAL_RCC_TIM14_IS_CLK_ENABLED | |
| 2661 #define __TIM14_IS_CLK_DISABLED __HAL_RCC_TIM14_IS_CLK_DISABLED | |
| 2662 #define __TIM15_IS_CLK_ENABLED __HAL_RCC_TIM15_IS_CLK_ENABLED | |
| 2663 #define __TIM15_IS_CLK_DISABLED __HAL_RCC_TIM15_IS_CLK_DISABLED | |
| 2664 #define __TIM16_IS_CLK_ENABLED __HAL_RCC_TIM16_IS_CLK_ENABLED | |
| 2665 #define __TIM16_IS_CLK_DISABLED __HAL_RCC_TIM16_IS_CLK_DISABLED | |
| 2666 #define __TIM17_IS_CLK_ENABLED __HAL_RCC_TIM17_IS_CLK_ENABLED | |
| 2667 #define __TIM17_IS_CLK_DISABLED __HAL_RCC_TIM17_IS_CLK_DISABLED | |
| 2668 #define __TIM18_IS_CLK_ENABLED __HAL_RCC_TIM18_IS_CLK_ENABLED | |
| 2669 #define __TIM18_IS_CLK_DISABLED __HAL_RCC_TIM18_IS_CLK_DISABLED | |
| 2670 #define __TIM19_IS_CLK_ENABLED __HAL_RCC_TIM19_IS_CLK_ENABLED | |
| 2671 #define __TIM19_IS_CLK_DISABLED __HAL_RCC_TIM19_IS_CLK_DISABLED | |
| 2672 #define __TIM20_IS_CLK_ENABLED __HAL_RCC_TIM20_IS_CLK_ENABLED | |
| 2673 #define __TIM20_IS_CLK_DISABLED __HAL_RCC_TIM20_IS_CLK_DISABLED | |
| 2674 #define __TSC_IS_CLK_ENABLED __HAL_RCC_TSC_IS_CLK_ENABLED | |
| 2675 #define __TSC_IS_CLK_DISABLED __HAL_RCC_TSC_IS_CLK_DISABLED | |
| 2676 #define __UART4_IS_CLK_ENABLED __HAL_RCC_UART4_IS_CLK_ENABLED | |
| 2677 #define __UART4_IS_CLK_DISABLED __HAL_RCC_UART4_IS_CLK_DISABLED | |
| 2678 #define __UART5_IS_CLK_ENABLED __HAL_RCC_UART5_IS_CLK_ENABLED | |
| 2679 #define __UART5_IS_CLK_DISABLED __HAL_RCC_UART5_IS_CLK_DISABLED | |
| 2680 #define __USART1_IS_CLK_ENABLED __HAL_RCC_USART1_IS_CLK_ENABLED | |
| 2681 #define __USART1_IS_CLK_DISABLED __HAL_RCC_USART1_IS_CLK_DISABLED | |
| 2682 #define __USART2_IS_CLK_ENABLED __HAL_RCC_USART2_IS_CLK_ENABLED | |
| 2683 #define __USART2_IS_CLK_DISABLED __HAL_RCC_USART2_IS_CLK_DISABLED | |
| 2684 #define __USART3_IS_CLK_ENABLED __HAL_RCC_USART3_IS_CLK_ENABLED | |
| 2685 #define __USART3_IS_CLK_DISABLED __HAL_RCC_USART3_IS_CLK_DISABLED | |
| 2686 #define __USB_IS_CLK_ENABLED __HAL_RCC_USB_IS_CLK_ENABLED | |
| 2687 #define __USB_IS_CLK_DISABLED __HAL_RCC_USB_IS_CLK_DISABLED | |
| 2688 #define __WWDG_IS_CLK_ENABLED __HAL_RCC_WWDG_IS_CLK_ENABLED | |
| 2689 #define __WWDG_IS_CLK_DISABLED __HAL_RCC_WWDG_IS_CLK_DISABLED | |
| 2690 | |
| 2691 #if defined(STM32F4) | |
| 2692 #define __HAL_RCC_SDMMC1_FORCE_RESET __HAL_RCC_SDIO_FORCE_RESET | |
| 2693 #define __HAL_RCC_SDMMC1_RELEASE_RESET __HAL_RCC_SDIO_RELEASE_RESET | |
| 2694 #define __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE __HAL_RCC_SDIO_CLK_SLEEP_ENABLE | |
| 2695 #define __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE | |
| 2696 #define __HAL_RCC_SDMMC1_CLK_ENABLE __HAL_RCC_SDIO_CLK_ENABLE | |
| 2697 #define __HAL_RCC_SDMMC1_CLK_DISABLE __HAL_RCC_SDIO_CLK_DISABLE | |
| 2698 #define __HAL_RCC_SDMMC1_IS_CLK_ENABLED __HAL_RCC_SDIO_IS_CLK_ENABLED | |
| 2699 #define __HAL_RCC_SDMMC1_IS_CLK_DISABLED __HAL_RCC_SDIO_IS_CLK_DISABLED | |
| 2700 #define Sdmmc1ClockSelection SdioClockSelection | |
| 2701 #define RCC_PERIPHCLK_SDMMC1 RCC_PERIPHCLK_SDIO | |
| 2702 #define RCC_SDMMC1CLKSOURCE_CLK48 RCC_SDIOCLKSOURCE_CK48 | |
| 2703 #define RCC_SDMMC1CLKSOURCE_SYSCLK RCC_SDIOCLKSOURCE_SYSCLK | |
| 2704 #define __HAL_RCC_SDMMC1_CONFIG __HAL_RCC_SDIO_CONFIG | |
| 2705 #define __HAL_RCC_GET_SDMMC1_SOURCE __HAL_RCC_GET_SDIO_SOURCE | |
| 2706 #endif | |
| 2707 | |
| 2708 #if defined(STM32F7) || defined(STM32L4) | |
| 2709 #define __HAL_RCC_SDIO_FORCE_RESET __HAL_RCC_SDMMC1_FORCE_RESET | |
| 2710 #define __HAL_RCC_SDIO_RELEASE_RESET __HAL_RCC_SDMMC1_RELEASE_RESET | |
| 2711 #define __HAL_RCC_SDIO_CLK_SLEEP_ENABLE __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE | |
| 2712 #define __HAL_RCC_SDIO_CLK_SLEEP_DISABLE __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE | |
| 2713 #define __HAL_RCC_SDIO_CLK_ENABLE __HAL_RCC_SDMMC1_CLK_ENABLE | |
| 2714 #define __HAL_RCC_SDIO_CLK_DISABLE __HAL_RCC_SDMMC1_CLK_DISABLE | |
| 2715 #define __HAL_RCC_SDIO_IS_CLK_ENABLED __HAL_RCC_SDMMC1_IS_CLK_ENABLED | |
| 2716 #define __HAL_RCC_SDIO_IS_CLK_DISABLED __HAL_RCC_SDMMC1_IS_CLK_DISABLED | |
| 2717 #define SdioClockSelection Sdmmc1ClockSelection | |
| 2718 #define RCC_PERIPHCLK_SDIO RCC_PERIPHCLK_SDMMC1 | |
| 2719 #define __HAL_RCC_SDIO_CONFIG __HAL_RCC_SDMMC1_CONFIG | |
| 2720 #define __HAL_RCC_GET_SDIO_SOURCE __HAL_RCC_GET_SDMMC1_SOURCE | |
| 2721 #endif | |
| 2722 | |
| 2723 #if defined(STM32F7) | |
| 2724 #define RCC_SDIOCLKSOURCE_CLK48 RCC_SDMMC1CLKSOURCE_CLK48 | |
| 2725 #define RCC_SDIOCLKSOURCE_SYSCLK RCC_SDMMC1CLKSOURCE_SYSCLK | |
| 2726 #endif | |
| 2727 | |
| 2728 #if defined(STM32H7) | |
| 2729 #define __HAL_RCC_USB_OTG_HS_CLK_ENABLE() __HAL_RCC_USB1_OTG_HS_CLK_ENABLE() | |
| 2730 #define __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE() __HAL_RCC_USB1_OTG_HS_ULPI_CLK_ENABLE() | |
| 2731 #define __HAL_RCC_USB_OTG_HS_CLK_DISABLE() __HAL_RCC_USB1_OTG_HS_CLK_DISABLE() | |
| 2732 #define __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE() __HAL_RCC_USB1_OTG_HS_ULPI_CLK_DISABLE() | |
| 2733 #define __HAL_RCC_USB_OTG_HS_FORCE_RESET() __HAL_RCC_USB1_OTG_HS_FORCE_RESET() | |
| 2734 #define __HAL_RCC_USB_OTG_HS_RELEASE_RESET() __HAL_RCC_USB1_OTG_HS_RELEASE_RESET() | |
| 2735 #define __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE() __HAL_RCC_USB1_OTG_HS_CLK_SLEEP_ENABLE() | |
| 2736 #define __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE() __HAL_RCC_USB1_OTG_HS_ULPI_CLK_SLEEP_ENABLE() | |
| 2737 #define __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE() __HAL_RCC_USB1_OTG_HS_CLK_SLEEP_DISABLE() | |
| 2738 #define __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE() __HAL_RCC_USB1_OTG_HS_ULPI_CLK_SLEEP_DISABLE() | |
| 2739 | |
| 2740 #define __HAL_RCC_USB_OTG_FS_CLK_ENABLE() __HAL_RCC_USB2_OTG_FS_CLK_ENABLE() | |
| 2741 #define __HAL_RCC_USB_OTG_FS_ULPI_CLK_ENABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_ENABLE() | |
| 2742 #define __HAL_RCC_USB_OTG_FS_CLK_DISABLE() __HAL_RCC_USB2_OTG_FS_CLK_DISABLE() | |
| 2743 #define __HAL_RCC_USB_OTG_FS_ULPI_CLK_DISABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_DISABLE() | |
| 2744 #define __HAL_RCC_USB_OTG_FS_FORCE_RESET() __HAL_RCC_USB2_OTG_FS_FORCE_RESET() | |
| 2745 #define __HAL_RCC_USB_OTG_FS_RELEASE_RESET() __HAL_RCC_USB2_OTG_FS_RELEASE_RESET() | |
| 2746 #define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE() __HAL_RCC_USB2_OTG_FS_CLK_SLEEP_ENABLE() | |
| 2747 #define __HAL_RCC_USB_OTG_FS_ULPI_CLK_SLEEP_ENABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_ENABLE() | |
| 2748 #define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE() __HAL_RCC_USB2_OTG_FS_CLK_SLEEP_DISABLE() | |
| 2749 #define __HAL_RCC_USB_OTG_FS_ULPI_CLK_SLEEP_DISABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_DISABLE() | |
| 2750 #endif | |
| 2751 | |
| 2752 #define __HAL_RCC_I2SCLK __HAL_RCC_I2S_CONFIG | |
| 2753 #define __HAL_RCC_I2SCLK_CONFIG __HAL_RCC_I2S_CONFIG | |
| 2754 | |
| 2755 #define __RCC_PLLSRC RCC_GET_PLL_OSCSOURCE | |
| 2756 | |
| 2757 #define IS_RCC_MSIRANGE IS_RCC_MSI_CLOCK_RANGE | |
| 2758 #define IS_RCC_RTCCLK_SOURCE IS_RCC_RTCCLKSOURCE | |
| 2759 #define IS_RCC_SYSCLK_DIV IS_RCC_HCLK | |
| 2760 #define IS_RCC_HCLK_DIV IS_RCC_PCLK | |
| 2761 #define IS_RCC_PERIPHCLK IS_RCC_PERIPHCLOCK | |
| 2762 | |
| 2763 #define RCC_IT_HSI14 RCC_IT_HSI14RDY | |
| 2764 | |
| 2765 #define RCC_IT_CSSLSE RCC_IT_LSECSS | |
| 2766 #define RCC_IT_CSSHSE RCC_IT_CSS | |
| 2767 | |
| 2768 #define RCC_PLLMUL_3 RCC_PLL_MUL3 | |
| 2769 #define RCC_PLLMUL_4 RCC_PLL_MUL4 | |
| 2770 #define RCC_PLLMUL_6 RCC_PLL_MUL6 | |
| 2771 #define RCC_PLLMUL_8 RCC_PLL_MUL8 | |
| 2772 #define RCC_PLLMUL_12 RCC_PLL_MUL12 | |
| 2773 #define RCC_PLLMUL_16 RCC_PLL_MUL16 | |
| 2774 #define RCC_PLLMUL_24 RCC_PLL_MUL24 | |
| 2775 #define RCC_PLLMUL_32 RCC_PLL_MUL32 | |
| 2776 #define RCC_PLLMUL_48 RCC_PLL_MUL48 | |
| 2777 | |
| 2778 #define RCC_PLLDIV_2 RCC_PLL_DIV2 | |
| 2779 #define RCC_PLLDIV_3 RCC_PLL_DIV3 | |
| 2780 #define RCC_PLLDIV_4 RCC_PLL_DIV4 | |
| 2781 | |
| 2782 #define IS_RCC_MCOSOURCE IS_RCC_MCO1SOURCE | |
| 2783 #define __HAL_RCC_MCO_CONFIG __HAL_RCC_MCO1_CONFIG | |
| 2784 #define RCC_MCO_NODIV RCC_MCODIV_1 | |
| 2785 #define RCC_MCO_DIV1 RCC_MCODIV_1 | |
| 2786 #define RCC_MCO_DIV2 RCC_MCODIV_2 | |
| 2787 #define RCC_MCO_DIV4 RCC_MCODIV_4 | |
| 2788 #define RCC_MCO_DIV8 RCC_MCODIV_8 | |
| 2789 #define RCC_MCO_DIV16 RCC_MCODIV_16 | |
| 2790 #define RCC_MCO_DIV32 RCC_MCODIV_32 | |
| 2791 #define RCC_MCO_DIV64 RCC_MCODIV_64 | |
| 2792 #define RCC_MCO_DIV128 RCC_MCODIV_128 | |
| 2793 #define RCC_MCOSOURCE_NONE RCC_MCO1SOURCE_NOCLOCK | |
| 2794 #define RCC_MCOSOURCE_LSI RCC_MCO1SOURCE_LSI | |
| 2795 #define RCC_MCOSOURCE_LSE RCC_MCO1SOURCE_LSE | |
| 2796 #define RCC_MCOSOURCE_SYSCLK RCC_MCO1SOURCE_SYSCLK | |
| 2797 #define RCC_MCOSOURCE_HSI RCC_MCO1SOURCE_HSI | |
| 2798 #define RCC_MCOSOURCE_HSI14 RCC_MCO1SOURCE_HSI14 | |
| 2799 #define RCC_MCOSOURCE_HSI48 RCC_MCO1SOURCE_HSI48 | |
| 2800 #define RCC_MCOSOURCE_HSE RCC_MCO1SOURCE_HSE | |
| 2801 #define RCC_MCOSOURCE_PLLCLK_DIV1 RCC_MCO1SOURCE_PLLCLK | |
| 2802 #define RCC_MCOSOURCE_PLLCLK_NODIV RCC_MCO1SOURCE_PLLCLK | |
| 2803 #define RCC_MCOSOURCE_PLLCLK_DIV2 RCC_MCO1SOURCE_PLLCLK_DIV2 | |
| 2804 | |
| 2805 #if defined(STM32L4) | |
| 2806 #define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE | |
| 2807 #elif defined(STM32WB) || defined(STM32G0) | |
| 2808 #else | |
| 2809 #define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK | |
| 2810 #endif | |
| 2811 | |
| 2812 #define RCC_USBCLK_PLLSAI1 RCC_USBCLKSOURCE_PLLSAI1 | |
| 2813 #define RCC_USBCLK_PLL RCC_USBCLKSOURCE_PLL | |
| 2814 #define RCC_USBCLK_MSI RCC_USBCLKSOURCE_MSI | |
| 2815 #define RCC_USBCLKSOURCE_PLLCLK RCC_USBCLKSOURCE_PLL | |
| 2816 #define RCC_USBPLLCLK_DIV1 RCC_USBCLKSOURCE_PLL | |
| 2817 #define RCC_USBPLLCLK_DIV1_5 RCC_USBCLKSOURCE_PLL_DIV1_5 | |
| 2818 #define RCC_USBPLLCLK_DIV2 RCC_USBCLKSOURCE_PLL_DIV2 | |
| 2819 #define RCC_USBPLLCLK_DIV3 RCC_USBCLKSOURCE_PLL_DIV3 | |
| 2820 | |
| 2821 #define HSION_BitNumber RCC_HSION_BIT_NUMBER | |
| 2822 #define HSION_BITNUMBER RCC_HSION_BIT_NUMBER | |
| 2823 #define HSEON_BitNumber RCC_HSEON_BIT_NUMBER | |
| 2824 #define HSEON_BITNUMBER RCC_HSEON_BIT_NUMBER | |
| 2825 #define MSION_BITNUMBER RCC_MSION_BIT_NUMBER | |
| 2826 #define CSSON_BitNumber RCC_CSSON_BIT_NUMBER | |
| 2827 #define CSSON_BITNUMBER RCC_CSSON_BIT_NUMBER | |
| 2828 #define PLLON_BitNumber RCC_PLLON_BIT_NUMBER | |
| 2829 #define PLLON_BITNUMBER RCC_PLLON_BIT_NUMBER | |
| 2830 #define PLLI2SON_BitNumber RCC_PLLI2SON_BIT_NUMBER | |
| 2831 #define I2SSRC_BitNumber RCC_I2SSRC_BIT_NUMBER | |
| 2832 #define RTCEN_BitNumber RCC_RTCEN_BIT_NUMBER | |
| 2833 #define RTCEN_BITNUMBER RCC_RTCEN_BIT_NUMBER | |
| 2834 #define BDRST_BitNumber RCC_BDRST_BIT_NUMBER | |
| 2835 #define BDRST_BITNUMBER RCC_BDRST_BIT_NUMBER | |
| 2836 #define RTCRST_BITNUMBER RCC_RTCRST_BIT_NUMBER | |
| 2837 #define LSION_BitNumber RCC_LSION_BIT_NUMBER | |
| 2838 #define LSION_BITNUMBER RCC_LSION_BIT_NUMBER | |
| 2839 #define LSEON_BitNumber RCC_LSEON_BIT_NUMBER | |
| 2840 #define LSEON_BITNUMBER RCC_LSEON_BIT_NUMBER | |
| 2841 #define LSEBYP_BITNUMBER RCC_LSEBYP_BIT_NUMBER | |
| 2842 #define PLLSAION_BitNumber RCC_PLLSAION_BIT_NUMBER | |
| 2843 #define TIMPRE_BitNumber RCC_TIMPRE_BIT_NUMBER | |
| 2844 #define RMVF_BitNumber RCC_RMVF_BIT_NUMBER | |
| 2845 #define RMVF_BITNUMBER RCC_RMVF_BIT_NUMBER | |
| 2846 #define RCC_CR2_HSI14TRIM_BitNumber RCC_HSI14TRIM_BIT_NUMBER | |
| 2847 #define CR_BYTE2_ADDRESS RCC_CR_BYTE2_ADDRESS | |
| 2848 #define CIR_BYTE1_ADDRESS RCC_CIR_BYTE1_ADDRESS | |
| 2849 #define CIR_BYTE2_ADDRESS RCC_CIR_BYTE2_ADDRESS | |
| 2850 #define BDCR_BYTE0_ADDRESS RCC_BDCR_BYTE0_ADDRESS | |
| 2851 #define DBP_TIMEOUT_VALUE RCC_DBP_TIMEOUT_VALUE | |
| 2852 #define LSE_TIMEOUT_VALUE RCC_LSE_TIMEOUT_VALUE | |
| 2853 | |
| 2854 #define CR_HSION_BB RCC_CR_HSION_BB | |
| 2855 #define CR_CSSON_BB RCC_CR_CSSON_BB | |
| 2856 #define CR_PLLON_BB RCC_CR_PLLON_BB | |
| 2857 #define CR_PLLI2SON_BB RCC_CR_PLLI2SON_BB | |
| 2858 #define CR_MSION_BB RCC_CR_MSION_BB | |
| 2859 #define CSR_LSION_BB RCC_CSR_LSION_BB | |
| 2860 #define CSR_LSEON_BB RCC_CSR_LSEON_BB | |
| 2861 #define CSR_LSEBYP_BB RCC_CSR_LSEBYP_BB | |
| 2862 #define CSR_RTCEN_BB RCC_CSR_RTCEN_BB | |
| 2863 #define CSR_RTCRST_BB RCC_CSR_RTCRST_BB | |
| 2864 #define CFGR_I2SSRC_BB RCC_CFGR_I2SSRC_BB | |
| 2865 #define BDCR_RTCEN_BB RCC_BDCR_RTCEN_BB | |
| 2866 #define BDCR_BDRST_BB RCC_BDCR_BDRST_BB | |
| 2867 #define CR_HSEON_BB RCC_CR_HSEON_BB | |
| 2868 #define CSR_RMVF_BB RCC_CSR_RMVF_BB | |
| 2869 #define CR_PLLSAION_BB RCC_CR_PLLSAION_BB | |
| 2870 #define DCKCFGR_TIMPRE_BB RCC_DCKCFGR_TIMPRE_BB | |
| 2871 | |
| 2872 #define __HAL_RCC_CRS_ENABLE_FREQ_ERROR_COUNTER __HAL_RCC_CRS_FREQ_ERROR_COUNTER_ENABLE | |
| 2873 #define __HAL_RCC_CRS_DISABLE_FREQ_ERROR_COUNTER __HAL_RCC_CRS_FREQ_ERROR_COUNTER_DISABLE | |
| 2874 #define __HAL_RCC_CRS_ENABLE_AUTOMATIC_CALIB __HAL_RCC_CRS_AUTOMATIC_CALIB_ENABLE | |
| 2875 #define __HAL_RCC_CRS_DISABLE_AUTOMATIC_CALIB __HAL_RCC_CRS_AUTOMATIC_CALIB_DISABLE | |
| 2876 #define __HAL_RCC_CRS_CALCULATE_RELOADVALUE __HAL_RCC_CRS_RELOADVALUE_CALCULATE | |
| 2877 | |
| 2878 #define __HAL_RCC_GET_IT_SOURCE __HAL_RCC_GET_IT | |
| 2879 | |
| 2880 #define RCC_CRS_SYNCWARM RCC_CRS_SYNCWARN | |
| 2881 #define RCC_CRS_TRIMOV RCC_CRS_TRIMOVF | |
| 2882 | |
| 2883 #define RCC_PERIPHCLK_CK48 RCC_PERIPHCLK_CLK48 | |
| 2884 #define RCC_CK48CLKSOURCE_PLLQ RCC_CLK48CLKSOURCE_PLLQ | |
| 2885 #define RCC_CK48CLKSOURCE_PLLSAIP RCC_CLK48CLKSOURCE_PLLSAIP | |
| 2886 #define RCC_CK48CLKSOURCE_PLLI2SQ RCC_CLK48CLKSOURCE_PLLI2SQ | |
| 2887 #define IS_RCC_CK48CLKSOURCE IS_RCC_CLK48CLKSOURCE | |
| 2888 #define RCC_SDIOCLKSOURCE_CK48 RCC_SDIOCLKSOURCE_CLK48 | |
| 2889 | |
| 2890 #define __HAL_RCC_DFSDM_CLK_ENABLE __HAL_RCC_DFSDM1_CLK_ENABLE | |
| 2891 #define __HAL_RCC_DFSDM_CLK_DISABLE __HAL_RCC_DFSDM1_CLK_DISABLE | |
| 2892 #define __HAL_RCC_DFSDM_IS_CLK_ENABLED __HAL_RCC_DFSDM1_IS_CLK_ENABLED | |
| 2893 #define __HAL_RCC_DFSDM_IS_CLK_DISABLED __HAL_RCC_DFSDM1_IS_CLK_DISABLED | |
| 2894 #define __HAL_RCC_DFSDM_FORCE_RESET __HAL_RCC_DFSDM1_FORCE_RESET | |
| 2895 #define __HAL_RCC_DFSDM_RELEASE_RESET __HAL_RCC_DFSDM1_RELEASE_RESET | |
| 2896 #define __HAL_RCC_DFSDM_CLK_SLEEP_ENABLE __HAL_RCC_DFSDM1_CLK_SLEEP_ENABLE | |
| 2897 #define __HAL_RCC_DFSDM_CLK_SLEEP_DISABLE __HAL_RCC_DFSDM1_CLK_SLEEP_DISABLE | |
| 2898 #define __HAL_RCC_DFSDM_IS_CLK_SLEEP_ENABLED __HAL_RCC_DFSDM1_IS_CLK_SLEEP_ENABLED | |
| 2899 #define __HAL_RCC_DFSDM_IS_CLK_SLEEP_DISABLED __HAL_RCC_DFSDM1_IS_CLK_SLEEP_DISABLED | |
| 2900 #define DfsdmClockSelection Dfsdm1ClockSelection | |
| 2901 #define RCC_PERIPHCLK_DFSDM RCC_PERIPHCLK_DFSDM1 | |
| 2902 #define RCC_DFSDMCLKSOURCE_PCLK RCC_DFSDM1CLKSOURCE_PCLK2 | |
| 2903 #define RCC_DFSDMCLKSOURCE_SYSCLK RCC_DFSDM1CLKSOURCE_SYSCLK | |
| 2904 #define __HAL_RCC_DFSDM_CONFIG __HAL_RCC_DFSDM1_CONFIG | |
| 2905 #define __HAL_RCC_GET_DFSDM_SOURCE __HAL_RCC_GET_DFSDM1_SOURCE | |
| 2906 #define RCC_DFSDM1CLKSOURCE_PCLK RCC_DFSDM1CLKSOURCE_PCLK2 | |
| 2907 #define RCC_SWPMI1CLKSOURCE_PCLK RCC_SWPMI1CLKSOURCE_PCLK1 | |
| 2908 #define RCC_LPTIM1CLKSOURCE_PCLK RCC_LPTIM1CLKSOURCE_PCLK1 | |
| 2909 #define RCC_LPTIM2CLKSOURCE_PCLK RCC_LPTIM2CLKSOURCE_PCLK1 | |
| 2910 | |
| 2911 #define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB1 RCC_DFSDM1AUDIOCLKSOURCE_I2S1 | |
| 2912 #define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB2 RCC_DFSDM1AUDIOCLKSOURCE_I2S2 | |
| 2913 #define RCC_DFSDM2AUDIOCLKSOURCE_I2SAPB1 RCC_DFSDM2AUDIOCLKSOURCE_I2S1 | |
| 2914 #define RCC_DFSDM2AUDIOCLKSOURCE_I2SAPB2 RCC_DFSDM2AUDIOCLKSOURCE_I2S2 | |
| 2915 #define RCC_DFSDM1CLKSOURCE_APB2 RCC_DFSDM1CLKSOURCE_PCLK2 | |
| 2916 #define RCC_DFSDM2CLKSOURCE_APB2 RCC_DFSDM2CLKSOURCE_PCLK2 | |
| 2917 #define RCC_FMPI2C1CLKSOURCE_APB RCC_FMPI2C1CLKSOURCE_PCLK1 | |
| 2918 | |
| 2919 /** | |
| 2920 * @} | |
| 2921 */ | |
| 2922 | |
| 2923 /** @defgroup HAL_RNG_Aliased_Macros HAL RNG Aliased Macros maintained for legacy purpose | |
| 2924 * @{ | |
| 2925 */ | |
| 2926 #define HAL_RNG_ReadyCallback(__HANDLE__) HAL_RNG_ReadyDataCallback((__HANDLE__), uint32_t random32bit) | |
| 2927 | |
| 2928 /** | |
| 2929 * @} | |
| 2930 */ | |
| 2931 | |
| 2932 /** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose | |
| 2933 * @{ | |
| 2934 */ | |
| 2935 #if defined (STM32G0) | |
| 2936 #else | |
| 2937 #define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG | |
| 2938 #endif | |
| 2939 #define __HAL_RTC_DISABLE_IT __HAL_RTC_EXTI_DISABLE_IT | |
| 2940 #define __HAL_RTC_ENABLE_IT __HAL_RTC_EXTI_ENABLE_IT | |
| 2941 | |
| 2942 #if defined (STM32F1) | |
| 2943 #define __HAL_RTC_EXTI_CLEAR_FLAG(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_CLEAR_FLAG() | |
| 2944 | |
| 2945 #define __HAL_RTC_EXTI_ENABLE_IT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_ENABLE_IT() | |
| 2946 | |
| 2947 #define __HAL_RTC_EXTI_DISABLE_IT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_DISABLE_IT() | |
| 2948 | |
| 2949 #define __HAL_RTC_EXTI_GET_FLAG(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_GET_FLAG() | |
| 2950 | |
| 2951 #define __HAL_RTC_EXTI_GENERATE_SWIT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_GENERATE_SWIT() | |
| 2952 #else | |
| 2953 #define __HAL_RTC_EXTI_CLEAR_FLAG(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_CLEAR_FLAG() : \ | |
| 2954 (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG() : \ | |
| 2955 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG())) | |
| 2956 #define __HAL_RTC_EXTI_ENABLE_IT(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_ENABLE_IT() : \ | |
| 2957 (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT() : \ | |
| 2958 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT())) | |
| 2959 #define __HAL_RTC_EXTI_DISABLE_IT(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_DISABLE_IT() : \ | |
| 2960 (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_IT() : \ | |
| 2961 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_IT())) | |
| 2962 #define __HAL_RTC_EXTI_GET_FLAG(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_GET_FLAG() : \ | |
| 2963 (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_GET_FLAG() : \ | |
| 2964 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GET_FLAG())) | |
| 2965 #define __HAL_RTC_EXTI_GENERATE_SWIT(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_GENERATE_SWIT() : \ | |
| 2966 (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_GENERATE_SWIT() : \ | |
| 2967 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GENERATE_SWIT())) | |
| 2968 #endif /* STM32F1 */ | |
| 2969 | |
| 2970 #define IS_ALARM IS_RTC_ALARM | |
| 2971 #define IS_ALARM_MASK IS_RTC_ALARM_MASK | |
| 2972 #define IS_TAMPER IS_RTC_TAMPER | |
| 2973 #define IS_TAMPER_ERASE_MODE IS_RTC_TAMPER_ERASE_MODE | |
| 2974 #define IS_TAMPER_FILTER IS_RTC_TAMPER_FILTER | |
| 2975 #define IS_TAMPER_INTERRUPT IS_RTC_TAMPER_INTERRUPT | |
| 2976 #define IS_TAMPER_MASKFLAG_STATE IS_RTC_TAMPER_MASKFLAG_STATE | |
| 2977 #define IS_TAMPER_PRECHARGE_DURATION IS_RTC_TAMPER_PRECHARGE_DURATION | |
| 2978 #define IS_TAMPER_PULLUP_STATE IS_RTC_TAMPER_PULLUP_STATE | |
| 2979 #define IS_TAMPER_SAMPLING_FREQ IS_RTC_TAMPER_SAMPLING_FREQ | |
| 2980 #define IS_TAMPER_TIMESTAMPONTAMPER_DETECTION IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION | |
| 2981 #define IS_TAMPER_TRIGGER IS_RTC_TAMPER_TRIGGER | |
| 2982 #define IS_WAKEUP_CLOCK IS_RTC_WAKEUP_CLOCK | |
| 2983 #define IS_WAKEUP_COUNTER IS_RTC_WAKEUP_COUNTER | |
| 2984 | |
| 2985 #define __RTC_WRITEPROTECTION_ENABLE __HAL_RTC_WRITEPROTECTION_ENABLE | |
| 2986 #define __RTC_WRITEPROTECTION_DISABLE __HAL_RTC_WRITEPROTECTION_DISABLE | |
| 2987 | |
| 2988 /** | |
| 2989 * @} | |
| 2990 */ | |
| 2991 | |
| 2992 /** @defgroup HAL_SD_Aliased_Macros HAL SD Aliased Macros maintained for legacy purpose | |
| 2993 * @{ | |
| 2994 */ | |
| 2995 | |
| 2996 #define SD_OCR_CID_CSD_OVERWRIETE SD_OCR_CID_CSD_OVERWRITE | |
| 2997 #define SD_CMD_SD_APP_STAUS SD_CMD_SD_APP_STATUS | |
| 2998 | |
| 2999 #if defined(STM32F4) || defined(STM32F2) | |
| 3000 #define SD_SDMMC_DISABLED SD_SDIO_DISABLED | |
| 3001 #define SD_SDMMC_FUNCTION_BUSY SD_SDIO_FUNCTION_BUSY | |
| 3002 #define SD_SDMMC_FUNCTION_FAILED SD_SDIO_FUNCTION_FAILED | |
| 3003 #define SD_SDMMC_UNKNOWN_FUNCTION SD_SDIO_UNKNOWN_FUNCTION | |
| 3004 #define SD_CMD_SDMMC_SEN_OP_COND SD_CMD_SDIO_SEN_OP_COND | |
| 3005 #define SD_CMD_SDMMC_RW_DIRECT SD_CMD_SDIO_RW_DIRECT | |
| 3006 #define SD_CMD_SDMMC_RW_EXTENDED SD_CMD_SDIO_RW_EXTENDED | |
| 3007 #define __HAL_SD_SDMMC_ENABLE __HAL_SD_SDIO_ENABLE | |
| 3008 #define __HAL_SD_SDMMC_DISABLE __HAL_SD_SDIO_DISABLE | |
| 3009 #define __HAL_SD_SDMMC_DMA_ENABLE __HAL_SD_SDIO_DMA_ENABLE | |
| 3010 #define __HAL_SD_SDMMC_DMA_DISABLE __HAL_SD_SDIO_DMA_DISABL | |
| 3011 #define __HAL_SD_SDMMC_ENABLE_IT __HAL_SD_SDIO_ENABLE_IT | |
| 3012 #define __HAL_SD_SDMMC_DISABLE_IT __HAL_SD_SDIO_DISABLE_IT | |
| 3013 #define __HAL_SD_SDMMC_GET_FLAG __HAL_SD_SDIO_GET_FLAG | |
| 3014 #define __HAL_SD_SDMMC_CLEAR_FLAG __HAL_SD_SDIO_CLEAR_FLAG | |
| 3015 #define __HAL_SD_SDMMC_GET_IT __HAL_SD_SDIO_GET_IT | |
| 3016 #define __HAL_SD_SDMMC_CLEAR_IT __HAL_SD_SDIO_CLEAR_IT | |
| 3017 #define SDMMC_STATIC_FLAGS SDIO_STATIC_FLAGS | |
| 3018 #define SDMMC_CMD0TIMEOUT SDIO_CMD0TIMEOUT | |
| 3019 #define SD_SDMMC_SEND_IF_COND SD_SDIO_SEND_IF_COND | |
| 3020 /* alias CMSIS */ | |
| 3021 #define SDMMC1_IRQn SDIO_IRQn | |
| 3022 #define SDMMC1_IRQHandler SDIO_IRQHandler | |
| 3023 #endif | |
| 3024 | |
| 3025 #if defined(STM32F7) || defined(STM32L4) | |
| 3026 #define SD_SDIO_DISABLED SD_SDMMC_DISABLED | |
| 3027 #define SD_SDIO_FUNCTION_BUSY SD_SDMMC_FUNCTION_BUSY | |
| 3028 #define SD_SDIO_FUNCTION_FAILED SD_SDMMC_FUNCTION_FAILED | |
| 3029 #define SD_SDIO_UNKNOWN_FUNCTION SD_SDMMC_UNKNOWN_FUNCTION | |
| 3030 #define SD_CMD_SDIO_SEN_OP_COND SD_CMD_SDMMC_SEN_OP_COND | |
| 3031 #define SD_CMD_SDIO_RW_DIRECT SD_CMD_SDMMC_RW_DIRECT | |
| 3032 #define SD_CMD_SDIO_RW_EXTENDED SD_CMD_SDMMC_RW_EXTENDED | |
| 3033 #define __HAL_SD_SDIO_ENABLE __HAL_SD_SDMMC_ENABLE | |
| 3034 #define __HAL_SD_SDIO_DISABLE __HAL_SD_SDMMC_DISABLE | |
| 3035 #define __HAL_SD_SDIO_DMA_ENABLE __HAL_SD_SDMMC_DMA_ENABLE | |
| 3036 #define __HAL_SD_SDIO_DMA_DISABL __HAL_SD_SDMMC_DMA_DISABLE | |
| 3037 #define __HAL_SD_SDIO_ENABLE_IT __HAL_SD_SDMMC_ENABLE_IT | |
| 3038 #define __HAL_SD_SDIO_DISABLE_IT __HAL_SD_SDMMC_DISABLE_IT | |
| 3039 #define __HAL_SD_SDIO_GET_FLAG __HAL_SD_SDMMC_GET_FLAG | |
| 3040 #define __HAL_SD_SDIO_CLEAR_FLAG __HAL_SD_SDMMC_CLEAR_FLAG | |
| 3041 #define __HAL_SD_SDIO_GET_IT __HAL_SD_SDMMC_GET_IT | |
| 3042 #define __HAL_SD_SDIO_CLEAR_IT __HAL_SD_SDMMC_CLEAR_IT | |
| 3043 #define SDIO_STATIC_FLAGS SDMMC_STATIC_FLAGS | |
| 3044 #define SDIO_CMD0TIMEOUT SDMMC_CMD0TIMEOUT | |
| 3045 #define SD_SDIO_SEND_IF_COND SD_SDMMC_SEND_IF_COND | |
| 3046 /* alias CMSIS for compatibilities */ | |
| 3047 #define SDIO_IRQn SDMMC1_IRQn | |
| 3048 #define SDIO_IRQHandler SDMMC1_IRQHandler | |
| 3049 #endif | |
| 3050 | |
| 3051 #if defined(STM32F7) || defined(STM32F4) || defined(STM32F2) | |
| 3052 #define HAL_SD_CardCIDTypedef HAL_SD_CardCIDTypeDef | |
| 3053 #define HAL_SD_CardCSDTypedef HAL_SD_CardCSDTypeDef | |
| 3054 #define HAL_SD_CardStatusTypedef HAL_SD_CardStatusTypeDef | |
| 3055 #define HAL_SD_CardStateTypedef HAL_SD_CardStateTypeDef | |
| 3056 #endif | |
| 3057 | |
| 3058 #if defined(STM32H7) | |
| 3059 #define HAL_MMCEx_Read_DMADoubleBuffer0CpltCallback HAL_MMCEx_Read_DMADoubleBuf0CpltCallback | |
| 3060 #define HAL_MMCEx_Read_DMADoubleBuffer1CpltCallback HAL_MMCEx_Read_DMADoubleBuf1CpltCallback | |
| 3061 #define HAL_MMCEx_Write_DMADoubleBuffer0CpltCallback HAL_MMCEx_Write_DMADoubleBuf0CpltCallback | |
| 3062 #define HAL_MMCEx_Write_DMADoubleBuffer1CpltCallback HAL_MMCEx_Write_DMADoubleBuf1CpltCallback | |
| 3063 #define HAL_SDEx_Read_DMADoubleBuffer0CpltCallback HAL_SDEx_Read_DMADoubleBuf0CpltCallback | |
| 3064 #define HAL_SDEx_Read_DMADoubleBuffer1CpltCallback HAL_SDEx_Read_DMADoubleBuf1CpltCallback | |
| 3065 #define HAL_SDEx_Write_DMADoubleBuffer0CpltCallback HAL_SDEx_Write_DMADoubleBuf0CpltCallback | |
| 3066 #define HAL_SDEx_Write_DMADoubleBuffer1CpltCallback HAL_SDEx_Write_DMADoubleBuf1CpltCallback | |
| 3067 #endif | |
| 3068 /** | |
| 3069 * @} | |
| 3070 */ | |
| 3071 | |
| 3072 /** @defgroup HAL_SMARTCARD_Aliased_Macros HAL SMARTCARD Aliased Macros maintained for legacy purpose | |
| 3073 * @{ | |
| 3074 */ | |
| 3075 | |
| 3076 #define __SMARTCARD_ENABLE_IT __HAL_SMARTCARD_ENABLE_IT | |
| 3077 #define __SMARTCARD_DISABLE_IT __HAL_SMARTCARD_DISABLE_IT | |
| 3078 #define __SMARTCARD_ENABLE __HAL_SMARTCARD_ENABLE | |
| 3079 #define __SMARTCARD_DISABLE __HAL_SMARTCARD_DISABLE | |
| 3080 #define __SMARTCARD_DMA_REQUEST_ENABLE __HAL_SMARTCARD_DMA_REQUEST_ENABLE | |
| 3081 #define __SMARTCARD_DMA_REQUEST_DISABLE __HAL_SMARTCARD_DMA_REQUEST_DISABLE | |
| 3082 | |
| 3083 #define __HAL_SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE | |
| 3084 #define __SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE | |
| 3085 | |
| 3086 #define IS_SMARTCARD_ONEBIT_SAMPLING IS_SMARTCARD_ONE_BIT_SAMPLE | |
| 3087 | |
| 3088 /** | |
| 3089 * @} | |
| 3090 */ | |
| 3091 | |
| 3092 /** @defgroup HAL_SMBUS_Aliased_Macros HAL SMBUS Aliased Macros maintained for legacy purpose | |
| 3093 * @{ | |
| 3094 */ | |
| 3095 #define __HAL_SMBUS_RESET_CR1 SMBUS_RESET_CR1 | |
| 3096 #define __HAL_SMBUS_RESET_CR2 SMBUS_RESET_CR2 | |
| 3097 #define __HAL_SMBUS_GENERATE_START SMBUS_GENERATE_START | |
| 3098 #define __HAL_SMBUS_GET_ADDR_MATCH SMBUS_GET_ADDR_MATCH | |
| 3099 #define __HAL_SMBUS_GET_DIR SMBUS_GET_DIR | |
| 3100 #define __HAL_SMBUS_GET_STOP_MODE SMBUS_GET_STOP_MODE | |
| 3101 #define __HAL_SMBUS_GET_PEC_MODE SMBUS_GET_PEC_MODE | |
| 3102 #define __HAL_SMBUS_GET_ALERT_ENABLED SMBUS_GET_ALERT_ENABLED | |
| 3103 /** | |
| 3104 * @} | |
| 3105 */ | |
| 3106 | |
| 3107 /** @defgroup HAL_SPI_Aliased_Macros HAL SPI Aliased Macros maintained for legacy purpose | |
| 3108 * @{ | |
| 3109 */ | |
| 3110 | |
| 3111 #define __HAL_SPI_1LINE_TX SPI_1LINE_TX | |
| 3112 #define __HAL_SPI_1LINE_RX SPI_1LINE_RX | |
| 3113 #define __HAL_SPI_RESET_CRC SPI_RESET_CRC | |
| 3114 | |
| 3115 /** | |
| 3116 * @} | |
| 3117 */ | |
| 3118 | |
| 3119 /** @defgroup HAL_UART_Aliased_Macros HAL UART Aliased Macros maintained for legacy purpose | |
| 3120 * @{ | |
| 3121 */ | |
| 3122 | |
| 3123 #define __HAL_UART_GETCLOCKSOURCE UART_GETCLOCKSOURCE | |
| 3124 #define __HAL_UART_MASK_COMPUTATION UART_MASK_COMPUTATION | |
| 3125 #define __UART_GETCLOCKSOURCE UART_GETCLOCKSOURCE | |
| 3126 #define __UART_MASK_COMPUTATION UART_MASK_COMPUTATION | |
| 3127 | |
| 3128 #define IS_UART_WAKEUPMETHODE IS_UART_WAKEUPMETHOD | |
| 3129 | |
| 3130 #define IS_UART_ONEBIT_SAMPLE IS_UART_ONE_BIT_SAMPLE | |
| 3131 #define IS_UART_ONEBIT_SAMPLING IS_UART_ONE_BIT_SAMPLE | |
| 3132 | |
| 3133 /** | |
| 3134 * @} | |
| 3135 */ | |
| 3136 | |
| 3137 | |
| 3138 /** @defgroup HAL_USART_Aliased_Macros HAL USART Aliased Macros maintained for legacy purpose | |
| 3139 * @{ | |
| 3140 */ | |
| 3141 | |
| 3142 #define __USART_ENABLE_IT __HAL_USART_ENABLE_IT | |
| 3143 #define __USART_DISABLE_IT __HAL_USART_DISABLE_IT | |
| 3144 #define __USART_ENABLE __HAL_USART_ENABLE | |
| 3145 #define __USART_DISABLE __HAL_USART_DISABLE | |
| 3146 | |
| 3147 #define __HAL_USART_GETCLOCKSOURCE USART_GETCLOCKSOURCE | |
| 3148 #define __USART_GETCLOCKSOURCE USART_GETCLOCKSOURCE | |
| 3149 | |
| 3150 /** | |
| 3151 * @} | |
| 3152 */ | |
| 3153 | |
| 3154 /** @defgroup HAL_USB_Aliased_Macros HAL USB Aliased Macros maintained for legacy purpose | |
| 3155 * @{ | |
| 3156 */ | |
| 3157 #define USB_EXTI_LINE_WAKEUP USB_WAKEUP_EXTI_LINE | |
| 3158 | |
| 3159 #define USB_FS_EXTI_TRIGGER_RISING_EDGE USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE | |
| 3160 #define USB_FS_EXTI_TRIGGER_FALLING_EDGE USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE | |
| 3161 #define USB_FS_EXTI_TRIGGER_BOTH_EDGE USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE | |
| 3162 #define USB_FS_EXTI_LINE_WAKEUP USB_OTG_FS_WAKEUP_EXTI_LINE | |
| 3163 | |
| 3164 #define USB_HS_EXTI_TRIGGER_RISING_EDGE USB_OTG_HS_WAKEUP_EXTI_RISING_EDGE | |
| 3165 #define USB_HS_EXTI_TRIGGER_FALLING_EDGE USB_OTG_HS_WAKEUP_EXTI_FALLING_EDGE | |
| 3166 #define USB_HS_EXTI_TRIGGER_BOTH_EDGE USB_OTG_HS_WAKEUP_EXTI_RISING_FALLING_EDGE | |
| 3167 #define USB_HS_EXTI_LINE_WAKEUP USB_OTG_HS_WAKEUP_EXTI_LINE | |
| 3168 | |
| 3169 #define __HAL_USB_EXTI_ENABLE_IT __HAL_USB_WAKEUP_EXTI_ENABLE_IT | |
| 3170 #define __HAL_USB_EXTI_DISABLE_IT __HAL_USB_WAKEUP_EXTI_DISABLE_IT | |
| 3171 #define __HAL_USB_EXTI_GET_FLAG __HAL_USB_WAKEUP_EXTI_GET_FLAG | |
| 3172 #define __HAL_USB_EXTI_CLEAR_FLAG __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG | |
| 3173 #define __HAL_USB_EXTI_SET_RISING_EDGE_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE | |
| 3174 #define __HAL_USB_EXTI_SET_FALLING_EDGE_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE | |
| 3175 #define __HAL_USB_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE | |
| 3176 | |
| 3177 #define __HAL_USB_FS_EXTI_ENABLE_IT __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT | |
| 3178 #define __HAL_USB_FS_EXTI_DISABLE_IT __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT | |
| 3179 #define __HAL_USB_FS_EXTI_GET_FLAG __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG | |
| 3180 #define __HAL_USB_FS_EXTI_CLEAR_FLAG __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG | |
| 3181 #define __HAL_USB_FS_EXTI_SET_RISING_EGDE_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE | |
| 3182 #define __HAL_USB_FS_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE | |
| 3183 #define __HAL_USB_FS_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE | |
| 3184 #define __HAL_USB_FS_EXTI_GENERATE_SWIT __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT | |
| 3185 | |
| 3186 #define __HAL_USB_HS_EXTI_ENABLE_IT __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_IT | |
| 3187 #define __HAL_USB_HS_EXTI_DISABLE_IT __HAL_USB_OTG_HS_WAKEUP_EXTI_DISABLE_IT | |
| 3188 #define __HAL_USB_HS_EXTI_GET_FLAG __HAL_USB_OTG_HS_WAKEUP_EXTI_GET_FLAG | |
| 3189 #define __HAL_USB_HS_EXTI_CLEAR_FLAG __HAL_USB_OTG_HS_WAKEUP_EXTI_CLEAR_FLAG | |
| 3190 #define __HAL_USB_HS_EXTI_SET_RISING_EGDE_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_EDGE | |
| 3191 #define __HAL_USB_HS_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_FALLING_EDGE | |
| 3192 #define __HAL_USB_HS_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE | |
| 3193 #define __HAL_USB_HS_EXTI_GENERATE_SWIT __HAL_USB_OTG_HS_WAKEUP_EXTI_GENERATE_SWIT | |
| 3194 | |
| 3195 #define HAL_PCD_ActiveRemoteWakeup HAL_PCD_ActivateRemoteWakeup | |
| 3196 #define HAL_PCD_DeActiveRemoteWakeup HAL_PCD_DeActivateRemoteWakeup | |
| 3197 | |
| 3198 #define HAL_PCD_SetTxFiFo HAL_PCDEx_SetTxFiFo | |
| 3199 #define HAL_PCD_SetRxFiFo HAL_PCDEx_SetRxFiFo | |
| 3200 /** | |
| 3201 * @} | |
| 3202 */ | |
| 3203 | |
| 3204 /** @defgroup HAL_TIM_Aliased_Macros HAL TIM Aliased Macros maintained for legacy purpose | |
| 3205 * @{ | |
| 3206 */ | |
| 3207 #define __HAL_TIM_SetICPrescalerValue TIM_SET_ICPRESCALERVALUE | |
| 3208 #define __HAL_TIM_ResetICPrescalerValue TIM_RESET_ICPRESCALERVALUE | |
| 3209 | |
| 3210 #define TIM_GET_ITSTATUS __HAL_TIM_GET_IT_SOURCE | |
| 3211 #define TIM_GET_CLEAR_IT __HAL_TIM_CLEAR_IT | |
| 3212 | |
| 3213 #define __HAL_TIM_GET_ITSTATUS __HAL_TIM_GET_IT_SOURCE | |
| 3214 | |
| 3215 #define __HAL_TIM_DIRECTION_STATUS __HAL_TIM_IS_TIM_COUNTING_DOWN | |
| 3216 #define __HAL_TIM_PRESCALER __HAL_TIM_SET_PRESCALER | |
| 3217 #define __HAL_TIM_SetCounter __HAL_TIM_SET_COUNTER | |
| 3218 #define __HAL_TIM_GetCounter __HAL_TIM_GET_COUNTER | |
| 3219 #define __HAL_TIM_SetAutoreload __HAL_TIM_SET_AUTORELOAD | |
| 3220 #define __HAL_TIM_GetAutoreload __HAL_TIM_GET_AUTORELOAD | |
| 3221 #define __HAL_TIM_SetClockDivision __HAL_TIM_SET_CLOCKDIVISION | |
| 3222 #define __HAL_TIM_GetClockDivision __HAL_TIM_GET_CLOCKDIVISION | |
| 3223 #define __HAL_TIM_SetICPrescaler __HAL_TIM_SET_ICPRESCALER | |
| 3224 #define __HAL_TIM_GetICPrescaler __HAL_TIM_GET_ICPRESCALER | |
| 3225 #define __HAL_TIM_SetCompare __HAL_TIM_SET_COMPARE | |
| 3226 #define __HAL_TIM_GetCompare __HAL_TIM_GET_COMPARE | |
| 3227 | |
| 3228 #define TIM_BREAKINPUTSOURCE_DFSDM TIM_BREAKINPUTSOURCE_DFSDM1 | |
| 3229 /** | |
| 3230 * @} | |
| 3231 */ | |
| 3232 | |
| 3233 /** @defgroup HAL_ETH_Aliased_Macros HAL ETH Aliased Macros maintained for legacy purpose | |
| 3234 * @{ | |
| 3235 */ | |
| 3236 | |
| 3237 #define __HAL_ETH_EXTI_ENABLE_IT __HAL_ETH_WAKEUP_EXTI_ENABLE_IT | |
| 3238 #define __HAL_ETH_EXTI_DISABLE_IT __HAL_ETH_WAKEUP_EXTI_DISABLE_IT | |
| 3239 #define __HAL_ETH_EXTI_GET_FLAG __HAL_ETH_WAKEUP_EXTI_GET_FLAG | |
| 3240 #define __HAL_ETH_EXTI_CLEAR_FLAG __HAL_ETH_WAKEUP_EXTI_CLEAR_FLAG | |
| 3241 #define __HAL_ETH_EXTI_SET_RISING_EGDE_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_RISING_EDGE_TRIGGER | |
| 3242 #define __HAL_ETH_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLING_EDGE_TRIGGER | |
| 3243 #define __HAL_ETH_EXTI_SET_FALLINGRISING_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLINGRISING_TRIGGER | |
| 3244 | |
| 3245 #define ETH_PROMISCIOUSMODE_ENABLE ETH_PROMISCUOUS_MODE_ENABLE | |
| 3246 #define ETH_PROMISCIOUSMODE_DISABLE ETH_PROMISCUOUS_MODE_DISABLE | |
| 3247 #define IS_ETH_PROMISCIOUS_MODE IS_ETH_PROMISCUOUS_MODE | |
| 3248 /** | |
| 3249 * @} | |
| 3250 */ | |
| 3251 | |
| 3252 /** @defgroup HAL_LTDC_Aliased_Macros HAL LTDC Aliased Macros maintained for legacy purpose | |
| 3253 * @{ | |
| 3254 */ | |
| 3255 #define __HAL_LTDC_LAYER LTDC_LAYER | |
| 3256 #define __HAL_LTDC_RELOAD_CONFIG __HAL_LTDC_RELOAD_IMMEDIATE_CONFIG | |
| 3257 /** | |
| 3258 * @} | |
| 3259 */ | |
| 3260 | |
| 3261 /** @defgroup HAL_SAI_Aliased_Macros HAL SAI Aliased Macros maintained for legacy purpose | |
| 3262 * @{ | |
| 3263 */ | |
| 3264 #define SAI_OUTPUTDRIVE_DISABLED SAI_OUTPUTDRIVE_DISABLE | |
| 3265 #define SAI_OUTPUTDRIVE_ENABLED SAI_OUTPUTDRIVE_ENABLE | |
| 3266 #define SAI_MASTERDIVIDER_ENABLED SAI_MASTERDIVIDER_ENABLE | |
| 3267 #define SAI_MASTERDIVIDER_DISABLED SAI_MASTERDIVIDER_DISABLE | |
| 3268 #define SAI_STREOMODE SAI_STEREOMODE | |
| 3269 #define SAI_FIFOStatus_Empty SAI_FIFOSTATUS_EMPTY | |
| 3270 #define SAI_FIFOStatus_Less1QuarterFull SAI_FIFOSTATUS_LESS1QUARTERFULL | |
| 3271 #define SAI_FIFOStatus_1QuarterFull SAI_FIFOSTATUS_1QUARTERFULL | |
| 3272 #define SAI_FIFOStatus_HalfFull SAI_FIFOSTATUS_HALFFULL | |
| 3273 #define SAI_FIFOStatus_3QuartersFull SAI_FIFOSTATUS_3QUARTERFULL | |
| 3274 #define SAI_FIFOStatus_Full SAI_FIFOSTATUS_FULL | |
| 3275 #define IS_SAI_BLOCK_MONO_STREO_MODE IS_SAI_BLOCK_MONO_STEREO_MODE | |
| 3276 #define SAI_SYNCHRONOUS_EXT SAI_SYNCHRONOUS_EXT_SAI1 | |
| 3277 #define SAI_SYNCEXT_IN_ENABLE SAI_SYNCEXT_OUTBLOCKA_ENABLE | |
| 3278 /** | |
| 3279 * @} | |
| 3280 */ | |
| 3281 | |
| 3282 /** @defgroup HAL_SPDIFRX_Aliased_Macros HAL SPDIFRX Aliased Macros maintained for legacy purpose | |
| 3283 * @{ | |
| 3284 */ | |
| 3285 #if defined(STM32H7) | |
| 3286 #define HAL_SPDIFRX_ReceiveControlFlow HAL_SPDIFRX_ReceiveCtrlFlow | |
| 3287 #define HAL_SPDIFRX_ReceiveControlFlow_IT HAL_SPDIFRX_ReceiveCtrlFlow_IT | |
| 3288 #define HAL_SPDIFRX_ReceiveControlFlow_DMA HAL_SPDIFRX_ReceiveCtrlFlow_DMA | |
| 3289 #endif | |
| 3290 /** | |
| 3291 * @} | |
| 3292 */ | |
| 3293 | |
| 3294 /** @defgroup HAL_PPP_Aliased_Macros HAL PPP Aliased Macros maintained for legacy purpose | |
| 3295 * @{ | |
| 3296 */ | |
| 3297 | |
| 3298 /** | |
| 3299 * @} | |
| 3300 */ | |
| 3301 | |
| 3302 #ifdef __cplusplus | |
| 3303 } | |
| 3304 #endif | |
| 3305 | |
| 3306 #endif /* ___STM32_HAL_LEGACY */ | |
| 3307 | |
| 3308 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ | |
| 3309 |