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comparison Small_CPU/Inc/compass_LSM303D.h @ 38:5f11787b4f42

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author heinrichsweikamp
date Sat, 28 Apr 2018 11:52:34 +0200
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37:ccc45c0e1ea2 38:5f11787b4f42
1 /**
2 ******************************************************************************
3 * @file compass_LSM303D.h
4 * @author heinrichs weikamp gmbh, based on PX4 lsm303d.cpp
5 * @date 15-March-2016
6 * @version V0.1.0
7 * @since 15-March-2016
8 * @brief STMicroelectronics LSM303D accelerometer & magnetometer driver
9 *
10 @verbatim
11 ==============================================================================
12 ##### How to use #####
13 ==============================================================================
14 @endverbatim
15 ******************************************************************************
16 * @attention
17 *
18 * <h2><center>&copy; COPYRIGHT(c) 2016 heinrichs weikamp</center></h2>
19 *
20 ******************************************************************************
21 */
22
23 /* Define to prevent recursive inclusion -------------------------------------*/
24 #ifndef COMPASS_LSM303D_H
25 #define COMPASS_LSM303D_H
26
27 /* Exported constants --------------------------------------------------------*/
28
29 #define WHO_AM_I 0x0F // device identification register - default value
30 #define WHOIAM_VALUE (0x49) // Who Am I default value
31
32 #define ADDR_OUT_TEMP_L 0x05
33 #define ADDR_OUT_TEMP_H 0x06
34 #define ADDR_STATUS_M 0x07
35 #define ADDR_OUT_X_L_M 0x08
36 #define ADDR_OUT_X_H_M 0x09
37 #define ADDR_OUT_Y_L_M 0x0A
38 #define ADDR_OUT_Y_H_M 0x0B
39 #define ADDR_OUT_Z_L_M 0x0C
40 #define ADDR_OUT_Z_H_M 0x0D
41
42 #define ADDR_INT_CTRL_M 0x12
43 #define ADDR_INT_SRC_M 0x13
44
45 #define ADDR_INT_THS_L_M 0x14
46 #define ADDR_INT_THS_H_M 0x15
47
48 #define ADDR_OFFSET_X_L_M 0x16
49 #define ADDR_OFFSET_X_H_M 0x17
50 #define ADDR_OFFSET_Y_L_M 0x18
51 #define ADDR_OFFSET_Y_H_M 0x19
52 #define ADDR_OFFSET_Z_L_M 0x1a
53 #define ADDR_OFFSET_Z_H_M 0x1b
54
55 #define ADDR_REFERENCE_X 0x1c
56 #define ADDR_REFERENCE_Y 0x1d
57 #define ADDR_REFERENCE_Z 0x1e
58
59 #define ADDR_STATUS_A 0x27
60 #define ADDR_OUT_X_L_A 0x28
61 #define ADDR_OUT_X_H_A 0x29
62 #define ADDR_OUT_Y_L_A 0x2A
63 #define ADDR_OUT_Y_H_A 0x2B
64 #define ADDR_OUT_Z_L_A 0x2C
65 #define ADDR_OUT_Z_H_A 0x2D
66
67 #define ADDR_CTRL_REG0 0x1F
68 #define ADDR_CTRL_REG1 0x20
69 #define ADDR_CTRL_REG2 0x21
70 #define ADDR_CTRL_REG3 0x22
71 #define ADDR_CTRL_REG4 0x23
72 #define ADDR_CTRL_REG5 0x24
73 #define ADDR_CTRL_REG6 0x25
74 #define ADDR_CTRL_REG7 0x26
75
76 #define ADDR_FIFO_CTRL 0x2e
77 #define ADDR_FIFO_SRC 0x2f
78
79 #define ADDR_IG_CFG1 0x30
80 #define ADDR_IG_SRC1 0x31
81 #define ADDR_IG_THS1 0x32
82 #define ADDR_IG_DUR1 0x33
83 #define ADDR_IG_CFG2 0x34
84 #define ADDR_IG_SRC2 0x35
85 #define ADDR_IG_THS2 0x36
86 #define ADDR_IG_DUR2 0x37
87 #define ADDR_CLICK_CFG 0x38
88 #define ADDR_CLICK_SRC 0x39
89 #define ADDR_CLICK_THS 0x3a
90 #define ADDR_TIME_LIMIT 0x3b
91 #define ADDR_TIME_LATENCY 0x3c
92 #define ADDR_TIME_WINDOW 0x3d
93 #define ADDR_ACT_THS 0x3e
94 #define ADDR_ACT_DUR 0x3f
95
96 #define REG1_RATE_BITS_A ((1<<7) | (1<<6) | (1<<5) | (1<<4))
97 #define REG1_POWERDOWN_A ((0<<7) | (0<<6) | (0<<5) | (0<<4))
98 #define REG1_RATE_3_125HZ_A ((0<<7) | (0<<6) | (0<<5) | (1<<4))
99 #define REG1_RATE_6_25HZ_A ((0<<7) | (0<<6) | (1<<5) | (0<<4))
100 #define REG1_RATE_12_5HZ_A ((0<<7) | (0<<6) | (1<<5) | (1<<4))
101 #define REG1_RATE_25HZ_A ((0<<7) | (1<<6) | (0<<5) | (0<<4))
102 #define REG1_RATE_50HZ_A ((0<<7) | (1<<6) | (0<<5) | (1<<4))
103 #define REG1_RATE_100HZ_A ((0<<7) | (1<<6) | (1<<5) | (0<<4))
104 #define REG1_RATE_200HZ_A ((0<<7) | (1<<6) | (1<<5) | (1<<4))
105 #define REG1_RATE_400HZ_A ((1<<7) | (0<<6) | (0<<5) | (0<<4))
106 #define REG1_RATE_800HZ_A ((1<<7) | (0<<6) | (0<<5) | (1<<4))
107 #define REG1_RATE_1600HZ_A ((1<<7) | (0<<6) | (1<<5) | (0<<4))
108
109 #define REG1_BDU_UPDATE (1<<3)
110 #define REG1_Z_ENABLE_A (1<<2)
111 #define REG1_Y_ENABLE_A (1<<1)
112 #define REG1_X_ENABLE_A (1<<0)
113
114 #define REG2_ANTIALIAS_FILTER_BW_BITS_A ((1<<7) | (1<<6))
115 #define REG2_AA_FILTER_BW_773HZ_A ((0<<7) | (0<<6))
116 #define REG2_AA_FILTER_BW_194HZ_A ((0<<7) | (1<<6))
117 #define REG2_AA_FILTER_BW_362HZ_A ((1<<7) | (0<<6))
118 #define REG2_AA_FILTER_BW_50HZ_A ((1<<7) | (1<<6))
119
120 #define REG2_FULL_SCALE_BITS_A ((1<<5) | (1<<4) | (1<<3))
121 #define REG2_FULL_SCALE_2G_A ((0<<5) | (0<<4) | (0<<3))
122 #define REG2_FULL_SCALE_4G_A ((0<<5) | (0<<4) | (1<<3))
123 #define REG2_FULL_SCALE_6G_A ((0<<5) | (1<<4) | (0<<3))
124 #define REG2_FULL_SCALE_8G_A ((0<<5) | (1<<4) | (1<<3))
125 #define REG2_FULL_SCALE_16G_A ((1<<5) | (0<<4) | (0<<3))
126
127 #define REG5_ENABLE_T (1<<7)
128
129 #define REG5_RES_HIGH_M ((1<<6) | (1<<5))
130 #define REG5_RES_LOW_M ((0<<6) | (0<<5))
131
132 #define REG5_RATE_BITS_M ((1<<4) | (1<<3) | (1<<2))
133 #define REG5_RATE_3_125HZ_M ((0<<4) | (0<<3) | (0<<2))
134 #define REG5_RATE_6_25HZ_M ((0<<4) | (0<<3) | (1<<2))
135 #define REG5_RATE_12_5HZ_M ((0<<4) | (1<<3) | (0<<2))
136 #define REG5_RATE_25HZ_M ((0<<4) | (1<<3) | (1<<2))
137 #define REG5_RATE_50HZ_M ((1<<4) | (0<<3) | (0<<2))
138 #define REG5_RATE_100HZ_M ((1<<4) | (0<<3) | (1<<2))
139 #define REG5_RATE_DO_NOT_USE_M ((1<<4) | (1<<3) | (0<<2))
140
141 #define REG6_FULL_SCALE_BITS_M ((1<<6) | (1<<5))
142 #define REG6_FULL_SCALE_2GA_M ((0<<6) | (0<<5))
143 #define REG6_FULL_SCALE_4GA_M ((0<<6) | (1<<5))
144 #define REG6_FULL_SCALE_8GA_M ((1<<6) | (0<<5))
145 #define REG6_FULL_SCALE_12GA_M ((1<<6) | (1<<5))
146
147 #define REG7_CONT_MODE_M ((0<<1) | (0<<0))
148
149 #define REG_STATUS_A_NEW_ZYXADA 0x08
150
151 #define INT_CTRL_M 0x12
152 #define INT_SRC_M 0x13
153
154 /* default values for this device */
155 #define LSM303D_ACCEL_DEFAULT_RANGE_G 2
156 #define LSM303D_ACCEL_DEFAULT_RATE 10
157
158 #define LSM303D_ACCEL_DEFAULT_ONCHIP_FILTER_FREQ 50
159 #define LSM303D_ACCEL_DEFAULT_DRIVER_FILTER_FREQ 30
160 #define LSM303D_ACCEL_MAX_OUTPUT_RATE 280
161
162 #define LSM303D_MAG_DEFAULT_RANGE_GA 12
163 #define LSM303D_MAG_DEFAULT_RATE 10
164
165 #define LSM303D_ONE_G 9.80665f
166
167
168 #endif /* COMPASS_LSM303D_H */
169
170 /******************* (C) COPYRIGHT 2016 heinrichs weikamp *****END OF FILE****/