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comparison Common/Drivers/STM32F4xx_v220/Source/Templates/iar/startup_stm32f401xe.s @ 38:5f11787b4f42

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author heinrichsweikamp
date Sat, 28 Apr 2018 11:52:34 +0200
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1 ;/******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
2 ;* File Name : startup_stm32f401xe.s
3 ;* Author : MCD Application Team
4 ;* Version : V2.2.0
5 ;* Date : 15-December-2014
6 ;* Description : STM32F401xExx devices vector table for EWARM toolchain.
7 ;* This module performs:
8 ;* - Set the initial SP
9 ;* - Set the initial PC == _iar_program_start,
10 ;* - Set the vector table entries with the exceptions ISR
11 ;* address.
12 ;* - Configure the system clock
13 ;* - Branches to main in the C library (which eventually
14 ;* calls main()).
15 ;* After Reset the Cortex-M4 processor is in Thread mode,
16 ;* priority is Privileged, and the Stack is set to Main.
17 ;********************************************************************************
18 ;*
19 ;* Redistribution and use in source and binary forms, with or without modification,
20 ;* are permitted provided that the following conditions are met:
21 ;* 1. Redistributions of source code must retain the above copyright notice,
22 ;* this list of conditions and the following disclaimer.
23 ;* 2. Redistributions in binary form must reproduce the above copyright notice,
24 ;* this list of conditions and the following disclaimer in the documentation
25 ;* and/or other materials provided with the distribution.
26 ;* 3. Neither the name of STMicroelectronics nor the names of its contributors
27 ;* may be used to endorse or promote products derived from this software
28 ;* without specific prior written permission.
29 ;*
30 ;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
31 ;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
32 ;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
33 ;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
34 ;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
35 ;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
36 ;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
37 ;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
38 ;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 ;*
41 ;*******************************************************************************
42 ;
43 ;
44 ; The modules in this file are included in the libraries, and may be replaced
45 ; by any user-defined modules that define the PUBLIC symbol _program_start or
46 ; a user defined start symbol.
47 ; To override the cstartup defined in the library, simply add your modified
48 ; version to the workbench project.
49 ;
50 ; The vector table is normally located at address 0.
51 ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
52 ; The name "__vector_table" has special meaning for C-SPY:
53 ; it is where the SP start value is found, and the NVIC vector
54 ; table register (VTOR) is initialized to this address if != 0.
55 ;
56 ; Cortex-M version
57 ;
58
59 MODULE ?cstartup
60
61 ;; Forward declaration of sections.
62 SECTION CSTACK:DATA:NOROOT(3)
63
64 SECTION .intvec:CODE:NOROOT(2)
65
66 EXTERN __iar_program_start
67 EXTERN SystemInit
68 PUBLIC __vector_table
69
70 DATA
71 __vector_table
72 DCD sfe(CSTACK)
73 DCD Reset_Handler ; Reset Handler
74
75 DCD NMI_Handler ; NMI Handler
76 DCD HardFault_Handler ; Hard Fault Handler
77 DCD MemManage_Handler ; MPU Fault Handler
78 DCD BusFault_Handler ; Bus Fault Handler
79 DCD UsageFault_Handler ; Usage Fault Handler
80 DCD 0 ; Reserved
81 DCD 0 ; Reserved
82 DCD 0 ; Reserved
83 DCD 0 ; Reserved
84 DCD SVC_Handler ; SVCall Handler
85 DCD DebugMon_Handler ; Debug Monitor Handler
86 DCD 0 ; Reserved
87 DCD PendSV_Handler ; PendSV Handler
88 DCD SysTick_Handler ; SysTick Handler
89
90 ; External Interrupts
91 DCD WWDG_IRQHandler ; Window WatchDog
92 DCD PVD_IRQHandler ; PVD through EXTI Line detection
93 DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
94 DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
95 DCD FLASH_IRQHandler ; FLASH
96 DCD RCC_IRQHandler ; RCC
97 DCD EXTI0_IRQHandler ; EXTI Line0
98 DCD EXTI1_IRQHandler ; EXTI Line1
99 DCD EXTI2_IRQHandler ; EXTI Line2
100 DCD EXTI3_IRQHandler ; EXTI Line3
101 DCD EXTI4_IRQHandler ; EXTI Line4
102 DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
103 DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
104 DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
105 DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
106 DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
107 DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
108 DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
109 DCD ADC_IRQHandler ; ADC1
110 DCD 0 ; Reserved
111 DCD 0 ; Reserved
112 DCD 0 ; Reserved
113 DCD 0 ; Reserved
114 DCD EXTI9_5_IRQHandler ; External Line[9:5]s
115 DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9
116 DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10
117 DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11
118 DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
119 DCD TIM2_IRQHandler ; TIM2
120 DCD TIM3_IRQHandler ; TIM3
121 DCD TIM4_IRQHandler ; TIM4
122 DCD I2C1_EV_IRQHandler ; I2C1 Event
123 DCD I2C1_ER_IRQHandler ; I2C1 Error
124 DCD I2C2_EV_IRQHandler ; I2C2 Event
125 DCD I2C2_ER_IRQHandler ; I2C2 Error
126 DCD SPI1_IRQHandler ; SPI1
127 DCD SPI2_IRQHandler ; SPI2
128 DCD USART1_IRQHandler ; USART1
129 DCD USART2_IRQHandler ; USART2
130 DCD 0 ; Reserved
131 DCD EXTI15_10_IRQHandler ; External Line[15:10]s
132 DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
133 DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line
134 DCD 0 ; Reserved
135 DCD 0 ; Reserved
136 DCD 0 ; Reserved
137 DCD 0 ; Reserved
138 DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
139 DCD 0 ; Reserved
140 DCD SDIO_IRQHandler ; SDIO
141 DCD TIM5_IRQHandler ; TIM5
142 DCD SPI3_IRQHandler ; SPI3
143 DCD 0 ; Reserved
144 DCD 0 ; Reserved
145 DCD 0 ; Reserved
146 DCD 0 ; Reserved
147 DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
148 DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
149 DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
150 DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
151 DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
152 DCD 0 ; Reserved
153 DCD 0 ; Reserved
154 DCD 0 ; Reserved
155 DCD 0 ; Reserved
156 DCD 0 ; Reserved
157 DCD 0 ; Reserved
158 DCD OTG_FS_IRQHandler ; USB OTG FS
159 DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
160 DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
161 DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
162 DCD USART6_IRQHandler ; USART6
163 DCD I2C3_EV_IRQHandler ; I2C3 event
164 DCD I2C3_ER_IRQHandler ; I2C3 error
165 DCD 0 ; Reserved
166 DCD 0 ; Reserved
167 DCD 0 ; Reserved
168 DCD 0 ; Reserved
169 DCD 0 ; Reserved
170 DCD 0 ; Reserved
171 DCD 0 ; Reserved
172 DCD FPU_IRQHandler ; FPU
173 DCD 0 ; Reserved
174 DCD 0 ; Reserved
175 DCD SPI4_IRQHandler ; SPI4
176
177 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
178 ;;
179 ;; Default interrupt handlers.
180 ;;
181 THUMB
182 PUBWEAK Reset_Handler
183 SECTION .text:CODE:REORDER:NOROOT(2)
184 Reset_Handler
185
186 LDR R0, =SystemInit
187 BLX R0
188 LDR R0, =__iar_program_start
189 BX R0
190
191 PUBWEAK NMI_Handler
192 SECTION .text:CODE:REORDER:NOROOT(1)
193 NMI_Handler
194 B NMI_Handler
195
196 PUBWEAK HardFault_Handler
197 SECTION .text:CODE:REORDER:NOROOT(1)
198 HardFault_Handler
199 B HardFault_Handler
200
201 PUBWEAK MemManage_Handler
202 SECTION .text:CODE:REORDER:NOROOT(1)
203 MemManage_Handler
204 B MemManage_Handler
205
206 PUBWEAK BusFault_Handler
207 SECTION .text:CODE:REORDER:NOROOT(1)
208 BusFault_Handler
209 B BusFault_Handler
210
211 PUBWEAK UsageFault_Handler
212 SECTION .text:CODE:REORDER:NOROOT(1)
213 UsageFault_Handler
214 B UsageFault_Handler
215
216 PUBWEAK SVC_Handler
217 SECTION .text:CODE:REORDER:NOROOT(1)
218 SVC_Handler
219 B SVC_Handler
220
221 PUBWEAK DebugMon_Handler
222 SECTION .text:CODE:REORDER:NOROOT(1)
223 DebugMon_Handler
224 B DebugMon_Handler
225
226 PUBWEAK PendSV_Handler
227 SECTION .text:CODE:REORDER:NOROOT(1)
228 PendSV_Handler
229 B PendSV_Handler
230
231 PUBWEAK SysTick_Handler
232 SECTION .text:CODE:REORDER:NOROOT(1)
233 SysTick_Handler
234 B SysTick_Handler
235
236 PUBWEAK WWDG_IRQHandler
237 SECTION .text:CODE:REORDER:NOROOT(1)
238 WWDG_IRQHandler
239 B WWDG_IRQHandler
240
241 PUBWEAK PVD_IRQHandler
242 SECTION .text:CODE:REORDER:NOROOT(1)
243 PVD_IRQHandler
244 B PVD_IRQHandler
245
246 PUBWEAK TAMP_STAMP_IRQHandler
247 SECTION .text:CODE:REORDER:NOROOT(1)
248 TAMP_STAMP_IRQHandler
249 B TAMP_STAMP_IRQHandler
250
251 PUBWEAK RTC_WKUP_IRQHandler
252 SECTION .text:CODE:REORDER:NOROOT(1)
253 RTC_WKUP_IRQHandler
254 B RTC_WKUP_IRQHandler
255
256 PUBWEAK FLASH_IRQHandler
257 SECTION .text:CODE:REORDER:NOROOT(1)
258 FLASH_IRQHandler
259 B FLASH_IRQHandler
260
261 PUBWEAK RCC_IRQHandler
262 SECTION .text:CODE:REORDER:NOROOT(1)
263 RCC_IRQHandler
264 B RCC_IRQHandler
265
266 PUBWEAK EXTI0_IRQHandler
267 SECTION .text:CODE:REORDER:NOROOT(1)
268 EXTI0_IRQHandler
269 B EXTI0_IRQHandler
270
271 PUBWEAK EXTI1_IRQHandler
272 SECTION .text:CODE:REORDER:NOROOT(1)
273 EXTI1_IRQHandler
274 B EXTI1_IRQHandler
275
276 PUBWEAK EXTI2_IRQHandler
277 SECTION .text:CODE:REORDER:NOROOT(1)
278 EXTI2_IRQHandler
279 B EXTI2_IRQHandler
280
281 PUBWEAK EXTI3_IRQHandler
282 SECTION .text:CODE:REORDER:NOROOT(1)
283 EXTI3_IRQHandler
284 B EXTI3_IRQHandler
285
286 PUBWEAK EXTI4_IRQHandler
287 SECTION .text:CODE:REORDER:NOROOT(1)
288 EXTI4_IRQHandler
289 B EXTI4_IRQHandler
290
291 PUBWEAK DMA1_Stream0_IRQHandler
292 SECTION .text:CODE:REORDER:NOROOT(1)
293 DMA1_Stream0_IRQHandler
294 B DMA1_Stream0_IRQHandler
295
296 PUBWEAK DMA1_Stream1_IRQHandler
297 SECTION .text:CODE:REORDER:NOROOT(1)
298 DMA1_Stream1_IRQHandler
299 B DMA1_Stream1_IRQHandler
300
301 PUBWEAK DMA1_Stream2_IRQHandler
302 SECTION .text:CODE:REORDER:NOROOT(1)
303 DMA1_Stream2_IRQHandler
304 B DMA1_Stream2_IRQHandler
305
306 PUBWEAK DMA1_Stream3_IRQHandler
307 SECTION .text:CODE:REORDER:NOROOT(1)
308 DMA1_Stream3_IRQHandler
309 B DMA1_Stream3_IRQHandler
310
311 PUBWEAK DMA1_Stream4_IRQHandler
312 SECTION .text:CODE:REORDER:NOROOT(1)
313 DMA1_Stream4_IRQHandler
314 B DMA1_Stream4_IRQHandler
315
316 PUBWEAK DMA1_Stream5_IRQHandler
317 SECTION .text:CODE:REORDER:NOROOT(1)
318 DMA1_Stream5_IRQHandler
319 B DMA1_Stream5_IRQHandler
320
321 PUBWEAK DMA1_Stream6_IRQHandler
322 SECTION .text:CODE:REORDER:NOROOT(1)
323 DMA1_Stream6_IRQHandler
324 B DMA1_Stream6_IRQHandler
325
326 PUBWEAK ADC_IRQHandler
327 SECTION .text:CODE:REORDER:NOROOT(1)
328 ADC_IRQHandler
329 B ADC_IRQHandler
330
331 PUBWEAK EXTI9_5_IRQHandler
332 SECTION .text:CODE:REORDER:NOROOT(1)
333 EXTI9_5_IRQHandler
334 B EXTI9_5_IRQHandler
335
336 PUBWEAK TIM1_BRK_TIM9_IRQHandler
337 SECTION .text:CODE:REORDER:NOROOT(1)
338 TIM1_BRK_TIM9_IRQHandler
339 B TIM1_BRK_TIM9_IRQHandler
340
341 PUBWEAK TIM1_UP_TIM10_IRQHandler
342 SECTION .text:CODE:REORDER:NOROOT(1)
343 TIM1_UP_TIM10_IRQHandler
344 B TIM1_UP_TIM10_IRQHandler
345
346 PUBWEAK TIM1_TRG_COM_TIM11_IRQHandler
347 SECTION .text:CODE:REORDER:NOROOT(1)
348 TIM1_TRG_COM_TIM11_IRQHandler
349 B TIM1_TRG_COM_TIM11_IRQHandler
350
351 PUBWEAK TIM1_CC_IRQHandler
352 SECTION .text:CODE:REORDER:NOROOT(1)
353 TIM1_CC_IRQHandler
354 B TIM1_CC_IRQHandler
355
356 PUBWEAK TIM2_IRQHandler
357 SECTION .text:CODE:REORDER:NOROOT(1)
358 TIM2_IRQHandler
359 B TIM2_IRQHandler
360
361 PUBWEAK TIM3_IRQHandler
362 SECTION .text:CODE:REORDER:NOROOT(1)
363 TIM3_IRQHandler
364 B TIM3_IRQHandler
365
366 PUBWEAK TIM4_IRQHandler
367 SECTION .text:CODE:REORDER:NOROOT(1)
368 TIM4_IRQHandler
369 B TIM4_IRQHandler
370
371 PUBWEAK I2C1_EV_IRQHandler
372 SECTION .text:CODE:REORDER:NOROOT(1)
373 I2C1_EV_IRQHandler
374 B I2C1_EV_IRQHandler
375
376 PUBWEAK I2C1_ER_IRQHandler
377 SECTION .text:CODE:REORDER:NOROOT(1)
378 I2C1_ER_IRQHandler
379 B I2C1_ER_IRQHandler
380
381 PUBWEAK I2C2_EV_IRQHandler
382 SECTION .text:CODE:REORDER:NOROOT(1)
383 I2C2_EV_IRQHandler
384 B I2C2_EV_IRQHandler
385
386 PUBWEAK I2C2_ER_IRQHandler
387 SECTION .text:CODE:REORDER:NOROOT(1)
388 I2C2_ER_IRQHandler
389 B I2C2_ER_IRQHandler
390
391 PUBWEAK SPI1_IRQHandler
392 SECTION .text:CODE:REORDER:NOROOT(1)
393 SPI1_IRQHandler
394 B SPI1_IRQHandler
395
396 PUBWEAK SPI2_IRQHandler
397 SECTION .text:CODE:REORDER:NOROOT(1)
398 SPI2_IRQHandler
399 B SPI2_IRQHandler
400
401 PUBWEAK USART1_IRQHandler
402 SECTION .text:CODE:REORDER:NOROOT(1)
403 USART1_IRQHandler
404 B USART1_IRQHandler
405
406 PUBWEAK USART2_IRQHandler
407 SECTION .text:CODE:REORDER:NOROOT(1)
408 USART2_IRQHandler
409 B USART2_IRQHandler
410
411 PUBWEAK EXTI15_10_IRQHandler
412 SECTION .text:CODE:REORDER:NOROOT(1)
413 EXTI15_10_IRQHandler
414 B EXTI15_10_IRQHandler
415
416 PUBWEAK RTC_Alarm_IRQHandler
417 SECTION .text:CODE:REORDER:NOROOT(1)
418 RTC_Alarm_IRQHandler
419 B RTC_Alarm_IRQHandler
420
421 PUBWEAK OTG_FS_WKUP_IRQHandler
422 SECTION .text:CODE:REORDER:NOROOT(1)
423 OTG_FS_WKUP_IRQHandler
424 B OTG_FS_WKUP_IRQHandler
425
426 PUBWEAK DMA1_Stream7_IRQHandler
427 SECTION .text:CODE:REORDER:NOROOT(1)
428 DMA1_Stream7_IRQHandler
429 B DMA1_Stream7_IRQHandler
430
431 PUBWEAK SDIO_IRQHandler
432 SECTION .text:CODE:REORDER:NOROOT(1)
433 SDIO_IRQHandler
434 B SDIO_IRQHandler
435
436 PUBWEAK TIM5_IRQHandler
437 SECTION .text:CODE:REORDER:NOROOT(1)
438 TIM5_IRQHandler
439 B TIM5_IRQHandler
440
441 PUBWEAK SPI3_IRQHandler
442 SECTION .text:CODE:REORDER:NOROOT(1)
443 SPI3_IRQHandler
444 B SPI3_IRQHandler
445
446 PUBWEAK DMA2_Stream0_IRQHandler
447 SECTION .text:CODE:REORDER:NOROOT(1)
448 DMA2_Stream0_IRQHandler
449 B DMA2_Stream0_IRQHandler
450
451 PUBWEAK DMA2_Stream1_IRQHandler
452 SECTION .text:CODE:REORDER:NOROOT(1)
453 DMA2_Stream1_IRQHandler
454 B DMA2_Stream1_IRQHandler
455
456 PUBWEAK DMA2_Stream2_IRQHandler
457 SECTION .text:CODE:REORDER:NOROOT(1)
458 DMA2_Stream2_IRQHandler
459 B DMA2_Stream2_IRQHandler
460
461 PUBWEAK DMA2_Stream3_IRQHandler
462 SECTION .text:CODE:REORDER:NOROOT(1)
463 DMA2_Stream3_IRQHandler
464 B DMA2_Stream3_IRQHandler
465
466 PUBWEAK DMA2_Stream4_IRQHandler
467 SECTION .text:CODE:REORDER:NOROOT(1)
468 DMA2_Stream4_IRQHandler
469 B DMA2_Stream4_IRQHandler
470
471 PUBWEAK OTG_FS_IRQHandler
472 SECTION .text:CODE:REORDER:NOROOT(1)
473 OTG_FS_IRQHandler
474 B OTG_FS_IRQHandler
475
476 PUBWEAK DMA2_Stream5_IRQHandler
477 SECTION .text:CODE:REORDER:NOROOT(1)
478 DMA2_Stream5_IRQHandler
479 B DMA2_Stream5_IRQHandler
480
481 PUBWEAK DMA2_Stream6_IRQHandler
482 SECTION .text:CODE:REORDER:NOROOT(1)
483 DMA2_Stream6_IRQHandler
484 B DMA2_Stream6_IRQHandler
485
486 PUBWEAK DMA2_Stream7_IRQHandler
487 SECTION .text:CODE:REORDER:NOROOT(1)
488 DMA2_Stream7_IRQHandler
489 B DMA2_Stream7_IRQHandler
490
491 PUBWEAK USART6_IRQHandler
492 SECTION .text:CODE:REORDER:NOROOT(1)
493 USART6_IRQHandler
494 B USART6_IRQHandler
495
496 PUBWEAK I2C3_EV_IRQHandler
497 SECTION .text:CODE:REORDER:NOROOT(1)
498 I2C3_EV_IRQHandler
499 B I2C3_EV_IRQHandler
500
501 PUBWEAK I2C3_ER_IRQHandler
502 SECTION .text:CODE:REORDER:NOROOT(1)
503 I2C3_ER_IRQHandler
504 B I2C3_ER_IRQHandler
505
506 PUBWEAK FPU_IRQHandler
507 SECTION .text:CODE:REORDER:NOROOT(1)
508 FPU_IRQHandler
509 B FPU_IRQHandler
510
511 PUBWEAK SPI4_IRQHandler
512 SECTION .text:CODE:REORDER:NOROOT(1)
513 SPI4_IRQHandler
514 B SPI4_IRQHandler
515
516 END
517 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/