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comparison Common/Drivers/STM32F4xx_HAL_DRIVER_v120/Src/stm32f4xx_hal_tim_ex.c @ 38:5f11787b4f42
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author | heinrichsweikamp |
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date | Sat, 28 Apr 2018 11:52:34 +0200 |
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1 /** | |
2 ****************************************************************************** | |
3 * @file stm32f4xx_hal_tim_ex.c | |
4 * @author MCD Application Team | |
5 * @version V1.2.0 | |
6 * @date 26-December-2014 | |
7 * @brief TIM HAL module driver. | |
8 * This file provides firmware functions to manage the following | |
9 * functionalities of the Timer extension peripheral: | |
10 * + Time Hall Sensor Interface Initialization | |
11 * + Time Hall Sensor Interface Start | |
12 * + Time Complementary signal bread and dead time configuration | |
13 * + Time Master and Slave synchronization configuration | |
14 @verbatim | |
15 ============================================================================== | |
16 ##### TIMER Extended features ##### | |
17 ============================================================================== | |
18 [..] | |
19 The Timer Extension features include: | |
20 (#) Complementary outputs with programmable dead-time for : | |
21 (++) Input Capture | |
22 (++) Output Compare | |
23 (++) PWM generation (Edge and Center-aligned Mode) | |
24 (++) One-pulse mode output | |
25 (#) Synchronization circuit to control the timer with external signals and to | |
26 interconnect several timers together. | |
27 (#) Break input to put the timer output signals in reset state or in a known state. | |
28 (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for | |
29 positioning purposes | |
30 | |
31 ##### How to use this driver ##### | |
32 ============================================================================== | |
33 [..] | |
34 (#) Initialize the TIM low level resources by implementing the following functions | |
35 depending from feature used : | |
36 (++) Complementary Output Compare : HAL_TIM_OC_MspInit() | |
37 (++) Complementary PWM generation : HAL_TIM_PWM_MspInit() | |
38 (++) Complementary One-pulse mode output : HAL_TIM_OnePulse_MspInit() | |
39 (++) Hall Sensor output : HAL_TIM_HallSensor_MspInit() | |
40 | |
41 (#) Initialize the TIM low level resources : | |
42 (##) Enable the TIM interface clock using __TIMx_CLK_ENABLE(); | |
43 (##) TIM pins configuration | |
44 (+++) Enable the clock for the TIM GPIOs using the following function: | |
45 __GPIOx_CLK_ENABLE(); | |
46 (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init(); | |
47 | |
48 (#) The external Clock can be configured, if needed (the default clock is the | |
49 internal clock from the APBx), using the following function: | |
50 HAL_TIM_ConfigClockSource, the clock configuration should be done before | |
51 any start function. | |
52 | |
53 (#) Configure the TIM in the desired functioning mode using one of the | |
54 initialization function of this driver: | |
55 (++) HAL_TIMEx_HallSensor_Init and HAL_TIMEx_ConfigCommutationEvent: to use the | |
56 Timer Hall Sensor Interface and the commutation event with the corresponding | |
57 Interrupt and DMA request if needed (Note that One Timer is used to interface | |
58 with the Hall sensor Interface and another Timer should be used to use | |
59 the commutation event). | |
60 | |
61 (#) Activate the TIM peripheral using one of the start functions: | |
62 (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), HAL_TIMEx_OC_Start_IT() | |
63 (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), HAL_TIMEx_PWMN_Start_IT() | |
64 (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT() | |
65 (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), HAL_TIMEx_HallSensor_Start_IT(). | |
66 | |
67 | |
68 @endverbatim | |
69 ****************************************************************************** | |
70 * @attention | |
71 * | |
72 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> | |
73 * | |
74 * Redistribution and use in source and binary forms, with or without modification, | |
75 * are permitted provided that the following conditions are met: | |
76 * 1. Redistributions of source code must retain the above copyright notice, | |
77 * this list of conditions and the following disclaimer. | |
78 * 2. Redistributions in binary form must reproduce the above copyright notice, | |
79 * this list of conditions and the following disclaimer in the documentation | |
80 * and/or other materials provided with the distribution. | |
81 * 3. Neither the name of STMicroelectronics nor the names of its contributors | |
82 * may be used to endorse or promote products derived from this software | |
83 * without specific prior written permission. | |
84 * | |
85 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
86 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
87 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | |
88 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE | |
89 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
90 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | |
91 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | |
92 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | |
93 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
94 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
95 * | |
96 ****************************************************************************** | |
97 */ | |
98 | |
99 /* Includes ------------------------------------------------------------------*/ | |
100 #include "stm32f4xx_hal.h" | |
101 | |
102 /** @addtogroup STM32F4xx_HAL_Driver | |
103 * @{ | |
104 */ | |
105 | |
106 /** @defgroup TIMEx TIMEx | |
107 * @brief TIM HAL module driver | |
108 * @{ | |
109 */ | |
110 | |
111 #ifdef HAL_TIM_MODULE_ENABLED | |
112 | |
113 /* Private typedef -----------------------------------------------------------*/ | |
114 /* Private define ------------------------------------------------------------*/ | |
115 /* Private macro -------------------------------------------------------------*/ | |
116 /* Private variables ---------------------------------------------------------*/ | |
117 /** @addtogroup TIMEx_Private_Functions | |
118 * @{ | |
119 */ | |
120 /* Private function prototypes -----------------------------------------------*/ | |
121 static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState); | |
122 /** | |
123 * @} | |
124 */ | |
125 | |
126 /* Exported functions --------------------------------------------------------*/ | |
127 /** @defgroup TIMEx_Exported_Functions TIM Exported Functions | |
128 * @{ | |
129 */ | |
130 | |
131 /** @defgroup TIMEx_Exported_Functions_Group1 Timer Hall Sensor functions | |
132 * @brief Timer Hall Sensor functions | |
133 * | |
134 @verbatim | |
135 ============================================================================== | |
136 ##### Timer Hall Sensor functions ##### | |
137 ============================================================================== | |
138 [..] | |
139 This section provides functions allowing to: | |
140 (+) Initialize and configure TIM HAL Sensor. | |
141 (+) De-initialize TIM HAL Sensor. | |
142 (+) Start the Hall Sensor Interface. | |
143 (+) Stop the Hall Sensor Interface. | |
144 (+) Start the Hall Sensor Interface and enable interrupts. | |
145 (+) Stop the Hall Sensor Interface and disable interrupts. | |
146 (+) Start the Hall Sensor Interface and enable DMA transfers. | |
147 (+) Stop the Hall Sensor Interface and disable DMA transfers. | |
148 | |
149 @endverbatim | |
150 * @{ | |
151 */ | |
152 /** | |
153 * @brief Initializes the TIM Hall Sensor Interface and create the associated handle. | |
154 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
155 * the configuration information for TIM module. | |
156 * @param sConfig: TIM Hall Sensor configuration structure | |
157 * @retval HAL status | |
158 */ | |
159 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig) | |
160 { | |
161 TIM_OC_InitTypeDef OC_Config; | |
162 | |
163 /* Check the TIM handle allocation */ | |
164 if(htim == NULL) | |
165 { | |
166 return HAL_ERROR; | |
167 } | |
168 | |
169 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); | |
170 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); | |
171 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); | |
172 assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity)); | |
173 assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); | |
174 assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); | |
175 | |
176 /* Set the TIM state */ | |
177 htim->State= HAL_TIM_STATE_BUSY; | |
178 | |
179 /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ | |
180 HAL_TIMEx_HallSensor_MspInit(htim); | |
181 | |
182 /* Configure the Time base in the Encoder Mode */ | |
183 TIM_Base_SetConfig(htim->Instance, &htim->Init); | |
184 | |
185 /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */ | |
186 TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter); | |
187 | |
188 /* Reset the IC1PSC Bits */ | |
189 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; | |
190 /* Set the IC1PSC value */ | |
191 htim->Instance->CCMR1 |= sConfig->IC1Prescaler; | |
192 | |
193 /* Enable the Hall sensor interface (XOR function of the three inputs) */ | |
194 htim->Instance->CR2 |= TIM_CR2_TI1S; | |
195 | |
196 /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */ | |
197 htim->Instance->SMCR &= ~TIM_SMCR_TS; | |
198 htim->Instance->SMCR |= TIM_TS_TI1F_ED; | |
199 | |
200 /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */ | |
201 htim->Instance->SMCR &= ~TIM_SMCR_SMS; | |
202 htim->Instance->SMCR |= TIM_SLAVEMODE_RESET; | |
203 | |
204 /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/ | |
205 OC_Config.OCFastMode = TIM_OCFAST_DISABLE; | |
206 OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET; | |
207 OC_Config.OCMode = TIM_OCMODE_PWM2; | |
208 OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET; | |
209 OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH; | |
210 OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH; | |
211 OC_Config.Pulse = sConfig->Commutation_Delay; | |
212 | |
213 TIM_OC2_SetConfig(htim->Instance, &OC_Config); | |
214 | |
215 /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2 | |
216 register to 101 */ | |
217 htim->Instance->CR2 &= ~TIM_CR2_MMS; | |
218 htim->Instance->CR2 |= TIM_TRGO_OC2REF; | |
219 | |
220 /* Initialize the TIM state*/ | |
221 htim->State= HAL_TIM_STATE_READY; | |
222 | |
223 return HAL_OK; | |
224 } | |
225 | |
226 /** | |
227 * @brief DeInitializes the TIM Hall Sensor interface | |
228 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
229 * the configuration information for TIM module. | |
230 * @retval HAL status | |
231 */ | |
232 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim) | |
233 { | |
234 /* Check the parameters */ | |
235 assert_param(IS_TIM_INSTANCE(htim->Instance)); | |
236 | |
237 htim->State = HAL_TIM_STATE_BUSY; | |
238 | |
239 /* Disable the TIM Peripheral Clock */ | |
240 __HAL_TIM_DISABLE(htim); | |
241 | |
242 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ | |
243 HAL_TIMEx_HallSensor_MspDeInit(htim); | |
244 | |
245 /* Change TIM state */ | |
246 htim->State = HAL_TIM_STATE_RESET; | |
247 | |
248 /* Release Lock */ | |
249 __HAL_UNLOCK(htim); | |
250 | |
251 return HAL_OK; | |
252 } | |
253 | |
254 /** | |
255 * @brief Initializes the TIM Hall Sensor MSP. | |
256 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
257 * the configuration information for TIM module. | |
258 * @retval None | |
259 */ | |
260 __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim) | |
261 { | |
262 /* NOTE : This function Should not be modified, when the callback is needed, | |
263 the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file | |
264 */ | |
265 } | |
266 | |
267 /** | |
268 * @brief DeInitializes TIM Hall Sensor MSP. | |
269 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
270 * the configuration information for TIM module. | |
271 * @retval None | |
272 */ | |
273 __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim) | |
274 { | |
275 /* NOTE : This function Should not be modified, when the callback is needed, | |
276 the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file | |
277 */ | |
278 } | |
279 | |
280 /** | |
281 * @brief Starts the TIM Hall Sensor Interface. | |
282 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
283 * the configuration information for TIM module. | |
284 * @retval HAL status | |
285 */ | |
286 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim) | |
287 { | |
288 /* Check the parameters */ | |
289 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); | |
290 | |
291 /* Enable the Input Capture channels 1 | |
292 (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ | |
293 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); | |
294 | |
295 /* Enable the Peripheral */ | |
296 __HAL_TIM_ENABLE(htim); | |
297 | |
298 /* Return function status */ | |
299 return HAL_OK; | |
300 } | |
301 | |
302 /** | |
303 * @brief Stops the TIM Hall sensor Interface. | |
304 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
305 * the configuration information for TIM module. | |
306 * @retval HAL status | |
307 */ | |
308 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim) | |
309 { | |
310 /* Check the parameters */ | |
311 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); | |
312 | |
313 /* Disable the Input Capture channels 1, 2 and 3 | |
314 (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ | |
315 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); | |
316 | |
317 /* Disable the Peripheral */ | |
318 __HAL_TIM_DISABLE(htim); | |
319 | |
320 /* Return function status */ | |
321 return HAL_OK; | |
322 } | |
323 | |
324 /** | |
325 * @brief Starts the TIM Hall Sensor Interface in interrupt mode. | |
326 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
327 * the configuration information for TIM module. | |
328 * @retval HAL status | |
329 */ | |
330 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim) | |
331 { | |
332 /* Check the parameters */ | |
333 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); | |
334 | |
335 /* Enable the capture compare Interrupts 1 event */ | |
336 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); | |
337 | |
338 /* Enable the Input Capture channels 1 | |
339 (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ | |
340 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); | |
341 | |
342 /* Enable the Peripheral */ | |
343 __HAL_TIM_ENABLE(htim); | |
344 | |
345 /* Return function status */ | |
346 return HAL_OK; | |
347 } | |
348 | |
349 /** | |
350 * @brief Stops the TIM Hall Sensor Interface in interrupt mode. | |
351 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
352 * the configuration information for TIM module. | |
353 * @retval HAL status | |
354 */ | |
355 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim) | |
356 { | |
357 /* Check the parameters */ | |
358 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); | |
359 | |
360 /* Disable the Input Capture channels 1 | |
361 (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ | |
362 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); | |
363 | |
364 /* Disable the capture compare Interrupts event */ | |
365 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); | |
366 | |
367 /* Disable the Peripheral */ | |
368 __HAL_TIM_DISABLE(htim); | |
369 | |
370 /* Return function status */ | |
371 return HAL_OK; | |
372 } | |
373 | |
374 /** | |
375 * @brief Starts the TIM Hall Sensor Interface in DMA mode. | |
376 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
377 * the configuration information for TIM module. | |
378 * @param pData: The destination Buffer address. | |
379 * @param Length: The length of data to be transferred from TIM peripheral to memory. | |
380 * @retval HAL status | |
381 */ | |
382 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length) | |
383 { | |
384 /* Check the parameters */ | |
385 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); | |
386 | |
387 if((htim->State == HAL_TIM_STATE_BUSY)) | |
388 { | |
389 return HAL_BUSY; | |
390 } | |
391 else if((htim->State == HAL_TIM_STATE_READY)) | |
392 { | |
393 if(((uint32_t)pData == 0 ) && (Length > 0)) | |
394 { | |
395 return HAL_ERROR; | |
396 } | |
397 else | |
398 { | |
399 htim->State = HAL_TIM_STATE_BUSY; | |
400 } | |
401 } | |
402 /* Enable the Input Capture channels 1 | |
403 (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ | |
404 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); | |
405 | |
406 /* Set the DMA Input Capture 1 Callback */ | |
407 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; | |
408 /* Set the DMA error callback */ | |
409 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; | |
410 | |
411 /* Enable the DMA Stream for Capture 1*/ | |
412 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length); | |
413 | |
414 /* Enable the capture compare 1 Interrupt */ | |
415 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); | |
416 | |
417 /* Enable the Peripheral */ | |
418 __HAL_TIM_ENABLE(htim); | |
419 | |
420 /* Return function status */ | |
421 return HAL_OK; | |
422 } | |
423 | |
424 /** | |
425 * @brief Stops the TIM Hall Sensor Interface in DMA mode. | |
426 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
427 * the configuration information for TIM module. | |
428 * @retval HAL status | |
429 */ | |
430 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim) | |
431 { | |
432 /* Check the parameters */ | |
433 assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); | |
434 | |
435 /* Disable the Input Capture channels 1 | |
436 (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ | |
437 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); | |
438 | |
439 | |
440 /* Disable the capture compare Interrupts 1 event */ | |
441 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); | |
442 | |
443 /* Disable the Peripheral */ | |
444 __HAL_TIM_DISABLE(htim); | |
445 | |
446 /* Return function status */ | |
447 return HAL_OK; | |
448 } | |
449 /** | |
450 * @} | |
451 */ | |
452 | |
453 /** @defgroup TIMEx_Exported_Functions_Group2 Timer Complementary Output Compare functions | |
454 * @brief Timer Complementary Output Compare functions | |
455 * | |
456 @verbatim | |
457 ============================================================================== | |
458 ##### Timer Complementary Output Compare functions ##### | |
459 ============================================================================== | |
460 [..] | |
461 This section provides functions allowing to: | |
462 (+) Start the Complementary Output Compare/PWM. | |
463 (+) Stop the Complementary Output Compare/PWM. | |
464 (+) Start the Complementary Output Compare/PWM and enable interrupts. | |
465 (+) Stop the Complementary Output Compare/PWM and disable interrupts. | |
466 (+) Start the Complementary Output Compare/PWM and enable DMA transfers. | |
467 (+) Stop the Complementary Output Compare/PWM and disable DMA transfers. | |
468 | |
469 @endverbatim | |
470 * @{ | |
471 */ | |
472 | |
473 /** | |
474 * @brief Starts the TIM Output Compare signal generation on the complementary | |
475 * output. | |
476 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
477 * the configuration information for TIM module. | |
478 * @param Channel: TIM Channel to be enabled. | |
479 * This parameter can be one of the following values: | |
480 * @arg TIM_CHANNEL_1: TIM Channel 1 selected | |
481 * @arg TIM_CHANNEL_2: TIM Channel 2 selected | |
482 * @arg TIM_CHANNEL_3: TIM Channel 3 selected | |
483 * @arg TIM_CHANNEL_4: TIM Channel 4 selected | |
484 * @retval HAL status | |
485 */ | |
486 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) | |
487 { | |
488 /* Check the parameters */ | |
489 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); | |
490 | |
491 /* Enable the Capture compare channel N */ | |
492 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); | |
493 | |
494 /* Enable the Main Output */ | |
495 __HAL_TIM_MOE_ENABLE(htim); | |
496 | |
497 /* Enable the Peripheral */ | |
498 __HAL_TIM_ENABLE(htim); | |
499 | |
500 /* Return function status */ | |
501 return HAL_OK; | |
502 } | |
503 | |
504 /** | |
505 * @brief Stops the TIM Output Compare signal generation on the complementary | |
506 * output. | |
507 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
508 * the configuration information for TIM module. | |
509 * @param Channel: TIM Channel to be disabled. | |
510 * This parameter can be one of the following values: | |
511 * @arg TIM_CHANNEL_1: TIM Channel 1 selected | |
512 * @arg TIM_CHANNEL_2: TIM Channel 2 selected | |
513 * @arg TIM_CHANNEL_3: TIM Channel 3 selected | |
514 * @arg TIM_CHANNEL_4: TIM Channel 4 selected | |
515 * @retval HAL status | |
516 */ | |
517 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) | |
518 { | |
519 /* Check the parameters */ | |
520 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); | |
521 | |
522 /* Disable the Capture compare channel N */ | |
523 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); | |
524 | |
525 /* Disable the Main Output */ | |
526 __HAL_TIM_MOE_DISABLE(htim); | |
527 | |
528 /* Disable the Peripheral */ | |
529 __HAL_TIM_DISABLE(htim); | |
530 | |
531 /* Return function status */ | |
532 return HAL_OK; | |
533 } | |
534 | |
535 /** | |
536 * @brief Starts the TIM Output Compare signal generation in interrupt mode | |
537 * on the complementary output. | |
538 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
539 * the configuration information for TIM module. | |
540 * @param Channel: TIM Channel to be enabled. | |
541 * This parameter can be one of the following values: | |
542 * @arg TIM_CHANNEL_1: TIM Channel 1 selected | |
543 * @arg TIM_CHANNEL_2: TIM Channel 2 selected | |
544 * @arg TIM_CHANNEL_3: TIM Channel 3 selected | |
545 * @arg TIM_CHANNEL_4: TIM Channel 4 selected | |
546 * @retval HAL status | |
547 */ | |
548 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) | |
549 { | |
550 /* Check the parameters */ | |
551 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); | |
552 | |
553 switch (Channel) | |
554 { | |
555 case TIM_CHANNEL_1: | |
556 { | |
557 /* Enable the TIM Output Compare interrupt */ | |
558 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); | |
559 } | |
560 break; | |
561 | |
562 case TIM_CHANNEL_2: | |
563 { | |
564 /* Enable the TIM Output Compare interrupt */ | |
565 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); | |
566 } | |
567 break; | |
568 | |
569 case TIM_CHANNEL_3: | |
570 { | |
571 /* Enable the TIM Output Compare interrupt */ | |
572 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); | |
573 } | |
574 break; | |
575 | |
576 case TIM_CHANNEL_4: | |
577 { | |
578 /* Enable the TIM Output Compare interrupt */ | |
579 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); | |
580 } | |
581 break; | |
582 | |
583 default: | |
584 break; | |
585 } | |
586 | |
587 /* Enable the TIM Break interrupt */ | |
588 __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); | |
589 | |
590 /* Enable the Capture compare channel N */ | |
591 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); | |
592 | |
593 /* Enable the Main Output */ | |
594 __HAL_TIM_MOE_ENABLE(htim); | |
595 | |
596 /* Enable the Peripheral */ | |
597 __HAL_TIM_ENABLE(htim); | |
598 | |
599 /* Return function status */ | |
600 return HAL_OK; | |
601 } | |
602 | |
603 /** | |
604 * @brief Stops the TIM Output Compare signal generation in interrupt mode | |
605 * on the complementary output. | |
606 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
607 * the configuration information for TIM module. | |
608 * @param Channel: TIM Channel to be disabled. | |
609 * This parameter can be one of the following values: | |
610 * @arg TIM_CHANNEL_1: TIM Channel 1 selected | |
611 * @arg TIM_CHANNEL_2: TIM Channel 2 selected | |
612 * @arg TIM_CHANNEL_3: TIM Channel 3 selected | |
613 * @arg TIM_CHANNEL_4: TIM Channel 4 selected | |
614 * @retval HAL status | |
615 */ | |
616 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) | |
617 { | |
618 /* Check the parameters */ | |
619 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); | |
620 | |
621 switch (Channel) | |
622 { | |
623 case TIM_CHANNEL_1: | |
624 { | |
625 /* Disable the TIM Output Compare interrupt */ | |
626 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); | |
627 } | |
628 break; | |
629 | |
630 case TIM_CHANNEL_2: | |
631 { | |
632 /* Disable the TIM Output Compare interrupt */ | |
633 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); | |
634 } | |
635 break; | |
636 | |
637 case TIM_CHANNEL_3: | |
638 { | |
639 /* Disable the TIM Output Compare interrupt */ | |
640 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); | |
641 } | |
642 break; | |
643 | |
644 case TIM_CHANNEL_4: | |
645 { | |
646 /* Disable the TIM Output Compare interrupt */ | |
647 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); | |
648 } | |
649 break; | |
650 | |
651 default: | |
652 break; | |
653 } | |
654 | |
655 /* Disable the Capture compare channel N */ | |
656 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); | |
657 | |
658 /* Disable the TIM Break interrupt (only if no more channel is active) */ | |
659 if((READ_REG(htim->Instance->CCER) & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET) | |
660 { | |
661 __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); | |
662 } | |
663 | |
664 /* Disable the Main Output */ | |
665 __HAL_TIM_MOE_DISABLE(htim); | |
666 | |
667 /* Disable the Peripheral */ | |
668 __HAL_TIM_DISABLE(htim); | |
669 | |
670 /* Return function status */ | |
671 return HAL_OK; | |
672 } | |
673 | |
674 /** | |
675 * @brief Starts the TIM Output Compare signal generation in DMA mode | |
676 * on the complementary output. | |
677 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
678 * the configuration information for TIM module. | |
679 * @param Channel: TIM Channel to be enabled. | |
680 * This parameter can be one of the following values: | |
681 * @arg TIM_CHANNEL_1: TIM Channel 1 selected | |
682 * @arg TIM_CHANNEL_2: TIM Channel 2 selected | |
683 * @arg TIM_CHANNEL_3: TIM Channel 3 selected | |
684 * @arg TIM_CHANNEL_4: TIM Channel 4 selected | |
685 * @param pData: The source Buffer address. | |
686 * @param Length: The length of data to be transferred from memory to TIM peripheral | |
687 * @retval HAL status | |
688 */ | |
689 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) | |
690 { | |
691 /* Check the parameters */ | |
692 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); | |
693 | |
694 if((htim->State == HAL_TIM_STATE_BUSY)) | |
695 { | |
696 return HAL_BUSY; | |
697 } | |
698 else if((htim->State == HAL_TIM_STATE_READY)) | |
699 { | |
700 if(((uint32_t)pData == 0 ) && (Length > 0)) | |
701 { | |
702 return HAL_ERROR; | |
703 } | |
704 else | |
705 { | |
706 htim->State = HAL_TIM_STATE_BUSY; | |
707 } | |
708 } | |
709 switch (Channel) | |
710 { | |
711 case TIM_CHANNEL_1: | |
712 { | |
713 /* Set the DMA Period elapsed callback */ | |
714 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; | |
715 | |
716 /* Set the DMA error callback */ | |
717 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; | |
718 | |
719 /* Enable the DMA Stream */ | |
720 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length); | |
721 | |
722 /* Enable the TIM Output Compare DMA request */ | |
723 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); | |
724 } | |
725 break; | |
726 | |
727 case TIM_CHANNEL_2: | |
728 { | |
729 /* Set the DMA Period elapsed callback */ | |
730 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; | |
731 | |
732 /* Set the DMA error callback */ | |
733 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; | |
734 | |
735 /* Enable the DMA Stream */ | |
736 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length); | |
737 | |
738 /* Enable the TIM Output Compare DMA request */ | |
739 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); | |
740 } | |
741 break; | |
742 | |
743 case TIM_CHANNEL_3: | |
744 { | |
745 /* Set the DMA Period elapsed callback */ | |
746 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; | |
747 | |
748 /* Set the DMA error callback */ | |
749 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; | |
750 | |
751 /* Enable the DMA Stream */ | |
752 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length); | |
753 | |
754 /* Enable the TIM Output Compare DMA request */ | |
755 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); | |
756 } | |
757 break; | |
758 | |
759 case TIM_CHANNEL_4: | |
760 { | |
761 /* Set the DMA Period elapsed callback */ | |
762 htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; | |
763 | |
764 /* Set the DMA error callback */ | |
765 htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; | |
766 | |
767 /* Enable the DMA Stream */ | |
768 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length); | |
769 | |
770 /* Enable the TIM Output Compare DMA request */ | |
771 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); | |
772 } | |
773 break; | |
774 | |
775 default: | |
776 break; | |
777 } | |
778 | |
779 /* Enable the Capture compare channel N */ | |
780 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); | |
781 | |
782 /* Enable the Main Output */ | |
783 __HAL_TIM_MOE_ENABLE(htim); | |
784 | |
785 /* Enable the Peripheral */ | |
786 __HAL_TIM_ENABLE(htim); | |
787 | |
788 /* Return function status */ | |
789 return HAL_OK; | |
790 } | |
791 | |
792 /** | |
793 * @brief Stops the TIM Output Compare signal generation in DMA mode | |
794 * on the complementary output. | |
795 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
796 * the configuration information for TIM module. | |
797 * @param Channel: TIM Channel to be disabled. | |
798 * This parameter can be one of the following values: | |
799 * @arg TIM_CHANNEL_1: TIM Channel 1 selected | |
800 * @arg TIM_CHANNEL_2: TIM Channel 2 selected | |
801 * @arg TIM_CHANNEL_3: TIM Channel 3 selected | |
802 * @arg TIM_CHANNEL_4: TIM Channel 4 selected | |
803 * @retval HAL status | |
804 */ | |
805 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) | |
806 { | |
807 /* Check the parameters */ | |
808 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); | |
809 | |
810 switch (Channel) | |
811 { | |
812 case TIM_CHANNEL_1: | |
813 { | |
814 /* Disable the TIM Output Compare DMA request */ | |
815 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); | |
816 } | |
817 break; | |
818 | |
819 case TIM_CHANNEL_2: | |
820 { | |
821 /* Disable the TIM Output Compare DMA request */ | |
822 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); | |
823 } | |
824 break; | |
825 | |
826 case TIM_CHANNEL_3: | |
827 { | |
828 /* Disable the TIM Output Compare DMA request */ | |
829 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); | |
830 } | |
831 break; | |
832 | |
833 case TIM_CHANNEL_4: | |
834 { | |
835 /* Disable the TIM Output Compare interrupt */ | |
836 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); | |
837 } | |
838 break; | |
839 | |
840 default: | |
841 break; | |
842 } | |
843 | |
844 /* Disable the Capture compare channel N */ | |
845 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); | |
846 | |
847 /* Disable the Main Output */ | |
848 __HAL_TIM_MOE_DISABLE(htim); | |
849 | |
850 /* Disable the Peripheral */ | |
851 __HAL_TIM_DISABLE(htim); | |
852 | |
853 /* Change the htim state */ | |
854 htim->State = HAL_TIM_STATE_READY; | |
855 | |
856 /* Return function status */ | |
857 return HAL_OK; | |
858 } | |
859 /** | |
860 * @} | |
861 */ | |
862 | |
863 /** @defgroup TIMEx_Exported_Functions_Group3 Timer Complementary PWM functions | |
864 * @brief Timer Complementary PWM functions | |
865 * | |
866 @verbatim | |
867 ============================================================================== | |
868 ##### Timer Complementary PWM functions ##### | |
869 ============================================================================== | |
870 [..] | |
871 This section provides functions allowing to: | |
872 (+) Start the Complementary PWM. | |
873 (+) Stop the Complementary PWM. | |
874 (+) Start the Complementary PWM and enable interrupts. | |
875 (+) Stop the Complementary PWM and disable interrupts. | |
876 (+) Start the Complementary PWM and enable DMA transfers. | |
877 (+) Stop the Complementary PWM and disable DMA transfers. | |
878 (+) Start the Complementary Input Capture measurement. | |
879 (+) Stop the Complementary Input Capture. | |
880 (+) Start the Complementary Input Capture and enable interrupts. | |
881 (+) Stop the Complementary Input Capture and disable interrupts. | |
882 (+) Start the Complementary Input Capture and enable DMA transfers. | |
883 (+) Stop the Complementary Input Capture and disable DMA transfers. | |
884 (+) Start the Complementary One Pulse generation. | |
885 (+) Stop the Complementary One Pulse. | |
886 (+) Start the Complementary One Pulse and enable interrupts. | |
887 (+) Stop the Complementary One Pulse and disable interrupts. | |
888 | |
889 @endverbatim | |
890 * @{ | |
891 */ | |
892 | |
893 /** | |
894 * @brief Starts the PWM signal generation on the complementary output. | |
895 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
896 * the configuration information for TIM module. | |
897 * @param Channel: TIM Channel to be enabled. | |
898 * This parameter can be one of the following values: | |
899 * @arg TIM_CHANNEL_1: TIM Channel 1 selected | |
900 * @arg TIM_CHANNEL_2: TIM Channel 2 selected | |
901 * @arg TIM_CHANNEL_3: TIM Channel 3 selected | |
902 * @arg TIM_CHANNEL_4: TIM Channel 4 selected | |
903 * @retval HAL status | |
904 */ | |
905 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) | |
906 { | |
907 /* Check the parameters */ | |
908 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); | |
909 | |
910 /* Enable the complementary PWM output */ | |
911 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); | |
912 | |
913 /* Enable the Main Output */ | |
914 __HAL_TIM_MOE_ENABLE(htim); | |
915 | |
916 /* Enable the Peripheral */ | |
917 __HAL_TIM_ENABLE(htim); | |
918 | |
919 /* Return function status */ | |
920 return HAL_OK; | |
921 } | |
922 | |
923 /** | |
924 * @brief Stops the PWM signal generation on the complementary output. | |
925 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
926 * the configuration information for TIM module. | |
927 * @param Channel: TIM Channel to be disabled. | |
928 * This parameter can be one of the following values: | |
929 * @arg TIM_CHANNEL_1: TIM Channel 1 selected | |
930 * @arg TIM_CHANNEL_2: TIM Channel 2 selected | |
931 * @arg TIM_CHANNEL_3: TIM Channel 3 selected | |
932 * @arg TIM_CHANNEL_4: TIM Channel 4 selected | |
933 * @retval HAL status | |
934 */ | |
935 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) | |
936 { | |
937 /* Check the parameters */ | |
938 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); | |
939 | |
940 /* Disable the complementary PWM output */ | |
941 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); | |
942 | |
943 /* Disable the Main Output */ | |
944 __HAL_TIM_MOE_DISABLE(htim); | |
945 | |
946 /* Disable the Peripheral */ | |
947 __HAL_TIM_DISABLE(htim); | |
948 | |
949 /* Return function status */ | |
950 return HAL_OK; | |
951 } | |
952 | |
953 /** | |
954 * @brief Starts the PWM signal generation in interrupt mode on the | |
955 * complementary output. | |
956 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
957 * the configuration information for TIM module. | |
958 * @param Channel: TIM Channel to be disabled. | |
959 * This parameter can be one of the following values: | |
960 * @arg TIM_CHANNEL_1: TIM Channel 1 selected | |
961 * @arg TIM_CHANNEL_2: TIM Channel 2 selected | |
962 * @arg TIM_CHANNEL_3: TIM Channel 3 selected | |
963 * @arg TIM_CHANNEL_4: TIM Channel 4 selected | |
964 * @retval HAL status | |
965 */ | |
966 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) | |
967 { | |
968 /* Check the parameters */ | |
969 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); | |
970 | |
971 switch (Channel) | |
972 { | |
973 case TIM_CHANNEL_1: | |
974 { | |
975 /* Enable the TIM Capture/Compare 1 interrupt */ | |
976 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); | |
977 } | |
978 break; | |
979 | |
980 case TIM_CHANNEL_2: | |
981 { | |
982 /* Enable the TIM Capture/Compare 2 interrupt */ | |
983 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); | |
984 } | |
985 break; | |
986 | |
987 case TIM_CHANNEL_3: | |
988 { | |
989 /* Enable the TIM Capture/Compare 3 interrupt */ | |
990 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); | |
991 } | |
992 break; | |
993 | |
994 case TIM_CHANNEL_4: | |
995 { | |
996 /* Enable the TIM Capture/Compare 4 interrupt */ | |
997 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); | |
998 } | |
999 break; | |
1000 | |
1001 default: | |
1002 break; | |
1003 } | |
1004 | |
1005 /* Enable the TIM Break interrupt */ | |
1006 __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); | |
1007 | |
1008 /* Enable the complementary PWM output */ | |
1009 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); | |
1010 | |
1011 /* Enable the Main Output */ | |
1012 __HAL_TIM_MOE_ENABLE(htim); | |
1013 | |
1014 /* Enable the Peripheral */ | |
1015 __HAL_TIM_ENABLE(htim); | |
1016 | |
1017 /* Return function status */ | |
1018 return HAL_OK; | |
1019 } | |
1020 | |
1021 /** | |
1022 * @brief Stops the PWM signal generation in interrupt mode on the | |
1023 * complementary output. | |
1024 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
1025 * the configuration information for TIM module. | |
1026 * @param Channel: TIM Channel to be disabled. | |
1027 * This parameter can be one of the following values: | |
1028 * @arg TIM_CHANNEL_1: TIM Channel 1 selected | |
1029 * @arg TIM_CHANNEL_2: TIM Channel 2 selected | |
1030 * @arg TIM_CHANNEL_3: TIM Channel 3 selected | |
1031 * @arg TIM_CHANNEL_4: TIM Channel 4 selected | |
1032 * @retval HAL status | |
1033 */ | |
1034 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel) | |
1035 { | |
1036 /* Check the parameters */ | |
1037 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); | |
1038 | |
1039 switch (Channel) | |
1040 { | |
1041 case TIM_CHANNEL_1: | |
1042 { | |
1043 /* Disable the TIM Capture/Compare 1 interrupt */ | |
1044 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); | |
1045 } | |
1046 break; | |
1047 | |
1048 case TIM_CHANNEL_2: | |
1049 { | |
1050 /* Disable the TIM Capture/Compare 2 interrupt */ | |
1051 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); | |
1052 } | |
1053 break; | |
1054 | |
1055 case TIM_CHANNEL_3: | |
1056 { | |
1057 /* Disable the TIM Capture/Compare 3 interrupt */ | |
1058 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); | |
1059 } | |
1060 break; | |
1061 | |
1062 case TIM_CHANNEL_4: | |
1063 { | |
1064 /* Disable the TIM Capture/Compare 3 interrupt */ | |
1065 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); | |
1066 } | |
1067 break; | |
1068 | |
1069 default: | |
1070 break; | |
1071 } | |
1072 | |
1073 /* Disable the complementary PWM output */ | |
1074 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); | |
1075 | |
1076 /* Disable the TIM Break interrupt (only if no more channel is active) */ | |
1077 if((READ_REG(htim->Instance->CCER) & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET) | |
1078 { | |
1079 __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); | |
1080 } | |
1081 | |
1082 /* Disable the Main Output */ | |
1083 __HAL_TIM_MOE_DISABLE(htim); | |
1084 | |
1085 /* Disable the Peripheral */ | |
1086 __HAL_TIM_DISABLE(htim); | |
1087 | |
1088 /* Return function status */ | |
1089 return HAL_OK; | |
1090 } | |
1091 | |
1092 /** | |
1093 * @brief Starts the TIM PWM signal generation in DMA mode on the | |
1094 * complementary output | |
1095 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
1096 * the configuration information for TIM module. | |
1097 * @param Channel: TIM Channel to be enabled. | |
1098 * This parameter can be one of the following values: | |
1099 * @arg TIM_CHANNEL_1: TIM Channel 1 selected | |
1100 * @arg TIM_CHANNEL_2: TIM Channel 2 selected | |
1101 * @arg TIM_CHANNEL_3: TIM Channel 3 selected | |
1102 * @arg TIM_CHANNEL_4: TIM Channel 4 selected | |
1103 * @param pData: The source Buffer address. | |
1104 * @param Length: The length of data to be transferred from memory to TIM peripheral | |
1105 * @retval HAL status | |
1106 */ | |
1107 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) | |
1108 { | |
1109 /* Check the parameters */ | |
1110 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); | |
1111 | |
1112 if((htim->State == HAL_TIM_STATE_BUSY)) | |
1113 { | |
1114 return HAL_BUSY; | |
1115 } | |
1116 else if((htim->State == HAL_TIM_STATE_READY)) | |
1117 { | |
1118 if(((uint32_t)pData == 0 ) && (Length > 0)) | |
1119 { | |
1120 return HAL_ERROR; | |
1121 } | |
1122 else | |
1123 { | |
1124 htim->State = HAL_TIM_STATE_BUSY; | |
1125 } | |
1126 } | |
1127 switch (Channel) | |
1128 { | |
1129 case TIM_CHANNEL_1: | |
1130 { | |
1131 /* Set the DMA Period elapsed callback */ | |
1132 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; | |
1133 | |
1134 /* Set the DMA error callback */ | |
1135 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; | |
1136 | |
1137 /* Enable the DMA Stream */ | |
1138 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length); | |
1139 | |
1140 /* Enable the TIM Capture/Compare 1 DMA request */ | |
1141 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); | |
1142 } | |
1143 break; | |
1144 | |
1145 case TIM_CHANNEL_2: | |
1146 { | |
1147 /* Set the DMA Period elapsed callback */ | |
1148 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; | |
1149 | |
1150 /* Set the DMA error callback */ | |
1151 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; | |
1152 | |
1153 /* Enable the DMA Stream */ | |
1154 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length); | |
1155 | |
1156 /* Enable the TIM Capture/Compare 2 DMA request */ | |
1157 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); | |
1158 } | |
1159 break; | |
1160 | |
1161 case TIM_CHANNEL_3: | |
1162 { | |
1163 /* Set the DMA Period elapsed callback */ | |
1164 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; | |
1165 | |
1166 /* Set the DMA error callback */ | |
1167 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; | |
1168 | |
1169 /* Enable the DMA Stream */ | |
1170 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length); | |
1171 | |
1172 /* Enable the TIM Capture/Compare 3 DMA request */ | |
1173 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); | |
1174 } | |
1175 break; | |
1176 | |
1177 case TIM_CHANNEL_4: | |
1178 { | |
1179 /* Set the DMA Period elapsed callback */ | |
1180 htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; | |
1181 | |
1182 /* Set the DMA error callback */ | |
1183 htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; | |
1184 | |
1185 /* Enable the DMA Stream */ | |
1186 HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length); | |
1187 | |
1188 /* Enable the TIM Capture/Compare 4 DMA request */ | |
1189 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); | |
1190 } | |
1191 break; | |
1192 | |
1193 default: | |
1194 break; | |
1195 } | |
1196 | |
1197 /* Enable the complementary PWM output */ | |
1198 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); | |
1199 | |
1200 /* Enable the Main Output */ | |
1201 __HAL_TIM_MOE_ENABLE(htim); | |
1202 | |
1203 /* Enable the Peripheral */ | |
1204 __HAL_TIM_ENABLE(htim); | |
1205 | |
1206 /* Return function status */ | |
1207 return HAL_OK; | |
1208 } | |
1209 | |
1210 /** | |
1211 * @brief Stops the TIM PWM signal generation in DMA mode on the complementary | |
1212 * output | |
1213 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
1214 * the configuration information for TIM module. | |
1215 * @param Channel: TIM Channel to be disabled. | |
1216 * This parameter can be one of the following values: | |
1217 * @arg TIM_CHANNEL_1: TIM Channel 1 selected | |
1218 * @arg TIM_CHANNEL_2: TIM Channel 2 selected | |
1219 * @arg TIM_CHANNEL_3: TIM Channel 3 selected | |
1220 * @arg TIM_CHANNEL_4: TIM Channel 4 selected | |
1221 * @retval HAL status | |
1222 */ | |
1223 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) | |
1224 { | |
1225 /* Check the parameters */ | |
1226 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); | |
1227 | |
1228 switch (Channel) | |
1229 { | |
1230 case TIM_CHANNEL_1: | |
1231 { | |
1232 /* Disable the TIM Capture/Compare 1 DMA request */ | |
1233 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); | |
1234 } | |
1235 break; | |
1236 | |
1237 case TIM_CHANNEL_2: | |
1238 { | |
1239 /* Disable the TIM Capture/Compare 2 DMA request */ | |
1240 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); | |
1241 } | |
1242 break; | |
1243 | |
1244 case TIM_CHANNEL_3: | |
1245 { | |
1246 /* Disable the TIM Capture/Compare 3 DMA request */ | |
1247 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); | |
1248 } | |
1249 break; | |
1250 | |
1251 case TIM_CHANNEL_4: | |
1252 { | |
1253 /* Disable the TIM Capture/Compare 4 DMA request */ | |
1254 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); | |
1255 } | |
1256 break; | |
1257 | |
1258 default: | |
1259 break; | |
1260 } | |
1261 | |
1262 /* Disable the complementary PWM output */ | |
1263 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); | |
1264 | |
1265 /* Disable the Main Output */ | |
1266 __HAL_TIM_MOE_DISABLE(htim); | |
1267 | |
1268 /* Disable the Peripheral */ | |
1269 __HAL_TIM_DISABLE(htim); | |
1270 | |
1271 /* Change the htim state */ | |
1272 htim->State = HAL_TIM_STATE_READY; | |
1273 | |
1274 /* Return function status */ | |
1275 return HAL_OK; | |
1276 } | |
1277 | |
1278 /** | |
1279 * @} | |
1280 */ | |
1281 | |
1282 /** @defgroup TIMEx_Exported_Functions_Group4 Timer Complementary One Pulse functions | |
1283 * @brief Timer Complementary One Pulse functions | |
1284 * | |
1285 @verbatim | |
1286 ============================================================================== | |
1287 ##### Timer Complementary One Pulse functions ##### | |
1288 ============================================================================== | |
1289 [..] | |
1290 This section provides functions allowing to: | |
1291 (+) Start the Complementary One Pulse generation. | |
1292 (+) Stop the Complementary One Pulse. | |
1293 (+) Start the Complementary One Pulse and enable interrupts. | |
1294 (+) Stop the Complementary One Pulse and disable interrupts. | |
1295 | |
1296 @endverbatim | |
1297 * @{ | |
1298 */ | |
1299 | |
1300 /** | |
1301 * @brief Starts the TIM One Pulse signal generation on the complementary | |
1302 * output. | |
1303 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
1304 * the configuration information for TIM module. | |
1305 * @param OutputChannel: TIM Channel to be enabled. | |
1306 * This parameter can be one of the following values: | |
1307 * @arg TIM_CHANNEL_1: TIM Channel 1 selected | |
1308 * @arg TIM_CHANNEL_2: TIM Channel 2 selected | |
1309 * @retval HAL status | |
1310 */ | |
1311 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel) | |
1312 { | |
1313 /* Check the parameters */ | |
1314 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); | |
1315 | |
1316 /* Enable the complementary One Pulse output */ | |
1317 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); | |
1318 | |
1319 /* Enable the Main Output */ | |
1320 __HAL_TIM_MOE_ENABLE(htim); | |
1321 | |
1322 /* Return function status */ | |
1323 return HAL_OK; | |
1324 } | |
1325 | |
1326 /** | |
1327 * @brief Stops the TIM One Pulse signal generation on the complementary | |
1328 * output. | |
1329 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
1330 * the configuration information for TIM module. | |
1331 * @param OutputChannel: TIM Channel to be disabled. | |
1332 * This parameter can be one of the following values: | |
1333 * @arg TIM_CHANNEL_1: TIM Channel 1 selected | |
1334 * @arg TIM_CHANNEL_2: TIM Channel 2 selected | |
1335 * @retval HAL status | |
1336 */ | |
1337 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel) | |
1338 { | |
1339 | |
1340 /* Check the parameters */ | |
1341 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); | |
1342 | |
1343 /* Disable the complementary One Pulse output */ | |
1344 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); | |
1345 | |
1346 /* Disable the Main Output */ | |
1347 __HAL_TIM_MOE_DISABLE(htim); | |
1348 | |
1349 /* Disable the Peripheral */ | |
1350 __HAL_TIM_DISABLE(htim); | |
1351 | |
1352 /* Return function status */ | |
1353 return HAL_OK; | |
1354 } | |
1355 | |
1356 /** | |
1357 * @brief Starts the TIM One Pulse signal generation in interrupt mode on the | |
1358 * complementary channel. | |
1359 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
1360 * the configuration information for TIM module. | |
1361 * @param OutputChannel: TIM Channel to be enabled. | |
1362 * This parameter can be one of the following values: | |
1363 * @arg TIM_CHANNEL_1: TIM Channel 1 selected | |
1364 * @arg TIM_CHANNEL_2: TIM Channel 2 selected | |
1365 * @retval HAL status | |
1366 */ | |
1367 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) | |
1368 { | |
1369 /* Check the parameters */ | |
1370 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); | |
1371 | |
1372 /* Enable the TIM Capture/Compare 1 interrupt */ | |
1373 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); | |
1374 | |
1375 /* Enable the TIM Capture/Compare 2 interrupt */ | |
1376 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); | |
1377 | |
1378 /* Enable the complementary One Pulse output */ | |
1379 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); | |
1380 | |
1381 /* Enable the Main Output */ | |
1382 __HAL_TIM_MOE_ENABLE(htim); | |
1383 | |
1384 /* Return function status */ | |
1385 return HAL_OK; | |
1386 } | |
1387 | |
1388 /** | |
1389 * @brief Stops the TIM One Pulse signal generation in interrupt mode on the | |
1390 * complementary channel. | |
1391 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
1392 * the configuration information for TIM module. | |
1393 * @param OutputChannel: TIM Channel to be disabled. | |
1394 * This parameter can be one of the following values: | |
1395 * @arg TIM_CHANNEL_1: TIM Channel 1 selected | |
1396 * @arg TIM_CHANNEL_2: TIM Channel 2 selected | |
1397 * @retval HAL status | |
1398 */ | |
1399 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) | |
1400 { | |
1401 /* Check the parameters */ | |
1402 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); | |
1403 | |
1404 /* Disable the TIM Capture/Compare 1 interrupt */ | |
1405 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); | |
1406 | |
1407 /* Disable the TIM Capture/Compare 2 interrupt */ | |
1408 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); | |
1409 | |
1410 /* Disable the complementary One Pulse output */ | |
1411 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); | |
1412 | |
1413 /* Disable the Main Output */ | |
1414 __HAL_TIM_MOE_DISABLE(htim); | |
1415 | |
1416 /* Disable the Peripheral */ | |
1417 __HAL_TIM_DISABLE(htim); | |
1418 | |
1419 /* Return function status */ | |
1420 return HAL_OK; | |
1421 } | |
1422 /** | |
1423 * @} | |
1424 */ | |
1425 | |
1426 /** @defgroup TIMEx_Exported_Functions_Group5 Peripheral Control functions | |
1427 * @brief Peripheral Control functions | |
1428 * | |
1429 @verbatim | |
1430 ============================================================================== | |
1431 ##### Peripheral Control functions ##### | |
1432 ============================================================================== | |
1433 [..] | |
1434 This section provides functions allowing to: | |
1435 (+) Configure The Input Output channels for OC, PWM, IC or One Pulse mode. | |
1436 (+) Configure External Clock source. | |
1437 (+) Configure Complementary channels, break features and dead time. | |
1438 (+) Configure Master and the Slave synchronization. | |
1439 (+) Configure the commutation event in case of use of the Hall sensor interface. | |
1440 (+) Configure the DMA Burst Mode. | |
1441 | |
1442 @endverbatim | |
1443 * @{ | |
1444 */ | |
1445 /** | |
1446 * @brief Configure the TIM commutation event sequence. | |
1447 * @note This function is mandatory to use the commutation event in order to | |
1448 * update the configuration at each commutation detection on the TRGI input of the Timer, | |
1449 * the typical use of this feature is with the use of another Timer(interface Timer) | |
1450 * configured in Hall sensor interface, this interface Timer will generate the | |
1451 * commutation at its TRGO output (connected to Timer used in this function) each time | |
1452 * the TI1 of the Interface Timer detect a commutation at its input TI1. | |
1453 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
1454 * the configuration information for TIM module. | |
1455 * @param InputTrigger: the Internal trigger corresponding to the Timer Interfacing with the Hall sensor. | |
1456 * This parameter can be one of the following values: | |
1457 * @arg TIM_TS_ITR0: Internal trigger 0 selected | |
1458 * @arg TIM_TS_ITR1: Internal trigger 1 selected | |
1459 * @arg TIM_TS_ITR2: Internal trigger 2 selected | |
1460 * @arg TIM_TS_ITR3: Internal trigger 3 selected | |
1461 * @arg TIM_TS_NONE: No trigger is needed | |
1462 * @param CommutationSource: the Commutation Event source. | |
1463 * This parameter can be one of the following values: | |
1464 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer | |
1465 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit | |
1466 * @retval HAL status | |
1467 */ | |
1468 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) | |
1469 { | |
1470 /* Check the parameters */ | |
1471 assert_param(IS_TIM_ADVANCED_INSTANCE(htim->Instance)); | |
1472 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); | |
1473 | |
1474 __HAL_LOCK(htim); | |
1475 | |
1476 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || | |
1477 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) | |
1478 { | |
1479 /* Select the Input trigger */ | |
1480 htim->Instance->SMCR &= ~TIM_SMCR_TS; | |
1481 htim->Instance->SMCR |= InputTrigger; | |
1482 } | |
1483 | |
1484 /* Select the Capture Compare preload feature */ | |
1485 htim->Instance->CR2 |= TIM_CR2_CCPC; | |
1486 /* Select the Commutation event source */ | |
1487 htim->Instance->CR2 &= ~TIM_CR2_CCUS; | |
1488 htim->Instance->CR2 |= CommutationSource; | |
1489 | |
1490 __HAL_UNLOCK(htim); | |
1491 | |
1492 return HAL_OK; | |
1493 } | |
1494 | |
1495 /** | |
1496 * @brief Configure the TIM commutation event sequence with interrupt. | |
1497 * @note This function is mandatory to use the commutation event in order to | |
1498 * update the configuration at each commutation detection on the TRGI input of the Timer, | |
1499 * the typical use of this feature is with the use of another Timer(interface Timer) | |
1500 * configured in Hall sensor interface, this interface Timer will generate the | |
1501 * commutation at its TRGO output (connected to Timer used in this function) each time | |
1502 * the TI1 of the Interface Timer detect a commutation at its input TI1. | |
1503 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
1504 * the configuration information for TIM module. | |
1505 * @param InputTrigger: the Internal trigger corresponding to the Timer Interfacing with the Hall sensor. | |
1506 * This parameter can be one of the following values: | |
1507 * @arg TIM_TS_ITR0: Internal trigger 0 selected | |
1508 * @arg TIM_TS_ITR1: Internal trigger 1 selected | |
1509 * @arg TIM_TS_ITR2: Internal trigger 2 selected | |
1510 * @arg TIM_TS_ITR3: Internal trigger 3 selected | |
1511 * @arg TIM_TS_NONE: No trigger is needed | |
1512 * @param CommutationSource: the Commutation Event source. | |
1513 * This parameter can be one of the following values: | |
1514 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer | |
1515 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit | |
1516 * @retval HAL status | |
1517 */ | |
1518 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) | |
1519 { | |
1520 /* Check the parameters */ | |
1521 assert_param(IS_TIM_ADVANCED_INSTANCE(htim->Instance)); | |
1522 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); | |
1523 | |
1524 __HAL_LOCK(htim); | |
1525 | |
1526 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || | |
1527 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) | |
1528 { | |
1529 /* Select the Input trigger */ | |
1530 htim->Instance->SMCR &= ~TIM_SMCR_TS; | |
1531 htim->Instance->SMCR |= InputTrigger; | |
1532 } | |
1533 | |
1534 /* Select the Capture Compare preload feature */ | |
1535 htim->Instance->CR2 |= TIM_CR2_CCPC; | |
1536 /* Select the Commutation event source */ | |
1537 htim->Instance->CR2 &= ~TIM_CR2_CCUS; | |
1538 htim->Instance->CR2 |= CommutationSource; | |
1539 | |
1540 /* Enable the Commutation Interrupt Request */ | |
1541 __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM); | |
1542 | |
1543 __HAL_UNLOCK(htim); | |
1544 | |
1545 return HAL_OK; | |
1546 } | |
1547 | |
1548 /** | |
1549 * @brief Configure the TIM commutation event sequence with DMA. | |
1550 * @note This function is mandatory to use the commutation event in order to | |
1551 * update the configuration at each commutation detection on the TRGI input of the Timer, | |
1552 * the typical use of this feature is with the use of another Timer(interface Timer) | |
1553 * configured in Hall sensor interface, this interface Timer will generate the | |
1554 * commutation at its TRGO output (connected to Timer used in this function) each time | |
1555 * the TI1 of the Interface Timer detect a commutation at its input TI1. | |
1556 * @note: The user should configure the DMA in his own software, in This function only the COMDE bit is set | |
1557 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
1558 * the configuration information for TIM module. | |
1559 * @param InputTrigger: the Internal trigger corresponding to the Timer Interfacing with the Hall sensor. | |
1560 * This parameter can be one of the following values: | |
1561 * @arg TIM_TS_ITR0: Internal trigger 0 selected | |
1562 * @arg TIM_TS_ITR1: Internal trigger 1 selected | |
1563 * @arg TIM_TS_ITR2: Internal trigger 2 selected | |
1564 * @arg TIM_TS_ITR3: Internal trigger 3 selected | |
1565 * @arg TIM_TS_NONE: No trigger is needed | |
1566 * @param CommutationSource: the Commutation Event source. | |
1567 * This parameter can be one of the following values: | |
1568 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer | |
1569 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit | |
1570 * @retval HAL status | |
1571 */ | |
1572 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) | |
1573 { | |
1574 /* Check the parameters */ | |
1575 assert_param(IS_TIM_ADVANCED_INSTANCE(htim->Instance)); | |
1576 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); | |
1577 | |
1578 __HAL_LOCK(htim); | |
1579 | |
1580 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || | |
1581 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) | |
1582 { | |
1583 /* Select the Input trigger */ | |
1584 htim->Instance->SMCR &= ~TIM_SMCR_TS; | |
1585 htim->Instance->SMCR |= InputTrigger; | |
1586 } | |
1587 | |
1588 /* Select the Capture Compare preload feature */ | |
1589 htim->Instance->CR2 |= TIM_CR2_CCPC; | |
1590 /* Select the Commutation event source */ | |
1591 htim->Instance->CR2 &= ~TIM_CR2_CCUS; | |
1592 htim->Instance->CR2 |= CommutationSource; | |
1593 | |
1594 /* Enable the Commutation DMA Request */ | |
1595 /* Set the DMA Commutation Callback */ | |
1596 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt; | |
1597 /* Set the DMA error callback */ | |
1598 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError; | |
1599 | |
1600 /* Enable the Commutation DMA Request */ | |
1601 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM); | |
1602 | |
1603 __HAL_UNLOCK(htim); | |
1604 | |
1605 return HAL_OK; | |
1606 } | |
1607 | |
1608 /** | |
1609 * @brief Configures the TIM in master mode. | |
1610 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
1611 * the configuration information for TIM module. | |
1612 * @param sMasterConfig: pointer to a TIM_MasterConfigTypeDef structure that | |
1613 * contains the selected trigger output (TRGO) and the Master/Slave | |
1614 * mode. | |
1615 * @retval HAL status | |
1616 */ | |
1617 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig) | |
1618 { | |
1619 /* Check the parameters */ | |
1620 assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); | |
1621 assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); | |
1622 assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); | |
1623 | |
1624 __HAL_LOCK(htim); | |
1625 | |
1626 htim->State = HAL_TIM_STATE_BUSY; | |
1627 | |
1628 /* Reset the MMS Bits */ | |
1629 htim->Instance->CR2 &= ~TIM_CR2_MMS; | |
1630 /* Select the TRGO source */ | |
1631 htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; | |
1632 | |
1633 /* Reset the MSM Bit */ | |
1634 htim->Instance->SMCR &= ~TIM_SMCR_MSM; | |
1635 /* Set or Reset the MSM Bit */ | |
1636 htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; | |
1637 | |
1638 htim->State = HAL_TIM_STATE_READY; | |
1639 | |
1640 __HAL_UNLOCK(htim); | |
1641 | |
1642 return HAL_OK; | |
1643 } | |
1644 | |
1645 /** | |
1646 * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State | |
1647 * and the AOE(automatic output enable). | |
1648 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
1649 * the configuration information for TIM module. | |
1650 * @param sBreakDeadTimeConfig: pointer to a TIM_ConfigBreakDeadConfig_TypeDef structure that | |
1651 * contains the BDTR Register configuration information for the TIM peripheral. | |
1652 * @retval HAL status | |
1653 */ | |
1654 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, | |
1655 TIM_BreakDeadTimeConfigTypeDef * sBreakDeadTimeConfig) | |
1656 { | |
1657 /* Check the parameters */ | |
1658 assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); | |
1659 assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode)); | |
1660 assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode)); | |
1661 assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel)); | |
1662 assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState)); | |
1663 assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity)); | |
1664 assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput)); | |
1665 assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime)); | |
1666 | |
1667 /* Process Locked */ | |
1668 __HAL_LOCK(htim); | |
1669 | |
1670 htim->State = HAL_TIM_STATE_BUSY; | |
1671 | |
1672 /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State, | |
1673 the OSSI State, the dead time value and the Automatic Output Enable Bit */ | |
1674 htim->Instance->BDTR = (uint32_t)sBreakDeadTimeConfig->OffStateRunMode | | |
1675 sBreakDeadTimeConfig->OffStateIDLEMode | | |
1676 sBreakDeadTimeConfig->LockLevel | | |
1677 sBreakDeadTimeConfig->DeadTime | | |
1678 sBreakDeadTimeConfig->BreakState | | |
1679 sBreakDeadTimeConfig->BreakPolarity | | |
1680 sBreakDeadTimeConfig->AutomaticOutput; | |
1681 | |
1682 | |
1683 htim->State = HAL_TIM_STATE_READY; | |
1684 | |
1685 __HAL_UNLOCK(htim); | |
1686 | |
1687 return HAL_OK; | |
1688 } | |
1689 | |
1690 /** | |
1691 * @brief Configures the TIM2, TIM5 and TIM11 Remapping input capabilities. | |
1692 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
1693 * the configuration information for TIM module. | |
1694 * @param Remap: specifies the TIM input remapping source. | |
1695 * This parameter can be one of the following values: | |
1696 * @arg TIM_TIM2_TIM8_TRGO: TIM2 ITR1 input is connected to TIM8 Trigger output(default) | |
1697 * @arg TIM_TIM2_ETH_PTP: TIM2 ITR1 input is connected to ETH PTP trigger output. | |
1698 * @arg TIM_TIM2_USBFS_SOF: TIM2 ITR1 input is connected to USB FS SOF. | |
1699 * @arg TIM_TIM2_USBHS_SOF: TIM2 ITR1 input is connected to USB HS SOF. | |
1700 * @arg TIM_TIM5_GPIO: TIM5 CH4 input is connected to dedicated Timer pin(default) | |
1701 * @arg TIM_TIM5_LSI: TIM5 CH4 input is connected to LSI clock. | |
1702 * @arg TIM_TIM5_LSE: TIM5 CH4 input is connected to LSE clock. | |
1703 * @arg TIM_TIM5_RTC: TIM5 CH4 input is connected to RTC Output event. | |
1704 * @arg TIM_TIM11_GPIO: TIM11 CH4 input is connected to dedicated Timer pin(default) | |
1705 * @arg TIM_TIM11_HSE: TIM11 CH4 input is connected to HSE_RTC clock | |
1706 * (HSE divided by a programmable prescaler) | |
1707 * @retval HAL status | |
1708 */ | |
1709 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap) | |
1710 { | |
1711 __HAL_LOCK(htim); | |
1712 | |
1713 /* Check parameters */ | |
1714 assert_param(IS_TIM_REMAP_INSTANCE(htim->Instance)); | |
1715 assert_param(IS_TIM_REMAP(Remap)); | |
1716 | |
1717 /* Set the Timer remapping configuration */ | |
1718 htim->Instance->OR = Remap; | |
1719 | |
1720 htim->State = HAL_TIM_STATE_READY; | |
1721 | |
1722 __HAL_UNLOCK(htim); | |
1723 | |
1724 return HAL_OK; | |
1725 } | |
1726 /** | |
1727 * @} | |
1728 */ | |
1729 | |
1730 /** @defgroup TIMEx_Exported_Functions_Group6 Extension Callbacks functions | |
1731 * @brief Extension Callbacks functions | |
1732 * | |
1733 @verbatim | |
1734 ============================================================================== | |
1735 ##### Extension Callbacks functions ##### | |
1736 ============================================================================== | |
1737 [..] | |
1738 This section provides Extension TIM callback functions: | |
1739 (+) Timer Commutation callback | |
1740 (+) Timer Break callback | |
1741 | |
1742 @endverbatim | |
1743 * @{ | |
1744 */ | |
1745 | |
1746 /** | |
1747 * @brief Hall commutation changed callback in non blocking mode | |
1748 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
1749 * the configuration information for TIM module. | |
1750 * @retval None | |
1751 */ | |
1752 __weak void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim) | |
1753 { | |
1754 /* NOTE : This function Should not be modified, when the callback is needed, | |
1755 the HAL_TIMEx_CommutationCallback could be implemented in the user file | |
1756 */ | |
1757 } | |
1758 | |
1759 /** | |
1760 * @brief Hall Break detection callback in non blocking mode | |
1761 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
1762 * the configuration information for TIM module. | |
1763 * @retval None | |
1764 */ | |
1765 __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) | |
1766 { | |
1767 /* NOTE : This function Should not be modified, when the callback is needed, | |
1768 the HAL_TIMEx_BreakCallback could be implemented in the user file | |
1769 */ | |
1770 } | |
1771 /** | |
1772 * @} | |
1773 */ | |
1774 | |
1775 /** @defgroup TIMEx_Exported_Functions_Group7 Extension Peripheral State functions | |
1776 * @brief Extension Peripheral State functions | |
1777 * | |
1778 @verbatim | |
1779 ============================================================================== | |
1780 ##### Extension Peripheral State functions ##### | |
1781 ============================================================================== | |
1782 [..] | |
1783 This subsection permits to get in run-time the status of the peripheral | |
1784 and the data flow. | |
1785 | |
1786 @endverbatim | |
1787 * @{ | |
1788 */ | |
1789 | |
1790 /** | |
1791 * @brief Return the TIM Hall Sensor interface state | |
1792 * @param htim: pointer to a TIM_HandleTypeDef structure that contains | |
1793 * the configuration information for TIM module. | |
1794 * @retval HAL state | |
1795 */ | |
1796 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim) | |
1797 { | |
1798 return htim->State; | |
1799 } | |
1800 | |
1801 /** | |
1802 * @} | |
1803 */ | |
1804 | |
1805 /** | |
1806 * @brief TIM DMA Commutation callback. | |
1807 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains | |
1808 * the configuration information for the specified DMA module. | |
1809 * @retval None | |
1810 */ | |
1811 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma) | |
1812 { | |
1813 TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; | |
1814 | |
1815 htim->State= HAL_TIM_STATE_READY; | |
1816 | |
1817 HAL_TIMEx_CommutationCallback(htim); | |
1818 } | |
1819 /** | |
1820 * @} | |
1821 */ | |
1822 | |
1823 /** | |
1824 * @brief Enables or disables the TIM Capture Compare Channel xN. | |
1825 * @param TIMx to select the TIM peripheral | |
1826 * @param Channel: specifies the TIM Channel | |
1827 * This parameter can be one of the following values: | |
1828 * @arg TIM_Channel_1: TIM Channel 1 | |
1829 * @arg TIM_Channel_2: TIM Channel 2 | |
1830 * @arg TIM_Channel_3: TIM Channel 3 | |
1831 * @param ChannelNState: specifies the TIM Channel CCxNE bit new state. | |
1832 * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable. | |
1833 * @retval None | |
1834 */ | |
1835 static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState) | |
1836 { | |
1837 uint32_t tmp = 0; | |
1838 | |
1839 /* Check the parameters */ | |
1840 assert_param(IS_TIM_CC4_INSTANCE(TIMx)); | |
1841 assert_param(IS_TIM_COMPLEMENTARY_CHANNELS(Channel)); | |
1842 | |
1843 tmp = TIM_CCER_CC1NE << Channel; | |
1844 | |
1845 /* Reset the CCxNE Bit */ | |
1846 TIMx->CCER &= ~tmp; | |
1847 | |
1848 /* Set or reset the CCxNE Bit */ | |
1849 TIMx->CCER |= (uint32_t)(ChannelNState << Channel); | |
1850 } | |
1851 | |
1852 /** | |
1853 * @} | |
1854 */ | |
1855 | |
1856 #endif /* HAL_TIM_MODULE_ENABLED */ | |
1857 /** | |
1858 * @} | |
1859 */ | |
1860 | |
1861 /** | |
1862 * @} | |
1863 */ | |
1864 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |