Mercurial > public > ostc4

comparison Common/Drivers/STM32F4xx_HAL_DRIVER_v120/Src/stm32f4xx_hal_i2c.c @ 38:5f11787b4f42

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
include in ostc4 repository
author heinrichsweikamp
date Sat, 28 Apr 2018 11:52:34 +0200
parents
children
comparison
equal deleted inserted replaced
37:ccc45c0e1ea2 38:5f11787b4f42
1 /**
2 ******************************************************************************
3 * @file stm32f4xx_hal_i2c.c
4 * @author MCD Application Team
5 * @version V1.2.0
6 * @date 26-December-2014
7 * @brief I2C HAL module driver.
8 * This file provides firmware functions to manage the following
9 * functionalities of the Inter Integrated Circuit (I2C) peripheral:
10 * + Initialization and de-initialization functions
11 * + IO operation functions
12 * + Peripheral Control functions
13 * + Peripheral State functions
14 *
15 @verbatim
16 ==============================================================================
17 ##### How to use this driver #####
18 ==============================================================================
19 [..]
20 The I2C HAL driver can be used as follows:
21
22 (#) Declare a I2C_HandleTypeDef handle structure, for example:
23 I2C_HandleTypeDef hi2c;
24
25 (#)Initialize the I2C low level resources by implement the HAL_I2C_MspInit() API:
26 (##) Enable the I2Cx interface clock
27 (##) I2C pins configuration
28 (+++) Enable the clock for the I2C GPIOs
29 (+++) Configure I2C pins as alternate function open-drain
30 (##) NVIC configuration if you need to use interrupt process
31 (+++) Configure the I2Cx interrupt priority
32 (+++) Enable the NVIC I2C IRQ Channel
33 (##) DMA Configuration if you need to use DMA process
34 (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive stream
35 (+++) Enable the DMAx interface clock using
36 (+++) Configure the DMA handle parameters
37 (+++) Configure the DMA Tx or Rx Stream
38 (+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle
39 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
40 the DMA Tx or Rx Stream
41
42 (#) Configure the Communication Speed, Duty cycle, Addressing mode, Own Address1,
43 Dual Addressing mode, Own Address2, General call and Nostretch mode in the hi2c Init structure.
44
45 (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware
46 (GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit(&hi2c) API.
47
48 (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady()
49
50 (#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
51
52 *** Polling mode IO operation ***
53 =================================
54 [..]
55 (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit()
56 (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive()
57 (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit()
58 (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive()
59
60 *** Polling mode IO MEM operation ***
61 =====================================
62 [..]
63 (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write()
64 (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read()
65
66
67 *** Interrupt mode IO operation ***
68 ===================================
69 [..]
70 (+) Transmit in master mode an amount of data in non blocking mode using HAL_I2C_Master_Transmit_IT()
71 (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
72 add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
73 (+) Receive in master mode an amount of data in non blocking mode using HAL_I2C_Master_Receive_IT()
74 (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
75 add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
76 (+) Transmit in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Transmit_IT()
77 (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
78 add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
79 (+) Receive in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Receive_IT()
80 (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
81 add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
82 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
83 add his own code by customization of function pointer HAL_I2C_ErrorCallback
84
85 *** Interrupt mode IO MEM operation ***
86 =======================================
87 [..]
88 (+) Write an amount of data in no-blocking mode with Interrupt to a specific memory address using
89 HAL_I2C_Mem_Write_IT()
90 (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
91 add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
92 (+) Read an amount of data in no-blocking mode with Interrupt from a specific memory address using
93 HAL_I2C_Mem_Read_IT()
94 (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
95 add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
96 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
97 add his own code by customization of function pointer HAL_I2C_ErrorCallback
98
99 *** DMA mode IO operation ***
100 ==============================
101 [..]
102 (+) Transmit in master mode an amount of data in non blocking mode (DMA) using
103 HAL_I2C_Master_Transmit_DMA()
104 (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
105 add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
106 (+) Receive in master mode an amount of data in non blocking mode (DMA) using
107 HAL_I2C_Master_Receive_DMA()
108 (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
109 add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
110 (+) Transmit in slave mode an amount of data in non blocking mode (DMA) using
111 HAL_I2C_Slave_Transmit_DMA()
112 (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
113 add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
114 (+) Receive in slave mode an amount of data in non blocking mode (DMA) using
115 HAL_I2C_Slave_Receive_DMA()
116 (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
117 add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
118 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
119 add his own code by customization of function pointer HAL_I2C_ErrorCallback
120
121 *** DMA mode IO MEM operation ***
122 =================================
123 [..]
124 (+) Write an amount of data in no-blocking mode with DMA to a specific memory address using
125 HAL_I2C_Mem_Write_DMA()
126 (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
127 add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
128 (+) Read an amount of data in no-blocking mode with DMA from a specific memory address using
129 HAL_I2C_Mem_Read_DMA()
130 (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
131 add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
132 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
133 add his own code by customization of function pointer HAL_I2C_ErrorCallback
134
135
136 *** I2C HAL driver macros list ***
137 ==================================
138 [..]
139 Below the list of most used macros in I2C HAL driver.
140
141 (+) __HAL_I2C_ENABLE: Enable the I2C peripheral
142 (+) __HAL_I2C_DISABLE: Disable the I2C peripheral
143 (+) __HAL_I2C_GET_FLAG : Checks whether the specified I2C flag is set or not
144 (+) __HAL_I2C_CLEAR_FLAG : Clear the specified I2C pending flag
145 (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
146 (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
147
148 [..]
149 (@) You can refer to the I2C HAL driver header file for more useful macros
150
151
152 @endverbatim
153 ******************************************************************************
154 * @attention
155 *
156 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
157 *
158 * Redistribution and use in source and binary forms, with or without modification,
159 * are permitted provided that the following conditions are met:
160 * 1. Redistributions of source code must retain the above copyright notice,
161 * this list of conditions and the following disclaimer.
162 * 2. Redistributions in binary form must reproduce the above copyright notice,
163 * this list of conditions and the following disclaimer in the documentation
164 * and/or other materials provided with the distribution.
165 * 3. Neither the name of STMicroelectronics nor the names of its contributors
166 * may be used to endorse or promote products derived from this software
167 * without specific prior written permission.
168 *
169 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
170 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
171 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
172 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
173 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
174 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
175 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
176 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
177 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
178 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
179 *
180 ******************************************************************************
181 */
182
183 /* Includes ------------------------------------------------------------------*/
184 #include "stm32f4xx_hal.h"
185
186 /** @addtogroup STM32F4xx_HAL_Driver
187 * @{
188 */
189
190 /** @defgroup I2C I2C
191 * @brief I2C HAL module driver
192 * @{
193 */
194
195 #ifdef HAL_I2C_MODULE_ENABLED
196
197 /* Private typedef -----------------------------------------------------------*/
198 /* Private define ------------------------------------------------------------*/
199 /** @addtogroup I2C_Private_Constants
200 * @{
201 */
202 #define I2C_TIMEOUT_FLAG ((uint32_t)35) /* 35 ms */
203 #define I2C_TIMEOUT_ADDR_SLAVE ((uint32_t)10000) /* 10 s */
204 /**
205 * @}
206 */
207
208 /* Private macro -------------------------------------------------------------*/
209 /* Private variables ---------------------------------------------------------*/
210 /* Private function prototypes -----------------------------------------------*/
211 /** @addtogroup I2C_Private_Functions
212 * @{
213 */
214 static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma);
215 static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma);
216 static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma);
217 static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma);
218 static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma);
219 static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma);
220 static void I2C_DMAError(DMA_HandleTypeDef *hdma);
221
222 static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout);
223 static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout);
224 static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout);
225 static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout);
226 static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
227 static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout);
228
229 static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c);
230 static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c);
231 static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c);
232 static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c);
233
234 static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c);
235 static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c);
236 static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c);
237 static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c);
238 static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c);
239 static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c);
240 static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c);
241 /**
242 * @}
243 */
244
245 /* Exported functions --------------------------------------------------------*/
246 /** @defgroup I2C_Exported_Functions I2C Exported Functions
247 * @{
248 */
249
250 /** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
251 * @brief Initialization and Configuration functions
252 *
253 @verbatim
254 ===============================================================================
255 ##### Initialization and de-initialization functions #####
256 ===============================================================================
257 [..] This subsection provides a set of functions allowing to initialize and
258 de-initialize the I2Cx peripheral:
259
260 (+) User must Implement HAL_I2C_MspInit() function in which he configures
261 all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC).
262
263 (+) Call the function HAL_I2C_Init() to configure the selected device with
264 the selected configuration:
265 (++) Communication Speed
266 (++) Duty cycle
267 (++) Addressing mode
268 (++) Own Address 1
269 (++) Dual Addressing mode
270 (++) Own Address 2
271 (++) General call mode
272 (++) Nostretch mode
273
274 (+) Call the function HAL_I2C_DeInit() to restore the default configuration
275 of the selected I2Cx peripheral.
276
277 @endverbatim
278 * @{
279 */
280
281 /**
282 * @brief Initializes the I2C according to the specified parameters
283 * in the I2C_InitTypeDef and create the associated handle.
284 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
285 * the configuration information for I2C module
286 * @retval HAL status
287 */
288 HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
289 {
290 uint32_t freqrange = 0;
291 uint32_t pclk1 = 0;
292
293 /* Check the I2C handle allocation */
294 if(hi2c == NULL)
295 {
296 return HAL_ERROR;
297 }
298
299 /* Check the parameters */
300 assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
301 assert_param(IS_I2C_CLOCK_SPEED(hi2c->Init.ClockSpeed));
302 assert_param(IS_I2C_DUTY_CYCLE(hi2c->Init.DutyCycle));
303 assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
304 assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode));
305 assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
306 assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
307 assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
308 assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
309
310 if(hi2c->State == HAL_I2C_STATE_RESET)
311 {
312 /* Init the low level hardware : GPIO, CLOCK, NVIC */
313 HAL_I2C_MspInit(hi2c);
314 }
315
316 hi2c->State = HAL_I2C_STATE_BUSY;
317
318 /* Disable the selected I2C peripheral */
319 __HAL_I2C_DISABLE(hi2c);
320
321 /* Get PCLK1 frequency */
322 pclk1 = HAL_RCC_GetPCLK1Freq();
323
324 /* Calculate frequency range */
325 freqrange = I2C_FREQRANGE(pclk1);
326
327 /*---------------------------- I2Cx CR2 Configuration ----------------------*/
328 /* Configure I2Cx: Frequency range */
329 hi2c->Instance->CR2 = freqrange;
330
331 /*---------------------------- I2Cx TRISE Configuration --------------------*/
332 /* Configure I2Cx: Rise Time */
333 hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
334
335 /*---------------------------- I2Cx CCR Configuration ----------------------*/
336 /* Configure I2Cx: Speed */
337 hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle);
338
339 /*---------------------------- I2Cx CR1 Configuration ----------------------*/
340 /* Configure I2Cx: Generalcall and NoStretch mode */
341 hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode);
342
343 /*---------------------------- I2Cx OAR1 Configuration ---------------------*/
344 /* Configure I2Cx: Own Address1 and addressing mode */
345 hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1);
346
347 /*---------------------------- I2Cx OAR2 Configuration ---------------------*/
348 /* Configure I2Cx: Dual mode and Own Address2 */
349 hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2);
350
351 /* Enable the selected I2C peripheral */
352 __HAL_I2C_ENABLE(hi2c);
353
354 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
355 hi2c->State = HAL_I2C_STATE_READY;
356
357 return HAL_OK;
358 }
359
360 /**
361 * @brief DeInitializes the I2C peripheral.
362 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
363 * the configuration information for I2C module
364 * @retval HAL status
365 */
366 HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
367 {
368 /* Check the I2C handle allocation */
369 if(hi2c == NULL)
370 {
371 return HAL_ERROR;
372 }
373
374 /* Check the parameters */
375 assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
376
377 hi2c->State = HAL_I2C_STATE_BUSY;
378
379 /* Disable the I2C Peripheral Clock */
380 __HAL_I2C_DISABLE(hi2c);
381
382 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
383 HAL_I2C_MspDeInit(hi2c);
384
385 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
386
387 hi2c->State = HAL_I2C_STATE_RESET;
388
389 /* Release Lock */
390 __HAL_UNLOCK(hi2c);
391
392 return HAL_OK;
393 }
394
395 /**
396 * @brief I2C MSP Init.
397 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
398 * the configuration information for I2C module
399 * @retval None
400 */
401 __weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
402 {
403 /* NOTE : This function Should not be modified, when the callback is needed,
404 the HAL_I2C_MspInit could be implemented in the user file
405 */
406 }
407
408 /**
409 * @brief I2C MSP DeInit
410 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
411 * the configuration information for I2C module
412 * @retval None
413 */
414 __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
415 {
416 /* NOTE : This function Should not be modified, when the callback is needed,
417 the HAL_I2C_MspDeInit could be implemented in the user file
418 */
419 }
420
421 /**
422 * @}
423 */
424
425 /** @defgroup I2C_Exported_Functions_Group2 IO operation functions
426 * @brief Data transfers functions
427 *
428 @verbatim
429 ===============================================================================
430 ##### IO operation functions #####
431 ===============================================================================
432 [..]
433 This subsection provides a set of functions allowing to manage the I2C data
434 transfers.
435
436 (#) There are two modes of transfer:
437 (++) Blocking mode : The communication is performed in the polling mode.
438 The status of all data processing is returned by the same function
439 after finishing transfer.
440 (++) No-Blocking mode : The communication is performed using Interrupts
441 or DMA. These functions return the status of the transfer startup.
442 The end of the data processing will be indicated through the
443 dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when
444 using DMA mode.
445
446 (#) Blocking mode functions are :
447 (++) HAL_I2C_Master_Transmit()
448 (++) HAL_I2C_Master_Receive()
449 (++) HAL_I2C_Slave_Transmit()
450 (++) HAL_I2C_Slave_Receive()
451 (++) HAL_I2C_Mem_Write()
452 (++) HAL_I2C_Mem_Read()
453 (++) HAL_I2C_IsDeviceReady()
454
455 (#) No-Blocking mode functions with Interrupt are :
456 (++) HAL_I2C_Master_Transmit_IT()
457 (++) HAL_I2C_Master_Receive_IT()
458 (++) HAL_I2C_Slave_Transmit_IT()
459 (++) HAL_I2C_Slave_Receive_IT()
460 (++) HAL_I2C_Mem_Write_IT()
461 (++) HAL_I2C_Mem_Read_IT()
462
463 (#) No-Blocking mode functions with DMA are :
464 (++) HAL_I2C_Master_Transmit_DMA()
465 (++) HAL_I2C_Master_Receive_DMA()
466 (++) HAL_I2C_Slave_Transmit_DMA()
467 (++) HAL_I2C_Slave_Receive_DMA()
468 (++) HAL_I2C_Mem_Write_DMA()
469 (++) HAL_I2C_Mem_Read_DMA()
470
471 (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
472 (++) HAL_I2C_MemTxCpltCallback()
473 (++) HAL_I2C_MemRxCpltCallback()
474 (++) HAL_I2C_MasterTxCpltCallback()
475 (++) HAL_I2C_MasterRxCpltCallback()
476 (++) HAL_I2C_SlaveTxCpltCallback()
477 (++) HAL_I2C_SlaveRxCpltCallback()
478 (++) HAL_I2C_ErrorCallback()
479
480 @endverbatim
481 * @{
482 */
483
484 /**
485 * @brief Transmits in master mode an amount of data in blocking mode.
486 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
487 * the configuration information for I2C module
488 * @param DevAddress: Target device address
489 * @param pData: Pointer to data buffer
490 * @param Size: Amount of data to be sent
491 * @param Timeout: Timeout duration
492 * @retval HAL status
493 */
494 HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
495 {
496 if(hi2c->State == HAL_I2C_STATE_READY)
497 {
498 if((pData == NULL) || (Size == 0))
499 {
500 return HAL_ERROR;
501 }
502
503 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
504 {
505 return HAL_BUSY;
506 }
507
508 /* Process Locked */
509 __HAL_LOCK(hi2c);
510
511 hi2c->State = HAL_I2C_STATE_BUSY_TX;
512 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
513
514 /* Send Slave Address */
515 if(I2C_MasterRequestWrite(hi2c, DevAddress, Timeout) != HAL_OK)
516 {
517 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
518 {
519 /* Process Unlocked */
520 __HAL_UNLOCK(hi2c);
521 return HAL_ERROR;
522 }
523 else
524 {
525 /* Process Unlocked */
526 __HAL_UNLOCK(hi2c);
527 return HAL_TIMEOUT;
528 }
529 }
530
531 /* Clear ADDR flag */
532 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
533
534 while(Size > 0)
535 {
536 /* Wait until TXE flag is set */
537 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
538 {
539 return HAL_TIMEOUT;
540 }
541
542 /* Write data to DR */
543 hi2c->Instance->DR = (*pData++);
544 Size--;
545
546 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
547 {
548 /* Write data to DR */
549 hi2c->Instance->DR = (*pData++);
550 Size--;
551 }
552 }
553
554 /* Wait until TXE flag is set */
555 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
556 {
557 return HAL_TIMEOUT;
558 }
559
560 /* Generate Stop */
561 hi2c->Instance->CR1 |= I2C_CR1_STOP;
562
563 /* Wait until BUSY flag is reset */
564 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
565 {
566 return HAL_TIMEOUT;
567 }
568
569 hi2c->State = HAL_I2C_STATE_READY;
570
571 /* Process Unlocked */
572 __HAL_UNLOCK(hi2c);
573
574 return HAL_OK;
575 }
576 else
577 {
578 return HAL_BUSY;
579 }
580 }
581
582 /**
583 * @brief Receives in master mode an amount of data in blocking mode.
584 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
585 * the configuration information for I2C module
586 * @param DevAddress: Target device address
587 * @param pData: Pointer to data buffer
588 * @param Size: Amount of data to be sent
589 * @param Timeout: Timeout duration
590 * @retval HAL status
591 */
592 HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
593 {
594 if(hi2c->State == HAL_I2C_STATE_READY)
595 {
596 if((pData == NULL) || (Size == 0))
597 {
598 return HAL_ERROR;
599 }
600
601 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
602 {
603 return HAL_BUSY;
604 }
605
606 /* Process Locked */
607 __HAL_LOCK(hi2c);
608
609 hi2c->State = HAL_I2C_STATE_BUSY_RX;
610 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
611
612 /* Send Slave Address */
613 if(I2C_MasterRequestRead(hi2c, DevAddress, Timeout) != HAL_OK)
614 {
615 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
616 {
617 /* Process Unlocked */
618 __HAL_UNLOCK(hi2c);
619 return HAL_ERROR;
620 }
621 else
622 {
623 /* Process Unlocked */
624 __HAL_UNLOCK(hi2c);
625 return HAL_TIMEOUT;
626 }
627 }
628
629 if(Size == 1)
630 {
631 /* Disable Acknowledge */
632 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
633
634 /* Clear ADDR flag */
635 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
636
637 /* Generate Stop */
638 hi2c->Instance->CR1 |= I2C_CR1_STOP;
639 }
640 else if(Size == 2)
641 {
642 /* Disable Acknowledge */
643 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
644
645 /* Enable Pos */
646 hi2c->Instance->CR1 |= I2C_CR1_POS;
647
648 /* Clear ADDR flag */
649 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
650 }
651 else
652 {
653 /* Enable Acknowledge */
654 hi2c->Instance->CR1 |= I2C_CR1_ACK;
655
656 /* Clear ADDR flag */
657 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
658 }
659
660 while(Size > 0)
661 {
662 if(Size <= 3)
663 {
664 /* One byte */
665 if(Size == 1)
666 {
667 /* Wait until RXNE flag is set */
668 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
669 {
670 return HAL_TIMEOUT;
671 }
672
673 /* Read data from DR */
674 (*pData++) = hi2c->Instance->DR;
675 Size--;
676 }
677 /* Two bytes */
678 else if(Size == 2)
679 {
680 /* Wait until BTF flag is set */
681 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
682 {
683 return HAL_TIMEOUT;
684 }
685
686 /* Generate Stop */
687 hi2c->Instance->CR1 |= I2C_CR1_STOP;
688
689 /* Read data from DR */
690 (*pData++) = hi2c->Instance->DR;
691 Size--;
692
693 /* Read data from DR */
694 (*pData++) = hi2c->Instance->DR;
695 Size--;
696 }
697 /* 3 Last bytes */
698 else
699 {
700 /* Wait until BTF flag is set */
701 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
702 {
703 return HAL_TIMEOUT;
704 }
705
706 /* Disable Acknowledge */
707 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
708
709 /* Read data from DR */
710 (*pData++) = hi2c->Instance->DR;
711 Size--;
712
713 /* Wait until BTF flag is set */
714 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
715 {
716 return HAL_TIMEOUT;
717 }
718
719 /* Generate Stop */
720 hi2c->Instance->CR1 |= I2C_CR1_STOP;
721
722 /* Read data from DR */
723 (*pData++) = hi2c->Instance->DR;
724 Size--;
725
726 /* Read data from DR */
727 (*pData++) = hi2c->Instance->DR;
728 Size--;
729 }
730 }
731 else
732 {
733 /* Wait until RXNE flag is set */
734 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
735 {
736 return HAL_TIMEOUT;
737 }
738
739 /* Read data from DR */
740 (*pData++) = hi2c->Instance->DR;
741 Size--;
742
743 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
744 {
745 /* Read data from DR */
746 (*pData++) = hi2c->Instance->DR;
747 Size--;
748 }
749 }
750 }
751
752 /* Disable Pos */
753 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
754
755 /* Wait until BUSY flag is reset */
756 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
757 {
758 return HAL_TIMEOUT;
759 }
760
761 hi2c->State = HAL_I2C_STATE_READY;
762
763 /* Process Unlocked */
764 __HAL_UNLOCK(hi2c);
765
766 return HAL_OK;
767 }
768 else
769 {
770 return HAL_BUSY;
771 }
772 }
773
774 /**
775 * @brief Transmits in slave mode an amount of data in blocking mode.
776 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
777 * the configuration information for I2C module
778 * @param pData: Pointer to data buffer
779 * @param Size: Amount of data to be sent
780 * @param Timeout: Timeout duration
781 * @retval HAL status
782 */
783 HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
784 {
785 if(hi2c->State == HAL_I2C_STATE_READY)
786 {
787 if((pData == NULL) || (Size == 0))
788 {
789 return HAL_ERROR;
790 }
791
792 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
793 {
794 return HAL_BUSY;
795 }
796
797 /* Process Locked */
798 __HAL_LOCK(hi2c);
799
800 hi2c->State = HAL_I2C_STATE_BUSY_TX;
801 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
802
803 /* Enable Address Acknowledge */
804 hi2c->Instance->CR1 |= I2C_CR1_ACK;
805
806 /* Wait until ADDR flag is set */
807 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
808 {
809 return HAL_TIMEOUT;
810 }
811
812 /* Clear ADDR flag */
813 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
814
815 /* If 10bit addressing mode is selected */
816 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
817 {
818 /* Wait until ADDR flag is set */
819 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
820 {
821 return HAL_TIMEOUT;
822 }
823
824 /* Clear ADDR flag */
825 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
826 }
827
828 while(Size > 0)
829 {
830 /* Wait until TXE flag is set */
831 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
832 {
833 return HAL_TIMEOUT;
834 }
835
836 /* Write data to DR */
837 hi2c->Instance->DR = (*pData++);
838 Size--;
839
840 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
841 {
842 /* Write data to DR */
843 hi2c->Instance->DR = (*pData++);
844 Size--;
845 }
846 }
847
848 /* Wait until AF flag is set */
849 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout) != HAL_OK)
850 {
851 return HAL_TIMEOUT;
852 }
853
854 /* Clear AF flag */
855 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
856
857 /* Disable Address Acknowledge */
858 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
859
860 /* Wait until BUSY flag is reset */
861 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
862 {
863 return HAL_TIMEOUT;
864 }
865
866 hi2c->State = HAL_I2C_STATE_READY;
867
868 /* Process Unlocked */
869 __HAL_UNLOCK(hi2c);
870
871 return HAL_OK;
872 }
873 else
874 {
875 return HAL_BUSY;
876 }
877 }
878
879 /**
880 * @brief Receive in slave mode an amount of data in blocking mode
881 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
882 * the configuration information for I2C module
883 * @param pData: Pointer to data buffer
884 * @param Size: Amount of data to be sent
885 * @param Timeout: Timeout duration
886 * @retval HAL status
887 */
888 HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
889 {
890 if(hi2c->State == HAL_I2C_STATE_READY)
891 {
892 if((pData == NULL) || (Size == 0))
893 {
894 return HAL_ERROR;
895 }
896
897 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
898 {
899 return HAL_BUSY;
900 }
901
902 /* Process Locked */
903 __HAL_LOCK(hi2c);
904
905 hi2c->State = HAL_I2C_STATE_BUSY_RX;
906 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
907
908 /* Enable Address Acknowledge */
909 hi2c->Instance->CR1 |= I2C_CR1_ACK;
910
911 /* Wait until ADDR flag is set */
912 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout) != HAL_OK)
913 {
914 return HAL_TIMEOUT;
915 }
916
917 /* Clear ADDR flag */
918 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
919
920 while(Size > 0)
921 {
922 /* Wait until RXNE flag is set */
923 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
924 {
925 return HAL_TIMEOUT;
926 }
927
928 /* Read data from DR */
929 (*pData++) = hi2c->Instance->DR;
930 Size--;
931
932 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
933 {
934 /* Read data from DR */
935 (*pData++) = hi2c->Instance->DR;
936 Size--;
937 }
938 }
939
940 /* Wait until STOP flag is set */
941 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout) != HAL_OK)
942 {
943 return HAL_TIMEOUT;
944 }
945
946 /* Clear STOP flag */
947 __HAL_I2C_CLEAR_STOPFLAG(hi2c);
948
949 /* Disable Address Acknowledge */
950 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
951
952 /* Wait until BUSY flag is reset */
953 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
954 {
955 return HAL_TIMEOUT;
956 }
957
958 hi2c->State = HAL_I2C_STATE_READY;
959
960 /* Process Unlocked */
961 __HAL_UNLOCK(hi2c);
962
963 return HAL_OK;
964 }
965 else
966 {
967 return HAL_BUSY;
968 }
969 }
970
971 /**
972 * @brief Transmit in master mode an amount of data in no-blocking mode with Interrupt
973 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
974 * the configuration information for I2C module
975 * @param DevAddress: Target device address
976 * @param pData: Pointer to data buffer
977 * @param Size: Amount of data to be sent
978 * @retval HAL status
979 */
980 HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
981 {
982 if(hi2c->State == HAL_I2C_STATE_READY)
983 {
984 if((pData == NULL) || (Size == 0))
985 {
986 return HAL_ERROR;
987 }
988
989 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
990 {
991 return HAL_BUSY;
992 }
993
994 /* Process Locked */
995 __HAL_LOCK(hi2c);
996
997 hi2c->State = HAL_I2C_STATE_BUSY_TX;
998 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
999
1000 hi2c->pBuffPtr = pData;
1001 hi2c->XferSize = Size;
1002 hi2c->XferCount = Size;
1003
1004 /* Send Slave Address */
1005 if(I2C_MasterRequestWrite(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
1006 {
1007 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1008 {
1009 /* Process Unlocked */
1010 __HAL_UNLOCK(hi2c);
1011 return HAL_ERROR;
1012 }
1013 else
1014 {
1015 /* Process Unlocked */
1016 __HAL_UNLOCK(hi2c);
1017 return HAL_TIMEOUT;
1018 }
1019 }
1020
1021 /* Clear ADDR flag */
1022 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1023
1024 /* Process Unlocked */
1025 __HAL_UNLOCK(hi2c);
1026
1027 /* Note : The I2C interrupts must be enabled after unlocking current process
1028 to avoid the risk of I2C interrupt handle execution before current
1029 process unlock */
1030
1031 /* Enable EVT, BUF and ERR interrupt */
1032 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1033
1034 return HAL_OK;
1035 }
1036 else
1037 {
1038 return HAL_BUSY;
1039 }
1040 }
1041
1042 /**
1043 * @brief Receive in master mode an amount of data in no-blocking mode with Interrupt
1044 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
1045 * the configuration information for I2C module
1046 * @param DevAddress: Target device address
1047 * @param pData: Pointer to data buffer
1048 * @param Size: Amount of data to be sent
1049 * @retval HAL status
1050 */
1051 HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
1052 {
1053 if(hi2c->State == HAL_I2C_STATE_READY)
1054 {
1055 if((pData == NULL) || (Size == 0))
1056 {
1057 return HAL_ERROR;
1058 }
1059
1060 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1061 {
1062 return HAL_BUSY;
1063 }
1064
1065 /* Process Locked */
1066 __HAL_LOCK(hi2c);
1067
1068 hi2c->State = HAL_I2C_STATE_BUSY_RX;
1069 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1070
1071 hi2c->pBuffPtr = pData;
1072 hi2c->XferSize = Size;
1073 hi2c->XferCount = Size;
1074
1075 /* Send Slave Address */
1076 if(I2C_MasterRequestRead(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
1077 {
1078 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1079 {
1080 /* Process Unlocked */
1081 __HAL_UNLOCK(hi2c);
1082 return HAL_ERROR;
1083 }
1084 else
1085 {
1086 /* Process Unlocked */
1087 __HAL_UNLOCK(hi2c);
1088 return HAL_TIMEOUT;
1089 }
1090 }
1091
1092 if(hi2c->XferCount == 1)
1093 {
1094 /* Disable Acknowledge */
1095 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
1096
1097 /* Clear ADDR flag */
1098 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1099
1100 /* Generate Stop */
1101 hi2c->Instance->CR1 |= I2C_CR1_STOP;
1102 }
1103 else if(hi2c->XferCount == 2)
1104 {
1105 /* Disable Acknowledge */
1106 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
1107
1108 /* Enable Pos */
1109 hi2c->Instance->CR1 |= I2C_CR1_POS;
1110
1111 /* Clear ADDR flag */
1112 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1113 }
1114 else
1115 {
1116 /* Enable Acknowledge */
1117 hi2c->Instance->CR1 |= I2C_CR1_ACK;
1118
1119 /* Clear ADDR flag */
1120 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1121 }
1122
1123 /* Process Unlocked */
1124 __HAL_UNLOCK(hi2c);
1125
1126 /* Note : The I2C interrupts must be enabled after unlocking current process
1127 to avoid the risk of I2C interrupt handle execution before current
1128 process unlock */
1129
1130 /* Enable EVT, BUF and ERR interrupt */
1131 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1132
1133 return HAL_OK;
1134 }
1135 else
1136 {
1137 return HAL_BUSY;
1138 }
1139 }
1140
1141 /**
1142 * @brief Transmit in slave mode an amount of data in no-blocking mode with Interrupt
1143 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
1144 * the configuration information for I2C module
1145 * @param pData: Pointer to data buffer
1146 * @param Size: Amount of data to be sent
1147 * @retval HAL status
1148 */
1149 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
1150 {
1151 if(hi2c->State == HAL_I2C_STATE_READY)
1152 {
1153 if((pData == NULL) || (Size == 0))
1154 {
1155 return HAL_ERROR;
1156 }
1157
1158 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1159 {
1160 return HAL_BUSY;
1161 }
1162
1163 /* Process Locked */
1164 __HAL_LOCK(hi2c);
1165
1166 hi2c->State = HAL_I2C_STATE_BUSY_TX;
1167 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1168
1169 hi2c->pBuffPtr = pData;
1170 hi2c->XferSize = Size;
1171 hi2c->XferCount = Size;
1172
1173 /* Enable Address Acknowledge */
1174 hi2c->Instance->CR1 |= I2C_CR1_ACK;
1175
1176 /* Process Unlocked */
1177 __HAL_UNLOCK(hi2c);
1178
1179 /* Note : The I2C interrupts must be enabled after unlocking current process
1180 to avoid the risk of I2C interrupt handle execution before current
1181 process unlock */
1182
1183 /* Enable EVT, BUF and ERR interrupt */
1184 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1185
1186 return HAL_OK;
1187 }
1188 else
1189 {
1190 return HAL_BUSY;
1191 }
1192 }
1193
1194 /**
1195 * @brief Receive in slave mode an amount of data in no-blocking mode with Interrupt
1196 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
1197 * the configuration information for I2C module
1198 * @param pData: Pointer to data buffer
1199 * @param Size: Amount of data to be sent
1200 * @retval HAL status
1201 */
1202 HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
1203 {
1204 if(hi2c->State == HAL_I2C_STATE_READY)
1205 {
1206 if((pData == NULL) || (Size == 0))
1207 {
1208 return HAL_ERROR;
1209 }
1210
1211 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1212 {
1213 return HAL_BUSY;
1214 }
1215
1216 /* Process Locked */
1217 __HAL_LOCK(hi2c);
1218
1219 hi2c->State = HAL_I2C_STATE_BUSY_RX;
1220 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1221
1222 hi2c->pBuffPtr = pData;
1223 hi2c->XferSize = Size;
1224 hi2c->XferCount = Size;
1225
1226 /* Enable Address Acknowledge */
1227 hi2c->Instance->CR1 |= I2C_CR1_ACK;
1228
1229 /* Process Unlocked */
1230 __HAL_UNLOCK(hi2c);
1231
1232 /* Note : The I2C interrupts must be enabled after unlocking current process
1233 to avoid the risk of I2C interrupt handle execution before current
1234 process unlock */
1235
1236 /* Enable EVT, BUF and ERR interrupt */
1237 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1238
1239 return HAL_OK;
1240 }
1241 else
1242 {
1243 return HAL_BUSY;
1244 }
1245 }
1246
1247 /**
1248 * @brief Transmit in master mode an amount of data in no-blocking mode with DMA
1249 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
1250 * the configuration information for I2C module
1251 * @param DevAddress: Target device address
1252 * @param pData: Pointer to data buffer
1253 * @param Size: Amount of data to be sent
1254 * @retval HAL status
1255 */
1256 HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
1257 {
1258 if(hi2c->State == HAL_I2C_STATE_READY)
1259 {
1260 if((pData == NULL) || (Size == 0))
1261 {
1262 return HAL_ERROR;
1263 }
1264
1265 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1266 {
1267 return HAL_BUSY;
1268 }
1269
1270 /* Process Locked */
1271 __HAL_LOCK(hi2c);
1272
1273 hi2c->State = HAL_I2C_STATE_BUSY_TX;
1274 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1275
1276 hi2c->pBuffPtr = pData;
1277 hi2c->XferSize = Size;
1278 hi2c->XferCount = Size;
1279
1280 /* Set the I2C DMA transfer complete callback */
1281 hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt;
1282
1283 /* Set the DMA error callback */
1284 hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
1285
1286 /* Enable the DMA Stream */
1287 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
1288
1289 /* Send Slave Address */
1290 if(I2C_MasterRequestWrite(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
1291 {
1292 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1293 {
1294 /* Process Unlocked */
1295 __HAL_UNLOCK(hi2c);
1296 return HAL_ERROR;
1297 }
1298 else
1299 {
1300 /* Process Unlocked */
1301 __HAL_UNLOCK(hi2c);
1302 return HAL_TIMEOUT;
1303 }
1304 }
1305
1306 /* Enable DMA Request */
1307 hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
1308
1309 /* Clear ADDR flag */
1310 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1311
1312 /* Process Unlocked */
1313 __HAL_UNLOCK(hi2c);
1314
1315 return HAL_OK;
1316 }
1317 else
1318 {
1319 return HAL_BUSY;
1320 }
1321 }
1322
1323 /**
1324 * @brief Receive in master mode an amount of data in no-blocking mode with DMA
1325 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
1326 * the configuration information for I2C module
1327 * @param DevAddress: Target device address
1328 * @param pData: Pointer to data buffer
1329 * @param Size: Amount of data to be sent
1330 * @retval HAL status
1331 */
1332 HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
1333 {
1334 if(hi2c->State == HAL_I2C_STATE_READY)
1335 {
1336 if((pData == NULL) || (Size == 0))
1337 {
1338 return HAL_ERROR;
1339 }
1340
1341 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1342 {
1343 return HAL_BUSY;
1344 }
1345
1346 /* Process Locked */
1347 __HAL_LOCK(hi2c);
1348
1349 hi2c->State = HAL_I2C_STATE_BUSY_RX;
1350 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1351
1352 hi2c->pBuffPtr = pData;
1353 hi2c->XferSize = Size;
1354 hi2c->XferCount = Size;
1355
1356 /* Set the I2C DMA transfer complete callback */
1357 hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt;
1358
1359 /* Set the DMA error callback */
1360 hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
1361
1362 /* Enable the DMA Stream */
1363 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
1364
1365 /* Send Slave Address */
1366 if(I2C_MasterRequestRead(hi2c, DevAddress, I2C_TIMEOUT_FLAG) != HAL_OK)
1367 {
1368 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1369 {
1370 /* Process Unlocked */
1371 __HAL_UNLOCK(hi2c);
1372 return HAL_ERROR;
1373 }
1374 else
1375 {
1376 /* Process Unlocked */
1377 __HAL_UNLOCK(hi2c);
1378 return HAL_TIMEOUT;
1379 }
1380 }
1381
1382 if(Size == 1)
1383 {
1384 /* Disable Acknowledge */
1385 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
1386 }
1387 else
1388 {
1389 /* Enable Last DMA bit */
1390 hi2c->Instance->CR2 |= I2C_CR2_LAST;
1391 }
1392
1393 /* Enable DMA Request */
1394 hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
1395
1396 /* Clear ADDR flag */
1397 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1398
1399 /* Process Unlocked */
1400 __HAL_UNLOCK(hi2c);
1401
1402 return HAL_OK;
1403 }
1404 else
1405 {
1406 return HAL_BUSY;
1407 }
1408 }
1409
1410 /**
1411 * @brief Transmit in slave mode an amount of data in no-blocking mode with DMA
1412 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
1413 * the configuration information for I2C module
1414 * @param pData: Pointer to data buffer
1415 * @param Size: Amount of data to be sent
1416 * @retval HAL status
1417 */
1418 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
1419 {
1420 if(hi2c->State == HAL_I2C_STATE_READY)
1421 {
1422 if((pData == NULL) || (Size == 0))
1423 {
1424 return HAL_ERROR;
1425 }
1426
1427 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1428 {
1429 return HAL_BUSY;
1430 }
1431
1432 /* Process Locked */
1433 __HAL_LOCK(hi2c);
1434
1435 hi2c->State = HAL_I2C_STATE_BUSY_TX;
1436 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1437
1438 hi2c->pBuffPtr = pData;
1439 hi2c->XferSize = Size;
1440 hi2c->XferCount = Size;
1441
1442 /* Set the I2C DMA transfer complete callback */
1443 hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt;
1444
1445 /* Set the DMA error callback */
1446 hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
1447
1448 /* Enable the DMA Stream */
1449 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
1450
1451 /* Enable DMA Request */
1452 hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
1453
1454 /* Enable Address Acknowledge */
1455 hi2c->Instance->CR1 |= I2C_CR1_ACK;
1456
1457 /* Wait until ADDR flag is set */
1458 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR_SLAVE) != HAL_OK)
1459 {
1460 return HAL_TIMEOUT;
1461 }
1462
1463 /* If 7bit addressing mode is selected */
1464 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
1465 {
1466 /* Clear ADDR flag */
1467 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1468 }
1469 else
1470 {
1471 /* Clear ADDR flag */
1472 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1473
1474 /* Wait until ADDR flag is set */
1475 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR_SLAVE) != HAL_OK)
1476 {
1477 return HAL_TIMEOUT;
1478 }
1479
1480 /* Clear ADDR flag */
1481 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1482 }
1483
1484 /* Process Unlocked */
1485 __HAL_UNLOCK(hi2c);
1486
1487 return HAL_OK;
1488 }
1489 else
1490 {
1491 return HAL_BUSY;
1492 }
1493 }
1494
1495 /**
1496 * @brief Receive in slave mode an amount of data in no-blocking mode with DMA
1497 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
1498 * the configuration information for I2C module
1499 * @param pData: Pointer to data buffer
1500 * @param Size: Amount of data to be sent
1501 * @retval HAL status
1502 */
1503 HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
1504 {
1505 if(hi2c->State == HAL_I2C_STATE_READY)
1506 {
1507 if((pData == NULL) || (Size == 0))
1508 {
1509 return HAL_ERROR;
1510 }
1511
1512 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1513 {
1514 return HAL_BUSY;
1515 }
1516
1517 /* Process Locked */
1518 __HAL_LOCK(hi2c);
1519
1520 hi2c->State = HAL_I2C_STATE_BUSY_RX;
1521 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1522
1523 hi2c->pBuffPtr = pData;
1524 hi2c->XferSize = Size;
1525 hi2c->XferCount = Size;
1526
1527 /* Set the I2C DMA transfer complete callback */
1528 hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt;
1529
1530 /* Set the DMA error callback */
1531 hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
1532
1533 /* Enable the DMA Stream */
1534 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
1535
1536 /* Enable DMA Request */
1537 hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
1538
1539 /* Enable Address Acknowledge */
1540 hi2c->Instance->CR1 |= I2C_CR1_ACK;
1541
1542 /* Wait until ADDR flag is set */
1543 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, I2C_TIMEOUT_ADDR_SLAVE) != HAL_OK)
1544 {
1545 return HAL_TIMEOUT;
1546 }
1547
1548 /* Clear ADDR flag */
1549 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1550
1551 /* Process Unlocked */
1552 __HAL_UNLOCK(hi2c);
1553
1554 return HAL_OK;
1555 }
1556 else
1557 {
1558 return HAL_BUSY;
1559 }
1560 }
1561 /**
1562 * @brief Write an amount of data in blocking mode to a specific memory address
1563 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
1564 * the configuration information for I2C module
1565 * @param DevAddress: Target device address
1566 * @param MemAddress: Internal memory address
1567 * @param MemAddSize: Size of internal memory address
1568 * @param pData: Pointer to data buffer
1569 * @param Size: Amount of data to be sent
1570 * @param Timeout: Timeout duration
1571 * @retval HAL status
1572 */
1573 HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
1574 {
1575 /* Check the parameters */
1576 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
1577
1578 if(hi2c->State == HAL_I2C_STATE_READY)
1579 {
1580 if((pData == NULL) || (Size == 0))
1581 {
1582 return HAL_ERROR;
1583 }
1584
1585 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1586 {
1587 return HAL_BUSY;
1588 }
1589
1590 /* Process Locked */
1591 __HAL_LOCK(hi2c);
1592
1593 hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
1594 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1595
1596 /* Send Slave Address and Memory Address */
1597 if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK)
1598 {
1599 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1600 {
1601 /* Process Unlocked */
1602 __HAL_UNLOCK(hi2c);
1603 return HAL_ERROR;
1604 }
1605 else
1606 {
1607 /* Process Unlocked */
1608 __HAL_UNLOCK(hi2c);
1609 return HAL_TIMEOUT;
1610 }
1611 }
1612
1613 while(Size > 0)
1614 {
1615 /* Wait until TXE flag is set */
1616 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
1617 {
1618 return HAL_TIMEOUT;
1619 }
1620
1621 /* Write data to DR */
1622 hi2c->Instance->DR = (*pData++);
1623 Size--;
1624
1625 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0))
1626 {
1627 /* Write data to DR */
1628 hi2c->Instance->DR = (*pData++);
1629 Size--;
1630 }
1631 }
1632
1633 /* Wait until TXE flag is set */
1634 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
1635 {
1636 return HAL_TIMEOUT;
1637 }
1638
1639 /* Generate Stop */
1640 hi2c->Instance->CR1 |= I2C_CR1_STOP;
1641
1642 /* Wait until BUSY flag is reset */
1643 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
1644 {
1645 return HAL_TIMEOUT;
1646 }
1647
1648 hi2c->State = HAL_I2C_STATE_READY;
1649
1650 /* Process Unlocked */
1651 __HAL_UNLOCK(hi2c);
1652
1653 return HAL_OK;
1654 }
1655 else
1656 {
1657 return HAL_BUSY;
1658 }
1659 }
1660
1661 /**
1662 * @brief Read an amount of data in blocking mode from a specific memory address
1663 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
1664 * the configuration information for I2C module
1665 * @param DevAddress: Target device address
1666 * @param MemAddress: Internal memory address
1667 * @param MemAddSize: Size of internal memory address
1668 * @param pData: Pointer to data buffer
1669 * @param Size: Amount of data to be sent
1670 * @param Timeout: Timeout duration
1671 * @retval HAL status
1672 */
1673 HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
1674 {
1675 /* Check the parameters */
1676 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
1677
1678 if(hi2c->State == HAL_I2C_STATE_READY)
1679 {
1680 if((pData == NULL) || (Size == 0))
1681 {
1682 return HAL_ERROR;
1683 }
1684
1685 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1686 {
1687 return HAL_BUSY;
1688 }
1689
1690 /* Process Locked */
1691 __HAL_LOCK(hi2c);
1692
1693 hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
1694 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1695
1696 /* Send Slave Address and Memory Address */
1697 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK)
1698 {
1699 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1700 {
1701 /* Process Unlocked */
1702 __HAL_UNLOCK(hi2c);
1703 return HAL_ERROR;
1704 }
1705 else
1706 {
1707 /* Process Unlocked */
1708 __HAL_UNLOCK(hi2c);
1709 return HAL_TIMEOUT;
1710 }
1711 }
1712
1713 if(Size == 1)
1714 {
1715 /* Disable Acknowledge */
1716 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
1717
1718 /* Clear ADDR flag */
1719 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1720
1721 /* Generate Stop */
1722 hi2c->Instance->CR1 |= I2C_CR1_STOP;
1723 }
1724 else if(Size == 2)
1725 {
1726 /* Disable Acknowledge */
1727 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
1728
1729 /* Enable Pos */
1730 hi2c->Instance->CR1 |= I2C_CR1_POS;
1731
1732 /* Clear ADDR flag */
1733 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1734 }
1735 else
1736 {
1737 /* Clear ADDR flag */
1738 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1739 }
1740
1741 while(Size > 0)
1742 {
1743 if(Size <= 3)
1744 {
1745 /* One byte */
1746 if(Size== 1)
1747 {
1748 /* Wait until RXNE flag is set */
1749 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
1750 {
1751 return HAL_TIMEOUT;
1752 }
1753
1754 /* Read data from DR */
1755 (*pData++) = hi2c->Instance->DR;
1756 Size--;
1757 }
1758 /* Two bytes */
1759 else if(Size == 2)
1760 {
1761 /* Wait until BTF flag is set */
1762 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
1763 {
1764 return HAL_TIMEOUT;
1765 }
1766
1767 /* Generate Stop */
1768 hi2c->Instance->CR1 |= I2C_CR1_STOP;
1769
1770 /* Read data from DR */
1771 (*pData++) = hi2c->Instance->DR;
1772 Size--;
1773
1774 /* Read data from DR */
1775 (*pData++) = hi2c->Instance->DR;
1776 Size--;
1777 }
1778 /* 3 Last bytes */
1779 else
1780 {
1781 /* Wait until BTF flag is set */
1782 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
1783 {
1784 return HAL_TIMEOUT;
1785 }
1786
1787 /* Disable Acknowledge */
1788 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
1789
1790 /* Read data from DR */
1791 (*pData++) = hi2c->Instance->DR;
1792 Size--;
1793
1794 /* Wait until BTF flag is set */
1795 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK)
1796 {
1797 return HAL_TIMEOUT;
1798 }
1799
1800 /* Generate Stop */
1801 hi2c->Instance->CR1 |= I2C_CR1_STOP;
1802
1803 /* Read data from DR */
1804 (*pData++) = hi2c->Instance->DR;
1805 Size--;
1806
1807 /* Read data from DR */
1808 (*pData++) = hi2c->Instance->DR;
1809 Size--;
1810 }
1811 }
1812 else
1813 {
1814 /* Wait until RXNE flag is set */
1815 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK)
1816 {
1817 return HAL_TIMEOUT;
1818 }
1819
1820 /* Read data from DR */
1821 (*pData++) = hi2c->Instance->DR;
1822 Size--;
1823
1824 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
1825 {
1826 /* Read data from DR */
1827 (*pData++) = hi2c->Instance->DR;
1828 Size--;
1829 }
1830 }
1831 }
1832
1833 /* Disable Pos */
1834 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
1835
1836 /* Wait until BUSY flag is reset */
1837 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
1838 {
1839 return HAL_TIMEOUT;
1840 }
1841
1842 hi2c->State = HAL_I2C_STATE_READY;
1843
1844 /* Process Unlocked */
1845 __HAL_UNLOCK(hi2c);
1846
1847 return HAL_OK;
1848 }
1849 else
1850 {
1851 return HAL_BUSY;
1852 }
1853 }
1854 /**
1855 * @brief Write an amount of data in no-blocking mode with Interrupt to a specific memory address
1856 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
1857 * the configuration information for I2C module
1858 * @param DevAddress: Target device address
1859 * @param MemAddress: Internal memory address
1860 * @param MemAddSize: Size of internal memory address
1861 * @param pData: Pointer to data buffer
1862 * @param Size: Amount of data to be sent
1863 * @retval HAL status
1864 */
1865 HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
1866 {
1867 /* Check the parameters */
1868 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
1869
1870 if(hi2c->State == HAL_I2C_STATE_READY)
1871 {
1872 if((pData == NULL) || (Size == 0))
1873 {
1874 return HAL_ERROR;
1875 }
1876
1877 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1878 {
1879 return HAL_BUSY;
1880 }
1881
1882 /* Process Locked */
1883 __HAL_LOCK(hi2c);
1884
1885 hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
1886 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1887
1888 hi2c->pBuffPtr = pData;
1889 hi2c->XferSize = Size;
1890 hi2c->XferCount = Size;
1891
1892 /* Send Slave Address and Memory Address */
1893 if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
1894 {
1895 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1896 {
1897 /* Process Unlocked */
1898 __HAL_UNLOCK(hi2c);
1899 return HAL_ERROR;
1900 }
1901 else
1902 {
1903 /* Process Unlocked */
1904 __HAL_UNLOCK(hi2c);
1905 return HAL_TIMEOUT;
1906 }
1907 }
1908
1909 /* Process Unlocked */
1910 __HAL_UNLOCK(hi2c);
1911
1912 /* Note : The I2C interrupts must be enabled after unlocking current process
1913 to avoid the risk of I2C interrupt handle execution before current
1914 process unlock */
1915
1916 /* Enable EVT, BUF and ERR interrupt */
1917 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
1918
1919 return HAL_OK;
1920 }
1921 else
1922 {
1923 return HAL_BUSY;
1924 }
1925 }
1926
1927 /**
1928 * @brief Read an amount of data in no-blocking mode with Interrupt from a specific memory address
1929 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
1930 * the configuration information for I2C module
1931 * @param DevAddress: Target device address
1932 * @param MemAddress: Internal memory address
1933 * @param MemAddSize: Size of internal memory address
1934 * @param pData: Pointer to data buffer
1935 * @param Size: Amount of data to be sent
1936 * @retval HAL status
1937 */
1938 HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
1939 {
1940 /* Check the parameters */
1941 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
1942
1943 if(hi2c->State == HAL_I2C_STATE_READY)
1944 {
1945 if((pData == NULL) || (Size == 0))
1946 {
1947 return HAL_ERROR;
1948 }
1949
1950 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
1951 {
1952 return HAL_BUSY;
1953 }
1954
1955 /* Process Locked */
1956 __HAL_LOCK(hi2c);
1957
1958 hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
1959 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
1960
1961 hi2c->pBuffPtr = pData;
1962 hi2c->XferSize = Size;
1963 hi2c->XferCount = Size;
1964
1965 /* Send Slave Address and Memory Address */
1966 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
1967 {
1968 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
1969 {
1970 /* Process Unlocked */
1971 __HAL_UNLOCK(hi2c);
1972 return HAL_ERROR;
1973 }
1974 else
1975 {
1976 /* Process Unlocked */
1977 __HAL_UNLOCK(hi2c);
1978 return HAL_TIMEOUT;
1979 }
1980 }
1981
1982 if(hi2c->XferCount == 1)
1983 {
1984 /* Disable Acknowledge */
1985 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
1986
1987 /* Clear ADDR flag */
1988 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
1989
1990 /* Generate Stop */
1991 hi2c->Instance->CR1 |= I2C_CR1_STOP;
1992 }
1993 else if(hi2c->XferCount == 2)
1994 {
1995 /* Disable Acknowledge */
1996 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
1997
1998 /* Enable Pos */
1999 hi2c->Instance->CR1 |= I2C_CR1_POS;
2000
2001 /* Clear ADDR flag */
2002 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
2003 }
2004 else
2005 {
2006 /* Enable Acknowledge */
2007 hi2c->Instance->CR1 |= I2C_CR1_ACK;
2008
2009 /* Clear ADDR flag */
2010 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
2011 }
2012
2013 /* Process Unlocked */
2014 __HAL_UNLOCK(hi2c);
2015
2016 /* Note : The I2C interrupts must be enabled after unlocking current process
2017 to avoid the risk of I2C interrupt handle execution before current
2018 process unlock */
2019
2020 /* Enable EVT, BUF and ERR interrupt */
2021 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
2022
2023 return HAL_OK;
2024 }
2025 else
2026 {
2027 return HAL_BUSY;
2028 }
2029 }
2030 /**
2031 * @brief Write an amount of data in no-blocking mode with DMA to a specific memory address
2032 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2033 * the configuration information for I2C module
2034 * @param DevAddress: Target device address
2035 * @param MemAddress: Internal memory address
2036 * @param MemAddSize: Size of internal memory address
2037 * @param pData: Pointer to data buffer
2038 * @param Size: Amount of data to be sent
2039 * @retval HAL status
2040 */
2041 HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
2042 {
2043 /* Check the parameters */
2044 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
2045
2046 if(hi2c->State == HAL_I2C_STATE_READY)
2047 {
2048 if((pData == NULL) || (Size == 0))
2049 {
2050 return HAL_ERROR;
2051 }
2052
2053 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
2054 {
2055 return HAL_BUSY;
2056 }
2057
2058 /* Process Locked */
2059 __HAL_LOCK(hi2c);
2060
2061 hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX;
2062 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
2063
2064 hi2c->pBuffPtr = pData;
2065 hi2c->XferSize = Size;
2066 hi2c->XferCount = Size;
2067
2068 /* Set the I2C DMA transfer complete callback */
2069 hi2c->hdmatx->XferCpltCallback = I2C_DMAMemTransmitCplt;
2070
2071 /* Set the DMA error callback */
2072 hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
2073
2074 /* Enable the DMA Stream */
2075 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->DR, Size);
2076
2077 /* Send Slave Address and Memory Address */
2078 if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
2079 {
2080 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
2081 {
2082 /* Process Unlocked */
2083 __HAL_UNLOCK(hi2c);
2084 return HAL_ERROR;
2085 }
2086 else
2087 {
2088 /* Process Unlocked */
2089 __HAL_UNLOCK(hi2c);
2090 return HAL_TIMEOUT;
2091 }
2092 }
2093
2094 /* Enable DMA Request */
2095 hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
2096
2097 /* Process Unlocked */
2098 __HAL_UNLOCK(hi2c);
2099
2100 return HAL_OK;
2101 }
2102 else
2103 {
2104 return HAL_BUSY;
2105 }
2106 }
2107
2108 /**
2109 * @brief Reads an amount of data in no-blocking mode with DMA from a specific memory address.
2110 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2111 * the configuration information for I2C module
2112 * @param DevAddress: Target device address
2113 * @param MemAddress: Internal memory address
2114 * @param MemAddSize: Size of internal memory address
2115 * @param pData: Pointer to data buffer
2116 * @param Size: Amount of data to be read
2117 * @retval HAL status
2118 */
2119 HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
2120 {
2121 /* Check the parameters */
2122 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
2123
2124 if(hi2c->State == HAL_I2C_STATE_READY)
2125 {
2126 if((pData == NULL) || (Size == 0))
2127 {
2128 return HAL_ERROR;
2129 }
2130
2131 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
2132 {
2133 return HAL_BUSY;
2134 }
2135
2136 /* Process Locked */
2137 __HAL_LOCK(hi2c);
2138
2139 hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX;
2140 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
2141
2142 hi2c->pBuffPtr = pData;
2143 hi2c->XferSize = Size;
2144 hi2c->XferCount = Size;
2145
2146 /* Set the I2C DMA transfer complete callback */
2147 hi2c->hdmarx->XferCpltCallback = I2C_DMAMemReceiveCplt;
2148
2149 /* Set the DMA error callback */
2150 hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
2151
2152 /* Enable the DMA Stream */
2153 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)pData, Size);
2154
2155 /* Send Slave Address and Memory Address */
2156 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG) != HAL_OK)
2157 {
2158 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
2159 {
2160 /* Process Unlocked */
2161 __HAL_UNLOCK(hi2c);
2162 return HAL_ERROR;
2163 }
2164 else
2165 {
2166 /* Process Unlocked */
2167 __HAL_UNLOCK(hi2c);
2168 return HAL_TIMEOUT;
2169 }
2170 }
2171
2172 if(Size == 1)
2173 {
2174 /* Disable Acknowledge */
2175 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
2176 }
2177 else
2178 {
2179 /* Enable Last DMA bit */
2180 hi2c->Instance->CR2 |= I2C_CR2_LAST;
2181 }
2182
2183 /* Enable DMA Request */
2184 hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
2185
2186 /* Clear ADDR flag */
2187 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
2188
2189 /* Process Unlocked */
2190 __HAL_UNLOCK(hi2c);
2191
2192 return HAL_OK;
2193 }
2194 else
2195 {
2196 return HAL_BUSY;
2197 }
2198 }
2199
2200 /**
2201 * @brief Checks if target device is ready for communication.
2202 * @note This function is used with Memory devices
2203 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2204 * the configuration information for I2C module
2205 * @param DevAddress: Target device address
2206 * @param Trials: Number of trials
2207 * @param Timeout: Timeout duration
2208 * @retval HAL status
2209 */
2210 HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
2211 {
2212 uint32_t tickstart = 0, tmp1 = 0, tmp2 = 0, tmp3 = 0, I2C_Trials = 1;
2213
2214 if(hi2c->State == HAL_I2C_STATE_READY)
2215 {
2216 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
2217 {
2218 return HAL_BUSY;
2219 }
2220
2221 /* Process Locked */
2222 __HAL_LOCK(hi2c);
2223
2224 hi2c->State = HAL_I2C_STATE_BUSY;
2225 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
2226
2227 do
2228 {
2229 /* Generate Start */
2230 hi2c->Instance->CR1 |= I2C_CR1_START;
2231
2232 /* Wait until SB flag is set */
2233 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
2234 {
2235 return HAL_TIMEOUT;
2236 }
2237
2238 /* Send slave address */
2239 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
2240
2241 /* Wait until ADDR or AF flag are set */
2242 /* Get tick */
2243 tickstart = HAL_GetTick();
2244
2245 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
2246 tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
2247 tmp3 = hi2c->State;
2248 while((tmp1 == RESET) && (tmp2 == RESET) && (tmp3 != HAL_I2C_STATE_TIMEOUT))
2249 {
2250 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
2251 {
2252 hi2c->State = HAL_I2C_STATE_TIMEOUT;
2253 }
2254 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
2255 tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
2256 tmp3 = hi2c->State;
2257 }
2258
2259 hi2c->State = HAL_I2C_STATE_READY;
2260
2261 /* Check if the ADDR flag has been set */
2262 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)
2263 {
2264 /* Generate Stop */
2265 hi2c->Instance->CR1 |= I2C_CR1_STOP;
2266
2267 /* Clear ADDR Flag */
2268 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
2269
2270 /* Wait until BUSY flag is reset */
2271 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
2272 {
2273 return HAL_TIMEOUT;
2274 }
2275
2276 hi2c->State = HAL_I2C_STATE_READY;
2277
2278 /* Process Unlocked */
2279 __HAL_UNLOCK(hi2c);
2280
2281 return HAL_OK;
2282 }
2283 else
2284 {
2285 /* Generate Stop */
2286 hi2c->Instance->CR1 |= I2C_CR1_STOP;
2287
2288 /* Clear AF Flag */
2289 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
2290
2291 /* Wait until BUSY flag is reset */
2292 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout) != HAL_OK)
2293 {
2294 return HAL_TIMEOUT;
2295 }
2296 }
2297 }while(I2C_Trials++ < Trials);
2298
2299 hi2c->State = HAL_I2C_STATE_READY;
2300
2301 /* Process Unlocked */
2302 __HAL_UNLOCK(hi2c);
2303
2304 return HAL_ERROR;
2305 }
2306 else
2307 {
2308 return HAL_BUSY;
2309 }
2310 }
2311
2312 /**
2313 * @brief This function handles I2C event interrupt request.
2314 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2315 * the configuration information for I2C module
2316 * @retval HAL status
2317 */
2318 void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
2319 {
2320 uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0, tmp4 = 0;
2321 /* Master mode selected */
2322 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_MSL) == SET)
2323 {
2324 /* I2C in mode Transmitter -----------------------------------------------*/
2325 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == SET)
2326 {
2327 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE);
2328 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF);
2329 tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF);
2330 tmp4 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT);
2331 /* TXE set and BTF reset -----------------------------------------------*/
2332 if((tmp1 == SET) && (tmp2 == SET) && (tmp3 == RESET))
2333 {
2334 I2C_MasterTransmit_TXE(hi2c);
2335 }
2336 /* BTF set -------------------------------------------------------------*/
2337 else if((tmp3 == SET) && (tmp4 == SET))
2338 {
2339 I2C_MasterTransmit_BTF(hi2c);
2340 }
2341 }
2342 /* I2C in mode Receiver --------------------------------------------------*/
2343 else
2344 {
2345 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE);
2346 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF);
2347 tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF);
2348 tmp4 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT);
2349 /* RXNE set and BTF reset -----------------------------------------------*/
2350 if((tmp1 == SET) && (tmp2 == SET) && (tmp3 == RESET))
2351 {
2352 I2C_MasterReceive_RXNE(hi2c);
2353 }
2354 /* BTF set -------------------------------------------------------------*/
2355 else if((tmp3 == SET) && (tmp4 == SET))
2356 {
2357 I2C_MasterReceive_BTF(hi2c);
2358 }
2359 }
2360 }
2361 /* Slave mode selected */
2362 else
2363 {
2364 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
2365 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, (I2C_IT_EVT));
2366 tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF);
2367 tmp4 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA);
2368 /* ADDR set --------------------------------------------------------------*/
2369 if((tmp1 == SET) && (tmp2 == SET))
2370 {
2371 I2C_Slave_ADDR(hi2c);
2372 }
2373 /* STOPF set --------------------------------------------------------------*/
2374 else if((tmp3 == SET) && (tmp2 == SET))
2375 {
2376 I2C_Slave_STOPF(hi2c);
2377 }
2378 /* I2C in mode Transmitter -----------------------------------------------*/
2379 else if(tmp4 == SET)
2380 {
2381 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE);
2382 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF);
2383 tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF);
2384 tmp4 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT);
2385 /* TXE set and BTF reset -----------------------------------------------*/
2386 if((tmp1 == SET) && (tmp2 == SET) && (tmp3 == RESET))
2387 {
2388 I2C_SlaveTransmit_TXE(hi2c);
2389 }
2390 /* BTF set -------------------------------------------------------------*/
2391 else if((tmp3 == SET) && (tmp4 == SET))
2392 {
2393 I2C_SlaveTransmit_BTF(hi2c);
2394 }
2395 }
2396 /* I2C in mode Receiver --------------------------------------------------*/
2397 else
2398 {
2399 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE);
2400 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_BUF);
2401 tmp3 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF);
2402 tmp4 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_EVT);
2403 /* RXNE set and BTF reset ----------------------------------------------*/
2404 if((tmp1 == SET) && (tmp2 == SET) && (tmp3 == RESET))
2405 {
2406 I2C_SlaveReceive_RXNE(hi2c);
2407 }
2408 /* BTF set -------------------------------------------------------------*/
2409 else if((tmp3 == SET) && (tmp4 == SET))
2410 {
2411 I2C_SlaveReceive_BTF(hi2c);
2412 }
2413 }
2414 }
2415 }
2416
2417 /**
2418 * @brief This function handles I2C error interrupt request.
2419 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2420 * the configuration information for I2C module
2421 * @retval HAL status
2422 */
2423 void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
2424 {
2425 uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0;
2426
2427 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BERR);
2428 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR);
2429 /* I2C Bus error interrupt occurred ----------------------------------------*/
2430 if((tmp1 == SET) && (tmp2 == SET))
2431 {
2432 hi2c->ErrorCode |= HAL_I2C_ERROR_BERR;
2433
2434 /* Clear BERR flag */
2435 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
2436 }
2437
2438 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ARLO);
2439 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR);
2440 /* I2C Arbitration Loss error interrupt occurred ---------------------------*/
2441 if((tmp1 == SET) && (tmp2 == SET))
2442 {
2443 hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO;
2444
2445 /* Clear ARLO flag */
2446 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
2447 }
2448
2449 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
2450 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR);
2451 /* I2C Acknowledge failure error interrupt occurred ------------------------*/
2452 if((tmp1 == SET) && (tmp2 == SET))
2453 {
2454 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_MSL);
2455 tmp2 = hi2c->XferCount;
2456 tmp3 = hi2c->State;
2457 if((tmp1 == RESET) && (tmp2 == 0) && (tmp3 == HAL_I2C_STATE_BUSY_TX))
2458 {
2459 I2C_Slave_AF(hi2c);
2460 }
2461 else
2462 {
2463 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
2464 /* Clear AF flag */
2465 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
2466 }
2467 }
2468
2469 tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_OVR);
2470 tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR);
2471 /* I2C Over-Run/Under-Run interrupt occurred -------------------------------*/
2472 if((tmp1 == SET) && (tmp2 == SET))
2473 {
2474 hi2c->ErrorCode |= HAL_I2C_ERROR_OVR;
2475 /* Clear OVR flag */
2476 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
2477 }
2478
2479 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
2480 {
2481 hi2c->State = HAL_I2C_STATE_READY;
2482
2483 /* Disable Pos bit in I2C CR1 when error occurred in Master/Mem Receive IT Process */
2484 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
2485
2486 HAL_I2C_ErrorCallback(hi2c);
2487 }
2488 }
2489
2490 /**
2491 * @brief Master Tx Transfer completed callbacks.
2492 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2493 * the configuration information for I2C module
2494 * @retval None
2495 */
2496 __weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
2497 {
2498 /* NOTE : This function Should not be modified, when the callback is needed,
2499 the HAL_I2C_TxCpltCallback could be implemented in the user file
2500 */
2501 }
2502
2503 /**
2504 * @brief Master Rx Transfer completed callbacks.
2505 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2506 * the configuration information for I2C module
2507 * @retval None
2508 */
2509 __weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
2510 {
2511 /* NOTE : This function Should not be modified, when the callback is needed,
2512 the HAL_I2C_TxCpltCallback could be implemented in the user file
2513 */
2514 }
2515
2516 /** @brief Slave Tx Transfer completed callbacks.
2517 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2518 * the configuration information for I2C module
2519 * @retval None
2520 */
2521 __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
2522 {
2523 /* NOTE : This function Should not be modified, when the callback is needed,
2524 the HAL_I2C_TxCpltCallback could be implemented in the user file
2525 */
2526 }
2527
2528 /**
2529 * @brief Slave Rx Transfer completed callbacks.
2530 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2531 * the configuration information for I2C module
2532 * @retval None
2533 */
2534 __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
2535 {
2536 /* NOTE : This function Should not be modified, when the callback is needed,
2537 the HAL_I2C_TxCpltCallback could be implemented in the user file
2538 */
2539 }
2540
2541 /**
2542 * @brief Memory Tx Transfer completed callbacks.
2543 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2544 * the configuration information for I2C module
2545 * @retval None
2546 */
2547 __weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
2548 {
2549 /* NOTE : This function Should not be modified, when the callback is needed,
2550 the HAL_I2C_TxCpltCallback could be implemented in the user file
2551 */
2552 }
2553
2554 /**
2555 * @brief Memory Rx Transfer completed callbacks.
2556 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2557 * the configuration information for I2C module
2558 * @retval None
2559 */
2560 __weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
2561 {
2562 /* NOTE : This function Should not be modified, when the callback is needed,
2563 the HAL_I2C_TxCpltCallback could be implemented in the user file
2564 */
2565 }
2566
2567 /**
2568 * @brief I2C error callbacks.
2569 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2570 * the configuration information for I2C module
2571 * @retval None
2572 */
2573 __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
2574 {
2575 /* NOTE : This function Should not be modified, when the callback is needed,
2576 the HAL_I2C_ErrorCallback could be implemented in the user file
2577 */
2578 }
2579
2580 /**
2581 * @}
2582 */
2583
2584 /** @defgroup I2C_Exported_Functions_Group3 Peripheral State and Errors functions
2585 * @brief Peripheral State and Errors functions
2586 *
2587 @verbatim
2588 ===============================================================================
2589 ##### Peripheral State and Errors functions #####
2590 ===============================================================================
2591 [..]
2592 This subsection permits to get in run-time the status of the peripheral
2593 and the data flow.
2594
2595 @endverbatim
2596 * @{
2597 */
2598
2599 /**
2600 * @brief Returns the I2C state.
2601 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2602 * the configuration information for I2C module
2603 * @retval HAL state
2604 */
2605 HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
2606 {
2607 return hi2c->State;
2608 }
2609
2610 /**
2611 * @brief Return the I2C error code
2612 * @param hi2c : pointer to a I2C_HandleTypeDef structure that contains
2613 * the configuration information for the specified I2C.
2614 * @retval I2C Error Code
2615 */
2616 uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
2617 {
2618 return hi2c->ErrorCode;
2619 }
2620
2621 /**
2622 * @}
2623 */
2624
2625 /**
2626 * @brief Handle TXE flag for Master
2627 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2628 * the configuration information for I2C module
2629 * @retval HAL status
2630 */
2631 static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c)
2632 {
2633 /* Write data to DR */
2634 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
2635 hi2c->XferCount--;
2636
2637 if(hi2c->XferCount == 0)
2638 {
2639 /* Disable BUF interrupt */
2640 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
2641 }
2642
2643 return HAL_OK;
2644 }
2645
2646 /**
2647 * @brief Handle BTF flag for Master transmitter
2648 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2649 * the configuration information for I2C module
2650 * @retval HAL status
2651 */
2652 static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
2653 {
2654 if(hi2c->XferCount != 0)
2655 {
2656 /* Write data to DR */
2657 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
2658 hi2c->XferCount--;
2659 }
2660 else
2661 {
2662 /* Disable EVT, BUF and ERR interrupt */
2663 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
2664
2665 /* Generate Stop */
2666 hi2c->Instance->CR1 |= I2C_CR1_STOP;
2667
2668 /* Wait until BUSY flag is reset */
2669 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
2670 {
2671 return HAL_TIMEOUT;
2672 }
2673
2674 if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_TX)
2675 {
2676 hi2c->State = HAL_I2C_STATE_READY;
2677
2678 HAL_I2C_MemTxCpltCallback(hi2c);
2679 }
2680 else
2681 {
2682 hi2c->State = HAL_I2C_STATE_READY;
2683
2684 HAL_I2C_MasterTxCpltCallback(hi2c);
2685 }
2686 }
2687 return HAL_OK;
2688 }
2689
2690 /**
2691 * @brief Handle RXNE flag for Master
2692 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2693 * the configuration information for I2C module
2694 * @retval HAL status
2695 */
2696 static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
2697 {
2698 uint32_t tmp = 0;
2699
2700 tmp = hi2c->XferCount;
2701 if(tmp > 3)
2702 {
2703 /* Read data from DR */
2704 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2705 hi2c->XferCount--;
2706 }
2707 else if((tmp == 2) || (tmp == 3))
2708 {
2709 /* Disable BUF interrupt */
2710 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
2711 }
2712 else
2713 {
2714 /* Disable EVT, BUF and ERR interrupt */
2715 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
2716
2717 /* Read data from DR */
2718 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2719 hi2c->XferCount--;
2720
2721 /* Wait until BUSY flag is reset */
2722 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
2723 {
2724 return HAL_TIMEOUT;
2725 }
2726
2727 /* Disable Pos */
2728 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
2729
2730 if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX)
2731 {
2732 hi2c->State = HAL_I2C_STATE_READY;
2733
2734 HAL_I2C_MemRxCpltCallback(hi2c);
2735 }
2736 else
2737 {
2738 hi2c->State = HAL_I2C_STATE_READY;
2739
2740 HAL_I2C_MasterRxCpltCallback(hi2c);
2741 }
2742 }
2743 return HAL_OK;
2744 }
2745
2746 /**
2747 * @brief Handle BTF flag for Master receiver
2748 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2749 * the configuration information for I2C module
2750 * @retval HAL status
2751 */
2752 static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
2753 {
2754 if(hi2c->XferCount == 3)
2755 {
2756 /* Disable Acknowledge */
2757 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
2758
2759 /* Read data from DR */
2760 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2761 hi2c->XferCount--;
2762 }
2763 else if(hi2c->XferCount == 2)
2764 {
2765 /* Generate Stop */
2766 hi2c->Instance->CR1 |= I2C_CR1_STOP;
2767
2768 /* Read data from DR */
2769 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2770 hi2c->XferCount--;
2771
2772 /* Read data from DR */
2773 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2774 hi2c->XferCount--;
2775
2776 /* Disable EVT and ERR interrupt */
2777 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
2778
2779 /* Wait until BUSY flag is reset */
2780 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
2781 {
2782 return HAL_TIMEOUT;
2783 }
2784
2785 /* Disable Pos */
2786 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
2787
2788 if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX)
2789 {
2790 hi2c->State = HAL_I2C_STATE_READY;
2791
2792 HAL_I2C_MemRxCpltCallback(hi2c);
2793 }
2794 else
2795 {
2796 hi2c->State = HAL_I2C_STATE_READY;
2797
2798 HAL_I2C_MasterRxCpltCallback(hi2c);
2799 }
2800 }
2801 else
2802 {
2803 /* Read data from DR */
2804 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2805 hi2c->XferCount--;
2806 }
2807 return HAL_OK;
2808 }
2809
2810 /**
2811 * @brief Handle TXE flag for Slave
2812 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2813 * the configuration information for I2C module
2814 * @retval HAL status
2815 */
2816 static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c)
2817 {
2818 if(hi2c->XferCount != 0)
2819 {
2820 /* Write data to DR */
2821 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
2822 hi2c->XferCount--;
2823 }
2824 return HAL_OK;
2825 }
2826
2827 /**
2828 * @brief Handle BTF flag for Slave transmitter
2829 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2830 * the configuration information for I2C module
2831 * @retval HAL status
2832 */
2833 static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c)
2834 {
2835 if(hi2c->XferCount != 0)
2836 {
2837 /* Write data to DR */
2838 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
2839 hi2c->XferCount--;
2840 }
2841 return HAL_OK;
2842 }
2843
2844 /**
2845 * @brief Handle RXNE flag for Slave
2846 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2847 * the configuration information for I2C module
2848 * @retval HAL status
2849 */
2850 static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c)
2851 {
2852 if(hi2c->XferCount != 0)
2853 {
2854 /* Read data from DR */
2855 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2856 hi2c->XferCount--;
2857 }
2858 return HAL_OK;
2859 }
2860
2861 /**
2862 * @brief Handle BTF flag for Slave receiver
2863 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2864 * the configuration information for I2C module
2865 * @retval HAL status
2866 */
2867 static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c)
2868 {
2869 if(hi2c->XferCount != 0)
2870 {
2871 /* Read data from DR */
2872 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
2873 hi2c->XferCount--;
2874 }
2875 return HAL_OK;
2876 }
2877
2878 /**
2879 * @brief Handle ADD flag for Slave
2880 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2881 * the configuration information for I2C module
2882 * @retval HAL status
2883 */
2884 static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c)
2885 {
2886 /* Clear ADDR flag */
2887 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
2888
2889 return HAL_OK;
2890 }
2891
2892 /**
2893 * @brief Handle STOPF flag for Slave
2894 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2895 * the configuration information for I2C module
2896 * @retval HAL status
2897 */
2898 static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c)
2899 {
2900 /* Disable EVT, BUF and ERR interrupt */
2901 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
2902
2903 /* Clear STOPF flag */
2904 __HAL_I2C_CLEAR_STOPFLAG(hi2c);
2905
2906 /* Disable Acknowledge */
2907 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
2908
2909 /* Wait until BUSY flag is reset */
2910 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
2911 {
2912 return HAL_TIMEOUT;
2913 }
2914
2915 hi2c->State = HAL_I2C_STATE_READY;
2916
2917 HAL_I2C_SlaveRxCpltCallback(hi2c);
2918
2919 return HAL_OK;
2920 }
2921
2922 /**
2923 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2924 * the configuration information for I2C module
2925 * @retval HAL status
2926 */
2927 static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c)
2928 {
2929 /* Disable EVT, BUF and ERR interrupt */
2930 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
2931
2932 /* Clear AF flag */
2933 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
2934
2935 /* Disable Acknowledge */
2936 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
2937
2938 /* Wait until BUSY flag is reset */
2939 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
2940 {
2941 return HAL_TIMEOUT;
2942 }
2943
2944 hi2c->State = HAL_I2C_STATE_READY;
2945
2946 HAL_I2C_SlaveTxCpltCallback(hi2c);
2947
2948 return HAL_OK;
2949 }
2950
2951 /**
2952 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
2953 * the configuration information for I2C module
2954 * @param DevAddress: Target device address
2955 * @param Timeout: Timeout duration
2956 * @retval HAL status
2957 */
2958 static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout)
2959 {
2960 /* Generate Start */
2961 hi2c->Instance->CR1 |= I2C_CR1_START;
2962
2963 /* Wait until SB flag is set */
2964 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
2965 {
2966 return HAL_TIMEOUT;
2967 }
2968
2969 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
2970 {
2971 /* Send slave address */
2972 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
2973 }
2974 else
2975 {
2976 /* Send header of slave address */
2977 hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
2978
2979 /* Wait until ADD10 flag is set */
2980 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout) != HAL_OK)
2981 {
2982 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
2983 {
2984 return HAL_ERROR;
2985 }
2986 else
2987 {
2988 return HAL_TIMEOUT;
2989 }
2990 }
2991
2992 /* Send slave address */
2993 hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
2994 }
2995
2996 /* Wait until ADDR flag is set */
2997 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
2998 {
2999 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3000 {
3001 return HAL_ERROR;
3002 }
3003 else
3004 {
3005 return HAL_TIMEOUT;
3006 }
3007 }
3008
3009 return HAL_OK;
3010 }
3011
3012 /**
3013 * @brief Master sends target device address for read request.
3014 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
3015 * the configuration information for I2C module
3016 * @param DevAddress: Target device address
3017 * @param Timeout: Timeout duration
3018 * @retval HAL status
3019 */
3020 static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout)
3021 {
3022 /* Enable Acknowledge */
3023 hi2c->Instance->CR1 |= I2C_CR1_ACK;
3024
3025 /* Generate Start */
3026 hi2c->Instance->CR1 |= I2C_CR1_START;
3027
3028 /* Wait until SB flag is set */
3029 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
3030 {
3031 return HAL_TIMEOUT;
3032 }
3033
3034 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
3035 {
3036 /* Send slave address */
3037 hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
3038 }
3039 else
3040 {
3041 /* Send header of slave address */
3042 hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
3043
3044 /* Wait until ADD10 flag is set */
3045 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout) != HAL_OK)
3046 {
3047 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3048 {
3049 return HAL_ERROR;
3050 }
3051 else
3052 {
3053 return HAL_TIMEOUT;
3054 }
3055 }
3056
3057 /* Send slave address */
3058 hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
3059
3060 /* Wait until ADDR flag is set */
3061 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
3062 {
3063 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3064 {
3065 return HAL_ERROR;
3066 }
3067 else
3068 {
3069 return HAL_TIMEOUT;
3070 }
3071 }
3072
3073 /* Clear ADDR flag */
3074 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
3075
3076 /* Generate Restart */
3077 hi2c->Instance->CR1 |= I2C_CR1_START;
3078
3079 /* Wait until SB flag is set */
3080 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
3081 {
3082 return HAL_TIMEOUT;
3083 }
3084
3085 /* Send header of slave address */
3086 hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress);
3087 }
3088
3089 /* Wait until ADDR flag is set */
3090 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
3091 {
3092 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3093 {
3094 return HAL_ERROR;
3095 }
3096 else
3097 {
3098 return HAL_TIMEOUT;
3099 }
3100 }
3101
3102 return HAL_OK;
3103 }
3104
3105 /**
3106 * @brief Master sends target device address followed by internal memory address for write request.
3107 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
3108 * the configuration information for I2C module
3109 * @param DevAddress: Target device address
3110 * @param MemAddress: Internal memory address
3111 * @param MemAddSize: Size of internal memory address
3112 * @param Timeout: Timeout duration
3113 * @retval HAL status
3114 */
3115 static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout)
3116 {
3117 /* Generate Start */
3118 hi2c->Instance->CR1 |= I2C_CR1_START;
3119
3120 /* Wait until SB flag is set */
3121 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
3122 {
3123 return HAL_TIMEOUT;
3124 }
3125
3126 /* Send slave address */
3127 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
3128
3129 /* Wait until ADDR flag is set */
3130 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
3131 {
3132 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3133 {
3134 return HAL_ERROR;
3135 }
3136 else
3137 {
3138 return HAL_TIMEOUT;
3139 }
3140 }
3141
3142 /* Clear ADDR flag */
3143 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
3144
3145 /* Wait until TXE flag is set */
3146 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
3147 {
3148 return HAL_TIMEOUT;
3149 }
3150
3151 /* If Memory address size is 8Bit */
3152 if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
3153 {
3154 /* Send Memory Address */
3155 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
3156 }
3157 /* If Memory address size is 16Bit */
3158 else
3159 {
3160 /* Send MSB of Memory Address */
3161 hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
3162
3163 /* Wait until TXE flag is set */
3164 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
3165 {
3166 return HAL_TIMEOUT;
3167 }
3168
3169 /* Send LSB of Memory Address */
3170 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
3171 }
3172
3173 return HAL_OK;
3174 }
3175
3176 /**
3177 * @brief Master sends target device address followed by internal memory address for read request.
3178 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
3179 * the configuration information for I2C module
3180 * @param DevAddress: Target device address
3181 * @param MemAddress: Internal memory address
3182 * @param MemAddSize: Size of internal memory address
3183 * @param Timeout: Timeout duration
3184 * @retval HAL status
3185 */
3186 static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout)
3187 {
3188 /* Enable Acknowledge */
3189 hi2c->Instance->CR1 |= I2C_CR1_ACK;
3190
3191 /* Generate Start */
3192 hi2c->Instance->CR1 |= I2C_CR1_START;
3193
3194 /* Wait until SB flag is set */
3195 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
3196 {
3197 return HAL_TIMEOUT;
3198 }
3199
3200 /* Send slave address */
3201 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
3202
3203 /* Wait until ADDR flag is set */
3204 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
3205 {
3206 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3207 {
3208 return HAL_ERROR;
3209 }
3210 else
3211 {
3212 return HAL_TIMEOUT;
3213 }
3214 }
3215
3216 /* Clear ADDR flag */
3217 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
3218
3219 /* Wait until TXE flag is set */
3220 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
3221 {
3222 return HAL_TIMEOUT;
3223 }
3224
3225 /* If Memory address size is 8Bit */
3226 if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
3227 {
3228 /* Send Memory Address */
3229 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
3230 }
3231 /* If Memory address size is 16Bit */
3232 else
3233 {
3234 /* Send MSB of Memory Address */
3235 hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
3236
3237 /* Wait until TXE flag is set */
3238 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
3239 {
3240 return HAL_TIMEOUT;
3241 }
3242
3243 /* Send LSB of Memory Address */
3244 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
3245 }
3246
3247 /* Wait until TXE flag is set */
3248 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK)
3249 {
3250 return HAL_TIMEOUT;
3251 }
3252
3253 /* Generate Restart */
3254 hi2c->Instance->CR1 |= I2C_CR1_START;
3255
3256 /* Wait until SB flag is set */
3257 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout) != HAL_OK)
3258 {
3259 return HAL_TIMEOUT;
3260 }
3261
3262 /* Send slave address */
3263 hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
3264
3265 /* Wait until ADDR flag is set */
3266 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout) != HAL_OK)
3267 {
3268 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
3269 {
3270 return HAL_ERROR;
3271 }
3272 else
3273 {
3274 return HAL_TIMEOUT;
3275 }
3276 }
3277
3278 return HAL_OK;
3279 }
3280
3281 /**
3282 * @brief DMA I2C master transmit process complete callback.
3283 * @param hdma: DMA handle
3284 * @retval None
3285 */
3286 static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma)
3287 {
3288 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3289
3290 /* Wait until BTF flag is reset */
3291 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
3292 {
3293 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3294 }
3295
3296 /* Generate Stop */
3297 hi2c->Instance->CR1 |= I2C_CR1_STOP;
3298
3299 /* Disable DMA Request */
3300 hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
3301
3302 hi2c->XferCount = 0;
3303
3304 /* Wait until BUSY flag is reset */
3305 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
3306 {
3307 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3308 }
3309
3310 hi2c->State = HAL_I2C_STATE_READY;
3311
3312 /* Check if Errors has been detected during transfer */
3313 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
3314 {
3315 HAL_I2C_ErrorCallback(hi2c);
3316 }
3317 else
3318 {
3319 HAL_I2C_MasterTxCpltCallback(hi2c);
3320 }
3321 }
3322
3323 /**
3324 * @brief DMA I2C slave transmit process complete callback.
3325 * @param hdma: DMA handle
3326 * @retval None
3327 */
3328 static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma)
3329 {
3330 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3331
3332 /* Wait until AF flag is reset */
3333 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
3334 {
3335 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3336 }
3337
3338 /* Clear AF flag */
3339 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
3340
3341 /* Disable Address Acknowledge */
3342 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
3343
3344 /* Disable DMA Request */
3345 hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
3346
3347 hi2c->XferCount = 0;
3348
3349 /* Wait until BUSY flag is reset */
3350 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
3351 {
3352 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3353 }
3354
3355 hi2c->State = HAL_I2C_STATE_READY;
3356
3357 /* Check if Errors has been detected during transfer */
3358 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
3359 {
3360 HAL_I2C_ErrorCallback(hi2c);
3361 }
3362 else
3363 {
3364 HAL_I2C_SlaveTxCpltCallback(hi2c);
3365 }
3366 }
3367
3368 /**
3369 * @brief DMA I2C master receive process complete callback
3370 * @param hdma: DMA handle
3371 * @retval None
3372 */
3373 static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma)
3374 {
3375 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3376
3377 /* Generate Stop */
3378 hi2c->Instance->CR1 |= I2C_CR1_STOP;
3379
3380 /* Disable Last DMA */
3381 hi2c->Instance->CR2 &= ~I2C_CR2_LAST;
3382
3383 /* Disable Acknowledge */
3384 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
3385
3386 /* Disable DMA Request */
3387 hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
3388
3389 hi2c->XferCount = 0;
3390
3391 /* Wait until BUSY flag is reset */
3392 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
3393 {
3394 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3395 }
3396
3397 hi2c->State = HAL_I2C_STATE_READY;
3398
3399 /* Check if Errors has been detected during transfer */
3400 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
3401 {
3402 HAL_I2C_ErrorCallback(hi2c);
3403 }
3404 else
3405 {
3406 HAL_I2C_MasterRxCpltCallback(hi2c);
3407 }
3408 }
3409
3410 /**
3411 * @brief DMA I2C slave receive process complete callback.
3412 * @param hdma: DMA handle
3413 * @retval None
3414 */
3415 static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma)
3416 {
3417 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3418
3419 /* Wait until STOPF flag is reset */
3420 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
3421 {
3422 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3423 }
3424
3425 /* Clear STOPF flag */
3426 __HAL_I2C_CLEAR_STOPFLAG(hi2c);
3427
3428 /* Disable Address Acknowledge */
3429 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
3430
3431 /* Disable DMA Request */
3432 hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
3433
3434 hi2c->XferCount = 0;
3435
3436 /* Wait until BUSY flag is reset */
3437 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
3438 {
3439 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3440 }
3441
3442 hi2c->State = HAL_I2C_STATE_READY;
3443
3444 /* Check if Errors has been detected during transfer */
3445 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
3446 {
3447 HAL_I2C_ErrorCallback(hi2c);
3448 }
3449 else
3450 {
3451 HAL_I2C_SlaveRxCpltCallback(hi2c);
3452 }
3453 }
3454
3455 /**
3456 * @brief DMA I2C Memory Write process complete callback
3457 * @param hdma: DMA handle
3458 * @retval None
3459 */
3460 static void I2C_DMAMemTransmitCplt(DMA_HandleTypeDef *hdma)
3461 {
3462 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3463
3464 /* Wait until BTF flag is reset */
3465 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK)
3466 {
3467 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3468 }
3469
3470 /* Generate Stop */
3471 hi2c->Instance->CR1 |= I2C_CR1_STOP;
3472
3473 /* Disable DMA Request */
3474 hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
3475
3476 hi2c->XferCount = 0;
3477
3478 /* Wait until BUSY flag is reset */
3479 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
3480 {
3481 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3482 }
3483
3484 hi2c->State = HAL_I2C_STATE_READY;
3485
3486 /* Check if Errors has been detected during transfer */
3487 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
3488 {
3489 HAL_I2C_ErrorCallback(hi2c);
3490 }
3491 else
3492 {
3493 HAL_I2C_MemTxCpltCallback(hi2c);
3494 }
3495 }
3496
3497 /**
3498 * @brief DMA I2C Memory Read process complete callback
3499 * @param hdma: DMA handle
3500 * @retval None
3501 */
3502 static void I2C_DMAMemReceiveCplt(DMA_HandleTypeDef *hdma)
3503 {
3504 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3505
3506 /* Generate Stop */
3507 hi2c->Instance->CR1 |= I2C_CR1_STOP;
3508
3509 /* Disable Last DMA */
3510 hi2c->Instance->CR2 &= ~I2C_CR2_LAST;
3511
3512 /* Disable Acknowledge */
3513 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
3514
3515 /* Disable DMA Request */
3516 hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
3517
3518 hi2c->XferCount = 0;
3519
3520 /* Wait until BUSY flag is reset */
3521 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_FLAG) != HAL_OK)
3522 {
3523 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
3524 }
3525
3526 hi2c->State = HAL_I2C_STATE_READY;
3527
3528 /* Check if Errors has been detected during transfer */
3529 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
3530 {
3531 HAL_I2C_ErrorCallback(hi2c);
3532 }
3533 else
3534 {
3535 HAL_I2C_MemRxCpltCallback(hi2c);
3536 }
3537 }
3538
3539 /**
3540 * @brief DMA I2C communication error callback.
3541 * @param hdma: DMA handle
3542 * @retval None
3543 */
3544 static void I2C_DMAError(DMA_HandleTypeDef *hdma)
3545 {
3546 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
3547
3548 /* Disable Acknowledge */
3549 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
3550
3551 hi2c->XferCount = 0;
3552
3553 hi2c->State = HAL_I2C_STATE_READY;
3554
3555 hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
3556
3557 HAL_I2C_ErrorCallback(hi2c);
3558 }
3559
3560 /**
3561 * @brief This function handles I2C Communication Timeout.
3562 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
3563 * the configuration information for I2C module
3564 * @param Flag: specifies the I2C flag to check.
3565 * @param Status: The new Flag status (SET or RESET).
3566 * @param Timeout: Timeout duration
3567 * @retval HAL status
3568 */
3569 static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
3570 {
3571 uint32_t tickstart = 0;
3572
3573 /* Get tick */
3574 tickstart = HAL_GetTick();
3575
3576 /* Wait until flag is set */
3577 if(Status == RESET)
3578 {
3579 while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
3580 {
3581 /* Check for the Timeout */
3582 if(Timeout != HAL_MAX_DELAY)
3583 {
3584 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
3585 {
3586 hi2c->State= HAL_I2C_STATE_READY;
3587
3588 /* Process Unlocked */
3589 __HAL_UNLOCK(hi2c);
3590
3591 return HAL_TIMEOUT;
3592 }
3593 }
3594 }
3595 }
3596 else
3597 {
3598 while(__HAL_I2C_GET_FLAG(hi2c, Flag) != RESET)
3599 {
3600 /* Check for the Timeout */
3601 if(Timeout != HAL_MAX_DELAY)
3602 {
3603 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
3604 {
3605 hi2c->State= HAL_I2C_STATE_READY;
3606
3607 /* Process Unlocked */
3608 __HAL_UNLOCK(hi2c);
3609
3610 return HAL_TIMEOUT;
3611 }
3612 }
3613 }
3614 }
3615 return HAL_OK;
3616 }
3617
3618 /**
3619 * @brief This function handles I2C Communication Timeout for Master addressing phase.
3620 * @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
3621 * the configuration information for I2C module
3622 * @param Flag: specifies the I2C flag to check.
3623 * @param Timeout: Timeout duration
3624 * @retval HAL status
3625 */
3626 static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout)
3627 {
3628 uint32_t tickstart = 0;
3629
3630 /* Get tick */
3631 tickstart = HAL_GetTick();
3632
3633 while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
3634 {
3635 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
3636 {
3637 /* Generate Stop */
3638 hi2c->Instance->CR1 |= I2C_CR1_STOP;
3639
3640 /* Clear AF Flag */
3641 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
3642
3643 hi2c->ErrorCode = HAL_I2C_ERROR_AF;
3644 hi2c->State= HAL_I2C_STATE_READY;
3645
3646 /* Process Unlocked */
3647 __HAL_UNLOCK(hi2c);
3648
3649 return HAL_ERROR;
3650 }
3651
3652 /* Check for the Timeout */
3653 if(Timeout != HAL_MAX_DELAY)
3654 {
3655 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
3656 {
3657 hi2c->State= HAL_I2C_STATE_READY;
3658
3659 /* Process Unlocked */
3660 __HAL_UNLOCK(hi2c);
3661
3662 return HAL_TIMEOUT;
3663 }
3664 }
3665 }
3666 return HAL_OK;
3667 }
3668
3669 /**
3670 * @}
3671 */
3672
3673 #endif /* HAL_I2C_MODULE_ENABLED */
3674
3675 /**
3676 * @}
3677 */
3678
3679 /**
3680 * @}
3681 */
3682
3683 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/