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1 /**
2 ******************************************************************************
3 * @file stm32f4xx_hal_dma2d.c
4 * @author MCD Application Team
5 * @version V1.2.0
6 * @date 26-December-2014
7 * @brief DMA2D HAL module driver.
8 * This file provides firmware functions to manage the following
9 * functionalities of the DMA2D peripheral:
10 * + Initialization and de-initialization functions
11 * + IO operation functions
12 * + Peripheral Control functions
13 * + Peripheral State and Errors functions
14 *
15 @verbatim
16 ==============================================================================
17 ##### How to use this driver #####
18 ==============================================================================
19 [..]
20 (#) Program the required configuration through following parameters:
21 the Transfer Mode, the output color mode and the output offset using
22 HAL_DMA2D_Init() function.
23
24 (#) Program the required configuration through following parameters:
25 the input color mode, the input color, input alpha value, alpha mode
26 and the input offset using HAL_DMA2D_ConfigLayer() function for foreground
27 or/and background layer.
28
29 *** Polling mode IO operation ***
30 =================================
31 [..]
32 (+) Configure the pdata, Destination and data length and Enable
33 the transfer using HAL_DMA2D_Start()
34 (+) Wait for end of transfer using HAL_DMA2D_PollForTransfer(), at this stage
35 user can specify the value of timeout according to his end application.
36
37 *** Interrupt mode IO operation ***
38 ===================================
39 [..]
40 (#) Configure the pdata, Destination and data length and Enable
41 the transfer using HAL_DMA2D_Start_IT()
42 (#) Use HAL_DMA2D_IRQHandler() called under DMA2D_IRQHandler() Interrupt subroutine
43 (#) At the end of data transfer HAL_DMA2D_IRQHandler() function is executed and user can
44 add his own function by customization of function pointer XferCpltCallback and
45 XferErrorCallback (i.e a member of DMA2D handle structure).
46
47 -@- In Register-to-Memory transfer mode, the pdata parameter is the register
48 color, in Memory-to-memory or memory-to-memory with pixel format
49 conversion the pdata is the source address.
50
51 -@- Configure the foreground source address, the background source address,
52 the Destination and data length and Enable the transfer using
53 HAL_DMA2D_BlendingStart() in polling mode and HAL_DMA2D_BlendingStart_IT()
54 in interrupt mode.
55
56 -@- HAL_DMA2D_BlendingStart() and HAL_DMA2D_BlendingStart_IT() functions
57 are used if the memory to memory with blending transfer mode is selected.
58
59 (#) Optionally, configure and enable the CLUT using HAL_DMA2D_ConfigCLUT()
60 HAL_DMA2D_EnableCLUT() functions.
61
62 (#) Optionally, configure and enable LineInterrupt using the following function:
63 HAL_DMA2D_ProgramLineEvent().
64
65 (#) The transfer can be suspended, continued and aborted using the following
66 functions: HAL_DMA2D_Suspend(), HAL_DMA2D_Resume(), HAL_DMA2D_Abort().
67
68 (#) To control DMA2D state you can use the following function: HAL_DMA2D_GetState()
69
70 *** DMA2D HAL driver macros list ***
71 =============================================
72 [..]
73 Below the list of most used macros in DMA2D HAL driver :
74
75 (+) __HAL_DMA2D_ENABLE: Enable the DMA2D peripheral.
76 (+) __HAL_DMA2D_DISABLE: Disable the DMA2D peripheral.
77 (+) __HAL_DMA2D_GET_FLAG: Get the DMA2D pending flags.
78 (+) __HAL_DMA2D_CLEAR_FLAG: Clear the DMA2D pending flags.
79 (+) __HAL_DMA2D_ENABLE_IT: Enable the specified DMA2D interrupts.
80 (+) __HAL_DMA2D_DISABLE_IT: Disable the specified DMA2D interrupts.
81 (+) __HAL_DMA2D_GET_IT_SOURCE: Check whether the specified DMA2D interrupt has occurred or not.
82
83 [..]
84 (@) You can refer to the DMA2D HAL driver header file for more useful macros
85
86 @endverbatim
87 ******************************************************************************
88 * @attention
89 *
90 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
91 *
92 * Redistribution and use in source and binary forms, with or without modification,
93 * are permitted provided that the following conditions are met:
94 * 1. Redistributions of source code must retain the above copyright notice,
95 * this list of conditions and the following disclaimer.
96 * 2. Redistributions in binary form must reproduce the above copyright notice,
97 * this list of conditions and the following disclaimer in the documentation
98 * and/or other materials provided with the distribution.
99 * 3. Neither the name of STMicroelectronics nor the names of its contributors
100 * may be used to endorse or promote products derived from this software
101 * without specific prior written permission.
102 *
103 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
104 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
105 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
106 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
107 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
108 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
109 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
110 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
111 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
112 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
113 *
114 ******************************************************************************
115 */
116
117 /* Includes ------------------------------------------------------------------*/
118 #include "stm32f4xx_hal.h"
119
120 /** @addtogroup STM32F4xx_HAL_Driver
121 * @{
122 */
123 /** @addtogroup DMA2D
124 * @brief DMA2D HAL module driver
125 * @{
126 */
127
128 #ifdef HAL_DMA2D_MODULE_ENABLED
129
130 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
131
132 /* Private types -------------------------------------------------------------*/
133 /* Private define ------------------------------------------------------------*/
134 /** @addtogroup DMA2D_Private_Defines
135 * @{
136 */
137 #define HAL_TIMEOUT_DMA2D_ABORT ((uint32_t)1000) /* 1s */
138 #define HAL_TIMEOUT_DMA2D_SUSPEND ((uint32_t)1000) /* 1s */
139 /**
140 * @}
141 */
142
143 /* Private variables ---------------------------------------------------------*/
144 /* Private constants ---------------------------------------------------------*/
145 /* Private macro -------------------------------------------------------------*/
146 /* Private function prototypes -----------------------------------------------*/
147 /** @addtogroup DMA2D_Private_Functions_Prototypes
148 * @{
149 */
150 static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
151 /**
152 * @}
153 */
154
155 /* Private functions ---------------------------------------------------------*/
156 /* Exported functions --------------------------------------------------------*/
157 /** @addtogroup DMA2D_Exported_Functions
158 * @{
159 */
160
161 /** @defgroup DMA2D_Group1 Initialization and Configuration functions
162 * @brief Initialization and Configuration functions
163 *
164 @verbatim
165 ===============================================================================
166 ##### Initialization and Configuration functions #####
167 ===============================================================================
168 [..] This section provides functions allowing to:
169 (+) Initialize and configure the DMA2D
170 (+) De-initialize the DMA2D
171
172 @endverbatim
173 * @{
174 */
175
176 /**
177 * @brief Initializes the DMA2D according to the specified
178 * parameters in the DMA2D_InitTypeDef and create the associated handle.
179 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
180 * the configuration information for the DMA2D.
181 * @retval HAL status
182 */
183 HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d)
184 {
185 uint32_t tmp = 0;
186
187 /* Check the DMA2D peripheral state */
188 if(hdma2d == NULL)
189 {
190 return HAL_ERROR;
191 }
192
193 /* Check the parameters */
194 assert_param(IS_DMA2D_ALL_INSTANCE(hdma2d->Instance));
195 assert_param(IS_DMA2D_MODE(hdma2d->Init.Mode));
196 assert_param(IS_DMA2D_CMODE(hdma2d->Init.ColorMode));
197 assert_param(IS_DMA2D_OFFSET(hdma2d->Init.OutputOffset));
198
199 if(hdma2d->State == HAL_DMA2D_STATE_RESET)
200 {
201 /* Init the low level hardware */
202 HAL_DMA2D_MspInit(hdma2d);
203 }
204
205 /* Change DMA2D peripheral state */
206 hdma2d->State = HAL_DMA2D_STATE_BUSY;
207
208 /* DMA2D CR register configuration -------------------------------------------*/
209 /* Get the CR register value */
210 tmp = hdma2d->Instance->CR;
211
212 /* Clear Mode bits */
213 tmp &= (uint32_t)~DMA2D_CR_MODE;
214
215 /* Prepare the value to be wrote to the CR register */
216 tmp |= hdma2d->Init.Mode;
217
218 /* Write to DMA2D CR register */
219 hdma2d->Instance->CR = tmp;
220
221 /* DMA2D OPFCCR register configuration ---------------------------------------*/
222 /* Get the OPFCCR register value */
223 tmp = hdma2d->Instance->OPFCCR;
224
225 /* Clear Color Mode bits */
226 tmp &= (uint32_t)~DMA2D_OPFCCR_CM;
227
228 /* Prepare the value to be wrote to the OPFCCR register */
229 tmp |= hdma2d->Init.ColorMode;
230
231 /* Write to DMA2D OPFCCR register */
232 hdma2d->Instance->OPFCCR = tmp;
233
234 /* DMA2D OOR register configuration ------------------------------------------*/
235 /* Get the OOR register value */
236 tmp = hdma2d->Instance->OOR;
237
238 /* Clear Offset bits */
239 tmp &= (uint32_t)~DMA2D_OOR_LO;
240
241 /* Prepare the value to be wrote to the OOR register */
242 tmp |= hdma2d->Init.OutputOffset;
243
244 /* Write to DMA2D OOR register */
245 hdma2d->Instance->OOR = tmp;
246
247 /* Update error code */
248 hdma2d->ErrorCode = HAL_DMA2D_ERROR_NONE;
249
250 /* Initialize the DMA2D state*/
251 hdma2d->State = HAL_DMA2D_STATE_READY;
252
253 return HAL_OK;
254 }
255
256 /**
257 * @brief Deinitializes the DMA2D peripheral registers to their default reset
258 * values.
259 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
260 * the configuration information for the DMA2D.
261 * @retval None
262 */
263
264 HAL_StatusTypeDef HAL_DMA2D_DeInit(DMA2D_HandleTypeDef *hdma2d)
265 {
266 /* Check the DMA2D peripheral state */
267 if(hdma2d == NULL)
268 {
269 return HAL_ERROR;
270 }
271
272 /* DeInit the low level hardware */
273 HAL_DMA2D_MspDeInit(hdma2d);
274
275 /* Update error code */
276 hdma2d->ErrorCode = HAL_DMA2D_ERROR_NONE;
277
278 /* Initialize the DMA2D state*/
279 hdma2d->State = HAL_DMA2D_STATE_RESET;
280
281 /* Release Lock */
282 __HAL_UNLOCK(hdma2d);
283
284 return HAL_OK;
285 }
286
287 /**
288 * @brief Initializes the DMA2D MSP.
289 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
290 * the configuration information for the DMA2D.
291 * @retval None
292 */
293 __weak void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d)
294 {
295 /* NOTE : This function Should not be modified, when the callback is needed,
296 the HAL_DMA2D_MspInit could be implemented in the user file
297 */
298 }
299
300 /**
301 * @brief DeInitializes the DMA2D MSP.
302 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
303 * the configuration information for the DMA2D.
304 * @retval None
305 */
306 __weak void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d)
307 {
308 /* NOTE : This function Should not be modified, when the callback is needed,
309 the HAL_DMA2D_MspDeInit could be implemented in the user file
310 */
311 }
312
313 /**
314 * @}
315 */
316
317 /** @defgroup DMA2D_Group2 IO operation functions
318 * @brief IO operation functions
319 *
320 @verbatim
321 ===============================================================================
322 ##### IO operation functions #####
323 ===============================================================================
324 [..] This section provides functions allowing to:
325 (+) Configure the pdata, destination address and data size and
326 Start DMA2D transfer.
327 (+) Configure the source for foreground and background, destination address
328 and data size and Start MultiBuffer DMA2D transfer.
329 (+) Configure the pdata, destination address and data size and
330 Start DMA2D transfer with interrupt.
331 (+) Configure the source for foreground and background, destination address
332 and data size and Start MultiBuffer DMA2D transfer with interrupt.
333 (+) Abort DMA2D transfer.
334 (+) Suspend DMA2D transfer.
335 (+) Continue DMA2D transfer.
336 (+) Poll for transfer complete.
337 (+) handle DMA2D interrupt request.
338
339 @endverbatim
340 * @{
341 */
342
343 /**
344 * @brief Start the DMA2D Transfer.
345 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
346 * the configuration information for the DMA2D.
347 * @param pdata: Configure the source memory Buffer address if
348 * the memory to memory or memory to memory with pixel format
349 * conversion DMA2D mode is selected, and configure
350 * the color value if register to memory DMA2D mode is selected.
351 * @param DstAddress: The destination memory Buffer address.
352 * @param Width: The width of data to be transferred from source to destination.
353 * @param Height: The height of data to be transferred from source to destination.
354 * @retval HAL status
355 */
356 HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height)
357 {
358 /* Process locked */
359 __HAL_LOCK(hdma2d);
360
361 /* Change DMA2D peripheral state */
362 hdma2d->State = HAL_DMA2D_STATE_BUSY;
363
364 /* Check the parameters */
365 assert_param(IS_DMA2D_LINE(Height));
366 assert_param(IS_DMA2D_PIXEL(Width));
367
368 /* Disable the Peripheral */
369 __HAL_DMA2D_DISABLE(hdma2d);
370
371 /* Configure the source, destination address and the data size */
372 DMA2D_SetConfig(hdma2d, pdata, DstAddress, Width, Height);
373
374 /* Enable the Peripheral */
375 __HAL_DMA2D_ENABLE(hdma2d);
376
377 return HAL_OK;
378 }
379
380 /**
381 * @brief Start the DMA2D Transfer with interrupt enabled.
382 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
383 * the configuration information for the DMA2D.
384 * @param pdata: Configure the source memory Buffer address if
385 * the memory to memory or memory to memory with pixel format
386 * conversion DMA2D mode is selected, and configure
387 * the color value if register to memory DMA2D mode is selected.
388 * @param DstAddress: The destination memory Buffer address.
389 * @param Width: The width of data to be transferred from source to destination.
390 * @param Height: The height of data to be transferred from source to destination.
391 * @retval HAL status
392 */
393 HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height)
394 {
395 /* Process locked */
396 __HAL_LOCK(hdma2d);
397
398 /* Change DMA2D peripheral state */
399 hdma2d->State = HAL_DMA2D_STATE_BUSY;
400
401 /* Check the parameters */
402 assert_param(IS_DMA2D_LINE(Height));
403 assert_param(IS_DMA2D_PIXEL(Width));
404
405 /* Disable the Peripheral */
406 __HAL_DMA2D_DISABLE(hdma2d);
407
408 /* Configure the source, destination address and the data size */
409 DMA2D_SetConfig(hdma2d, pdata, DstAddress, Width, Height);
410
411 /* Enable the transfer complete interrupt */
412 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TC);
413
414 /* Enable the transfer Error interrupt */
415 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TE);
416
417 /* Enable the Peripheral */
418 __HAL_DMA2D_ENABLE(hdma2d);
419
420 /* Enable the configuration error interrupt */
421 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_CE);
422
423 return HAL_OK;
424 }
425
426 /**
427 * @brief Start the multi-source DMA2D Transfer.
428 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
429 * the configuration information for the DMA2D.
430 * @param SrcAddress1: The source memory Buffer address of the foreground layer.
431 * @param SrcAddress2: The source memory Buffer address of the background layer.
432 * @param DstAddress: The destination memory Buffer address
433 * @param Width: The width of data to be transferred from source to destination.
434 * @param Height: The height of data to be transferred from source to destination.
435 * @retval HAL status
436 */
437 HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height)
438 {
439 /* Process locked */
440 __HAL_LOCK(hdma2d);
441
442 /* Change DMA2D peripheral state */
443 hdma2d->State = HAL_DMA2D_STATE_BUSY;
444
445 /* Check the parameters */
446 assert_param(IS_DMA2D_LINE(Height));
447 assert_param(IS_DMA2D_PIXEL(Width));
448
449 /* Disable the Peripheral */
450 __HAL_DMA2D_DISABLE(hdma2d);
451
452 /* Configure DMA2D Stream source2 address */
453 hdma2d->Instance->BGMAR = SrcAddress2;
454
455 /* Configure the source, destination address and the data size */
456 DMA2D_SetConfig(hdma2d, SrcAddress1, DstAddress, Width, Height);
457
458 /* Enable the Peripheral */
459 __HAL_DMA2D_ENABLE(hdma2d);
460
461 return HAL_OK;
462 }
463
464 /**
465 * @brief Start the multi-source DMA2D Transfer with interrupt enabled.
466 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
467 * the configuration information for the DMA2D.
468 * @param SrcAddress1: The source memory Buffer address of the foreground layer.
469 * @param SrcAddress2: The source memory Buffer address of the background layer.
470 * @param DstAddress: The destination memory Buffer address.
471 * @param Width: The width of data to be transferred from source to destination.
472 * @param Height: The height of data to be transferred from source to destination.
473 * @retval HAL status
474 */
475 HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height)
476 {
477 /* Process locked */
478 __HAL_LOCK(hdma2d);
479
480 /* Change DMA2D peripheral state */
481 hdma2d->State = HAL_DMA2D_STATE_BUSY;
482
483 /* Check the parameters */
484 assert_param(IS_DMA2D_LINE(Height));
485 assert_param(IS_DMA2D_PIXEL(Width));
486
487 /* Disable the Peripheral */
488 __HAL_DMA2D_DISABLE(hdma2d);
489
490 /* Configure DMA2D Stream source2 address */
491 hdma2d->Instance->BGMAR = SrcAddress2;
492
493 /* Configure the source, destination address and the data size */
494 DMA2D_SetConfig(hdma2d, SrcAddress1, DstAddress, Width, Height);
495
496 /* Enable the configuration error interrupt */
497 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_CE);
498
499 /* Enable the transfer complete interrupt */
500 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TC);
501
502 /* Enable the transfer Error interrupt */
503 __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TE);
504
505 /* Enable the Peripheral */
506 __HAL_DMA2D_ENABLE(hdma2d);
507
508 return HAL_OK;
509 }
510
511 /**
512 * @brief Abort the DMA2D Transfer.
513 * @param hdma2d : pointer to a DMA2D_HandleTypeDef structure that contains
514 * the configuration information for the DMA2D.
515 * @retval HAL status
516 */
517 HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d)
518 {
519 uint32_t tickstart = 0;
520
521 /* Disable the DMA2D */
522 __HAL_DMA2D_DISABLE(hdma2d);
523
524 /* Get tick */
525 tickstart = HAL_GetTick();
526
527 /* Check if the DMA2D is effectively disabled */
528 while((hdma2d->Instance->CR & DMA2D_CR_START) != 0)
529 {
530 if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA2D_ABORT)
531 {
532 /* Update error code */
533 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
534
535 /* Change the DMA2D state */
536 hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
537
538 /* Process Unlocked */
539 __HAL_UNLOCK(hdma2d);
540
541 return HAL_TIMEOUT;
542 }
543 }
544 /* Process Unlocked */
545 __HAL_UNLOCK(hdma2d);
546
547 /* Change the DMA2D state*/
548 hdma2d->State = HAL_DMA2D_STATE_READY;
549
550 return HAL_OK;
551 }
552
553 /**
554 * @brief Suspend the DMA2D Transfer.
555 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
556 * the configuration information for the DMA2D.
557 * @retval HAL status
558 */
559 HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d)
560 {
561 uint32_t tickstart = 0;
562
563 /* Suspend the DMA2D transfer */
564 hdma2d->Instance->CR |= DMA2D_CR_SUSP;
565
566 /* Get tick */
567 tickstart = HAL_GetTick();
568
569 /* Check if the DMA2D is effectively suspended */
570 while((hdma2d->Instance->CR & DMA2D_CR_SUSP) != DMA2D_CR_SUSP)
571 {
572 if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA2D_SUSPEND)
573 {
574 /* Update error code */
575 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
576
577 /* Change the DMA2D state */
578 hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
579
580 return HAL_TIMEOUT;
581 }
582 }
583 /* Change the DMA2D state*/
584 hdma2d->State = HAL_DMA2D_STATE_SUSPEND;
585
586 return HAL_OK;
587 }
588
589 /**
590 * @brief Resume the DMA2D Transfer.
591 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
592 * the configuration information for the DMA2D.
593 * @retval HAL status
594 */
595 HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d)
596 {
597 /* Resume the DMA2D transfer */
598 hdma2d->Instance->CR &= ~DMA2D_CR_SUSP;
599
600 /* Change the DMA2D state*/
601 hdma2d->State = HAL_DMA2D_STATE_BUSY;
602
603 return HAL_OK;
604 }
605
606 /**
607 * @brief Polling for transfer complete or CLUT loading.
608 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
609 * the configuration information for the DMA2D.
610 * @param Timeout: Timeout duration
611 * @retval HAL status
612 */
613 HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout)
614 {
615 uint32_t tmp, tmp1;
616 uint32_t tickstart = 0;
617
618 /* Polling for DMA2D transfer */
619 if((hdma2d->Instance->CR & DMA2D_CR_START) != 0)
620 {
621 /* Get tick */
622 tickstart = HAL_GetTick();
623
624 while(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TC) == RESET)
625 {
626 tmp = __HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CE);
627 tmp1 = __HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TE);
628
629 if((tmp != RESET) || (tmp1 != RESET))
630 {
631 /* Clear the transfer and configuration error flags */
632 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CE);
633 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TE);
634
635 /* Change DMA2D state */
636 hdma2d->State= HAL_DMA2D_STATE_ERROR;
637
638 /* Process unlocked */
639 __HAL_UNLOCK(hdma2d);
640
641 return HAL_ERROR;
642 }
643 /* Check for the Timeout */
644 if(Timeout != HAL_MAX_DELAY)
645 {
646 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
647 {
648 /* Process unlocked */
649 __HAL_UNLOCK(hdma2d);
650
651 /* Update error code */
652 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
653
654 /* Change the DMA2D state */
655 hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
656
657 return HAL_TIMEOUT;
658 }
659 }
660 }
661 }
662 /* Polling for CLUT loading */
663 if((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) != 0)
664 {
665 /* Get tick */
666 tickstart = HAL_GetTick();
667
668 while(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CTC) == RESET)
669 {
670 if((__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CAE) != RESET))
671 {
672 /* Clear the transfer and configuration error flags */
673 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CAE);
674
675 /* Change DMA2D state */
676 hdma2d->State= HAL_DMA2D_STATE_ERROR;
677
678 return HAL_ERROR;
679 }
680 /* Check for the Timeout */
681 if(Timeout != HAL_MAX_DELAY)
682 {
683 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
684 {
685 /* Update error code */
686 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
687
688 /* Change the DMA2D state */
689 hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
690
691 return HAL_TIMEOUT;
692 }
693 }
694 }
695 }
696 /* Clear the transfer complete flag */
697 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TC);
698
699 /* Clear the CLUT loading flag */
700 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CTC);
701
702 /* Change DMA2D state */
703 hdma2d->State = HAL_DMA2D_STATE_READY;
704
705 /* Process unlocked */
706 __HAL_UNLOCK(hdma2d);
707
708 return HAL_OK;
709 }
710 /**
711 * @brief Handles DMA2D interrupt request.
712 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
713 * the configuration information for the DMA2D.
714 * @retval HAL status
715 */
716 void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d)
717 {
718 /* Transfer Error Interrupt management ***************************************/
719 if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TE) != RESET)
720 {
721 if(__HAL_DMA2D_GET_IT_SOURCE(hdma2d, DMA2D_IT_TE) != RESET)
722 {
723 /* Disable the transfer Error interrupt */
724 __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_TE);
725
726 /* Update error code */
727 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TE;
728
729 /* Clear the transfer error flag */
730 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TE);
731
732 /* Change DMA2D state */
733 hdma2d->State = HAL_DMA2D_STATE_ERROR;
734
735 /* Process Unlocked */
736 __HAL_UNLOCK(hdma2d);
737
738 if(hdma2d->XferErrorCallback != NULL)
739 {
740 /* Transfer error Callback */
741 hdma2d->XferErrorCallback(hdma2d);
742 }
743 }
744 }
745 /* Configuration Error Interrupt management **********************************/
746 if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CE) != RESET)
747 {
748 if(__HAL_DMA2D_GET_IT_SOURCE(hdma2d, DMA2D_IT_CE) != RESET)
749 {
750 /* Disable the Configuration Error interrupt */
751 __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_CE);
752
753 /* Clear the Configuration error flag */
754 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CE);
755
756 /* Update error code */
757 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_CE;
758
759 /* Change DMA2D state */
760 hdma2d->State = HAL_DMA2D_STATE_ERROR;
761
762 /* Process Unlocked */
763 __HAL_UNLOCK(hdma2d);
764
765 if(hdma2d->XferErrorCallback != NULL)
766 {
767 /* Transfer error Callback */
768 hdma2d->XferErrorCallback(hdma2d);
769 }
770 }
771 }
772 /* Transfer Complete Interrupt management ************************************/
773 if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TC) != RESET)
774 {
775 if(__HAL_DMA2D_GET_IT_SOURCE(hdma2d, DMA2D_IT_TC) != RESET)
776 {
777 /* Disable the transfer complete interrupt */
778 __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_TC);
779
780 /* Clear the transfer complete flag */
781 __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TC);
782
783 /* Update error code */
784 hdma2d->ErrorCode |= HAL_DMA2D_ERROR_NONE;
785
786 /* Change DMA2D state */
787 hdma2d->State = HAL_DMA2D_STATE_READY;
788
789 /* Process Unlocked */
790 __HAL_UNLOCK(hdma2d);
791
792 if(hdma2d->XferCpltCallback != NULL)
793 {
794 /* Transfer complete Callback */
795 hdma2d->XferCpltCallback(hdma2d);
796 }
797 }
798 }
799 }
800
801 /**
802 * @}
803 */
804
805 /** @defgroup DMA2D_Group3 Peripheral Control functions
806 * @brief Peripheral Control functions
807 *
808 @verbatim
809 ===============================================================================
810 ##### Peripheral Control functions #####
811 ===============================================================================
812 [..] This section provides functions allowing to:
813 (+) Configure the DMA2D foreground or/and background parameters.
814 (+) Configure the DMA2D CLUT transfer.
815 (+) Enable DMA2D CLUT.
816 (+) Disable DMA2D CLUT.
817 (+) Configure the line watermark
818
819 @endverbatim
820 * @{
821 */
822 /**
823 * @brief Configure the DMA2D Layer according to the specified
824 * parameters in the DMA2D_InitTypeDef and create the associated handle.
825 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
826 * the configuration information for the DMA2D.
827 * @param LayerIdx: DMA2D Layer index.
828 * This parameter can be one of the following values:
829 * 0(background) / 1(foreground)
830 * @retval HAL status
831 */
832 HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
833 {
834 DMA2D_LayerCfgTypeDef *pLayerCfg = &hdma2d->LayerCfg[LayerIdx];
835
836 uint32_t tmp = 0;
837
838 /* Process locked */
839 __HAL_LOCK(hdma2d);
840
841 /* Change DMA2D peripheral state */
842 hdma2d->State = HAL_DMA2D_STATE_BUSY;
843
844 /* Check the parameters */
845 assert_param(IS_DMA2D_LAYER(LayerIdx));
846 assert_param(IS_DMA2D_OFFSET(pLayerCfg->InputOffset));
847 if(hdma2d->Init.Mode != DMA2D_R2M)
848 {
849 assert_param(IS_DMA2D_INPUT_COLOR_MODE(pLayerCfg->InputColorMode));
850 if(hdma2d->Init.Mode != DMA2D_M2M)
851 {
852 assert_param(IS_DMA2D_ALPHA_MODE(pLayerCfg->AlphaMode));
853 }
854 }
855
856 /* Configure the background DMA2D layer */
857 if(LayerIdx == 0)
858 {
859 /* DMA2D BGPFCR register configuration -----------------------------------*/
860 /* Get the BGPFCCR register value */
861 tmp = hdma2d->Instance->BGPFCCR;
862
863 /* Clear Input color mode, alpha value and alpha mode bits */
864 tmp &= (uint32_t)~(DMA2D_BGPFCCR_CM | DMA2D_BGPFCCR_AM | DMA2D_BGPFCCR_ALPHA);
865
866 if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
867 {
868 /* Prepare the value to be wrote to the BGPFCCR register */
869 tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | ((pLayerCfg->InputAlpha) & 0xFF000000));
870 }
871 else
872 {
873 /* Prepare the value to be wrote to the BGPFCCR register */
874 tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | (pLayerCfg->InputAlpha << 24));
875 }
876
877 /* Write to DMA2D BGPFCCR register */
878 hdma2d->Instance->BGPFCCR = tmp;
879
880 /* DMA2D BGOR register configuration -------------------------------------*/
881 /* Get the BGOR register value */
882 tmp = hdma2d->Instance->BGOR;
883
884 /* Clear colors bits */
885 tmp &= (uint32_t)~DMA2D_BGOR_LO;
886
887 /* Prepare the value to be wrote to the BGOR register */
888 tmp |= pLayerCfg->InputOffset;
889
890 /* Write to DMA2D BGOR register */
891 hdma2d->Instance->BGOR = tmp;
892
893 if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
894 {
895 /* Prepare the value to be wrote to the BGCOLR register */
896 tmp |= ((pLayerCfg->InputAlpha) & 0x00FFFFFF);
897
898 /* Write to DMA2D BGCOLR register */
899 hdma2d->Instance->BGCOLR = tmp;
900 }
901 }
902 /* Configure the foreground DMA2D layer */
903 else
904 {
905 /* DMA2D FGPFCR register configuration -----------------------------------*/
906 /* Get the FGPFCCR register value */
907 tmp = hdma2d->Instance->FGPFCCR;
908
909 /* Clear Input color mode, alpha value and alpha mode bits */
910 tmp &= (uint32_t)~(DMA2D_FGPFCCR_CM | DMA2D_FGPFCCR_AM | DMA2D_FGPFCCR_ALPHA);
911
912 if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
913 {
914 /* Prepare the value to be wrote to the FGPFCCR register */
915 tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | ((pLayerCfg->InputAlpha) & 0xFF000000));
916 }
917 else
918 {
919 /* Prepare the value to be wrote to the FGPFCCR register */
920 tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | (pLayerCfg->InputAlpha << 24));
921 }
922
923 /* Write to DMA2D FGPFCCR register */
924 hdma2d->Instance->FGPFCCR = tmp;
925
926 /* DMA2D FGOR register configuration -------------------------------------*/
927 /* Get the FGOR register value */
928 tmp = hdma2d->Instance->FGOR;
929
930 /* Clear colors bits */
931 tmp &= (uint32_t)~DMA2D_FGOR_LO;
932
933 /* Prepare the value to be wrote to the FGOR register */
934 tmp |= pLayerCfg->InputOffset;
935
936 /* Write to DMA2D FGOR register */
937 hdma2d->Instance->FGOR = tmp;
938
939 if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
940 {
941 /* Prepare the value to be wrote to the FGCOLR register */
942 tmp |= ((pLayerCfg->InputAlpha) & 0x00FFFFFF);
943
944 /* Write to DMA2D FGCOLR register */
945 hdma2d->Instance->FGCOLR = tmp;
946 }
947 }
948 /* Initialize the DMA2D state*/
949 hdma2d->State = HAL_DMA2D_STATE_READY;
950
951 /* Process unlocked */
952 __HAL_UNLOCK(hdma2d);
953
954 return HAL_OK;
955 }
956
957 /**
958 * @brief Configure the DMA2D CLUT Transfer.
959 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
960 * the configuration information for the DMA2D.
961 * @param CLUTCfg: pointer to a DMA2D_CLUTCfgTypeDef structure that contains
962 * the configuration information for the color look up table.
963 * @param LayerIdx: DMA2D Layer index.
964 * This parameter can be one of the following values:
965 * 0(background) / 1(foreground)
966 * @retval HAL status
967 */
968 HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx)
969 {
970 uint32_t tmp = 0, tmp1 = 0;
971
972 /* Check the parameters */
973 assert_param(IS_DMA2D_LAYER(LayerIdx));
974 assert_param(IS_DMA2D_CLUT_CM(CLUTCfg.CLUTColorMode));
975 assert_param(IS_DMA2D_CLUT_SIZE(CLUTCfg.Size));
976
977 /* Configure the CLUT of the background DMA2D layer */
978 if(LayerIdx == 0)
979 {
980 /* Get the BGCMAR register value */
981 tmp = hdma2d->Instance->BGCMAR;
982
983 /* Clear CLUT address bits */
984 tmp &= (uint32_t)~DMA2D_BGCMAR_MA;
985
986 /* Prepare the value to be wrote to the BGCMAR register */
987 tmp |= (uint32_t)CLUTCfg.pCLUT;
988
989 /* Write to DMA2D BGCMAR register */
990 hdma2d->Instance->BGCMAR = tmp;
991
992 /* Get the BGPFCCR register value */
993 tmp = hdma2d->Instance->BGPFCCR;
994
995 /* Clear CLUT size and CLUT address bits */
996 tmp &= (uint32_t)~(DMA2D_BGPFCCR_CS | DMA2D_BGPFCCR_CCM);
997
998 /* Get the CLUT size */
999 tmp1 = CLUTCfg.Size << 16;
1000
1001 /* Prepare the value to be wrote to the BGPFCCR register */
1002 tmp |= (CLUTCfg.CLUTColorMode | tmp1);
1003
1004 /* Write to DMA2D BGPFCCR register */
1005 hdma2d->Instance->BGPFCCR = tmp;
1006 }
1007 /* Configure the CLUT of the foreground DMA2D layer */
1008 else
1009 {
1010 /* Get the FGCMAR register value */
1011 tmp = hdma2d->Instance->FGCMAR;
1012
1013 /* Clear CLUT address bits */
1014 tmp &= (uint32_t)~DMA2D_FGCMAR_MA;
1015
1016 /* Prepare the value to be wrote to the FGCMAR register */
1017 tmp |= (uint32_t)CLUTCfg.pCLUT;
1018
1019 /* Write to DMA2D FGCMAR register */
1020 hdma2d->Instance->FGCMAR = tmp;
1021
1022 /* Get the FGPFCCR register value */
1023 tmp = hdma2d->Instance->FGPFCCR;
1024
1025 /* Clear CLUT size and CLUT address bits */
1026 tmp &= (uint32_t)~(DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM);
1027
1028 /* Get the CLUT size */
1029 tmp1 = CLUTCfg.Size << 8;
1030
1031 /* Prepare the value to be wrote to the FGPFCCR register */
1032 tmp |= (CLUTCfg.CLUTColorMode | tmp1);
1033
1034 /* Write to DMA2D FGPFCCR register */
1035 hdma2d->Instance->FGPFCCR = tmp;
1036 }
1037
1038 return HAL_OK;
1039 }
1040
1041 /**
1042 * @brief Enable the DMA2D CLUT Transfer.
1043 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
1044 * the configuration information for the DMA2D.
1045 * @param LayerIdx: DMA2D Layer index.
1046 * This parameter can be one of the following values:
1047 * 0(background) / 1(foreground)
1048 * @retval HAL status
1049 */
1050 HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
1051 {
1052 /* Check the parameters */
1053 assert_param(IS_DMA2D_LAYER(LayerIdx));
1054
1055 if(LayerIdx == 0)
1056 {
1057 /* Enable the CLUT loading for the background */
1058 hdma2d->Instance->BGPFCCR |= DMA2D_BGPFCCR_START;
1059 }
1060 else
1061 {
1062 /* Enable the CLUT loading for the foreground */
1063 hdma2d->Instance->FGPFCCR |= DMA2D_FGPFCCR_START;
1064 }
1065
1066 return HAL_OK;
1067 }
1068
1069 /**
1070 * @brief Disable the DMA2D CLUT Transfer.
1071 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
1072 * the configuration information for the DMA2D.
1073 * @param LayerIdx: DMA2D Layer index.
1074 * This parameter can be one of the following values:
1075 * 0(background) / 1(foreground)
1076 * @retval HAL status
1077 */
1078 HAL_StatusTypeDef HAL_DMA2D_DisableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
1079 {
1080 /* Check the parameters */
1081 assert_param(IS_DMA2D_LAYER(LayerIdx));
1082
1083 if(LayerIdx == 0)
1084 {
1085 /* Disable the CLUT loading for the background */
1086 hdma2d->Instance->BGPFCCR &= ~DMA2D_BGPFCCR_START;
1087 }
1088 else
1089 {
1090 /* Disable the CLUT loading for the foreground */
1091 hdma2d->Instance->FGPFCCR &= ~DMA2D_FGPFCCR_START;
1092 }
1093
1094 return HAL_OK;
1095 }
1096
1097 /**
1098 * @brief Define the configuration of the line watermark .
1099 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
1100 * the configuration information for the DMA2D.
1101 * @param Line: Line Watermark configuration.
1102 * @retval HAL status
1103 */
1104
1105 HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent(DMA2D_HandleTypeDef *hdma2d, uint32_t Line)
1106 {
1107 /* Process locked */
1108 __HAL_LOCK(hdma2d);
1109
1110 /* Change DMA2D peripheral state */
1111 hdma2d->State = HAL_DMA2D_STATE_BUSY;
1112
1113 /* Check the parameters */
1114 assert_param(IS_DMA2D_LineWatermark(Line));
1115
1116 /* Sets the Line watermark configuration */
1117 DMA2D->LWR = (uint32_t)Line;
1118
1119 /* Initialize the DMA2D state*/
1120 hdma2d->State = HAL_DMA2D_STATE_READY;
1121
1122 /* Process unlocked */
1123 __HAL_UNLOCK(hdma2d);
1124
1125 return HAL_OK;
1126 }
1127
1128 /**
1129 * @}
1130 */
1131
1132 /** @defgroup DMA2D_Group4 Peripheral State functions
1133 * @brief Peripheral State functions
1134 *
1135 @verbatim
1136 ===============================================================================
1137 ##### Peripheral State and Errors functions #####
1138 ===============================================================================
1139 [..]
1140 This subsection provides functions allowing to :
1141 (+) Check the DMA2D state
1142 (+) Get error code
1143
1144 @endverbatim
1145 * @{
1146 */
1147
1148 /**
1149 * @brief Return the DMA2D state
1150 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
1151 * the configuration information for the DMA2D.
1152 * @retval HAL state
1153 */
1154 HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d)
1155 {
1156 return hdma2d->State;
1157 }
1158
1159 /**
1160 * @brief Return the DMA2D error code
1161 * @param hdma2d : pointer to a DMA2D_HandleTypeDef structure that contains
1162 * the configuration information for DMA2D.
1163 * @retval DMA2D Error Code
1164 */
1165 uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d)
1166 {
1167 return hdma2d->ErrorCode;
1168 }
1169
1170 /**
1171 * @}
1172 */
1173
1174
1175 /**
1176 * @brief Set the DMA2D Transfer parameter.
1177 * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
1178 * the configuration information for the specified DMA2D.
1179 * @param pdata: The source memory Buffer address
1180 * @param DstAddress: The destination memory Buffer address
1181 * @param Width: The width of data to be transferred from source to destination.
1182 * @param Height: The height of data to be transferred from source to destination.
1183 * @retval HAL status
1184 */
1185 static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height)
1186 {
1187 uint32_t tmp = 0;
1188 uint32_t tmp1 = 0;
1189 uint32_t tmp2 = 0;
1190 uint32_t tmp3 = 0;
1191 uint32_t tmp4 = 0;
1192
1193 tmp = Width << 16;
1194
1195 /* Configure DMA2D data size */
1196 hdma2d->Instance->NLR = (Height | tmp);
1197
1198 /* Configure DMA2D destination address */
1199 hdma2d->Instance->OMAR = DstAddress;
1200
1201 /* Register to memory DMA2D mode selected */
1202 if (hdma2d->Init.Mode == DMA2D_R2M)
1203 {
1204 tmp1 = pdata & DMA2D_OCOLR_ALPHA_1;
1205 tmp2 = pdata & DMA2D_OCOLR_RED_1;
1206 tmp3 = pdata & DMA2D_OCOLR_GREEN_1;
1207 tmp4 = pdata & DMA2D_OCOLR_BLUE_1;
1208
1209 /* Prepare the value to be wrote to the OCOLR register according to the color mode */
1210 if (hdma2d->Init.ColorMode == DMA2D_ARGB8888)
1211 {
1212 tmp = (tmp3 | tmp2 | tmp1| tmp4);
1213 }
1214 else if (hdma2d->Init.ColorMode == DMA2D_RGB888)
1215 {
1216 tmp = (tmp3 | tmp2 | tmp4);
1217 }
1218 else if (hdma2d->Init.ColorMode == DMA2D_RGB565)
1219 {
1220 tmp2 = (tmp2 >> 19);
1221 tmp3 = (tmp3 >> 10);
1222 tmp4 = (tmp4 >> 3 );
1223 tmp = ((tmp3 << 5) | (tmp2 << 11) | tmp4);
1224 }
1225 else if (hdma2d->Init.ColorMode == DMA2D_ARGB1555)
1226 {
1227 tmp1 = (tmp1 >> 31);
1228 tmp2 = (tmp2 >> 19);
1229 tmp3 = (tmp3 >> 11);
1230 tmp4 = (tmp4 >> 3 );
1231 tmp = ((tmp3 << 5) | (tmp2 << 10) | (tmp1 << 15) | tmp4);
1232 }
1233 else /* DMA2D_CMode = DMA2D_ARGB4444 */
1234 {
1235 tmp1 = (tmp1 >> 28);
1236 tmp2 = (tmp2 >> 20);
1237 tmp3 = (tmp3 >> 12);
1238 tmp4 = (tmp4 >> 4 );
1239 tmp = ((tmp3 << 4) | (tmp2 << 8) | (tmp1 << 12) | tmp4);
1240 }
1241 /* Write to DMA2D OCOLR register */
1242 hdma2d->Instance->OCOLR = tmp;
1243 }
1244 else /* M2M, M2M_PFC or M2M_Blending DMA2D Mode */
1245 {
1246 /* Configure DMA2D source address */
1247 hdma2d->Instance->FGMAR = pdata;
1248 }
1249 }
1250
1251 /**
1252 * @}
1253 */
1254 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
1255 #endif /* HAL_DMA2D_MODULE_ENABLED */
1256 /**
1257 * @}
1258 */
1259
1260 /**
1261 * @}
1262 */
1263
1264 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/