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date Sat, 28 Apr 2018 11:52:34 +0200
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1 /**
2 ******************************************************************************
3 * @file stm32f4xx_hal_cryp.c
4 * @author MCD Application Team
5 * @version V1.2.0
6 * @date 26-December-2014
7 * @brief CRYP HAL module driver.
8 * This file provides firmware functions to manage the following
9 * functionalities of the Cryptography (CRYP) peripheral:
10 * + Initialization and de-initialization functions
11 * + AES processing functions
12 * + DES processing functions
13 * + TDES processing functions
14 * + DMA callback functions
15 * + CRYP IRQ handler management
16 * + Peripheral State functions
17 *
18 @verbatim
19 ==============================================================================
20 ##### How to use this driver #####
21 ==============================================================================
22 [..]
23 The CRYP HAL driver can be used as follows:
24
25 (#)Initialize the CRYP low level resources by implementing the HAL_CRYP_MspInit():
26 (##) Enable the CRYP interface clock using __HAL_RCC_CRYP_CLK_ENABLE()
27 (##) In case of using interrupts (e.g. HAL_CRYP_AESECB_Encrypt_IT())
28 (+++) Configure the CRYP interrupt priority using HAL_NVIC_SetPriority()
29 (+++) Enable the CRYP IRQ handler using HAL_NVIC_EnableIRQ()
30 (+++) In CRYP IRQ handler, call HAL_CRYP_IRQHandler()
31 (##) In case of using DMA to control data transfer (e.g. HAL_CRYP_AESECB_Encrypt_DMA())
32 (+++) Enable the DMAx interface clock using __DMAx_CLK_ENABLE()
33 (+++) Configure and enable two DMA streams one for managing data transfer from
34 memory to peripheral (input stream) and another stream for managing data
35 transfer from peripheral to memory (output stream)
36 (+++) Associate the initialized DMA handle to the CRYP DMA handle
37 using __HAL_LINKDMA()
38 (+++) Configure the priority and enable the NVIC for the transfer complete
39 interrupt on the two DMA Streams. The output stream should have higher
40 priority than the input stream HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ()
41
42 (#)Initialize the CRYP HAL using HAL_CRYP_Init(). This function configures mainly:
43 (##) The data type: 1-bit, 8-bit, 16-bit and 32-bit
44 (##) The key size: 128, 192 and 256. This parameter is relevant only for AES
45 (##) The encryption/decryption key. It's size depends on the algorithm
46 used for encryption/decryption
47 (##) The initialization vector (counter). It is not used ECB mode.
48
49 (#)Three processing (encryption/decryption) functions are available:
50 (##) Polling mode: encryption and decryption APIs are blocking functions
51 i.e. they process the data and wait till the processing is finished,
52 e.g. HAL_CRYP_AESCBC_Encrypt()
53 (##) Interrupt mode: encryption and decryption APIs are not blocking functions
54 i.e. they process the data under interrupt,
55 e.g. HAL_CRYP_AESCBC_Encrypt_IT()
56 (##) DMA mode: encryption and decryption APIs are not blocking functions
57 i.e. the data transfer is ensured by DMA,
58 e.g. HAL_CRYP_AESCBC_Encrypt_DMA()
59
60 (#)When the processing function is called at first time after HAL_CRYP_Init()
61 the CRYP peripheral is initialized and processes the buffer in input.
62 At second call, the processing function performs an append of the already
63 processed buffer.
64 When a new data block is to be processed, call HAL_CRYP_Init() then the
65 processing function.
66
67 (#)Call HAL_CRYP_DeInit() to deinitialize the CRYP peripheral.
68
69 @endverbatim
70 ******************************************************************************
71 * @attention
72 *
73 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
74 *
75 * Redistribution and use in source and binary forms, with or without modification,
76 * are permitted provided that the following conditions are met:
77 * 1. Redistributions of source code must retain the above copyright notice,
78 * this list of conditions and the following disclaimer.
79 * 2. Redistributions in binary form must reproduce the above copyright notice,
80 * this list of conditions and the following disclaimer in the documentation
81 * and/or other materials provided with the distribution.
82 * 3. Neither the name of STMicroelectronics nor the names of its contributors
83 * may be used to endorse or promote products derived from this software
84 * without specific prior written permission.
85 *
86 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
87 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
88 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
89 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
90 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
91 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
92 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
93 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
94 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
95 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
96 *
97 ******************************************************************************
98 */
99
100 /* Includes ------------------------------------------------------------------*/
101 #include "stm32f4xx_hal.h"
102
103 /** @addtogroup STM32F4xx_HAL_Driver
104 * @{
105 */
106
107 /** @defgroup CRYP CRYP
108 * @brief CRYP HAL module driver.
109 * @{
110 */
111
112 #ifdef HAL_CRYP_MODULE_ENABLED
113
114 #if defined(STM32F415xx) || defined(STM32F417xx) || defined(STM32F437xx) || defined(STM32F439xx)
115
116 /* Private typedef -----------------------------------------------------------*/
117 /* Private define ------------------------------------------------------------*/
118 /** @addtogroup CRYP_Private_define
119 * @{
120 */
121 #define CRYP_TIMEOUT_VALUE 1
122 /**
123 * @}
124 */
125
126 /* Private macro -------------------------------------------------------------*/
127 /* Private variables ---------------------------------------------------------*/
128 /* Private function prototypes -----------------------------------------------*/
129 /** @addtogroup CRYP_Private_Functions_prototypes
130 * @{
131 */
132 static void CRYP_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector, uint32_t IVSize);
133 static void CRYP_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key, uint32_t KeySize);
134 static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout);
135 static HAL_StatusTypeDef CRYP_ProcessData2Words(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout);
136 static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma);
137 static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma);
138 static void CRYP_DMAError(DMA_HandleTypeDef *hdma);
139 static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr);
140 static void CRYP_SetTDESECBMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction);
141 static void CRYP_SetTDESCBCMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction);
142 static void CRYP_SetDESECBMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction);
143 static void CRYP_SetDESCBCMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction);
144 /**
145 * @}
146 */
147
148
149 /* Private functions ---------------------------------------------------------*/
150
151 /** @addtogroup CRYP_Private_Functions
152 * @{
153 */
154
155
156 /**
157 * @brief DMA CRYP Input Data process complete callback.
158 * @param hdma: DMA handle
159 * @retval None
160 */
161 static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma)
162 {
163 CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
164
165 /* Disable the DMA transfer for input FIFO request by resetting the DIEN bit
166 in the DMACR register */
167 CRYP->DMACR &= (uint32_t)(~CRYP_DMACR_DIEN);
168
169 /* Call input data transfer complete callback */
170 HAL_CRYP_InCpltCallback(hcryp);
171 }
172
173 /**
174 * @brief DMA CRYP Output Data process complete callback.
175 * @param hdma: DMA handle
176 * @retval None
177 */
178 static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma)
179 {
180 CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
181
182 /* Disable the DMA transfer for output FIFO request by resetting the DOEN bit
183 in the DMACR register */
184 CRYP->DMACR &= (uint32_t)(~CRYP_DMACR_DOEN);
185
186 /* Disable CRYP */
187 __HAL_CRYP_DISABLE();
188
189 /* Change the CRYP state to ready */
190 hcryp->State = HAL_CRYP_STATE_READY;
191
192 /* Call output data transfer complete callback */
193 HAL_CRYP_OutCpltCallback(hcryp);
194 }
195
196 /**
197 * @brief DMA CRYP communication error callback.
198 * @param hdma: DMA handle
199 * @retval None
200 */
201 static void CRYP_DMAError(DMA_HandleTypeDef *hdma)
202 {
203 CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
204 hcryp->State= HAL_CRYP_STATE_READY;
205 HAL_CRYP_ErrorCallback(hcryp);
206 }
207
208 /**
209 * @brief Writes the Key in Key registers.
210 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
211 * the configuration information for CRYP module
212 * @param Key: Pointer to Key buffer
213 * @param KeySize: Size of Key
214 * @retval None
215 */
216 static void CRYP_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key, uint32_t KeySize)
217 {
218 uint32_t keyaddr = (uint32_t)Key;
219
220 switch(KeySize)
221 {
222 case CRYP_KEYSIZE_256B:
223 /* Key Initialisation */
224 CRYP->K0LR = __REV(*(uint32_t*)(keyaddr));
225 keyaddr+=4;
226 CRYP->K0RR = __REV(*(uint32_t*)(keyaddr));
227 keyaddr+=4;
228 CRYP->K1LR = __REV(*(uint32_t*)(keyaddr));
229 keyaddr+=4;
230 CRYP->K1RR = __REV(*(uint32_t*)(keyaddr));
231 keyaddr+=4;
232 CRYP->K2LR = __REV(*(uint32_t*)(keyaddr));
233 keyaddr+=4;
234 CRYP->K2RR = __REV(*(uint32_t*)(keyaddr));
235 keyaddr+=4;
236 CRYP->K3LR = __REV(*(uint32_t*)(keyaddr));
237 keyaddr+=4;
238 CRYP->K3RR = __REV(*(uint32_t*)(keyaddr));
239 break;
240 case CRYP_KEYSIZE_192B:
241 CRYP->K1LR = __REV(*(uint32_t*)(keyaddr));
242 keyaddr+=4;
243 CRYP->K1RR = __REV(*(uint32_t*)(keyaddr));
244 keyaddr+=4;
245 CRYP->K2LR = __REV(*(uint32_t*)(keyaddr));
246 keyaddr+=4;
247 CRYP->K2RR = __REV(*(uint32_t*)(keyaddr));
248 keyaddr+=4;
249 CRYP->K3LR = __REV(*(uint32_t*)(keyaddr));
250 keyaddr+=4;
251 CRYP->K3RR = __REV(*(uint32_t*)(keyaddr));
252 break;
253 case CRYP_KEYSIZE_128B:
254 CRYP->K2LR = __REV(*(uint32_t*)(keyaddr));
255 keyaddr+=4;
256 CRYP->K2RR = __REV(*(uint32_t*)(keyaddr));
257 keyaddr+=4;
258 CRYP->K3LR = __REV(*(uint32_t*)(keyaddr));
259 keyaddr+=4;
260 CRYP->K3RR = __REV(*(uint32_t*)(keyaddr));
261 break;
262 default:
263 break;
264 }
265 }
266
267 /**
268 * @brief Writes the InitVector/InitCounter in IV registers.
269 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
270 * the configuration information for CRYP module
271 * @param InitVector: Pointer to InitVector/InitCounter buffer
272 * @param IVSize: Size of the InitVector/InitCounter
273 * @retval None
274 */
275 static void CRYP_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector, uint32_t IVSize)
276 {
277 uint32_t ivaddr = (uint32_t)InitVector;
278
279 switch(IVSize)
280 {
281 case CRYP_KEYSIZE_128B:
282 CRYP->IV0LR = __REV(*(uint32_t*)(ivaddr));
283 ivaddr+=4;
284 CRYP->IV0RR = __REV(*(uint32_t*)(ivaddr));
285 ivaddr+=4;
286 CRYP->IV1LR = __REV(*(uint32_t*)(ivaddr));
287 ivaddr+=4;
288 CRYP->IV1RR = __REV(*(uint32_t*)(ivaddr));
289 break;
290 /* Whatever key size 192 or 256, Init vector is written in IV0LR and IV0RR */
291 case CRYP_KEYSIZE_192B:
292 CRYP->IV0LR = __REV(*(uint32_t*)(ivaddr));
293 ivaddr+=4;
294 CRYP->IV0RR = __REV(*(uint32_t*)(ivaddr));
295 break;
296 case CRYP_KEYSIZE_256B:
297 CRYP->IV0LR = __REV(*(uint32_t*)(ivaddr));
298 ivaddr+=4;
299 CRYP->IV0RR = __REV(*(uint32_t*)(ivaddr));
300 break;
301 default:
302 break;
303 }
304 }
305
306 /**
307 * @brief Process Data: Writes Input data in polling mode and read the output data
308 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
309 * the configuration information for CRYP module
310 * @param Input: Pointer to the Input buffer
311 * @param Ilength: Length of the Input buffer, must be a multiple of 16.
312 * @param Output: Pointer to the returned buffer
313 * @param Timeout: Timeout value
314 * * @retval None
315 */
316 static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout)
317 {
318 uint32_t tickstart = 0;
319
320 uint32_t i = 0;
321 uint32_t inputaddr = (uint32_t)Input;
322 uint32_t outputaddr = (uint32_t)Output;
323
324 for(i=0; (i < Ilength); i+=16)
325 {
326 /* Write the Input block in the IN FIFO */
327 CRYP->DR = *(uint32_t*)(inputaddr);
328 inputaddr+=4;
329 CRYP->DR = *(uint32_t*)(inputaddr);
330 inputaddr+=4;
331 CRYP->DR = *(uint32_t*)(inputaddr);
332 inputaddr+=4;
333 CRYP->DR = *(uint32_t*)(inputaddr);
334 inputaddr+=4;
335
336 /* Get tick */
337 tickstart = HAL_GetTick();
338
339 while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_OFNE))
340 {
341 /* Check for the Timeout */
342 if(Timeout != HAL_MAX_DELAY)
343 {
344 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
345 {
346 /* Change state */
347 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
348
349 /* Process Unlocked */
350 __HAL_UNLOCK(hcryp);
351
352 return HAL_TIMEOUT;
353 }
354 }
355 }
356 /* Read the Output block from the Output FIFO */
357 *(uint32_t*)(outputaddr) = CRYP->DOUT;
358 outputaddr+=4;
359 *(uint32_t*)(outputaddr) = CRYP->DOUT;
360 outputaddr+=4;
361 *(uint32_t*)(outputaddr) = CRYP->DOUT;
362 outputaddr+=4;
363 *(uint32_t*)(outputaddr) = CRYP->DOUT;
364 outputaddr+=4;
365 }
366 /* Return function status */
367 return HAL_OK;
368 }
369
370 /**
371 * @brief Process Data: Write Input data in polling mode.
372 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
373 * the configuration information for CRYP module
374 * @param Input: Pointer to the Input buffer
375 * @param Ilength: Length of the Input buffer, must be a multiple of 8
376 * @param Output: Pointer to the returned buffer
377 * @param Timeout: Specify Timeout value
378 * @retval None
379 */
380 static HAL_StatusTypeDef CRYP_ProcessData2Words(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout)
381 {
382 uint32_t tickstart = 0;
383
384 uint32_t i = 0;
385 uint32_t inputaddr = (uint32_t)Input;
386 uint32_t outputaddr = (uint32_t)Output;
387
388 for(i=0; (i < Ilength); i+=8)
389 {
390 /* Write the Input block in the IN FIFO */
391 CRYP->DR = *(uint32_t*)(inputaddr);
392 inputaddr+=4;
393 CRYP->DR = *(uint32_t*)(inputaddr);
394 inputaddr+=4;
395
396 /* Get tick */
397 tickstart = HAL_GetTick();
398
399 while(HAL_IS_BIT_CLR(CRYP->SR, CRYP_FLAG_OFNE))
400 {
401 /* Check for the Timeout */
402 if(Timeout != HAL_MAX_DELAY)
403 {
404 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
405 {
406 /* Change state */
407 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
408
409 /* Process Unlocked */
410 __HAL_UNLOCK(hcryp);
411
412 return HAL_TIMEOUT;
413 }
414 }
415 }
416 /* Read the Output block from the Output FIFO */
417 *(uint32_t*)(outputaddr) = CRYP->DOUT;
418 outputaddr+=4;
419 *(uint32_t*)(outputaddr) = CRYP->DOUT;
420 outputaddr+=4;
421 }
422 /* Return function status */
423 return HAL_OK;
424 }
425
426 /**
427 * @brief Set the DMA configuration and start the DMA transfer
428 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
429 * the configuration information for CRYP module
430 * @param inputaddr: address of the Input buffer
431 * @param Size: Size of the Input buffer, must be a multiple of 16.
432 * @param outputaddr: address of the Output buffer
433 * @retval None
434 */
435 static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr)
436 {
437 /* Set the CRYP DMA transfer complete callback */
438 hcryp->hdmain->XferCpltCallback = CRYP_DMAInCplt;
439 /* Set the DMA error callback */
440 hcryp->hdmain->XferErrorCallback = CRYP_DMAError;
441
442 /* Set the CRYP DMA transfer complete callback */
443 hcryp->hdmaout->XferCpltCallback = CRYP_DMAOutCplt;
444 /* Set the DMA error callback */
445 hcryp->hdmaout->XferErrorCallback = CRYP_DMAError;
446
447 /* Enable CRYP */
448 __HAL_CRYP_ENABLE();
449
450 /* Enable the DMA In DMA Stream */
451 HAL_DMA_Start_IT(hcryp->hdmain, inputaddr, (uint32_t)&CRYP->DR, Size/4);
452
453 /* Enable In DMA request */
454 CRYP->DMACR = (CRYP_DMACR_DIEN);
455
456 /* Enable the DMA Out DMA Stream */
457 HAL_DMA_Start_IT(hcryp->hdmaout, (uint32_t)&CRYP->DOUT, outputaddr, Size/4);
458
459 /* Enable Out DMA request */
460 CRYP->DMACR |= CRYP_DMACR_DOEN;
461
462 }
463
464 /**
465 * @brief Sets the CRYP peripheral in DES ECB mode.
466 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
467 * the configuration information for CRYP module
468 * @param Direction: Encryption or decryption
469 * @retval None
470 */
471 static void CRYP_SetDESECBMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction)
472 {
473 /* Check if initialization phase has already been performed */
474 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
475 {
476 /* Set the CRYP peripheral in AES ECB mode */
477 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_DES_ECB | Direction);
478
479 /* Set the key */
480 CRYP->K1LR = __REV(*(uint32_t*)(hcryp->Init.pKey));
481 CRYP->K1RR = __REV(*(uint32_t*)(hcryp->Init.pKey+4));
482
483 /* Flush FIFO */
484 __HAL_CRYP_FIFO_FLUSH();
485
486 /* Set the phase */
487 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
488 }
489 }
490
491 /**
492 * @brief Sets the CRYP peripheral in DES CBC mode.
493 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
494 * the configuration information for CRYP module
495 * @param Direction: Encryption or decryption
496 * @retval None
497 */
498 static void CRYP_SetDESCBCMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction)
499 {
500 /* Check if initialization phase has already been performed */
501 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
502 {
503 /* Set the CRYP peripheral in AES ECB mode */
504 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_DES_CBC | Direction);
505
506 /* Set the key */
507 CRYP->K1LR = __REV(*(uint32_t*)(hcryp->Init.pKey));
508 CRYP->K1RR = __REV(*(uint32_t*)(hcryp->Init.pKey+4));
509
510 /* Set the Initialization Vector */
511 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_256B);
512
513 /* Flush FIFO */
514 __HAL_CRYP_FIFO_FLUSH();
515
516 /* Set the phase */
517 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
518 }
519 }
520
521 /**
522 * @brief Sets the CRYP peripheral in TDES ECB mode.
523 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
524 * the configuration information for CRYP module
525 * @param Direction: Encryption or decryption
526 * @retval None
527 */
528 static void CRYP_SetTDESECBMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction)
529 {
530 /* Check if initialization phase has already been performed */
531 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
532 {
533 /* Set the CRYP peripheral in AES ECB mode */
534 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_TDES_ECB | Direction);
535
536 /* Set the key */
537 CRYP_SetKey(hcryp, hcryp->Init.pKey, CRYP_KEYSIZE_192B);
538
539 /* Flush FIFO */
540 __HAL_CRYP_FIFO_FLUSH();
541
542 /* Set the phase */
543 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
544 }
545 }
546
547 /**
548 * @brief Sets the CRYP peripheral in TDES CBC mode
549 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
550 * the configuration information for CRYP module
551 * @param Direction: Encryption or decryption
552 * @retval None
553 */
554 static void CRYP_SetTDESCBCMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction)
555 {
556 /* Check if initialization phase has already been performed */
557 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
558 {
559 /* Set the CRYP peripheral in AES CBC mode */
560 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_TDES_CBC | Direction);
561
562 /* Set the key */
563 CRYP_SetKey(hcryp, hcryp->Init.pKey, CRYP_KEYSIZE_192B);
564
565 /* Set the Initialization Vector */
566 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_256B);
567
568 /* Flush FIFO */
569 __HAL_CRYP_FIFO_FLUSH();
570
571 /* Set the phase */
572 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
573 }
574 }
575
576 /**
577 * @}
578 */
579
580 /* Exported functions --------------------------------------------------------*/
581 /** @addtogroup CRYP_Exported_Functions
582 * @{
583 */
584
585 /** @defgroup CRYP_Exported_Functions_Group1 Initialization and de-initialization functions
586 * @brief Initialization and Configuration functions.
587 *
588 @verbatim
589 ==============================================================================
590 ##### Initialization and de-initialization functions #####
591 ==============================================================================
592 [..] This section provides functions allowing to:
593 (+) Initialize the CRYP according to the specified parameters
594 in the CRYP_InitTypeDef and creates the associated handle
595 (+) DeInitialize the CRYP peripheral
596 (+) Initialize the CRYP MSP
597 (+) DeInitialize CRYP MSP
598
599 @endverbatim
600 * @{
601 */
602
603 /**
604 * @brief Initializes the CRYP according to the specified
605 * parameters in the CRYP_InitTypeDef and creates the associated handle.
606 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
607 * the configuration information for CRYP module
608 * @retval HAL status
609 */
610 HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp)
611 {
612 /* Check the CRYP handle allocation */
613 if(hcryp == NULL)
614 {
615 return HAL_ERROR;
616 }
617
618 /* Check the parameters */
619 assert_param(IS_CRYP_KEYSIZE(hcryp->Init.KeySize));
620 assert_param(IS_CRYP_DATATYPE(hcryp->Init.DataType));
621
622 if(hcryp->State == HAL_CRYP_STATE_RESET)
623 {
624 /* Init the low level hardware */
625 HAL_CRYP_MspInit(hcryp);
626 }
627
628 /* Change the CRYP state */
629 hcryp->State = HAL_CRYP_STATE_BUSY;
630
631 /* Set the key size and data type*/
632 CRYP->CR = (uint32_t) (hcryp->Init.KeySize | hcryp->Init.DataType);
633
634 /* Reset CrypInCount and CrypOutCount */
635 hcryp->CrypInCount = 0;
636 hcryp->CrypOutCount = 0;
637
638 /* Change the CRYP state */
639 hcryp->State = HAL_CRYP_STATE_READY;
640
641 /* Set the default CRYP phase */
642 hcryp->Phase = HAL_CRYP_PHASE_READY;
643
644 /* Return function status */
645 return HAL_OK;
646 }
647
648 /**
649 * @brief DeInitializes the CRYP peripheral.
650 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
651 * the configuration information for CRYP module
652 * @retval HAL status
653 */
654 HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp)
655 {
656 /* Check the CRYP handle allocation */
657 if(hcryp == NULL)
658 {
659 return HAL_ERROR;
660 }
661
662 /* Change the CRYP state */
663 hcryp->State = HAL_CRYP_STATE_BUSY;
664
665 /* Set the default CRYP phase */
666 hcryp->Phase = HAL_CRYP_PHASE_READY;
667
668 /* Reset CrypInCount and CrypOutCount */
669 hcryp->CrypInCount = 0;
670 hcryp->CrypOutCount = 0;
671
672 /* Disable the CRYP Peripheral Clock */
673 __HAL_CRYP_DISABLE();
674
675 /* DeInit the low level hardware: CLOCK, NVIC.*/
676 HAL_CRYP_MspDeInit(hcryp);
677
678 /* Change the CRYP state */
679 hcryp->State = HAL_CRYP_STATE_RESET;
680
681 /* Release Lock */
682 __HAL_UNLOCK(hcryp);
683
684 /* Return function status */
685 return HAL_OK;
686 }
687
688 /**
689 * @brief Initializes the CRYP MSP.
690 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
691 * the configuration information for CRYP module
692 * @retval None
693 */
694 __weak void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp)
695 {
696 /* NOTE : This function Should not be modified, when the callback is needed,
697 the HAL_CRYP_MspInit could be implemented in the user file
698 */
699 }
700
701 /**
702 * @brief DeInitializes CRYP MSP.
703 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
704 * the configuration information for CRYP module
705 * @retval None
706 */
707 __weak void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp)
708 {
709 /* NOTE : This function Should not be modified, when the callback is needed,
710 the HAL_CRYP_MspDeInit could be implemented in the user file
711 */
712 }
713
714 /**
715 * @}
716 */
717
718 /** @defgroup CRYP_Exported_Functions_Group2 AES processing functions
719 * @brief processing functions.
720 *
721 @verbatim
722 ==============================================================================
723 ##### AES processing functions #####
724 ==============================================================================
725 [..] This section provides functions allowing to:
726 (+) Encrypt plaintext using AES-128/192/256 using chaining modes
727 (+) Decrypt cyphertext using AES-128/192/256 using chaining modes
728 [..] Three processing functions are available:
729 (+) Polling mode
730 (+) Interrupt mode
731 (+) DMA mode
732
733 @endverbatim
734 * @{
735 */
736
737 /**
738 * @brief Initializes the CRYP peripheral in AES ECB encryption mode
739 * then encrypt pPlainData. The cypher data are available in pCypherData
740 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
741 * the configuration information for CRYP module
742 * @param pPlainData: Pointer to the plaintext buffer
743 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
744 * @param pCypherData: Pointer to the cyphertext buffer
745 * @param Timeout: Specify Timeout value
746 * @retval HAL status
747 */
748 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
749 {
750 /* Process Locked */
751 __HAL_LOCK(hcryp);
752
753 /* Change the CRYP state */
754 hcryp->State = HAL_CRYP_STATE_BUSY;
755
756 /* Check if initialization phase has already been performed */
757 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
758 {
759 /* Set the key */
760 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
761
762 /* Set the CRYP peripheral in AES ECB mode */
763 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_ECB);
764
765 /* Flush FIFO */
766 __HAL_CRYP_FIFO_FLUSH();
767
768 /* Enable CRYP */
769 __HAL_CRYP_ENABLE();
770
771 /* Set the phase */
772 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
773 }
774
775 /* Write Plain Data and Get Cypher Data */
776 if(CRYP_ProcessData(hcryp,pPlainData, Size, pCypherData, Timeout) != HAL_OK)
777 {
778 return HAL_TIMEOUT;
779 }
780
781 /* Change the CRYP state */
782 hcryp->State = HAL_CRYP_STATE_READY;
783
784 /* Process Unlocked */
785 __HAL_UNLOCK(hcryp);
786
787 /* Return function status */
788 return HAL_OK;
789 }
790
791 /**
792 * @brief Initializes the CRYP peripheral in AES CBC encryption mode
793 * then encrypt pPlainData. The cypher data are available in pCypherData
794 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
795 * the configuration information for CRYP module
796 * @param pPlainData: Pointer to the plaintext buffer
797 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
798 * @param pCypherData: Pointer to the cyphertext buffer
799 * @param Timeout: Specify Timeout value
800 * @retval HAL status
801 */
802 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
803 {
804 /* Process Locked */
805 __HAL_LOCK(hcryp);
806
807 /* Change the CRYP state */
808 hcryp->State = HAL_CRYP_STATE_BUSY;
809
810 /* Check if initialization phase has already been performed */
811 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
812 {
813 /* Set the key */
814 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
815
816 /* Set the CRYP peripheral in AES ECB mode */
817 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CBC);
818
819 /* Set the Initialization Vector */
820 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
821
822 /* Flush FIFO */
823 __HAL_CRYP_FIFO_FLUSH();
824
825 /* Enable CRYP */
826 __HAL_CRYP_ENABLE();
827
828 /* Set the phase */
829 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
830 }
831
832 /* Write Plain Data and Get Cypher Data */
833 if(CRYP_ProcessData(hcryp,pPlainData, Size, pCypherData, Timeout) != HAL_OK)
834 {
835 return HAL_TIMEOUT;
836 }
837
838 /* Change the CRYP state */
839 hcryp->State = HAL_CRYP_STATE_READY;
840
841 /* Process Unlocked */
842 __HAL_UNLOCK(hcryp);
843
844 /* Return function status */
845 return HAL_OK;
846 }
847
848 /**
849 * @brief Initializes the CRYP peripheral in AES CTR encryption mode
850 * then encrypt pPlainData. The cypher data are available in pCypherData
851 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
852 * the configuration information for CRYP module
853 * @param pPlainData: Pointer to the plaintext buffer
854 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
855 * @param pCypherData: Pointer to the cyphertext buffer
856 * @param Timeout: Specify Timeout value
857 * @retval HAL status
858 */
859 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
860 {
861 /* Process Locked */
862 __HAL_LOCK(hcryp);
863
864 /* Change the CRYP state */
865 hcryp->State = HAL_CRYP_STATE_BUSY;
866
867 /* Check if initialization phase has already been performed */
868 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
869 {
870 /* Set the key */
871 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
872
873 /* Set the CRYP peripheral in AES ECB mode */
874 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CTR);
875
876 /* Set the Initialization Vector */
877 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
878
879 /* Flush FIFO */
880 __HAL_CRYP_FIFO_FLUSH();
881
882 /* Enable CRYP */
883 __HAL_CRYP_ENABLE();
884
885 /* Set the phase */
886 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
887 }
888
889 /* Write Plain Data and Get Cypher Data */
890 if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
891 {
892 return HAL_TIMEOUT;
893 }
894
895 /* Change the CRYP state */
896 hcryp->State = HAL_CRYP_STATE_READY;
897
898 /* Process Unlocked */
899 __HAL_UNLOCK(hcryp);
900
901 /* Return function status */
902 return HAL_OK;
903 }
904
905
906
907 /**
908 * @brief Initializes the CRYP peripheral in AES ECB decryption mode
909 * then decrypted pCypherData. The cypher data are available in pPlainData
910 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
911 * the configuration information for CRYP module
912 * @param pCypherData: Pointer to the cyphertext buffer
913 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
914 * @param pPlainData: Pointer to the plaintext buffer
915 * @param Timeout: Specify Timeout value
916 * @retval HAL status
917 */
918 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
919 {
920 uint32_t tickstart = 0;
921
922 /* Process Locked */
923 __HAL_LOCK(hcryp);
924
925 /* Change the CRYP state */
926 hcryp->State = HAL_CRYP_STATE_BUSY;
927
928 /* Check if initialization phase has already been performed */
929 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
930 {
931 /* Set the key */
932 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
933
934 /* Set the CRYP peripheral in AES Key mode */
935 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR);
936
937 /* Enable CRYP */
938 __HAL_CRYP_ENABLE();
939
940 /* Get tick */
941 tickstart = HAL_GetTick();
942
943 while(HAL_IS_BIT_SET(CRYP->SR, CRYP_FLAG_BUSY))
944 {
945 /* Check for the Timeout */
946 if(Timeout != HAL_MAX_DELAY)
947 {
948 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
949 {
950 /* Change state */
951 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
952
953 /* Process Unlocked */
954 __HAL_UNLOCK(hcryp);
955
956 return HAL_TIMEOUT;
957 }
958 }
959 }
960
961 /* Disable CRYP */
962 __HAL_CRYP_DISABLE();
963
964 /* Reset the ALGOMODE bits*/
965 CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE);
966
967 /* Set the CRYP peripheral in AES ECB decryption mode */
968 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_ECB | CRYP_CR_ALGODIR);
969 /* Flush FIFO */
970 __HAL_CRYP_FIFO_FLUSH();
971
972 /* Enable CRYP */
973 __HAL_CRYP_ENABLE();
974
975 /* Set the phase */
976 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
977 }
978
979 /* Write Plain Data and Get Cypher Data */
980 if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
981 {
982 return HAL_TIMEOUT;
983 }
984
985 /* Change the CRYP state */
986 hcryp->State = HAL_CRYP_STATE_READY;
987
988 /* Process Unlocked */
989 __HAL_UNLOCK(hcryp);
990
991 /* Return function status */
992 return HAL_OK;
993 }
994
995 /**
996 * @brief Initializes the CRYP peripheral in AES ECB decryption mode
997 * then decrypted pCypherData. The cypher data are available in pPlainData
998 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
999 * the configuration information for CRYP module
1000 * @param pCypherData: Pointer to the cyphertext buffer
1001 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
1002 * @param pPlainData: Pointer to the plaintext buffer
1003 * @param Timeout: Specify Timeout value
1004 * @retval HAL status
1005 */
1006 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
1007 {
1008 uint32_t tickstart = 0;
1009
1010 /* Process Locked */
1011 __HAL_LOCK(hcryp);
1012
1013 /* Change the CRYP state */
1014 hcryp->State = HAL_CRYP_STATE_BUSY;
1015
1016 /* Check if initialization phase has already been performed */
1017 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1018 {
1019 /* Set the key */
1020 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1021
1022 /* Set the CRYP peripheral in AES Key mode */
1023 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR);
1024
1025 /* Enable CRYP */
1026 __HAL_CRYP_ENABLE();
1027
1028 /* Get tick */
1029 tickstart = HAL_GetTick();
1030
1031 while(HAL_IS_BIT_SET(CRYP->SR, CRYP_FLAG_BUSY))
1032 {
1033 /* Check for the Timeout */
1034 if(Timeout != HAL_MAX_DELAY)
1035 {
1036 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
1037 {
1038 /* Change state */
1039 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
1040
1041 /* Process Unlocked */
1042 __HAL_UNLOCK(hcryp);
1043
1044 return HAL_TIMEOUT;
1045 }
1046 }
1047 }
1048
1049 /* Reset the ALGOMODE bits*/
1050 CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE);
1051
1052 /* Set the CRYP peripheral in AES CBC decryption mode */
1053 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CBC | CRYP_CR_ALGODIR);
1054
1055 /* Set the Initialization Vector */
1056 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1057
1058 /* Flush FIFO */
1059 __HAL_CRYP_FIFO_FLUSH();
1060
1061 /* Enable CRYP */
1062 __HAL_CRYP_ENABLE();
1063
1064 /* Set the phase */
1065 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1066 }
1067
1068 /* Write Plain Data and Get Cypher Data */
1069 if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
1070 {
1071 return HAL_TIMEOUT;
1072 }
1073
1074 /* Change the CRYP state */
1075 hcryp->State = HAL_CRYP_STATE_READY;
1076
1077 /* Process Unlocked */
1078 __HAL_UNLOCK(hcryp);
1079
1080 /* Return function status */
1081 return HAL_OK;
1082 }
1083
1084 /**
1085 * @brief Initializes the CRYP peripheral in AES CTR decryption mode
1086 * then decrypted pCypherData. The cypher data are available in pPlainData
1087 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1088 * the configuration information for CRYP module
1089 * @param pCypherData: Pointer to the cyphertext buffer
1090 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
1091 * @param pPlainData: Pointer to the plaintext buffer
1092 * @param Timeout: Specify Timeout value
1093 * @retval HAL status
1094 */
1095 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
1096 {
1097 /* Process Locked */
1098 __HAL_LOCK(hcryp);
1099
1100 /* Check if initialization phase has already been performed */
1101 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1102 {
1103 /* Change the CRYP state */
1104 hcryp->State = HAL_CRYP_STATE_BUSY;
1105
1106 /* Set the key */
1107 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1108
1109 /* Set the CRYP peripheral in AES CTR mode */
1110 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CTR | CRYP_CR_ALGODIR);
1111
1112 /* Set the Initialization Vector */
1113 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1114
1115 /* Flush FIFO */
1116 __HAL_CRYP_FIFO_FLUSH();
1117
1118 /* Enable CRYP */
1119 __HAL_CRYP_ENABLE();
1120
1121 /* Set the phase */
1122 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1123 }
1124
1125 /* Write Plain Data and Get Cypher Data */
1126 if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
1127 {
1128 return HAL_TIMEOUT;
1129 }
1130
1131 /* Change the CRYP state */
1132 hcryp->State = HAL_CRYP_STATE_READY;
1133
1134 /* Process Unlocked */
1135 __HAL_UNLOCK(hcryp);
1136
1137 /* Return function status */
1138 return HAL_OK;
1139 }
1140
1141 /**
1142 * @brief Initializes the CRYP peripheral in AES ECB encryption mode using Interrupt.
1143 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1144 * the configuration information for CRYP module
1145 * @param pPlainData: Pointer to the plaintext buffer
1146 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
1147 * @param pCypherData: Pointer to the cyphertext buffer
1148 * @retval HAL status
1149 */
1150 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1151 {
1152 uint32_t inputaddr;
1153 uint32_t outputaddr;
1154
1155 if(hcryp->State == HAL_CRYP_STATE_READY)
1156 {
1157 /* Process Locked */
1158 __HAL_LOCK(hcryp);
1159
1160 hcryp->CrypInCount = Size;
1161 hcryp->pCrypInBuffPtr = pPlainData;
1162 hcryp->pCrypOutBuffPtr = pCypherData;
1163 hcryp->CrypOutCount = Size;
1164
1165 /* Change the CRYP state */
1166 hcryp->State = HAL_CRYP_STATE_BUSY;
1167
1168 /* Check if initialization phase has already been performed */
1169 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1170 {
1171 /* Set the key */
1172 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1173
1174 /* Set the CRYP peripheral in AES ECB mode */
1175 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_ECB);
1176
1177 /* Flush FIFO */
1178 __HAL_CRYP_FIFO_FLUSH();
1179
1180 /* Set the phase */
1181 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1182 }
1183
1184 /* Enable Interrupts */
1185 __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI);
1186
1187 /* Enable CRYP */
1188 __HAL_CRYP_ENABLE();
1189
1190 /* Return function status */
1191 return HAL_OK;
1192 }
1193 else if(__HAL_CRYP_GET_IT(CRYP_IT_INI))
1194 {
1195 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1196 /* Write the Input block in the IN FIFO */
1197 CRYP->DR = *(uint32_t*)(inputaddr);
1198 inputaddr+=4;
1199 CRYP->DR = *(uint32_t*)(inputaddr);
1200 inputaddr+=4;
1201 CRYP->DR = *(uint32_t*)(inputaddr);
1202 inputaddr+=4;
1203 CRYP->DR = *(uint32_t*)(inputaddr);
1204 hcryp->pCrypInBuffPtr += 16;
1205 hcryp->CrypInCount -= 16;
1206 if(hcryp->CrypInCount == 0)
1207 {
1208 __HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
1209 /* Call the Input data transfer complete callback */
1210 HAL_CRYP_InCpltCallback(hcryp);
1211 }
1212 }
1213 else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
1214 {
1215 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
1216 /* Read the Output block from the Output FIFO */
1217 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1218 outputaddr+=4;
1219 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1220 outputaddr+=4;
1221 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1222 outputaddr+=4;
1223 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1224 hcryp->pCrypOutBuffPtr += 16;
1225 hcryp->CrypOutCount -= 16;
1226 if(hcryp->CrypOutCount == 0)
1227 {
1228 __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
1229 /* Process Locked */
1230 __HAL_UNLOCK(hcryp);
1231 /* Change the CRYP state */
1232 hcryp->State = HAL_CRYP_STATE_READY;
1233 /* Call Input transfer complete callback */
1234 HAL_CRYP_OutCpltCallback(hcryp);
1235 }
1236 }
1237
1238 /* Return function status */
1239 return HAL_OK;
1240 }
1241
1242 /**
1243 * @brief Initializes the CRYP peripheral in AES CBC encryption mode using Interrupt.
1244 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1245 * the configuration information for CRYP module
1246 * @param pPlainData: Pointer to the plaintext buffer
1247 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
1248 * @param pCypherData: Pointer to the cyphertext buffer
1249 * @retval HAL status
1250 */
1251 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1252 {
1253 uint32_t inputaddr;
1254 uint32_t outputaddr;
1255
1256 if(hcryp->State == HAL_CRYP_STATE_READY)
1257 {
1258 /* Process Locked */
1259 __HAL_LOCK(hcryp);
1260
1261 hcryp->CrypInCount = Size;
1262 hcryp->pCrypInBuffPtr = pPlainData;
1263 hcryp->pCrypOutBuffPtr = pCypherData;
1264 hcryp->CrypOutCount = Size;
1265
1266 /* Change the CRYP state */
1267 hcryp->State = HAL_CRYP_STATE_BUSY;
1268
1269 /* Check if initialization phase has already been performed */
1270 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1271 {
1272 /* Set the key */
1273 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1274
1275 /* Set the CRYP peripheral in AES CBC mode */
1276 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CBC);
1277
1278 /* Set the Initialization Vector */
1279 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1280
1281 /* Flush FIFO */
1282 __HAL_CRYP_FIFO_FLUSH();
1283
1284 /* Set the phase */
1285 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1286 }
1287 /* Enable Interrupts */
1288 __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI);
1289
1290 /* Enable CRYP */
1291 __HAL_CRYP_ENABLE();
1292
1293 /* Return function status */
1294 return HAL_OK;
1295 }
1296 else if(__HAL_CRYP_GET_IT(CRYP_IT_INI))
1297 {
1298 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1299 /* Write the Input block in the IN FIFO */
1300 CRYP->DR = *(uint32_t*)(inputaddr);
1301 inputaddr+=4;
1302 CRYP->DR = *(uint32_t*)(inputaddr);
1303 inputaddr+=4;
1304 CRYP->DR = *(uint32_t*)(inputaddr);
1305 inputaddr+=4;
1306 CRYP->DR = *(uint32_t*)(inputaddr);
1307 hcryp->pCrypInBuffPtr += 16;
1308 hcryp->CrypInCount -= 16;
1309 if(hcryp->CrypInCount == 0)
1310 {
1311 __HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
1312 /* Call the Input data transfer complete callback */
1313 HAL_CRYP_InCpltCallback(hcryp);
1314 }
1315 }
1316 else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
1317 {
1318 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
1319 /* Read the Output block from the Output FIFO */
1320 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1321 outputaddr+=4;
1322 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1323 outputaddr+=4;
1324 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1325 outputaddr+=4;
1326 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1327 hcryp->pCrypOutBuffPtr += 16;
1328 hcryp->CrypOutCount -= 16;
1329 if(hcryp->CrypOutCount == 0)
1330 {
1331 __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
1332 /* Process Locked */
1333 __HAL_UNLOCK(hcryp);
1334 /* Change the CRYP state */
1335 hcryp->State = HAL_CRYP_STATE_READY;
1336 /* Call Input transfer complete callback */
1337 HAL_CRYP_OutCpltCallback(hcryp);
1338 }
1339 }
1340
1341 /* Return function status */
1342 return HAL_OK;
1343 }
1344
1345 /**
1346 * @brief Initializes the CRYP peripheral in AES CTR encryption mode using Interrupt.
1347 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1348 * the configuration information for CRYP module
1349 * @param pPlainData: Pointer to the plaintext buffer
1350 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
1351 * @param pCypherData: Pointer to the cyphertext buffer
1352 * @retval HAL status
1353 */
1354 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1355 {
1356 uint32_t inputaddr;
1357 uint32_t outputaddr;
1358
1359 if(hcryp->State == HAL_CRYP_STATE_READY)
1360 {
1361 /* Process Locked */
1362 __HAL_LOCK(hcryp);
1363
1364 hcryp->CrypInCount = Size;
1365 hcryp->pCrypInBuffPtr = pPlainData;
1366 hcryp->pCrypOutBuffPtr = pCypherData;
1367 hcryp->CrypOutCount = Size;
1368
1369 /* Change the CRYP state */
1370 hcryp->State = HAL_CRYP_STATE_BUSY;
1371
1372 /* Check if initialization phase has already been performed */
1373 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1374 {
1375 /* Set the key */
1376 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1377
1378 /* Set the CRYP peripheral in AES CTR mode */
1379 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CTR);
1380
1381 /* Set the Initialization Vector */
1382 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1383
1384 /* Flush FIFO */
1385 __HAL_CRYP_FIFO_FLUSH();
1386
1387 /* Set the phase */
1388 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1389 }
1390 /* Enable Interrupts */
1391 __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI);
1392
1393 /* Enable CRYP */
1394 __HAL_CRYP_ENABLE();
1395
1396 /* Return function status */
1397 return HAL_OK;
1398 }
1399 else if(__HAL_CRYP_GET_IT(CRYP_IT_INI))
1400 {
1401 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1402 /* Write the Input block in the IN FIFO */
1403 CRYP->DR = *(uint32_t*)(inputaddr);
1404 inputaddr+=4;
1405 CRYP->DR = *(uint32_t*)(inputaddr);
1406 inputaddr+=4;
1407 CRYP->DR = *(uint32_t*)(inputaddr);
1408 inputaddr+=4;
1409 CRYP->DR = *(uint32_t*)(inputaddr);
1410 hcryp->pCrypInBuffPtr += 16;
1411 hcryp->CrypInCount -= 16;
1412 if(hcryp->CrypInCount == 0)
1413 {
1414 __HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
1415 /* Call the Input data transfer complete callback */
1416 HAL_CRYP_InCpltCallback(hcryp);
1417 }
1418 }
1419 else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
1420 {
1421 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
1422 /* Read the Output block from the Output FIFO */
1423 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1424 outputaddr+=4;
1425 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1426 outputaddr+=4;
1427 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1428 outputaddr+=4;
1429 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1430 hcryp->pCrypOutBuffPtr += 16;
1431 hcryp->CrypOutCount -= 16;
1432 if(hcryp->CrypOutCount == 0)
1433 {
1434 __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
1435 /* Process Unlocked */
1436 __HAL_UNLOCK(hcryp);
1437 /* Change the CRYP state */
1438 hcryp->State = HAL_CRYP_STATE_READY;
1439 /* Call Input transfer complete callback */
1440 HAL_CRYP_OutCpltCallback(hcryp);
1441 }
1442 }
1443
1444 /* Return function status */
1445 return HAL_OK;
1446 }
1447
1448
1449 /**
1450 * @brief Initializes the CRYP peripheral in AES ECB decryption mode using Interrupt.
1451 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1452 * the configuration information for CRYP module
1453 * @param pCypherData: Pointer to the cyphertext buffer
1454 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
1455 * @param pPlainData: Pointer to the plaintext buffer
1456 * @retval HAL status
1457 */
1458 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
1459 {
1460 uint32_t tickstart = 0;
1461
1462 uint32_t inputaddr;
1463 uint32_t outputaddr;
1464
1465 if(hcryp->State == HAL_CRYP_STATE_READY)
1466 {
1467 /* Process Locked */
1468 __HAL_LOCK(hcryp);
1469
1470 hcryp->CrypInCount = Size;
1471 hcryp->pCrypInBuffPtr = pCypherData;
1472 hcryp->pCrypOutBuffPtr = pPlainData;
1473 hcryp->CrypOutCount = Size;
1474
1475 /* Change the CRYP state */
1476 hcryp->State = HAL_CRYP_STATE_BUSY;
1477
1478 /* Check if initialization phase has already been performed */
1479 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1480 {
1481 /* Set the key */
1482 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1483
1484 /* Set the CRYP peripheral in AES Key mode */
1485 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR);
1486 /* Enable CRYP */
1487 __HAL_CRYP_ENABLE();
1488
1489 /* Get tick */
1490 tickstart = HAL_GetTick();
1491
1492 while(HAL_IS_BIT_SET(CRYP->SR, CRYP_FLAG_BUSY))
1493 {
1494 /* Check for the Timeout */
1495 if((HAL_GetTick() - tickstart ) > CRYP_TIMEOUT_VALUE)
1496 {
1497 /* Change state */
1498 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
1499
1500 /* Process Unlocked */
1501 __HAL_UNLOCK(hcryp);
1502
1503 return HAL_TIMEOUT;
1504 }
1505 }
1506
1507 /* Reset the ALGOMODE bits*/
1508 CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE);
1509
1510 /* Set the CRYP peripheral in AES ECB decryption mode */
1511 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_ECB | CRYP_CR_ALGODIR);
1512
1513 /* Flush FIFO */
1514 __HAL_CRYP_FIFO_FLUSH();
1515
1516 /* Set the phase */
1517 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1518 }
1519
1520 /* Enable Interrupts */
1521 __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI);
1522
1523 /* Enable CRYP */
1524 __HAL_CRYP_ENABLE();
1525
1526 /* Return function status */
1527 return HAL_OK;
1528 }
1529 else if(__HAL_CRYP_GET_IT(CRYP_IT_INI))
1530 {
1531 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1532 /* Write the Input block in the IN FIFO */
1533 CRYP->DR = *(uint32_t*)(inputaddr);
1534 inputaddr+=4;
1535 CRYP->DR = *(uint32_t*)(inputaddr);
1536 inputaddr+=4;
1537 CRYP->DR = *(uint32_t*)(inputaddr);
1538 inputaddr+=4;
1539 CRYP->DR = *(uint32_t*)(inputaddr);
1540 hcryp->pCrypInBuffPtr += 16;
1541 hcryp->CrypInCount -= 16;
1542 if(hcryp->CrypInCount == 0)
1543 {
1544 __HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
1545 /* Call the Input data transfer complete callback */
1546 HAL_CRYP_InCpltCallback(hcryp);
1547 }
1548 }
1549 else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
1550 {
1551 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
1552 /* Read the Output block from the Output FIFO */
1553 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1554 outputaddr+=4;
1555 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1556 outputaddr+=4;
1557 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1558 outputaddr+=4;
1559 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1560 hcryp->pCrypOutBuffPtr += 16;
1561 hcryp->CrypOutCount -= 16;
1562 if(hcryp->CrypOutCount == 0)
1563 {
1564 __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
1565 /* Process Unlocked */
1566 __HAL_UNLOCK(hcryp);
1567 /* Change the CRYP state */
1568 hcryp->State = HAL_CRYP_STATE_READY;
1569 /* Call Input transfer complete callback */
1570 HAL_CRYP_OutCpltCallback(hcryp);
1571 }
1572 }
1573
1574 /* Return function status */
1575 return HAL_OK;
1576 }
1577
1578 /**
1579 * @brief Initializes the CRYP peripheral in AES CBC decryption mode using IT.
1580 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1581 * the configuration information for CRYP module
1582 * @param pCypherData: Pointer to the cyphertext buffer
1583 * @param Size: Length of the plaintext buffer, must be a multiple of 16
1584 * @param pPlainData: Pointer to the plaintext buffer
1585 * @retval HAL status
1586 */
1587 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
1588 {
1589
1590 uint32_t tickstart = 0;
1591 uint32_t inputaddr;
1592 uint32_t outputaddr;
1593
1594 if(hcryp->State == HAL_CRYP_STATE_READY)
1595 {
1596 /* Process Locked */
1597 __HAL_LOCK(hcryp);
1598
1599 /* Get the buffer addresses and sizes */
1600 hcryp->CrypInCount = Size;
1601 hcryp->pCrypInBuffPtr = pCypherData;
1602 hcryp->pCrypOutBuffPtr = pPlainData;
1603 hcryp->CrypOutCount = Size;
1604
1605 /* Change the CRYP state */
1606 hcryp->State = HAL_CRYP_STATE_BUSY;
1607
1608 /* Check if initialization phase has already been performed */
1609 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1610 {
1611 /* Set the key */
1612 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1613
1614 /* Set the CRYP peripheral in AES Key mode */
1615 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR);
1616
1617 /* Enable CRYP */
1618 __HAL_CRYP_ENABLE();
1619
1620 /* Get tick */
1621 tickstart = HAL_GetTick();
1622
1623 while(HAL_IS_BIT_SET(CRYP->SR, CRYP_FLAG_BUSY))
1624 {
1625 /* Check for the Timeout */
1626 if((HAL_GetTick() - tickstart ) > CRYP_TIMEOUT_VALUE)
1627 {
1628 /* Change state */
1629 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
1630
1631 /* Process Unlocked */
1632 __HAL_UNLOCK(hcryp);
1633
1634 return HAL_TIMEOUT;
1635 }
1636 }
1637
1638 /* Reset the ALGOMODE bits*/
1639 CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE);
1640
1641 /* Set the CRYP peripheral in AES CBC decryption mode */
1642 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CBC | CRYP_CR_ALGODIR);
1643
1644 /* Set the Initialization Vector */
1645 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1646
1647 /* Flush FIFO */
1648 __HAL_CRYP_FIFO_FLUSH();
1649
1650 /* Enable CRYP */
1651 __HAL_CRYP_ENABLE();
1652
1653 /* Set the phase */
1654 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1655 }
1656
1657 /* Enable Interrupts */
1658 __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI);
1659
1660 /* Enable CRYP */
1661 __HAL_CRYP_ENABLE();
1662
1663 /* Return function status */
1664 return HAL_OK;
1665 }
1666 else if(__HAL_CRYP_GET_IT(CRYP_IT_INI))
1667 {
1668 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1669 /* Write the Input block in the IN FIFO */
1670 CRYP->DR = *(uint32_t*)(inputaddr);
1671 inputaddr+=4;
1672 CRYP->DR = *(uint32_t*)(inputaddr);
1673 inputaddr+=4;
1674 CRYP->DR = *(uint32_t*)(inputaddr);
1675 inputaddr+=4;
1676 CRYP->DR = *(uint32_t*)(inputaddr);
1677 hcryp->pCrypInBuffPtr += 16;
1678 hcryp->CrypInCount -= 16;
1679 if(hcryp->CrypInCount == 0)
1680 {
1681 __HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
1682 /* Call the Input data transfer complete callback */
1683 HAL_CRYP_InCpltCallback(hcryp);
1684 }
1685 }
1686 else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
1687 {
1688 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
1689 /* Read the Output block from the Output FIFO */
1690 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1691 outputaddr+=4;
1692 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1693 outputaddr+=4;
1694 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1695 outputaddr+=4;
1696 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1697 hcryp->pCrypOutBuffPtr += 16;
1698 hcryp->CrypOutCount -= 16;
1699 if(hcryp->CrypOutCount == 0)
1700 {
1701 __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
1702 /* Process Unlocked */
1703 __HAL_UNLOCK(hcryp);
1704 /* Change the CRYP state */
1705 hcryp->State = HAL_CRYP_STATE_READY;
1706 /* Call Input transfer complete callback */
1707 HAL_CRYP_OutCpltCallback(hcryp);
1708 }
1709 }
1710
1711 /* Return function status */
1712 return HAL_OK;
1713 }
1714
1715 /**
1716 * @brief Initializes the CRYP peripheral in AES CTR decryption mode using Interrupt.
1717 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1718 * the configuration information for CRYP module
1719 * @param pCypherData: Pointer to the cyphertext buffer
1720 * @param Size: Length of the plaintext buffer, must be a multiple of 16
1721 * @param pPlainData: Pointer to the plaintext buffer
1722 * @retval HAL status
1723 */
1724 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
1725 {
1726 uint32_t inputaddr;
1727 uint32_t outputaddr;
1728
1729 if(hcryp->State == HAL_CRYP_STATE_READY)
1730 {
1731 /* Process Locked */
1732 __HAL_LOCK(hcryp);
1733
1734 /* Get the buffer addresses and sizes */
1735 hcryp->CrypInCount = Size;
1736 hcryp->pCrypInBuffPtr = pCypherData;
1737 hcryp->pCrypOutBuffPtr = pPlainData;
1738 hcryp->CrypOutCount = Size;
1739
1740 /* Change the CRYP state */
1741 hcryp->State = HAL_CRYP_STATE_BUSY;
1742
1743 /* Check if initialization phase has already been performed */
1744 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1745 {
1746 /* Set the key */
1747 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1748
1749 /* Set the CRYP peripheral in AES CTR mode */
1750 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CTR | CRYP_CR_ALGODIR);
1751
1752 /* Set the Initialization Vector */
1753 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1754
1755 /* Flush FIFO */
1756 __HAL_CRYP_FIFO_FLUSH();
1757
1758 /* Set the phase */
1759 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1760 }
1761
1762 /* Enable Interrupts */
1763 __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI);
1764
1765 /* Enable CRYP */
1766 __HAL_CRYP_ENABLE();
1767
1768 /* Return function status */
1769 return HAL_OK;
1770 }
1771 else if(__HAL_CRYP_GET_IT(CRYP_IT_INI))
1772 {
1773 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1774 /* Write the Input block in the IN FIFO */
1775 CRYP->DR = *(uint32_t*)(inputaddr);
1776 inputaddr+=4;
1777 CRYP->DR = *(uint32_t*)(inputaddr);
1778 inputaddr+=4;
1779 CRYP->DR = *(uint32_t*)(inputaddr);
1780 inputaddr+=4;
1781 CRYP->DR = *(uint32_t*)(inputaddr);
1782 hcryp->pCrypInBuffPtr += 16;
1783 hcryp->CrypInCount -= 16;
1784 if(hcryp->CrypInCount == 0)
1785 {
1786 __HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
1787 /* Call the Input data transfer complete callback */
1788 HAL_CRYP_InCpltCallback(hcryp);
1789 }
1790 }
1791 else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
1792 {
1793 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
1794 /* Read the Output block from the Output FIFO */
1795 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1796 outputaddr+=4;
1797 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1798 outputaddr+=4;
1799 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1800 outputaddr+=4;
1801 *(uint32_t*)(outputaddr) = CRYP->DOUT;
1802 hcryp->pCrypOutBuffPtr += 16;
1803 hcryp->CrypOutCount -= 16;
1804 if(hcryp->CrypOutCount == 0)
1805 {
1806 __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
1807 /* Process Unlocked */
1808 __HAL_UNLOCK(hcryp);
1809 /* Change the CRYP state */
1810 hcryp->State = HAL_CRYP_STATE_READY;
1811 /* Call Input transfer complete callback */
1812 HAL_CRYP_OutCpltCallback(hcryp);
1813 }
1814 }
1815
1816 /* Return function status */
1817 return HAL_OK;
1818 }
1819
1820 /**
1821 * @brief Initializes the CRYP peripheral in AES ECB encryption mode using DMA.
1822 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1823 * the configuration information for CRYP module
1824 * @param pPlainData: Pointer to the plaintext buffer
1825 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
1826 * @param pCypherData: Pointer to the cyphertext buffer
1827 * @retval HAL status
1828 */
1829 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1830 {
1831 uint32_t inputaddr;
1832 uint32_t outputaddr;
1833
1834 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
1835 {
1836 /* Process Locked */
1837 __HAL_LOCK(hcryp);
1838
1839 inputaddr = (uint32_t)pPlainData;
1840 outputaddr = (uint32_t)pCypherData;
1841
1842 /* Change the CRYP state */
1843 hcryp->State = HAL_CRYP_STATE_BUSY;
1844
1845 /* Check if initialization phase has already been performed */
1846 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1847 {
1848 /* Set the key */
1849 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1850
1851 /* Set the CRYP peripheral in AES ECB mode */
1852 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_ECB);
1853
1854 /* Flush FIFO */
1855 __HAL_CRYP_FIFO_FLUSH();
1856
1857 /* Set the phase */
1858 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1859 }
1860 /* Set the input and output addresses and start DMA transfer */
1861 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
1862
1863 /* Process Unlocked */
1864 __HAL_UNLOCK(hcryp);
1865
1866 /* Return function status */
1867 return HAL_OK;
1868 }
1869 else
1870 {
1871 return HAL_ERROR;
1872 }
1873 }
1874
1875 /**
1876 * @brief Initializes the CRYP peripheral in AES CBC encryption mode using DMA.
1877 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1878 * the configuration information for CRYP module
1879 * @param pPlainData: Pointer to the plaintext buffer
1880 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
1881 * @param pCypherData: Pointer to the cyphertext buffer
1882 * @retval HAL status
1883 */
1884 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1885 {
1886 uint32_t inputaddr;
1887 uint32_t outputaddr;
1888
1889 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
1890 {
1891 /* Process Locked */
1892 __HAL_LOCK(hcryp);
1893
1894 inputaddr = (uint32_t)pPlainData;
1895 outputaddr = (uint32_t)pCypherData;
1896
1897 /* Change the CRYP state */
1898 hcryp->State = HAL_CRYP_STATE_BUSY;
1899
1900 /* Check if initialization phase has already been performed */
1901 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1902 {
1903 /* Set the key */
1904 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1905
1906 /* Set the CRYP peripheral in AES ECB mode */
1907 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CBC);
1908
1909 /* Set the Initialization Vector */
1910 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1911
1912 /* Flush FIFO */
1913 __HAL_CRYP_FIFO_FLUSH();
1914
1915 /* Set the phase */
1916 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1917 }
1918 /* Set the input and output addresses and start DMA transfer */
1919 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
1920
1921 /* Process Unlocked */
1922 __HAL_UNLOCK(hcryp);
1923
1924 /* Return function status */
1925 return HAL_OK;
1926 }
1927 else
1928 {
1929 return HAL_ERROR;
1930 }
1931 }
1932
1933 /**
1934 * @brief Initializes the CRYP peripheral in AES CTR encryption mode using DMA.
1935 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1936 * the configuration information for CRYP module
1937 * @param pPlainData: Pointer to the plaintext buffer
1938 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
1939 * @param pCypherData: Pointer to the cyphertext buffer
1940 * @retval HAL status
1941 */
1942 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1943 {
1944 uint32_t inputaddr;
1945 uint32_t outputaddr;
1946
1947 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
1948 {
1949 /* Process Locked */
1950 __HAL_LOCK(hcryp);
1951
1952 inputaddr = (uint32_t)pPlainData;
1953 outputaddr = (uint32_t)pCypherData;
1954
1955 /* Change the CRYP state */
1956 hcryp->State = HAL_CRYP_STATE_BUSY;
1957
1958 /* Check if initialization phase has already been performed */
1959 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1960 {
1961 /* Set the key */
1962 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1963
1964 /* Set the CRYP peripheral in AES ECB mode */
1965 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CTR);
1966
1967 /* Set the Initialization Vector */
1968 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1969
1970 /* Flush FIFO */
1971 __HAL_CRYP_FIFO_FLUSH();
1972
1973 /* Set the phase */
1974 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1975 }
1976
1977 /* Set the input and output addresses and start DMA transfer */
1978 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
1979
1980 /* Process Unlocked */
1981 __HAL_UNLOCK(hcryp);
1982
1983 /* Return function status */
1984 return HAL_OK;
1985 }
1986 else
1987 {
1988 return HAL_ERROR;
1989 }
1990 }
1991
1992 /**
1993 * @brief Initializes the CRYP peripheral in AES ECB decryption mode using DMA.
1994 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1995 * the configuration information for CRYP module
1996 * @param pCypherData: Pointer to the cyphertext buffer
1997 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
1998 * @param pPlainData: Pointer to the plaintext buffer
1999 * @retval HAL status
2000 */
2001 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
2002 {
2003 uint32_t tickstart = 0;
2004 uint32_t inputaddr;
2005 uint32_t outputaddr;
2006
2007 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
2008 {
2009 /* Process Locked */
2010 __HAL_LOCK(hcryp);
2011
2012 inputaddr = (uint32_t)pCypherData;
2013 outputaddr = (uint32_t)pPlainData;
2014
2015 /* Change the CRYP state */
2016 hcryp->State = HAL_CRYP_STATE_BUSY;
2017
2018 /* Check if initialization phase has already been performed */
2019 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
2020 {
2021 /* Set the key */
2022 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
2023
2024 /* Set the CRYP peripheral in AES Key mode */
2025 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR);
2026
2027 /* Enable CRYP */
2028 __HAL_CRYP_ENABLE();
2029
2030 /* Get tick */
2031 tickstart = HAL_GetTick();
2032
2033 while(HAL_IS_BIT_SET(CRYP->SR, CRYP_FLAG_BUSY))
2034 {
2035 /* Check for the Timeout */
2036 if((HAL_GetTick() - tickstart ) > CRYP_TIMEOUT_VALUE)
2037 {
2038 /* Change state */
2039 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
2040
2041 /* Process Unlocked */
2042 __HAL_UNLOCK(hcryp);
2043
2044 return HAL_TIMEOUT;
2045 }
2046 }
2047
2048 /* Reset the ALGOMODE bits*/
2049 CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE);
2050
2051 /* Set the CRYP peripheral in AES ECB decryption mode */
2052 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_ECB | CRYP_CR_ALGODIR);
2053
2054 /* Flush FIFO */
2055 __HAL_CRYP_FIFO_FLUSH();
2056
2057 /* Set the phase */
2058 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
2059 }
2060
2061 /* Set the input and output addresses and start DMA transfer */
2062 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
2063
2064 /* Process Unlocked */
2065 __HAL_UNLOCK(hcryp);
2066
2067 /* Return function status */
2068 return HAL_OK;
2069 }
2070 else
2071 {
2072 return HAL_ERROR;
2073 }
2074 }
2075
2076 /**
2077 * @brief Initializes the CRYP peripheral in AES CBC encryption mode using DMA.
2078 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2079 * the configuration information for CRYP module
2080 * @param pCypherData: Pointer to the cyphertext buffer
2081 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
2082 * @param pPlainData: Pointer to the plaintext buffer
2083 * @retval HAL status
2084 */
2085 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
2086 {
2087 uint32_t tickstart = 0;
2088 uint32_t inputaddr;
2089 uint32_t outputaddr;
2090
2091 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
2092 {
2093 /* Process Locked */
2094 __HAL_LOCK(hcryp);
2095
2096 inputaddr = (uint32_t)pCypherData;
2097 outputaddr = (uint32_t)pPlainData;
2098
2099 /* Change the CRYP state */
2100 hcryp->State = HAL_CRYP_STATE_BUSY;
2101
2102 /* Check if initialization phase has already been performed */
2103 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
2104 {
2105 /* Set the key */
2106 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
2107
2108 /* Set the CRYP peripheral in AES Key mode */
2109 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR);
2110
2111 /* Enable CRYP */
2112 __HAL_CRYP_ENABLE();
2113
2114 /* Get tick */
2115 tickstart = HAL_GetTick();
2116
2117 while(HAL_IS_BIT_SET(CRYP->SR, CRYP_FLAG_BUSY))
2118 {
2119 /* Check for the Timeout */
2120 if((HAL_GetTick() - tickstart ) > CRYP_TIMEOUT_VALUE)
2121 {
2122 /* Change state */
2123 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
2124
2125 /* Process Unlocked */
2126 __HAL_UNLOCK(hcryp);
2127
2128 return HAL_TIMEOUT;
2129 }
2130 }
2131
2132 /* Reset the ALGOMODE bits*/
2133 CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE);
2134
2135 /* Set the CRYP peripheral in AES CBC decryption mode */
2136 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CBC | CRYP_CR_ALGODIR);
2137
2138 /* Set the Initialization Vector */
2139 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
2140
2141 /* Flush FIFO */
2142 __HAL_CRYP_FIFO_FLUSH();
2143
2144 /* Set the phase */
2145 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
2146 }
2147
2148 /* Set the input and output addresses and start DMA transfer */
2149 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
2150
2151 /* Process Unlocked */
2152 __HAL_UNLOCK(hcryp);
2153
2154 /* Return function status */
2155 return HAL_OK;
2156 }
2157 else
2158 {
2159 return HAL_ERROR;
2160 }
2161 }
2162
2163 /**
2164 * @brief Initializes the CRYP peripheral in AES CTR decryption mode using DMA.
2165 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2166 * the configuration information for CRYP module
2167 * @param pCypherData: Pointer to the cyphertext buffer
2168 * @param Size: Length of the plaintext buffer, must be a multiple of 16
2169 * @param pPlainData: Pointer to the plaintext buffer
2170 * @retval HAL status
2171 */
2172 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
2173 {
2174 uint32_t inputaddr;
2175 uint32_t outputaddr;
2176
2177 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
2178 {
2179 /* Process Locked */
2180 __HAL_LOCK(hcryp);
2181
2182 inputaddr = (uint32_t)pCypherData;
2183 outputaddr = (uint32_t)pPlainData;
2184
2185 /* Change the CRYP state */
2186 hcryp->State = HAL_CRYP_STATE_BUSY;
2187
2188 /* Check if initialization phase has already been performed */
2189 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
2190 {
2191 /* Set the key */
2192 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
2193
2194 /* Set the CRYP peripheral in AES CTR mode */
2195 __HAL_CRYP_SET_MODE(CRYP_CR_ALGOMODE_AES_CTR | CRYP_CR_ALGODIR);
2196
2197 /* Set the Initialization Vector */
2198 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
2199
2200 /* Flush FIFO */
2201 __HAL_CRYP_FIFO_FLUSH();
2202
2203 /* Set the phase */
2204 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
2205 }
2206
2207 /* Set the input and output addresses and start DMA transfer */
2208 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
2209
2210 /* Process Unlocked */
2211 __HAL_UNLOCK(hcryp);
2212
2213 /* Return function status */
2214 return HAL_OK;
2215 }
2216 else
2217 {
2218 return HAL_ERROR;
2219 }
2220 }
2221
2222
2223 /**
2224 * @}
2225 */
2226
2227 /** @defgroup CRYP_Exported_Functions_Group3 DES processing functions
2228 * @brief processing functions.
2229 *
2230 @verbatim
2231 ==============================================================================
2232 ##### DES processing functions #####
2233 ==============================================================================
2234 [..] This section provides functions allowing to:
2235 (+) Encrypt plaintext using DES using ECB or CBC chaining modes
2236 (+) Decrypt cyphertext using ECB or CBC chaining modes
2237 [..] Three processing functions are available:
2238 (+) Polling mode
2239 (+) Interrupt mode
2240 (+) DMA mode
2241
2242 @endverbatim
2243 * @{
2244 */
2245
2246 /**
2247 * @brief Initializes the CRYP peripheral in DES ECB encryption mode.
2248 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2249 * the configuration information for CRYP module
2250 * @param pPlainData: Pointer to the plaintext buffer
2251 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2252 * @param pCypherData: Pointer to the cyphertext buffer
2253 * @param Timeout: Specify Timeout value
2254 * @retval HAL status
2255 */
2256 HAL_StatusTypeDef HAL_CRYP_DESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
2257 {
2258 /* Process Locked */
2259 __HAL_LOCK(hcryp);
2260
2261 /* Change the CRYP state */
2262 hcryp->State = HAL_CRYP_STATE_BUSY;
2263
2264 /* Set CRYP peripheral in DES ECB encryption mode */
2265 CRYP_SetDESECBMode(hcryp, 0);
2266
2267 /* Enable CRYP */
2268 __HAL_CRYP_ENABLE();
2269
2270 /* Write Plain Data and Get Cypher Data */
2271 if(CRYP_ProcessData2Words(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
2272 {
2273 return HAL_TIMEOUT;
2274 }
2275
2276 /* Change the CRYP state */
2277 hcryp->State = HAL_CRYP_STATE_READY;
2278
2279 /* Process Unlocked */
2280 __HAL_UNLOCK(hcryp);
2281
2282 /* Return function status */
2283 return HAL_OK;
2284 }
2285
2286 /**
2287 * @brief Initializes the CRYP peripheral in DES ECB decryption mode.
2288 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2289 * the configuration information for CRYP module
2290 * @param pPlainData: Pointer to the plaintext buffer
2291 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2292 * @param pCypherData: Pointer to the cyphertext buffer
2293 * @param Timeout: Specify Timeout value
2294 * @retval HAL status
2295 */
2296 HAL_StatusTypeDef HAL_CRYP_DESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
2297 {
2298 /* Process Locked */
2299 __HAL_LOCK(hcryp);
2300
2301 /* Change the CRYP state */
2302 hcryp->State = HAL_CRYP_STATE_BUSY;
2303
2304 /* Set CRYP peripheral in DES ECB decryption mode */
2305 CRYP_SetDESECBMode(hcryp, CRYP_CR_ALGODIR);
2306
2307 /* Enable CRYP */
2308 __HAL_CRYP_ENABLE();
2309
2310 /* Write Plain Data and Get Cypher Data */
2311 if(CRYP_ProcessData2Words(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
2312 {
2313 return HAL_TIMEOUT;
2314 }
2315
2316 /* Change the CRYP state */
2317 hcryp->State = HAL_CRYP_STATE_READY;
2318
2319 /* Process Unlocked */
2320 __HAL_UNLOCK(hcryp);
2321
2322 /* Return function status */
2323 return HAL_OK;
2324 }
2325
2326 /**
2327 * @brief Initializes the CRYP peripheral in DES CBC encryption mode.
2328 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2329 * the configuration information for CRYP module
2330 * @param pPlainData: Pointer to the plaintext buffer
2331 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2332 * @param pCypherData: Pointer to the cyphertext buffer
2333 * @param Timeout: Specify Timeout value
2334 * @retval HAL status
2335 */
2336 HAL_StatusTypeDef HAL_CRYP_DESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
2337 {
2338 /* Process Locked */
2339 __HAL_LOCK(hcryp);
2340
2341 /* Change the CRYP state */
2342 hcryp->State = HAL_CRYP_STATE_BUSY;
2343
2344 /* Set CRYP peripheral in DES CBC encryption mode */
2345 CRYP_SetDESCBCMode(hcryp, 0);
2346
2347 /* Enable CRYP */
2348 __HAL_CRYP_ENABLE();
2349
2350 /* Write Plain Data and Get Cypher Data */
2351 if(CRYP_ProcessData2Words(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
2352 {
2353 return HAL_TIMEOUT;
2354 }
2355
2356 /* Change the CRYP state */
2357 hcryp->State = HAL_CRYP_STATE_READY;
2358
2359 /* Process Unlocked */
2360 __HAL_UNLOCK(hcryp);
2361
2362 /* Return function status */
2363 return HAL_OK;
2364 }
2365
2366 /**
2367 * @brief Initializes the CRYP peripheral in DES ECB decryption mode.
2368 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2369 * the configuration information for CRYP module
2370 * @param pPlainData: Pointer to the plaintext buffer
2371 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2372 * @param pCypherData: Pointer to the cyphertext buffer
2373 * @param Timeout: Specify Timeout value
2374 * @retval HAL status
2375 */
2376 HAL_StatusTypeDef HAL_CRYP_DESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
2377 {
2378 /* Process Locked */
2379 __HAL_LOCK(hcryp);
2380
2381 /* Change the CRYP state */
2382 hcryp->State = HAL_CRYP_STATE_BUSY;
2383
2384 /* Set CRYP peripheral in DES CBC decryption mode */
2385 CRYP_SetDESCBCMode(hcryp, CRYP_CR_ALGODIR);
2386
2387 /* Enable CRYP */
2388 __HAL_CRYP_ENABLE();
2389
2390 /* Write Plain Data and Get Cypher Data */
2391 if(CRYP_ProcessData2Words(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
2392 {
2393 return HAL_TIMEOUT;
2394 }
2395
2396 /* Change the CRYP state */
2397 hcryp->State = HAL_CRYP_STATE_READY;
2398
2399 /* Process Unlocked */
2400 __HAL_UNLOCK(hcryp);
2401
2402 /* Return function status */
2403 return HAL_OK;
2404 }
2405
2406 /**
2407 * @brief Initializes the CRYP peripheral in DES ECB encryption mode using IT.
2408 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2409 * the configuration information for CRYP module
2410 * @param pPlainData: Pointer to the plaintext buffer
2411 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2412 * @param pCypherData: Pointer to the cyphertext buffer
2413 * @retval HAL status
2414 */
2415 HAL_StatusTypeDef HAL_CRYP_DESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
2416 {
2417 uint32_t inputaddr;
2418 uint32_t outputaddr;
2419
2420 if(hcryp->State == HAL_CRYP_STATE_READY)
2421 {
2422 /* Process Locked */
2423 __HAL_LOCK(hcryp);
2424
2425 hcryp->CrypInCount = Size;
2426 hcryp->pCrypInBuffPtr = pPlainData;
2427 hcryp->pCrypOutBuffPtr = pCypherData;
2428 hcryp->CrypOutCount = Size;
2429
2430 /* Change the CRYP state */
2431 hcryp->State = HAL_CRYP_STATE_BUSY;
2432
2433 /* Set CRYP peripheral in DES ECB encryption mode */
2434 CRYP_SetDESECBMode(hcryp, 0);
2435
2436 /* Enable Interrupts */
2437 __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI);
2438
2439 /* Enable CRYP */
2440 __HAL_CRYP_ENABLE();
2441
2442 /* Return function status */
2443 return HAL_OK;
2444 }
2445 else if(__HAL_CRYP_GET_IT(CRYP_IT_INI))
2446 {
2447 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
2448 /* Write the Input block in the IN FIFO */
2449 CRYP->DR = *(uint32_t*)(inputaddr);
2450 inputaddr+=4;
2451 CRYP->DR = *(uint32_t*)(inputaddr);
2452
2453 hcryp->pCrypInBuffPtr += 8;
2454 hcryp->CrypInCount -= 8;
2455 if(hcryp->CrypInCount == 0)
2456 {
2457 __HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
2458 /* Call the Input data transfer complete callback */
2459 HAL_CRYP_InCpltCallback(hcryp);
2460 }
2461 }
2462 else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
2463 {
2464 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
2465 /* Read the Output block from the Output FIFO */
2466 *(uint32_t*)(outputaddr) = CRYP->DOUT;
2467 outputaddr+=4;
2468 *(uint32_t*)(outputaddr) = CRYP->DOUT;
2469
2470 hcryp->pCrypOutBuffPtr += 8;
2471 hcryp->CrypOutCount -= 8;
2472 if(hcryp->CrypOutCount == 0)
2473 {
2474 /* Disable IT */
2475 __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
2476 /* Disable CRYP */
2477 __HAL_CRYP_DISABLE();
2478 /* Process Unlocked */
2479 __HAL_UNLOCK(hcryp);
2480 /* Change the CRYP state */
2481 hcryp->State = HAL_CRYP_STATE_READY;
2482 /* Call Input transfer complete callback */
2483 HAL_CRYP_OutCpltCallback(hcryp);
2484 }
2485 }
2486
2487 /* Return function status */
2488 return HAL_OK;
2489 }
2490
2491 /**
2492 * @brief Initializes the CRYP peripheral in DES CBC encryption mode using interrupt.
2493 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2494 * the configuration information for CRYP module
2495 * @param pPlainData: Pointer to the plaintext buffer
2496 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2497 * @param pCypherData: Pointer to the cyphertext buffer
2498 * @retval HAL status
2499 */
2500 HAL_StatusTypeDef HAL_CRYP_DESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
2501 {
2502 uint32_t inputaddr;
2503 uint32_t outputaddr;
2504
2505 if(hcryp->State == HAL_CRYP_STATE_READY)
2506 {
2507 /* Process Locked */
2508 __HAL_LOCK(hcryp);
2509
2510 hcryp->CrypInCount = Size;
2511 hcryp->pCrypInBuffPtr = pPlainData;
2512 hcryp->pCrypOutBuffPtr = pCypherData;
2513 hcryp->CrypOutCount = Size;
2514
2515 /* Change the CRYP state */
2516 hcryp->State = HAL_CRYP_STATE_BUSY;
2517
2518 /* Set CRYP peripheral in DES CBC encryption mode */
2519 CRYP_SetDESCBCMode(hcryp, 0);
2520
2521 /* Enable Interrupts */
2522 __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI);
2523
2524 /* Enable CRYP */
2525 __HAL_CRYP_ENABLE();
2526
2527 /* Return function status */
2528 return HAL_OK;
2529 }
2530
2531 else if(__HAL_CRYP_GET_IT(CRYP_IT_INI))
2532 {
2533 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
2534 /* Write the Input block in the IN FIFO */
2535 CRYP->DR = *(uint32_t*)(inputaddr);
2536 inputaddr+=4;
2537 CRYP->DR = *(uint32_t*)(inputaddr);
2538
2539 hcryp->pCrypInBuffPtr += 8;
2540 hcryp->CrypInCount -= 8;
2541 if(hcryp->CrypInCount == 0)
2542 {
2543 __HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
2544 /* Call the Input data transfer complete callback */
2545 HAL_CRYP_InCpltCallback(hcryp);
2546 }
2547 }
2548 else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
2549 {
2550 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
2551 /* Read the Output block from the Output FIFO */
2552 *(uint32_t*)(outputaddr) = CRYP->DOUT;
2553 outputaddr+=4;
2554 *(uint32_t*)(outputaddr) = CRYP->DOUT;
2555
2556 hcryp->pCrypOutBuffPtr += 8;
2557 hcryp->CrypOutCount -= 8;
2558 if(hcryp->CrypOutCount == 0)
2559 {
2560 /* Disable IT */
2561 __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
2562 /* Disable CRYP */
2563 __HAL_CRYP_DISABLE();
2564 /* Process Unlocked */
2565 __HAL_UNLOCK(hcryp);
2566 /* Change the CRYP state */
2567 hcryp->State = HAL_CRYP_STATE_READY;
2568 /* Call Input transfer complete callback */
2569 HAL_CRYP_OutCpltCallback(hcryp);
2570 }
2571 }
2572
2573 /* Return function status */
2574 return HAL_OK;
2575 }
2576
2577 /**
2578 * @brief Initializes the CRYP peripheral in DES ECB decryption mode using IT.
2579 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2580 * the configuration information for CRYP module
2581 * @param pPlainData: Pointer to the plaintext buffer
2582 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2583 * @param pCypherData: Pointer to the cyphertext buffer
2584 * @retval HAL status
2585 */
2586 HAL_StatusTypeDef HAL_CRYP_DESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
2587 {
2588 uint32_t inputaddr;
2589 uint32_t outputaddr;
2590
2591 if(hcryp->State == HAL_CRYP_STATE_READY)
2592 {
2593 /* Process Locked */
2594 __HAL_LOCK(hcryp);
2595
2596 hcryp->CrypInCount = Size;
2597 hcryp->pCrypInBuffPtr = pCypherData;
2598 hcryp->pCrypOutBuffPtr = pPlainData;
2599 hcryp->CrypOutCount = Size;
2600
2601 /* Change the CRYP state */
2602 hcryp->State = HAL_CRYP_STATE_BUSY;
2603
2604 /* Set CRYP peripheral in DES ECB decryption mode */
2605 CRYP_SetDESECBMode(hcryp, CRYP_CR_ALGODIR);
2606
2607 /* Enable Interrupts */
2608 __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI);
2609
2610 /* Enable CRYP */
2611 __HAL_CRYP_ENABLE();
2612
2613 /* Return function status */
2614 return HAL_OK;
2615 }
2616 else if(__HAL_CRYP_GET_IT(CRYP_IT_INI))
2617 {
2618 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
2619 /* Write the Input block in the IN FIFO */
2620 CRYP->DR = *(uint32_t*)(inputaddr);
2621 inputaddr+=4;
2622 CRYP->DR = *(uint32_t*)(inputaddr);
2623
2624 hcryp->pCrypInBuffPtr += 8;
2625 hcryp->CrypInCount -= 8;
2626 if(hcryp->CrypInCount == 0)
2627 {
2628 __HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
2629 /* Call the Input data transfer complete callback */
2630 HAL_CRYP_InCpltCallback(hcryp);
2631 }
2632 }
2633 else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
2634 {
2635 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
2636 /* Read the Output block from the Output FIFO */
2637 *(uint32_t*)(outputaddr) = CRYP->DOUT;
2638 outputaddr+=4;
2639 *(uint32_t*)(outputaddr) = CRYP->DOUT;
2640
2641 hcryp->pCrypOutBuffPtr += 8;
2642 hcryp->CrypOutCount -= 8;
2643 if(hcryp->CrypOutCount == 0)
2644 {
2645 /* Disable IT */
2646 __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
2647 /* Disable CRYP */
2648 __HAL_CRYP_DISABLE();
2649 /* Process Unlocked */
2650 __HAL_UNLOCK(hcryp);
2651 /* Change the CRYP state */
2652 hcryp->State = HAL_CRYP_STATE_READY;
2653 /* Call Input transfer complete callback */
2654 HAL_CRYP_OutCpltCallback(hcryp);
2655 }
2656 }
2657
2658 /* Return function status */
2659 return HAL_OK;
2660 }
2661
2662 /**
2663 * @brief Initializes the CRYP peripheral in DES ECB decryption mode using interrupt.
2664 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2665 * the configuration information for CRYP module
2666 * @param pPlainData: Pointer to the plaintext buffer
2667 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2668 * @param pCypherData: Pointer to the cyphertext buffer
2669 * @retval HAL status
2670 */
2671 HAL_StatusTypeDef HAL_CRYP_DESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
2672 {
2673 uint32_t inputaddr;
2674 uint32_t outputaddr;
2675
2676 if(hcryp->State == HAL_CRYP_STATE_READY)
2677 {
2678 /* Process Locked */
2679 __HAL_LOCK(hcryp);
2680
2681 hcryp->CrypInCount = Size;
2682 hcryp->pCrypInBuffPtr = pCypherData;
2683 hcryp->pCrypOutBuffPtr = pPlainData;
2684 hcryp->CrypOutCount = Size;
2685
2686 /* Change the CRYP state */
2687 hcryp->State = HAL_CRYP_STATE_BUSY;
2688
2689 /* Set CRYP peripheral in DES CBC decryption mode */
2690 CRYP_SetDESCBCMode(hcryp, CRYP_CR_ALGODIR);
2691
2692 /* Enable Interrupts */
2693 __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI);
2694
2695 /* Enable CRYP */
2696 __HAL_CRYP_ENABLE();
2697
2698 /* Return function status */
2699 return HAL_OK;
2700 }
2701 else if(__HAL_CRYP_GET_IT(CRYP_IT_INI))
2702 {
2703 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
2704 /* Write the Input block in the IN FIFO */
2705 CRYP->DR = *(uint32_t*)(inputaddr);
2706 inputaddr+=4;
2707 CRYP->DR = *(uint32_t*)(inputaddr);
2708
2709 hcryp->pCrypInBuffPtr += 8;
2710 hcryp->CrypInCount -= 8;
2711 if(hcryp->CrypInCount == 0)
2712 {
2713 __HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
2714 /* Call the Input data transfer complete callback */
2715 HAL_CRYP_InCpltCallback(hcryp);
2716 }
2717 }
2718 else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
2719 {
2720 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
2721 /* Read the Output block from the Output FIFO */
2722 *(uint32_t*)(outputaddr) = CRYP->DOUT;
2723 outputaddr+=4;
2724 *(uint32_t*)(outputaddr) = CRYP->DOUT;
2725
2726 hcryp->pCrypOutBuffPtr += 8;
2727 hcryp->CrypOutCount -= 8;
2728 if(hcryp->CrypOutCount == 0)
2729 {
2730 /* Disable IT */
2731 __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
2732 /* Disable CRYP */
2733 __HAL_CRYP_DISABLE();
2734 /* Process Unlocked */
2735 __HAL_UNLOCK(hcryp);
2736 /* Change the CRYP state */
2737 hcryp->State = HAL_CRYP_STATE_READY;
2738 /* Call Input transfer complete callback */
2739 HAL_CRYP_OutCpltCallback(hcryp);
2740 }
2741 }
2742
2743 /* Return function status */
2744 return HAL_OK;
2745 }
2746
2747 /**
2748 * @brief Initializes the CRYP peripheral in DES ECB encryption mode using DMA.
2749 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2750 * the configuration information for CRYP module
2751 * @param pPlainData: Pointer to the plaintext buffer
2752 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2753 * @param pCypherData: Pointer to the cyphertext buffer
2754 * @retval HAL status
2755 */
2756 HAL_StatusTypeDef HAL_CRYP_DESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
2757 {
2758 uint32_t inputaddr;
2759 uint32_t outputaddr;
2760
2761 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
2762 {
2763 /* Process Locked */
2764 __HAL_LOCK(hcryp);
2765
2766 inputaddr = (uint32_t)pPlainData;
2767 outputaddr = (uint32_t)pCypherData;
2768
2769 /* Change the CRYP state */
2770 hcryp->State = HAL_CRYP_STATE_BUSY;
2771
2772 /* Set CRYP peripheral in DES ECB encryption mode */
2773 CRYP_SetDESECBMode(hcryp, 0);
2774
2775 /* Set the input and output addresses and start DMA transfer */
2776 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
2777
2778 /* Process Unlocked */
2779 __HAL_UNLOCK(hcryp);
2780
2781 /* Return function status */
2782 return HAL_OK;
2783 }
2784 else
2785 {
2786 return HAL_ERROR;
2787 }
2788 }
2789
2790 /**
2791 * @brief Initializes the CRYP peripheral in DES CBC encryption mode using DMA.
2792 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2793 * the configuration information for CRYP module
2794 * @param pPlainData: Pointer to the plaintext buffer
2795 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2796 * @param pCypherData: Pointer to the cyphertext buffer
2797 * @retval HAL status
2798 */
2799 HAL_StatusTypeDef HAL_CRYP_DESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
2800 {
2801 uint32_t inputaddr;
2802 uint32_t outputaddr;
2803
2804 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
2805 {
2806 /* Process Locked */
2807 __HAL_LOCK(hcryp);
2808
2809 inputaddr = (uint32_t)pPlainData;
2810 outputaddr = (uint32_t)pCypherData;
2811
2812 /* Change the CRYP state */
2813 hcryp->State = HAL_CRYP_STATE_BUSY;
2814
2815 /* Set CRYP peripheral in DES CBC encryption mode */
2816 CRYP_SetDESCBCMode(hcryp, 0);
2817
2818 /* Set the input and output addresses and start DMA transfer */
2819 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
2820
2821 /* Process Unlocked */
2822 __HAL_UNLOCK(hcryp);
2823
2824 /* Return function status */
2825 return HAL_OK;
2826 }
2827 else
2828 {
2829 return HAL_ERROR;
2830 }
2831 }
2832
2833 /**
2834 * @brief Initializes the CRYP peripheral in DES ECB decryption mode using DMA.
2835 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2836 * the configuration information for CRYP module
2837 * @param pPlainData: Pointer to the plaintext buffer
2838 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2839 * @param pCypherData: Pointer to the cyphertext buffer
2840 * @retval HAL status
2841 */
2842 HAL_StatusTypeDef HAL_CRYP_DESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
2843 {
2844 uint32_t inputaddr;
2845 uint32_t outputaddr;
2846
2847 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
2848 {
2849 /* Process Locked */
2850 __HAL_LOCK(hcryp);
2851
2852 inputaddr = (uint32_t)pCypherData;
2853 outputaddr = (uint32_t)pPlainData;
2854
2855 /* Change the CRYP state */
2856 hcryp->State = HAL_CRYP_STATE_BUSY;
2857
2858 /* Set CRYP peripheral in DES ECB decryption mode */
2859 CRYP_SetDESECBMode(hcryp, CRYP_CR_ALGODIR);
2860
2861 /* Set the input and output addresses and start DMA transfer */
2862 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
2863
2864 /* Process Unlocked */
2865 __HAL_UNLOCK(hcryp);
2866
2867 /* Return function status */
2868 return HAL_OK;
2869 }
2870 else
2871 {
2872 return HAL_ERROR;
2873 }
2874 }
2875
2876 /**
2877 * @brief Initializes the CRYP peripheral in DES ECB decryption mode using DMA.
2878 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2879 * the configuration information for CRYP module
2880 * @param pPlainData: Pointer to the plaintext buffer
2881 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2882 * @param pCypherData: Pointer to the cyphertext buffer
2883 * @retval HAL status
2884 */
2885 HAL_StatusTypeDef HAL_CRYP_DESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
2886 {
2887 uint32_t inputaddr;
2888 uint32_t outputaddr;
2889
2890 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
2891 {
2892 /* Process Locked */
2893 __HAL_LOCK(hcryp);
2894
2895 inputaddr = (uint32_t)pCypherData;
2896 outputaddr = (uint32_t)pPlainData;
2897
2898 /* Change the CRYP state */
2899 hcryp->State = HAL_CRYP_STATE_BUSY;
2900
2901 /* Set CRYP peripheral in DES CBC decryption mode */
2902 CRYP_SetDESCBCMode(hcryp, CRYP_CR_ALGODIR);
2903
2904 /* Set the input and output addresses and start DMA transfer */
2905 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
2906
2907 /* Process Unlocked */
2908 __HAL_UNLOCK(hcryp);
2909
2910 /* Return function status */
2911 return HAL_OK;
2912 }
2913 else
2914 {
2915 return HAL_ERROR;
2916 }
2917 }
2918
2919 /**
2920 * @}
2921 */
2922
2923 /** @defgroup CRYP_Exported_Functions_Group4 TDES processing functions
2924 * @brief processing functions.
2925 *
2926 @verbatim
2927 ==============================================================================
2928 ##### TDES processing functions #####
2929 ==============================================================================
2930 [..] This section provides functions allowing to:
2931 (+) Encrypt plaintext using TDES based on ECB or CBC chaining modes
2932 (+) Decrypt cyphertext using TDES based on ECB or CBC chaining modes
2933 [..] Three processing functions are available:
2934 (+) Polling mode
2935 (+) Interrupt mode
2936 (+) DMA mode
2937
2938 @endverbatim
2939 * @{
2940 */
2941
2942 /**
2943 * @brief Initializes the CRYP peripheral in TDES ECB encryption mode
2944 * then encrypt pPlainData. The cypher data are available in pCypherData
2945 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2946 * the configuration information for CRYP module
2947 * @param pPlainData: Pointer to the plaintext buffer
2948 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2949 * @param pCypherData: Pointer to the cyphertext buffer
2950 * @param Timeout: Specify Timeout value
2951 * @retval HAL status
2952 */
2953 HAL_StatusTypeDef HAL_CRYP_TDESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
2954 {
2955 /* Process Locked */
2956 __HAL_LOCK(hcryp);
2957
2958 /* Change the CRYP state */
2959 hcryp->State = HAL_CRYP_STATE_BUSY;
2960
2961 /* Set CRYP peripheral in TDES ECB encryption mode */
2962 CRYP_SetTDESECBMode(hcryp, 0);
2963
2964 /* Enable CRYP */
2965 __HAL_CRYP_ENABLE();
2966
2967 /* Write Plain Data and Get Cypher Data */
2968 if(CRYP_ProcessData2Words(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
2969 {
2970 return HAL_TIMEOUT;
2971 }
2972
2973 /* Change the CRYP state */
2974 hcryp->State = HAL_CRYP_STATE_READY;
2975
2976 /* Process Unlocked */
2977 __HAL_UNLOCK(hcryp);
2978
2979 /* Return function status */
2980 return HAL_OK;
2981 }
2982
2983 /**
2984 * @brief Initializes the CRYP peripheral in TDES ECB decryption mode
2985 * then decrypted pCypherData. The cypher data are available in pPlainData
2986 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2987 * the configuration information for CRYP module
2988 * @param pPlainData: Pointer to the plaintext buffer
2989 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2990 * @param pCypherData: Pointer to the cyphertext buffer
2991 * @param Timeout: Specify Timeout value
2992 * @retval HAL status
2993 */
2994 HAL_StatusTypeDef HAL_CRYP_TDESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
2995 {
2996 /* Process Locked */
2997 __HAL_LOCK(hcryp);
2998
2999 /* Change the CRYP state */
3000 hcryp->State = HAL_CRYP_STATE_BUSY;
3001
3002 /* Set CRYP peripheral in TDES ECB decryption mode */
3003 CRYP_SetTDESECBMode(hcryp, CRYP_CR_ALGODIR);
3004
3005 /* Enable CRYP */
3006 __HAL_CRYP_ENABLE();
3007
3008 /* Write Cypher Data and Get Plain Data */
3009 if(CRYP_ProcessData2Words(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
3010 {
3011 return HAL_TIMEOUT;
3012 }
3013
3014 /* Change the CRYP state */
3015 hcryp->State = HAL_CRYP_STATE_READY;
3016
3017 /* Process Unlocked */
3018 __HAL_UNLOCK(hcryp);
3019
3020 /* Return function status */
3021 return HAL_OK;
3022 }
3023
3024 /**
3025 * @brief Initializes the CRYP peripheral in TDES CBC encryption mode
3026 * then encrypt pPlainData. The cypher data are available in pCypherData
3027 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3028 * the configuration information for CRYP module
3029 * @param pPlainData: Pointer to the plaintext buffer
3030 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3031 * @param pCypherData: Pointer to the cyphertext buffer
3032 * @param Timeout: Specify Timeout value
3033 * @retval HAL status
3034 */
3035 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
3036 {
3037 /* Process Locked */
3038 __HAL_LOCK(hcryp);
3039
3040 /* Change the CRYP state */
3041 hcryp->State = HAL_CRYP_STATE_BUSY;
3042
3043 /* Set CRYP peripheral in TDES CBC encryption mode */
3044 CRYP_SetTDESCBCMode(hcryp, 0);
3045
3046 /* Enable CRYP */
3047 __HAL_CRYP_ENABLE();
3048
3049 /* Write Plain Data and Get Cypher Data */
3050 if(CRYP_ProcessData2Words(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
3051 {
3052 return HAL_TIMEOUT;
3053 }
3054
3055 /* Change the CRYP state */
3056 hcryp->State = HAL_CRYP_STATE_READY;
3057
3058 /* Process Unlocked */
3059 __HAL_UNLOCK(hcryp);
3060
3061 /* Return function status */
3062 return HAL_OK;
3063 }
3064
3065 /**
3066 * @brief Initializes the CRYP peripheral in TDES CBC decryption mode
3067 * then decrypted pCypherData. The cypher data are available in pPlainData
3068 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3069 * the configuration information for CRYP module
3070 * @param pCypherData: Pointer to the cyphertext buffer
3071 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3072 * @param pPlainData: Pointer to the plaintext buffer
3073 * @param Timeout: Specify Timeout value
3074 * @retval HAL status
3075 */
3076 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
3077 {
3078 /* Process Locked */
3079 __HAL_LOCK(hcryp);
3080
3081 /* Change the CRYP state */
3082 hcryp->State = HAL_CRYP_STATE_BUSY;
3083
3084 /* Set CRYP peripheral in TDES CBC decryption mode */
3085 CRYP_SetTDESCBCMode(hcryp, CRYP_CR_ALGODIR);
3086
3087 /* Enable CRYP */
3088 __HAL_CRYP_ENABLE();
3089
3090 /* Write Cypher Data and Get Plain Data */
3091 if(CRYP_ProcessData2Words(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
3092 {
3093 return HAL_TIMEOUT;
3094 }
3095
3096 /* Change the CRYP state */
3097 hcryp->State = HAL_CRYP_STATE_READY;
3098
3099 /* Process Unlocked */
3100 __HAL_UNLOCK(hcryp);
3101
3102 /* Return function status */
3103 return HAL_OK;
3104 }
3105
3106 /**
3107 * @brief Initializes the CRYP peripheral in TDES ECB encryption mode using interrupt.
3108 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3109 * the configuration information for CRYP module
3110 * @param pPlainData: Pointer to the plaintext buffer
3111 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3112 * @param pCypherData: Pointer to the cyphertext buffer
3113 * @retval HAL status
3114 */
3115 HAL_StatusTypeDef HAL_CRYP_TDESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
3116 {
3117 uint32_t inputaddr;
3118 uint32_t outputaddr;
3119
3120 if(hcryp->State == HAL_CRYP_STATE_READY)
3121 {
3122 /* Process Locked */
3123 __HAL_LOCK(hcryp);
3124
3125 hcryp->CrypInCount = Size;
3126 hcryp->pCrypInBuffPtr = pPlainData;
3127 hcryp->pCrypOutBuffPtr = pCypherData;
3128 hcryp->CrypOutCount = Size;
3129
3130 /* Change the CRYP state */
3131 hcryp->State = HAL_CRYP_STATE_BUSY;
3132
3133 /* Set CRYP peripheral in TDES ECB encryption mode */
3134 CRYP_SetTDESECBMode(hcryp, 0);
3135
3136 /* Enable Interrupts */
3137 __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI);
3138
3139 /* Enable CRYP */
3140 __HAL_CRYP_ENABLE();
3141
3142 /* Return function status */
3143 return HAL_OK;
3144 }
3145 else if(__HAL_CRYP_GET_IT(CRYP_IT_INI))
3146 {
3147 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
3148 /* Write the Input block in the IN FIFO */
3149 CRYP->DR = *(uint32_t*)(inputaddr);
3150 inputaddr+=4;
3151 CRYP->DR = *(uint32_t*)(inputaddr);
3152
3153 hcryp->pCrypInBuffPtr += 8;
3154 hcryp->CrypInCount -= 8;
3155 if(hcryp->CrypInCount == 0)
3156 {
3157 __HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
3158 /* Call the Input data transfer complete callback */
3159 HAL_CRYP_InCpltCallback(hcryp);
3160 }
3161 }
3162 else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
3163 {
3164 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
3165 /* Read the Output block from the Output FIFO */
3166 *(uint32_t*)(outputaddr) = CRYP->DOUT;
3167 outputaddr+=4;
3168 *(uint32_t*)(outputaddr) = CRYP->DOUT;
3169
3170 hcryp->pCrypOutBuffPtr += 8;
3171 hcryp->CrypOutCount -= 8;
3172 if(hcryp->CrypOutCount == 0)
3173 {
3174 /* Disable IT */
3175 __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
3176 /* Disable CRYP */
3177 __HAL_CRYP_DISABLE();
3178 /* Process Unlocked */
3179 __HAL_UNLOCK(hcryp);
3180 /* Change the CRYP state */
3181 hcryp->State = HAL_CRYP_STATE_READY;
3182 /* Call the Output data transfer complete callback */
3183 HAL_CRYP_OutCpltCallback(hcryp);
3184 }
3185 }
3186
3187 /* Return function status */
3188 return HAL_OK;
3189 }
3190
3191 /**
3192 * @brief Initializes the CRYP peripheral in TDES CBC encryption mode.
3193 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3194 * the configuration information for CRYP module
3195 * @param pPlainData: Pointer to the plaintext buffer
3196 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3197 * @param pCypherData: Pointer to the cyphertext buffer
3198 * @retval HAL status
3199 */
3200 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
3201 {
3202 uint32_t inputaddr;
3203 uint32_t outputaddr;
3204
3205 if(hcryp->State == HAL_CRYP_STATE_READY)
3206 {
3207 /* Process Locked */
3208 __HAL_LOCK(hcryp);
3209
3210 hcryp->CrypInCount = Size;
3211 hcryp->pCrypInBuffPtr = pPlainData;
3212 hcryp->pCrypOutBuffPtr = pCypherData;
3213 hcryp->CrypOutCount = Size;
3214
3215 /* Change the CRYP state */
3216 hcryp->State = HAL_CRYP_STATE_BUSY;
3217
3218 /* Set CRYP peripheral in TDES CBC encryption mode */
3219 CRYP_SetTDESCBCMode(hcryp, 0);
3220
3221 /* Enable Interrupts */
3222 __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI);
3223
3224 /* Enable CRYP */
3225 __HAL_CRYP_ENABLE();
3226
3227 /* Return function status */
3228 return HAL_OK;
3229 }
3230 else if(__HAL_CRYP_GET_IT(CRYP_IT_INI))
3231 {
3232 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
3233 /* Write the Input block in the IN FIFO */
3234 CRYP->DR = *(uint32_t*)(inputaddr);
3235 inputaddr+=4;
3236 CRYP->DR = *(uint32_t*)(inputaddr);
3237
3238 hcryp->pCrypInBuffPtr += 8;
3239 hcryp->CrypInCount -= 8;
3240 if(hcryp->CrypInCount == 0)
3241 {
3242 __HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
3243 /* Call the Input data transfer complete callback */
3244 HAL_CRYP_InCpltCallback(hcryp);
3245 }
3246 }
3247 else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
3248 {
3249 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
3250 /* Read the Output block from the Output FIFO */
3251 *(uint32_t*)(outputaddr) = CRYP->DOUT;
3252 outputaddr+=4;
3253 *(uint32_t*)(outputaddr) = CRYP->DOUT;
3254
3255 hcryp->pCrypOutBuffPtr += 8;
3256 hcryp->CrypOutCount -= 8;
3257 if(hcryp->CrypOutCount == 0)
3258 {
3259 __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
3260 /* Disable CRYP */
3261 __HAL_CRYP_DISABLE();
3262 /* Process Unlocked */
3263 __HAL_UNLOCK(hcryp);
3264 /* Change the CRYP state */
3265 hcryp->State = HAL_CRYP_STATE_READY;
3266 /* Call Input transfer complete callback */
3267 HAL_CRYP_OutCpltCallback(hcryp);
3268 }
3269 }
3270
3271 /* Return function status */
3272 return HAL_OK;
3273 }
3274
3275 /**
3276 * @brief Initializes the CRYP peripheral in TDES ECB decryption mode.
3277 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3278 * the configuration information for CRYP module
3279 * @param pPlainData: Pointer to the plaintext buffer
3280 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3281 * @param pCypherData: Pointer to the cyphertext buffer
3282 * @retval HAL status
3283 */
3284 HAL_StatusTypeDef HAL_CRYP_TDESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
3285 {
3286 uint32_t inputaddr;
3287 uint32_t outputaddr;
3288
3289 if(hcryp->State == HAL_CRYP_STATE_READY)
3290 {
3291 /* Process Locked */
3292 __HAL_LOCK(hcryp);
3293
3294 hcryp->CrypInCount = Size;
3295 hcryp->pCrypInBuffPtr = pCypherData;
3296 hcryp->pCrypOutBuffPtr = pPlainData;
3297 hcryp->CrypOutCount = Size;
3298
3299 /* Change the CRYP state */
3300 hcryp->State = HAL_CRYP_STATE_BUSY;
3301
3302 /* Set CRYP peripheral in TDES ECB decryption mode */
3303 CRYP_SetTDESECBMode(hcryp, CRYP_CR_ALGODIR);
3304
3305 /* Enable Interrupts */
3306 __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI);
3307
3308 /* Enable CRYP */
3309 __HAL_CRYP_ENABLE();
3310
3311 /* Return function status */
3312 return HAL_OK;
3313 }
3314 else if(__HAL_CRYP_GET_IT(CRYP_IT_INI))
3315 {
3316 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
3317 /* Write the Input block in the IN FIFO */
3318 CRYP->DR = *(uint32_t*)(inputaddr);
3319 inputaddr+=4;
3320 CRYP->DR = *(uint32_t*)(inputaddr);
3321
3322 hcryp->pCrypInBuffPtr += 8;
3323 hcryp->CrypInCount -= 8;
3324 if(hcryp->CrypInCount == 0)
3325 {
3326 __HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
3327 /* Call the Input data transfer complete callback */
3328 HAL_CRYP_InCpltCallback(hcryp);
3329 }
3330 }
3331 else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
3332 {
3333 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
3334 /* Read the Output block from the Output FIFO */
3335 *(uint32_t*)(outputaddr) = CRYP->DOUT;
3336 outputaddr+=4;
3337 *(uint32_t*)(outputaddr) = CRYP->DOUT;
3338
3339 hcryp->pCrypOutBuffPtr += 8;
3340 hcryp->CrypOutCount -= 8;
3341 if(hcryp->CrypOutCount == 0)
3342 {
3343 __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
3344 /* Disable CRYP */
3345 __HAL_CRYP_DISABLE();
3346 /* Process Unlocked */
3347 __HAL_UNLOCK(hcryp);
3348 /* Change the CRYP state */
3349 hcryp->State = HAL_CRYP_STATE_READY;
3350 /* Call Input transfer complete callback */
3351 HAL_CRYP_OutCpltCallback(hcryp);
3352 }
3353 }
3354
3355 /* Return function status */
3356 return HAL_OK;
3357 }
3358
3359 /**
3360 * @brief Initializes the CRYP peripheral in TDES CBC decryption mode.
3361 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3362 * the configuration information for CRYP module
3363 * @param pCypherData: Pointer to the cyphertext buffer
3364 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3365 * @param pPlainData: Pointer to the plaintext buffer
3366 * @retval HAL status
3367 */
3368 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
3369 {
3370 uint32_t inputaddr;
3371 uint32_t outputaddr;
3372
3373 if(hcryp->State == HAL_CRYP_STATE_READY)
3374 {
3375 /* Process Locked */
3376 __HAL_LOCK(hcryp);
3377
3378 hcryp->CrypInCount = Size;
3379 hcryp->pCrypInBuffPtr = pCypherData;
3380 hcryp->pCrypOutBuffPtr = pPlainData;
3381 hcryp->CrypOutCount = Size;
3382
3383 /* Change the CRYP state */
3384 hcryp->State = HAL_CRYP_STATE_BUSY;
3385
3386 /* Set CRYP peripheral in TDES CBC decryption mode */
3387 CRYP_SetTDESCBCMode(hcryp, CRYP_CR_ALGODIR);
3388
3389 /* Enable Interrupts */
3390 __HAL_CRYP_ENABLE_IT(CRYP_IT_INI | CRYP_IT_OUTI);
3391
3392 /* Enable CRYP */
3393 __HAL_CRYP_ENABLE();
3394
3395 /* Return function status */
3396 return HAL_OK;
3397 }
3398 else if(__HAL_CRYP_GET_IT(CRYP_IT_INI))
3399 {
3400 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
3401 /* Write the Input block in the IN FIFO */
3402 CRYP->DR = *(uint32_t*)(inputaddr);
3403 inputaddr+=4;
3404 CRYP->DR = *(uint32_t*)(inputaddr);
3405
3406 hcryp->pCrypInBuffPtr += 8;
3407 hcryp->CrypInCount -= 8;
3408 if(hcryp->CrypInCount == 0)
3409 {
3410 __HAL_CRYP_DISABLE_IT(CRYP_IT_INI);
3411 /* Call the Input data transfer complete callback */
3412 HAL_CRYP_InCpltCallback(hcryp);
3413 }
3414 }
3415 else if(__HAL_CRYP_GET_IT(CRYP_IT_OUTI))
3416 {
3417 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
3418 /* Read the Output block from the Output FIFO */
3419 *(uint32_t*)(outputaddr) = CRYP->DOUT;
3420 outputaddr+=4;
3421 *(uint32_t*)(outputaddr) = CRYP->DOUT;
3422
3423 hcryp->pCrypOutBuffPtr += 8;
3424 hcryp->CrypOutCount -= 8;
3425 if(hcryp->CrypOutCount == 0)
3426 {
3427 __HAL_CRYP_DISABLE_IT(CRYP_IT_OUTI);
3428 /* Disable CRYP */
3429 __HAL_CRYP_DISABLE();
3430 /* Process Unlocked */
3431 __HAL_UNLOCK(hcryp);
3432 /* Change the CRYP state */
3433 hcryp->State = HAL_CRYP_STATE_READY;
3434 /* Call Input transfer complete callback */
3435 HAL_CRYP_OutCpltCallback(hcryp);
3436 }
3437 }
3438
3439 /* Return function status */
3440 return HAL_OK;
3441 }
3442
3443 /**
3444 * @brief Initializes the CRYP peripheral in TDES ECB encryption mode using DMA.
3445 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3446 * the configuration information for CRYP module
3447 * @param pPlainData: Pointer to the plaintext buffer
3448 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3449 * @param pCypherData: Pointer to the cyphertext buffer
3450 * @retval HAL status
3451 */
3452 HAL_StatusTypeDef HAL_CRYP_TDESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
3453 {
3454 uint32_t inputaddr;
3455 uint32_t outputaddr;
3456
3457 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
3458 {
3459 /* Process Locked */
3460 __HAL_LOCK(hcryp);
3461
3462 inputaddr = (uint32_t)pPlainData;
3463 outputaddr = (uint32_t)pCypherData;
3464
3465 /* Change the CRYP state */
3466 hcryp->State = HAL_CRYP_STATE_BUSY;
3467
3468 /* Set CRYP peripheral in TDES ECB encryption mode */
3469 CRYP_SetTDESECBMode(hcryp, 0);
3470
3471 /* Set the input and output addresses and start DMA transfer */
3472 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
3473
3474 /* Process Unlocked */
3475 __HAL_UNLOCK(hcryp);
3476
3477 /* Return function status */
3478 return HAL_OK;
3479 }
3480 else
3481 {
3482 return HAL_ERROR;
3483 }
3484 }
3485
3486 /**
3487 * @brief Initializes the CRYP peripheral in TDES CBC encryption mode using DMA.
3488 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3489 * the configuration information for CRYP module
3490 * @param pPlainData: Pointer to the plaintext buffer
3491 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3492 * @param pCypherData: Pointer to the cyphertext buffer
3493 * @retval HAL status
3494 */
3495 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
3496 {
3497 uint32_t inputaddr;
3498 uint32_t outputaddr;
3499
3500 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
3501 {
3502 /* Process Locked */
3503 __HAL_LOCK(hcryp);
3504
3505 inputaddr = (uint32_t)pPlainData;
3506 outputaddr = (uint32_t)pCypherData;
3507
3508 /* Change the CRYP state */
3509 hcryp->State = HAL_CRYP_STATE_BUSY;
3510
3511 /* Set CRYP peripheral in TDES CBC encryption mode */
3512 CRYP_SetTDESCBCMode(hcryp, 0);
3513
3514 /* Set the input and output addresses and start DMA transfer */
3515 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
3516
3517 /* Process Unlocked */
3518 __HAL_UNLOCK(hcryp);
3519
3520 /* Return function status */
3521 return HAL_OK;
3522 }
3523 else
3524 {
3525 return HAL_ERROR;
3526 }
3527 }
3528
3529 /**
3530 * @brief Initializes the CRYP peripheral in TDES ECB decryption mode using DMA.
3531 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3532 * the configuration information for CRYP module
3533 * @param pPlainData: Pointer to the plaintext buffer
3534 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3535 * @param pCypherData: Pointer to the cyphertext buffer
3536 * @retval HAL status
3537 */
3538 HAL_StatusTypeDef HAL_CRYP_TDESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
3539 {
3540 uint32_t inputaddr;
3541 uint32_t outputaddr;
3542
3543 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
3544 {
3545 /* Process Locked */
3546 __HAL_LOCK(hcryp);
3547
3548 inputaddr = (uint32_t)pCypherData;
3549 outputaddr = (uint32_t)pPlainData;
3550
3551 /* Change the CRYP state */
3552 hcryp->State = HAL_CRYP_STATE_BUSY;
3553
3554 /* Set CRYP peripheral in TDES ECB decryption mode */
3555 CRYP_SetTDESECBMode(hcryp, CRYP_CR_ALGODIR);
3556
3557 /* Set the input and output addresses and start DMA transfer */
3558 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
3559
3560 /* Process Unlocked */
3561 __HAL_UNLOCK(hcryp);
3562
3563 /* Return function status */
3564 return HAL_OK;
3565 }
3566 else
3567 {
3568 return HAL_ERROR;
3569 }
3570 }
3571
3572 /**
3573 * @brief Initializes the CRYP peripheral in TDES CBC decryption mode using DMA.
3574 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3575 * the configuration information for CRYP module
3576 * @param pCypherData: Pointer to the cyphertext buffer
3577 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3578 * @param pPlainData: Pointer to the plaintext buffer
3579 * @retval HAL status
3580 */
3581 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
3582 {
3583 uint32_t inputaddr;
3584 uint32_t outputaddr;
3585
3586 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
3587 {
3588 /* Process Locked */
3589 __HAL_LOCK(hcryp);
3590
3591 inputaddr = (uint32_t)pCypherData;
3592 outputaddr = (uint32_t)pPlainData;
3593
3594 /* Change the CRYP state */
3595 hcryp->State = HAL_CRYP_STATE_BUSY;
3596
3597 /* Set CRYP peripheral in TDES CBC decryption mode */
3598 CRYP_SetTDESCBCMode(hcryp, CRYP_CR_ALGODIR);
3599
3600 /* Set the input and output addresses and start DMA transfer */
3601 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
3602
3603 /* Process Unlocked */
3604 __HAL_UNLOCK(hcryp);
3605
3606 /* Return function status */
3607 return HAL_OK;
3608 }
3609 else
3610 {
3611 return HAL_ERROR;
3612 }
3613 }
3614
3615 /**
3616 * @}
3617 */
3618
3619 /** @defgroup CRYP_Exported_Functions_Group5 DMA callback functions
3620 * @brief DMA callback functions.
3621 *
3622 @verbatim
3623 ==============================================================================
3624 ##### DMA callback functions #####
3625 ==============================================================================
3626 [..] This section provides DMA callback functions:
3627 (+) DMA Input data transfer complete
3628 (+) DMA Output data transfer complete
3629 (+) DMA error
3630
3631 @endverbatim
3632 * @{
3633 */
3634
3635 /**
3636 * @brief Input FIFO transfer completed callbacks.
3637 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3638 * the configuration information for CRYP module
3639 * @retval None
3640 */
3641 __weak void HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp)
3642 {
3643 /* NOTE : This function Should not be modified, when the callback is needed,
3644 the HAL_CRYP_InCpltCallback could be implemented in the user file
3645 */
3646 }
3647
3648 /**
3649 * @brief Output FIFO transfer completed callbacks.
3650 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3651 * the configuration information for CRYP module
3652 * @retval None
3653 */
3654 __weak void HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp)
3655 {
3656 /* NOTE : This function Should not be modified, when the callback is needed,
3657 the HAL_CRYP_OutCpltCallback could be implemented in the user file
3658 */
3659 }
3660
3661 /**
3662 * @brief CRYP error callbacks.
3663 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3664 * the configuration information for CRYP module
3665 * @retval None
3666 */
3667 __weak void HAL_CRYP_ErrorCallback(CRYP_HandleTypeDef *hcryp)
3668 {
3669 /* NOTE : This function Should not be modified, when the callback is needed,
3670 the HAL_CRYP_ErrorCallback could be implemented in the user file
3671 */
3672 }
3673
3674 /**
3675 * @}
3676 */
3677
3678 /** @defgroup CRYP_Exported_Functions_Group6 CRYP IRQ handler management
3679 * @brief CRYP IRQ handler.
3680 *
3681 @verbatim
3682 ==============================================================================
3683 ##### CRYP IRQ handler management #####
3684 ==============================================================================
3685 [..] This section provides CRYP IRQ handler function.
3686
3687 @endverbatim
3688 * @{
3689 */
3690
3691 /**
3692 * @brief This function handles CRYP interrupt request.
3693 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3694 * the configuration information for CRYP module
3695 * @retval None
3696 */
3697 void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp)
3698 {
3699 switch(CRYP->CR & CRYP_CR_ALGOMODE_DIRECTION)
3700 {
3701 case CRYP_CR_ALGOMODE_TDES_ECB_ENCRYPT:
3702 HAL_CRYP_TDESECB_Encrypt_IT(hcryp, NULL, 0, NULL);
3703 break;
3704
3705 case CRYP_CR_ALGOMODE_TDES_ECB_DECRYPT:
3706 HAL_CRYP_TDESECB_Decrypt_IT(hcryp, NULL, 0, NULL);
3707 break;
3708
3709 case CRYP_CR_ALGOMODE_TDES_CBC_ENCRYPT:
3710 HAL_CRYP_TDESCBC_Encrypt_IT(hcryp, NULL, 0, NULL);
3711 break;
3712
3713 case CRYP_CR_ALGOMODE_TDES_CBC_DECRYPT:
3714 HAL_CRYP_TDESCBC_Decrypt_IT(hcryp, NULL, 0, NULL);
3715 break;
3716
3717 case CRYP_CR_ALGOMODE_DES_ECB_ENCRYPT:
3718 HAL_CRYP_DESECB_Encrypt_IT(hcryp, NULL, 0, NULL);
3719 break;
3720
3721 case CRYP_CR_ALGOMODE_DES_ECB_DECRYPT:
3722 HAL_CRYP_DESECB_Decrypt_IT(hcryp, NULL, 0, NULL);
3723 break;
3724
3725 case CRYP_CR_ALGOMODE_DES_CBC_ENCRYPT:
3726 HAL_CRYP_DESCBC_Encrypt_IT(hcryp, NULL, 0, NULL);
3727 break;
3728
3729 case CRYP_CR_ALGOMODE_DES_CBC_DECRYPT:
3730 HAL_CRYP_DESCBC_Decrypt_IT(hcryp, NULL, 0, NULL);
3731 break;
3732
3733 case CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT:
3734 HAL_CRYP_AESECB_Encrypt_IT(hcryp, NULL, 0, NULL);
3735 break;
3736
3737 case CRYP_CR_ALGOMODE_AES_ECB_DECRYPT:
3738 HAL_CRYP_AESECB_Decrypt_IT(hcryp, NULL, 0, NULL);
3739 break;
3740
3741 case CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT:
3742 HAL_CRYP_AESCBC_Encrypt_IT(hcryp, NULL, 0, NULL);
3743 break;
3744
3745 case CRYP_CR_ALGOMODE_AES_CBC_DECRYPT:
3746 HAL_CRYP_AESCBC_Decrypt_IT(hcryp, NULL, 0, NULL);
3747 break;
3748
3749 case CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT:
3750 HAL_CRYP_AESCTR_Encrypt_IT(hcryp, NULL, 0, NULL);
3751 break;
3752
3753 case CRYP_CR_ALGOMODE_AES_CTR_DECRYPT:
3754 HAL_CRYP_AESCTR_Decrypt_IT(hcryp, NULL, 0, NULL);
3755 break;
3756
3757 default:
3758 break;
3759 }
3760 }
3761
3762 /**
3763 * @}
3764 */
3765
3766 /** @defgroup CRYP_Exported_Functions_Group7 Peripheral State functions
3767 * @brief Peripheral State functions.
3768 *
3769 @verbatim
3770 ==============================================================================
3771 ##### Peripheral State functions #####
3772 ==============================================================================
3773 [..]
3774 This subsection permits to get in run-time the status of the peripheral.
3775
3776 @endverbatim
3777 * @{
3778 */
3779
3780 /**
3781 * @brief Returns the CRYP state.
3782 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3783 * the configuration information for CRYP module
3784 * @retval HAL state
3785 */
3786 HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp)
3787 {
3788 return hcryp->State;
3789 }
3790
3791 /**
3792 * @}
3793 */
3794
3795
3796 /**
3797 * @}
3798 */
3799
3800 #endif /* STM32F415xx || STM32F417xx || STM32F437xx || STM32F439xx */
3801
3802 #endif /* HAL_CRYP_MODULE_ENABLED */
3803 /**
3804 * @}
3805 */
3806
3807 /**
3808 * @}
3809 */
3810
3811 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/