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comparison Common/Drivers/STM32F4xx_HAL_DRIVER_v120/Src/stm32f4xx_hal_adc.c @ 38:5f11787b4f42
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author | heinrichsweikamp |
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date | Sat, 28 Apr 2018 11:52:34 +0200 |
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1 /** | |
2 ****************************************************************************** | |
3 * @file stm32f4xx_hal_adc.c | |
4 * @author MCD Application Team | |
5 * @version V1.2.0 | |
6 * @date 26-December-2014 | |
7 * @brief This file provides firmware functions to manage the following | |
8 * functionalities of the Analog to Digital Convertor (ADC) peripheral: | |
9 * + Initialization and de-initialization functions | |
10 * + IO operation functions | |
11 * + State and errors functions | |
12 * | |
13 @verbatim | |
14 ============================================================================== | |
15 ##### ADC Peripheral features ##### | |
16 ============================================================================== | |
17 [..] | |
18 (#) 12-bit, 10-bit, 8-bit or 6-bit configurable resolution. | |
19 (#) Interrupt generation at the end of conversion, end of injected conversion, | |
20 and in case of analog watchdog or overrun events | |
21 (#) Single and continuous conversion modes. | |
22 (#) Scan mode for automatic conversion of channel 0 to channel x. | |
23 (#) Data alignment with in-built data coherency. | |
24 (#) Channel-wise programmable sampling time. | |
25 (#) External trigger option with configurable polarity for both regular and | |
26 injected conversion. | |
27 (#) Dual/Triple mode (on devices with 2 ADCs or more). | |
28 (#) Configurable DMA data storage in Dual/Triple ADC mode. | |
29 (#) Configurable delay between conversions in Dual/Triple interleaved mode. | |
30 (#) ADC conversion type (refer to the datasheets). | |
31 (#) ADC supply requirements: 2.4 V to 3.6 V at full speed and down to 1.8 V at | |
32 slower speed. | |
33 (#) ADC input range: VREF(minus) = VIN = VREF(plus). | |
34 (#) DMA request generation during regular channel conversion. | |
35 | |
36 | |
37 ##### How to use this driver ##### | |
38 ============================================================================== | |
39 [..] | |
40 (#)Initialize the ADC low level resources by implementing the HAL_ADC_MspInit(): | |
41 (##) Enable the ADC interface clock using __HAL_RCC_ADC_CLK_ENABLE() | |
42 (##) ADC pins configuration | |
43 (+++) Enable the clock for the ADC GPIOs using the following function: | |
44 __HAL_RCC_GPIOx_CLK_ENABLE() | |
45 (+++) Configure these ADC pins in analog mode using HAL_GPIO_Init() | |
46 (##) In case of using interrupts (e.g. HAL_ADC_Start_IT()) | |
47 (+++) Configure the ADC interrupt priority using HAL_NVIC_SetPriority() | |
48 (+++) Enable the ADC IRQ handler using HAL_NVIC_EnableIRQ() | |
49 (+++) In ADC IRQ handler, call HAL_ADC_IRQHandler() | |
50 (##) In case of using DMA to control data transfer (e.g. HAL_ADC_Start_DMA()) | |
51 (+++) Enable the DMAx interface clock using __HAL_RCC_DMAx_CLK_ENABLE() | |
52 (+++) Configure and enable two DMA streams stream for managing data | |
53 transfer from peripheral to memory (output stream) | |
54 (+++) Associate the initialized DMA handle to the CRYP DMA handle | |
55 using __HAL_LINKDMA() | |
56 (+++) Configure the priority and enable the NVIC for the transfer complete | |
57 interrupt on the two DMA Streams. The output stream should have higher | |
58 priority than the input stream. | |
59 | |
60 (#) Configure the ADC Prescaler, conversion resolution and data alignment | |
61 using the HAL_ADC_Init() function. | |
62 | |
63 (#) Configure the ADC regular channels group features, use HAL_ADC_Init() | |
64 and HAL_ADC_ConfigChannel() functions. | |
65 | |
66 (#) Three operation modes are available within this driver : | |
67 | |
68 *** Polling mode IO operation *** | |
69 ================================= | |
70 [..] | |
71 (+) Start the ADC peripheral using HAL_ADC_Start() | |
72 (+) Wait for end of conversion using HAL_ADC_PollForConversion(), at this stage | |
73 user can specify the value of timeout according to his end application | |
74 (+) To read the ADC converted values, use the HAL_ADC_GetValue() function. | |
75 (+) Stop the ADC peripheral using HAL_ADC_Stop() | |
76 | |
77 *** Interrupt mode IO operation *** | |
78 =================================== | |
79 [..] | |
80 (+) Start the ADC peripheral using HAL_ADC_Start_IT() | |
81 (+) Use HAL_ADC_IRQHandler() called under ADC_IRQHandler() Interrupt subroutine | |
82 (+) At ADC end of conversion HAL_ADC_ConvCpltCallback() function is executed and user can | |
83 add his own code by customization of function pointer HAL_ADC_ConvCpltCallback | |
84 (+) In case of ADC Error, HAL_ADC_ErrorCallback() function is executed and user can | |
85 add his own code by customization of function pointer HAL_ADC_ErrorCallback | |
86 (+) Stop the ADC peripheral using HAL_ADC_Stop_IT() | |
87 | |
88 *** DMA mode IO operation *** | |
89 ============================== | |
90 [..] | |
91 (+) Start the ADC peripheral using HAL_ADC_Start_DMA(), at this stage the user specify the length | |
92 of data to be transferred at each end of conversion | |
93 (+) At The end of data transfer by HAL_ADC_ConvCpltCallback() function is executed and user can | |
94 add his own code by customization of function pointer HAL_ADC_ConvCpltCallback | |
95 (+) In case of transfer Error, HAL_ADC_ErrorCallback() function is executed and user can | |
96 add his own code by customization of function pointer HAL_ADC_ErrorCallback | |
97 (+) Stop the ADC peripheral using HAL_ADC_Stop_DMA() | |
98 | |
99 *** ADC HAL driver macros list *** | |
100 ============================================= | |
101 [..] | |
102 Below the list of most used macros in ADC HAL driver. | |
103 | |
104 (+) __HAL_ADC_ENABLE : Enable the ADC peripheral | |
105 (+) __HAL_ADC_DISABLE : Disable the ADC peripheral | |
106 (+) __HAL_ADC_ENABLE_IT: Enable the ADC end of conversion interrupt | |
107 (+) __HAL_ADC_DISABLE_IT: Disable the ADC end of conversion interrupt | |
108 (+) __HAL_ADC_GET_IT_SOURCE: Check if the specified ADC interrupt source is enabled or disabled | |
109 (+) __HAL_ADC_CLEAR_FLAG: Clear the ADC's pending flags | |
110 (+) __HAL_ADC_GET_FLAG: Get the selected ADC's flag status | |
111 (+) ADC_GET_RESOLUTION: Return resolution bits in CR1 register | |
112 | |
113 [..] | |
114 (@) You can refer to the ADC HAL driver header file for more useful macros | |
115 | |
116 @endverbatim | |
117 ****************************************************************************** | |
118 * @attention | |
119 * | |
120 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> | |
121 * | |
122 * Redistribution and use in source and binary forms, with or without modification, | |
123 * are permitted provided that the following conditions are met: | |
124 * 1. Redistributions of source code must retain the above copyright notice, | |
125 * this list of conditions and the following disclaimer. | |
126 * 2. Redistributions in binary form must reproduce the above copyright notice, | |
127 * this list of conditions and the following disclaimer in the documentation | |
128 * and/or other materials provided with the distribution. | |
129 * 3. Neither the name of STMicroelectronics nor the names of its contributors | |
130 * may be used to endorse or promote products derived from this software | |
131 * without specific prior written permission. | |
132 * | |
133 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
134 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
135 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | |
136 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE | |
137 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
138 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | |
139 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | |
140 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | |
141 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
142 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
143 * | |
144 ****************************************************************************** | |
145 */ | |
146 | |
147 /* Includes ------------------------------------------------------------------*/ | |
148 #include "stm32f4xx_hal.h" | |
149 | |
150 /** @addtogroup STM32F4xx_HAL_Driver | |
151 * @{ | |
152 */ | |
153 | |
154 /** @defgroup ADC ADC | |
155 * @brief ADC driver modules | |
156 * @{ | |
157 */ | |
158 | |
159 #ifdef HAL_ADC_MODULE_ENABLED | |
160 | |
161 /* Private typedef -----------------------------------------------------------*/ | |
162 /* Private define ------------------------------------------------------------*/ | |
163 /* Private macro -------------------------------------------------------------*/ | |
164 /* Private variables ---------------------------------------------------------*/ | |
165 /** @addtogroup ADC_Private_Functions | |
166 * @{ | |
167 */ | |
168 /* Private function prototypes -----------------------------------------------*/ | |
169 static void ADC_Init(ADC_HandleTypeDef* hadc); | |
170 static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma); | |
171 static void ADC_DMAError(DMA_HandleTypeDef *hdma); | |
172 static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma); | |
173 /** | |
174 * @} | |
175 */ | |
176 /* Exported functions --------------------------------------------------------*/ | |
177 /** @defgroup ADC_Exported_Functions ADC Exported Functions | |
178 * @{ | |
179 */ | |
180 | |
181 /** @defgroup ADC_Exported_Functions_Group1 Initialization and de-initialization functions | |
182 * @brief Initialization and Configuration functions | |
183 * | |
184 @verbatim | |
185 =============================================================================== | |
186 ##### Initialization and de-initialization functions ##### | |
187 =============================================================================== | |
188 [..] This section provides functions allowing to: | |
189 (+) Initialize and configure the ADC. | |
190 (+) De-initialize the ADC. | |
191 | |
192 @endverbatim | |
193 * @{ | |
194 */ | |
195 | |
196 /** | |
197 * @brief Initializes the ADCx peripheral according to the specified parameters | |
198 * in the ADC_InitStruct and initializes the ADC MSP. | |
199 * | |
200 * @note This function is used to configure the global features of the ADC ( | |
201 * ClockPrescaler, Resolution, Data Alignment and number of conversion), however, | |
202 * the rest of the configuration parameters are specific to the regular | |
203 * channels group (scan mode activation, continuous mode activation, | |
204 * External trigger source and edge, DMA continuous request after the | |
205 * last transfer and End of conversion selection). | |
206 * | |
207 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains | |
208 * the configuration information for the specified ADC. | |
209 * @retval HAL status | |
210 */ | |
211 HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) | |
212 { | |
213 /* Check ADC handle */ | |
214 if(hadc == NULL) | |
215 { | |
216 return HAL_ERROR; | |
217 } | |
218 | |
219 /* Check the parameters */ | |
220 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); | |
221 assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler)); | |
222 assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution)); | |
223 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ScanConvMode)); | |
224 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); | |
225 assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); | |
226 assert_param(IS_ADC_EXT_TRIG(hadc->Init.ExternalTrigConv)); | |
227 assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign)); | |
228 assert_param(IS_ADC_REGULAR_LENGTH(hadc->Init.NbrOfConversion)); | |
229 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests)); | |
230 assert_param(IS_ADC_EOCSelection(hadc->Init.EOCSelection)); | |
231 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode)); | |
232 | |
233 if(hadc->State == HAL_ADC_STATE_RESET) | |
234 { | |
235 /* Init the low level hardware */ | |
236 HAL_ADC_MspInit(hadc); | |
237 } | |
238 | |
239 /* Initialize the ADC state */ | |
240 hadc->State = HAL_ADC_STATE_BUSY; | |
241 | |
242 /* Set ADC parameters */ | |
243 ADC_Init(hadc); | |
244 | |
245 /* Set ADC error code to none */ | |
246 hadc->ErrorCode = HAL_ADC_ERROR_NONE; | |
247 | |
248 /* Initialize the ADC state */ | |
249 hadc->State = HAL_ADC_STATE_READY; | |
250 | |
251 /* Release Lock */ | |
252 __HAL_UNLOCK(hadc); | |
253 | |
254 /* Return function status */ | |
255 return HAL_OK; | |
256 } | |
257 | |
258 /** | |
259 * @brief Deinitializes the ADCx peripheral registers to their default reset values. | |
260 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains | |
261 * the configuration information for the specified ADC. | |
262 * @retval HAL status | |
263 */ | |
264 HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc) | |
265 { | |
266 /* Check ADC handle */ | |
267 if(hadc == NULL) | |
268 { | |
269 return HAL_ERROR; | |
270 } | |
271 | |
272 /* Check the parameters */ | |
273 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); | |
274 | |
275 /* Change ADC state */ | |
276 hadc->State = HAL_ADC_STATE_BUSY; | |
277 | |
278 /* DeInit the low level hardware */ | |
279 HAL_ADC_MspDeInit(hadc); | |
280 | |
281 /* Set ADC error code to none */ | |
282 hadc->ErrorCode = HAL_ADC_ERROR_NONE; | |
283 | |
284 /* Change ADC state */ | |
285 hadc->State = HAL_ADC_STATE_RESET; | |
286 | |
287 /* Return function status */ | |
288 return HAL_OK; | |
289 } | |
290 | |
291 /** | |
292 * @brief Initializes the ADC MSP. | |
293 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains | |
294 * the configuration information for the specified ADC. | |
295 * @retval None | |
296 */ | |
297 __weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) | |
298 { | |
299 /* NOTE : This function Should not be modified, when the callback is needed, | |
300 the HAL_ADC_MspInit could be implemented in the user file | |
301 */ | |
302 } | |
303 | |
304 /** | |
305 * @brief DeInitializes the ADC MSP. | |
306 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains | |
307 * the configuration information for the specified ADC. | |
308 * @retval None | |
309 */ | |
310 __weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) | |
311 { | |
312 /* NOTE : This function Should not be modified, when the callback is needed, | |
313 the HAL_ADC_MspDeInit could be implemented in the user file | |
314 */ | |
315 } | |
316 | |
317 /** | |
318 * @} | |
319 */ | |
320 | |
321 /** @defgroup ADC_Exported_Functions_Group2 IO operation functions | |
322 * @brief IO operation functions | |
323 * | |
324 @verbatim | |
325 =============================================================================== | |
326 ##### IO operation functions ##### | |
327 =============================================================================== | |
328 [..] This section provides functions allowing to: | |
329 (+) Start conversion of regular channel. | |
330 (+) Stop conversion of regular channel. | |
331 (+) Start conversion of regular channel and enable interrupt. | |
332 (+) Stop conversion of regular channel and disable interrupt. | |
333 (+) Start conversion of regular channel and enable DMA transfer. | |
334 (+) Stop conversion of regular channel and disable DMA transfer. | |
335 (+) Handle ADC interrupt request. | |
336 | |
337 @endverbatim | |
338 * @{ | |
339 */ | |
340 | |
341 /** | |
342 * @brief Enables ADC and starts conversion of the regular channels. | |
343 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains | |
344 * the configuration information for the specified ADC. | |
345 * @retval HAL status | |
346 */ | |
347 HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc) | |
348 { | |
349 uint16_t i = 0; | |
350 | |
351 /* Check the parameters */ | |
352 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); | |
353 assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); | |
354 | |
355 /* Process locked */ | |
356 __HAL_LOCK(hadc); | |
357 | |
358 /* Check if an injected conversion is ongoing */ | |
359 if(hadc->State == HAL_ADC_STATE_BUSY_INJ) | |
360 { | |
361 /* Change ADC state */ | |
362 hadc->State = HAL_ADC_STATE_BUSY_INJ_REG; | |
363 } | |
364 else | |
365 { | |
366 /* Change ADC state */ | |
367 hadc->State = HAL_ADC_STATE_BUSY_REG; | |
368 } | |
369 | |
370 /* Check if ADC peripheral is disabled in order to enable it and wait during | |
371 Tstab time the ADC's stabilization */ | |
372 if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON) | |
373 { | |
374 /* Enable the Peripheral */ | |
375 __HAL_ADC_ENABLE(hadc); | |
376 | |
377 /* Delay inserted to wait during Tstab time the ADC's stabilization */ | |
378 for(; i <= 540; i++) | |
379 { | |
380 __NOP(); | |
381 } | |
382 } | |
383 | |
384 /* Check if Multimode enabled */ | |
385 if(HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI)) | |
386 { | |
387 /* if no external trigger present enable software conversion of regular channels */ | |
388 if(hadc->Init.ExternalTrigConvEdge == ADC_EXTERNALTRIGCONVEDGE_NONE) | |
389 { | |
390 /* Enable the selected ADC software conversion for regular group */ | |
391 hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART; | |
392 } | |
393 } | |
394 else | |
395 { | |
396 /* if instance of handle correspond to ADC1 and no external trigger present enable software conversion of regular channels */ | |
397 if((hadc->Instance == ADC1) && (hadc->Init.ExternalTrigConvEdge == ADC_EXTERNALTRIGCONVEDGE_NONE)) | |
398 { | |
399 /* Enable the selected ADC software conversion for regular group */ | |
400 hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART; | |
401 } | |
402 } | |
403 | |
404 /* Process unlocked */ | |
405 __HAL_UNLOCK(hadc); | |
406 | |
407 /* Return function status */ | |
408 return HAL_OK; | |
409 } | |
410 | |
411 /** | |
412 * @brief Disables ADC and stop conversion of regular channels. | |
413 * | |
414 * @note Caution: This function will stop also injected channels. | |
415 * | |
416 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains | |
417 * the configuration information for the specified ADC. | |
418 * | |
419 * @retval HAL status. | |
420 */ | |
421 HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc) | |
422 { | |
423 /* Disable the Peripheral */ | |
424 __HAL_ADC_DISABLE(hadc); | |
425 | |
426 /* Change ADC state */ | |
427 hadc->State = HAL_ADC_STATE_READY; | |
428 | |
429 /* Return function status */ | |
430 return HAL_OK; | |
431 } | |
432 | |
433 /** | |
434 * @brief Poll for regular conversion complete | |
435 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains | |
436 * the configuration information for the specified ADC. | |
437 * @param Timeout: Timeout value in millisecond. | |
438 * @retval HAL status | |
439 */ | |
440 HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout) | |
441 { | |
442 uint32_t tickstart = 0; | |
443 | |
444 /* Get tick */ | |
445 tickstart = HAL_GetTick(); | |
446 | |
447 /* Check End of conversion flag */ | |
448 while(!(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC))) | |
449 { | |
450 /* Check for the Timeout */ | |
451 if(Timeout != HAL_MAX_DELAY) | |
452 { | |
453 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) | |
454 { | |
455 hadc->State= HAL_ADC_STATE_TIMEOUT; | |
456 /* Process unlocked */ | |
457 __HAL_UNLOCK(hadc); | |
458 return HAL_TIMEOUT; | |
459 } | |
460 } | |
461 } | |
462 | |
463 /* Check if an injected conversion is ready */ | |
464 if(hadc->State == HAL_ADC_STATE_EOC_INJ) | |
465 { | |
466 /* Change ADC state */ | |
467 hadc->State = HAL_ADC_STATE_EOC_INJ_REG; | |
468 } | |
469 else | |
470 { | |
471 /* Change ADC state */ | |
472 hadc->State = HAL_ADC_STATE_EOC_REG; | |
473 } | |
474 | |
475 /* Return ADC state */ | |
476 return HAL_OK; | |
477 } | |
478 | |
479 /** | |
480 * @brief Poll for conversion event | |
481 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains | |
482 * the configuration information for the specified ADC. | |
483 * @param EventType: the ADC event type. | |
484 * This parameter can be one of the following values: | |
485 * @arg ADC_AWD_EVENT: ADC Analog watch Dog event. | |
486 * @arg ADC_OVR_EVENT: ADC Overrun event. | |
487 * @param Timeout: Timeout value in millisecond. | |
488 * @retval HAL status | |
489 */ | |
490 HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout) | |
491 { | |
492 uint32_t tickstart = 0; | |
493 | |
494 /* Check the parameters */ | |
495 assert_param(IS_ADC_EVENT_TYPE(EventType)); | |
496 | |
497 /* Get tick */ | |
498 tickstart = HAL_GetTick(); | |
499 | |
500 /* Check selected event flag */ | |
501 while(!(__HAL_ADC_GET_FLAG(hadc,EventType))) | |
502 { | |
503 /* Check for the Timeout */ | |
504 if(Timeout != HAL_MAX_DELAY) | |
505 { | |
506 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) | |
507 { | |
508 hadc->State= HAL_ADC_STATE_TIMEOUT; | |
509 /* Process unlocked */ | |
510 __HAL_UNLOCK(hadc); | |
511 return HAL_TIMEOUT; | |
512 } | |
513 } | |
514 } | |
515 | |
516 /* Check analog watchdog flag */ | |
517 if(EventType == ADC_AWD_EVENT) | |
518 { | |
519 /* Change ADC state */ | |
520 hadc->State = HAL_ADC_STATE_AWD; | |
521 | |
522 /* Clear the ADCx's analog watchdog flag */ | |
523 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD); | |
524 } | |
525 else | |
526 { | |
527 /* Change ADC state */ | |
528 hadc->State = HAL_ADC_STATE_ERROR; | |
529 | |
530 /* Clear the ADCx's Overrun flag */ | |
531 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); | |
532 } | |
533 | |
534 /* Return ADC state */ | |
535 return HAL_OK; | |
536 } | |
537 | |
538 | |
539 /** | |
540 * @brief Enables the interrupt and starts ADC conversion of regular channels. | |
541 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains | |
542 * the configuration information for the specified ADC. | |
543 * @retval HAL status. | |
544 */ | |
545 HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc) | |
546 { | |
547 uint16_t i = 0; | |
548 | |
549 /* Check the parameters */ | |
550 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); | |
551 assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); | |
552 | |
553 /* Process locked */ | |
554 __HAL_LOCK(hadc); | |
555 | |
556 /* Check if an injected conversion is ongoing */ | |
557 if(hadc->State == HAL_ADC_STATE_BUSY_INJ) | |
558 { | |
559 /* Change ADC state */ | |
560 hadc->State = HAL_ADC_STATE_BUSY_INJ_REG; | |
561 } | |
562 else | |
563 { | |
564 /* Change ADC state */ | |
565 hadc->State = HAL_ADC_STATE_BUSY_REG; | |
566 } | |
567 | |
568 /* Set ADC error code to none */ | |
569 hadc->ErrorCode = HAL_ADC_ERROR_NONE; | |
570 | |
571 /* Check if ADC peripheral is disabled in order to enable it and wait during | |
572 Tstab time the ADC's stabilization */ | |
573 if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON) | |
574 { | |
575 /* Enable the Peripheral */ | |
576 __HAL_ADC_ENABLE(hadc); | |
577 | |
578 /* Delay inserted to wait during Tstab time the ADC's stabilization */ | |
579 for(; i <= 540; i++) | |
580 { | |
581 __NOP(); | |
582 } | |
583 } | |
584 | |
585 /* Enable the ADC overrun interrupt */ | |
586 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR); | |
587 | |
588 /* Enable the ADC end of conversion interrupt for regular group */ | |
589 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_EOC); | |
590 | |
591 /* Check if Multimode enabled */ | |
592 if(HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI)) | |
593 { | |
594 /* if no external trigger present enable software conversion of regular channels */ | |
595 if (hadc->Init.ExternalTrigConvEdge == ADC_EXTERNALTRIGCONVEDGE_NONE) | |
596 { | |
597 /* Enable the selected ADC software conversion for regular group */ | |
598 hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART; | |
599 } | |
600 } | |
601 else | |
602 { | |
603 /* if instance of handle correspond to ADC1 and no external trigger present enable software conversion of regular channels */ | |
604 if ((hadc->Instance == (ADC_TypeDef*)0x40012000) && (hadc->Init.ExternalTrigConvEdge == ADC_EXTERNALTRIGCONVEDGE_NONE)) | |
605 { | |
606 /* Enable the selected ADC software conversion for regular group */ | |
607 hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART; | |
608 } | |
609 } | |
610 | |
611 /* Process unlocked */ | |
612 __HAL_UNLOCK(hadc); | |
613 | |
614 /* Return function status */ | |
615 return HAL_OK; | |
616 } | |
617 | |
618 /** | |
619 * @brief Disables the interrupt and stop ADC conversion of regular channels. | |
620 * | |
621 * @note Caution: This function will stop also injected channels. | |
622 * | |
623 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains | |
624 * the configuration information for the specified ADC. | |
625 * @retval HAL status. | |
626 */ | |
627 HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc) | |
628 { | |
629 /* Disable the ADC end of conversion interrupt for regular group */ | |
630 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC); | |
631 | |
632 /* Disable the ADC end of conversion interrupt for injected group */ | |
633 __HAL_ADC_DISABLE_IT(hadc, ADC_CR1_JEOCIE); | |
634 | |
635 /* Enable the Peripheral */ | |
636 __HAL_ADC_DISABLE(hadc); | |
637 | |
638 /* Change ADC state */ | |
639 hadc->State = HAL_ADC_STATE_READY; | |
640 | |
641 /* Return function status */ | |
642 return HAL_OK; | |
643 } | |
644 | |
645 /** | |
646 * @brief Handles ADC interrupt request | |
647 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains | |
648 * the configuration information for the specified ADC. | |
649 * @retval None | |
650 */ | |
651 void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc) | |
652 { | |
653 uint32_t tmp1 = 0, tmp2 = 0; | |
654 | |
655 /* Check the parameters */ | |
656 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); | |
657 assert_param(IS_ADC_REGULAR_LENGTH(hadc->Init.NbrOfConversion)); | |
658 assert_param(IS_ADC_EOCSelection(hadc->Init.EOCSelection)); | |
659 | |
660 tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC); | |
661 tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC); | |
662 /* Check End of conversion flag for regular channels */ | |
663 if(tmp1 && tmp2) | |
664 { | |
665 /* Check if an injected conversion is ready */ | |
666 if(hadc->State == HAL_ADC_STATE_EOC_INJ) | |
667 { | |
668 /* Change ADC state */ | |
669 hadc->State = HAL_ADC_STATE_EOC_INJ_REG; | |
670 } | |
671 else | |
672 { | |
673 /* Change ADC state */ | |
674 hadc->State = HAL_ADC_STATE_EOC_REG; | |
675 } | |
676 | |
677 if((hadc->Init.ContinuousConvMode == DISABLE) && (hadc->Init.ExternalTrigConvEdge == ADC_EXTERNALTRIGCONVEDGE_NONE)) | |
678 { | |
679 if(hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV) | |
680 { | |
681 /* DISABLE the ADC end of conversion interrupt for regular group */ | |
682 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC); | |
683 | |
684 /* DISABLE the ADC overrun interrupt */ | |
685 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR); | |
686 } | |
687 else | |
688 { | |
689 if (hadc->NbrOfCurrentConversionRank == 0) | |
690 { | |
691 hadc->NbrOfCurrentConversionRank = hadc->Init.NbrOfConversion; | |
692 } | |
693 | |
694 /* Decrement the number of conversion when an interrupt occurs */ | |
695 hadc->NbrOfCurrentConversionRank--; | |
696 | |
697 /* Check if all conversions are finished */ | |
698 if(hadc->NbrOfCurrentConversionRank == 0) | |
699 { | |
700 /* DISABLE the ADC end of conversion interrupt for regular group */ | |
701 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC); | |
702 | |
703 /* DISABLE the ADC overrun interrupt */ | |
704 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR); | |
705 } | |
706 } | |
707 } | |
708 | |
709 /* Conversion complete callback */ | |
710 HAL_ADC_ConvCpltCallback(hadc); | |
711 | |
712 /* Clear the ADCx flag for regular end of conversion */ | |
713 __HAL_ADC_CLEAR_FLAG(hadc,ADC_FLAG_EOC); | |
714 } | |
715 | |
716 tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOC); | |
717 tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_JEOC); | |
718 /* Check End of conversion flag for injected channels */ | |
719 if(tmp1 && tmp2) | |
720 { | |
721 /* Check if a regular conversion is ready */ | |
722 if(hadc->State == HAL_ADC_STATE_EOC_REG) | |
723 { | |
724 /* Change ADC state */ | |
725 hadc->State = HAL_ADC_STATE_EOC_INJ_REG; | |
726 } | |
727 else | |
728 { | |
729 /* Change ADC state */ | |
730 hadc->State = HAL_ADC_STATE_EOC_INJ; | |
731 } | |
732 | |
733 tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO); | |
734 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN); | |
735 if(((hadc->Init.ContinuousConvMode == DISABLE) || tmp1) && tmp2) | |
736 { | |
737 /* DISABLE the ADC end of conversion interrupt for injected group */ | |
738 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC); | |
739 } | |
740 | |
741 /* Conversion complete callback */ | |
742 HAL_ADCEx_InjectedConvCpltCallback(hadc); | |
743 | |
744 /* Clear the ADCx flag for injected end of conversion */ | |
745 __HAL_ADC_CLEAR_FLAG(hadc,ADC_FLAG_JEOC); | |
746 } | |
747 | |
748 tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD); | |
749 tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD); | |
750 /* Check Analog watchdog flag */ | |
751 if(tmp1 && tmp2) | |
752 { | |
753 /* Change ADC state */ | |
754 hadc->State = HAL_ADC_STATE_AWD; | |
755 | |
756 /* Clear the ADCx's Analog watchdog flag */ | |
757 __HAL_ADC_CLEAR_FLAG(hadc,ADC_FLAG_AWD); | |
758 | |
759 /* Level out of window callback */ | |
760 HAL_ADC_LevelOutOfWindowCallback(hadc); | |
761 } | |
762 | |
763 tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_OVR); | |
764 tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_OVR); | |
765 /* Check Overrun flag */ | |
766 if(tmp1 && tmp2) | |
767 { | |
768 /* Change ADC state to overrun state */ | |
769 hadc->State = HAL_ADC_STATE_ERROR; | |
770 | |
771 /* Set ADC error code to overrun */ | |
772 hadc->ErrorCode |= HAL_ADC_ERROR_OVR; | |
773 | |
774 /* Clear the Overrun flag */ | |
775 __HAL_ADC_CLEAR_FLAG(hadc,ADC_FLAG_OVR); | |
776 | |
777 /* Error callback */ | |
778 HAL_ADC_ErrorCallback(hadc); | |
779 } | |
780 } | |
781 | |
782 /** | |
783 * @brief Enables ADC DMA request after last transfer (Single-ADC mode) and enables ADC peripheral | |
784 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains | |
785 * the configuration information for the specified ADC. | |
786 * @param pData: The destination Buffer address. | |
787 * @param Length: The length of data to be transferred from ADC peripheral to memory. | |
788 * @retval HAL status | |
789 */ | |
790 HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length) | |
791 { | |
792 uint16_t i = 0; | |
793 | |
794 /* Check the parameters */ | |
795 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); | |
796 assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); | |
797 | |
798 /* Process locked */ | |
799 __HAL_LOCK(hadc); | |
800 | |
801 /* Enable ADC overrun interrupt */ | |
802 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR); | |
803 | |
804 /* Enable ADC DMA mode */ | |
805 hadc->Instance->CR2 |= ADC_CR2_DMA; | |
806 | |
807 /* Set the DMA transfer complete callback */ | |
808 hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt; | |
809 | |
810 /* Set the DMA half transfer complete callback */ | |
811 hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt; | |
812 | |
813 /* Set the DMA error callback */ | |
814 hadc->DMA_Handle->XferErrorCallback = ADC_DMAError ; | |
815 | |
816 /* Enable the DMA Stream */ | |
817 HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length); | |
818 | |
819 /* Change ADC state */ | |
820 hadc->State = HAL_ADC_STATE_BUSY_REG; | |
821 | |
822 /* Check if ADC peripheral is disabled in order to enable it and wait during | |
823 Tstab time the ADC's stabilization */ | |
824 if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON) | |
825 { | |
826 /* Enable the Peripheral */ | |
827 __HAL_ADC_ENABLE(hadc); | |
828 | |
829 /* Delay inserted to wait during Tstab time the ADC's stabilization */ | |
830 for(; i <= 540; i++) | |
831 { | |
832 __NOP(); | |
833 } | |
834 } | |
835 | |
836 /* if no external trigger present enable software conversion of regular channels */ | |
837 if (hadc->Init.ExternalTrigConvEdge == ADC_EXTERNALTRIGCONVEDGE_NONE) | |
838 { | |
839 /* Enable the selected ADC software conversion for regular group */ | |
840 hadc->Instance->CR2 |= ADC_CR2_SWSTART; | |
841 } | |
842 | |
843 /* Process unlocked */ | |
844 __HAL_UNLOCK(hadc); | |
845 | |
846 /* Return function status */ | |
847 return HAL_OK; | |
848 } | |
849 | |
850 /** | |
851 * @brief Disables ADC DMA (Single-ADC mode) and disables ADC peripheral | |
852 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains | |
853 * the configuration information for the specified ADC. | |
854 * @retval HAL status | |
855 */ | |
856 HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc) | |
857 { | |
858 /* Disable the Peripheral */ | |
859 __HAL_ADC_DISABLE(hadc); | |
860 | |
861 /* Disable ADC overrun interrupt */ | |
862 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR); | |
863 | |
864 /* Disable the selected ADC DMA mode */ | |
865 hadc->Instance->CR2 &= ~ADC_CR2_DMA; | |
866 | |
867 /* Disable the ADC DMA Stream */ | |
868 HAL_DMA_Abort(hadc->DMA_Handle); | |
869 | |
870 /* Change ADC state */ | |
871 hadc->State = HAL_ADC_STATE_READY; | |
872 | |
873 /* Return function status */ | |
874 return HAL_OK; | |
875 } | |
876 | |
877 /** | |
878 * @brief Gets the converted value from data register of regular channel. | |
879 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains | |
880 * the configuration information for the specified ADC. | |
881 * @retval Converted value | |
882 */ | |
883 uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc) | |
884 { | |
885 /* Return the selected ADC converted value */ | |
886 return hadc->Instance->DR; | |
887 } | |
888 | |
889 /** | |
890 * @brief Regular conversion complete callback in non blocking mode | |
891 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains | |
892 * the configuration information for the specified ADC. | |
893 * @retval None | |
894 */ | |
895 __weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) | |
896 { | |
897 /* NOTE : This function Should not be modified, when the callback is needed, | |
898 the HAL_ADC_ConvCpltCallback could be implemented in the user file | |
899 */ | |
900 } | |
901 | |
902 /** | |
903 * @brief Regular conversion half DMA transfer callback in non blocking mode | |
904 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains | |
905 * the configuration information for the specified ADC. | |
906 * @retval None | |
907 */ | |
908 __weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc) | |
909 { | |
910 /* NOTE : This function Should not be modified, when the callback is needed, | |
911 the HAL_ADC_ConvHalfCpltCallback could be implemented in the user file | |
912 */ | |
913 } | |
914 | |
915 /** | |
916 * @brief Analog watchdog callback in non blocking mode | |
917 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains | |
918 * the configuration information for the specified ADC. | |
919 * @retval None | |
920 */ | |
921 __weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc) | |
922 { | |
923 /* NOTE : This function Should not be modified, when the callback is needed, | |
924 the HAL_ADC_LevelOoutOfWindowCallback could be implemented in the user file | |
925 */ | |
926 } | |
927 | |
928 /** | |
929 * @brief Error ADC callback. | |
930 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains | |
931 * the configuration information for the specified ADC. | |
932 * @retval None | |
933 */ | |
934 __weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc) | |
935 { | |
936 /* NOTE : This function Should not be modified, when the callback is needed, | |
937 the HAL_ADC_ErrorCallback could be implemented in the user file | |
938 */ | |
939 } | |
940 | |
941 /** | |
942 * @} | |
943 */ | |
944 | |
945 /** @defgroup ADC_Exported_Functions_Group3 Peripheral Control functions | |
946 * @brief Peripheral Control functions | |
947 * | |
948 @verbatim | |
949 =============================================================================== | |
950 ##### Peripheral Control functions ##### | |
951 =============================================================================== | |
952 [..] This section provides functions allowing to: | |
953 (+) Configure regular channels. | |
954 (+) Configure injected channels. | |
955 (+) Configure multimode. | |
956 (+) Configure the analog watch dog. | |
957 | |
958 @endverbatim | |
959 * @{ | |
960 */ | |
961 | |
962 /** | |
963 * @brief Configures for the selected ADC regular channel its corresponding | |
964 * rank in the sequencer and its sample time. | |
965 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains | |
966 * the configuration information for the specified ADC. | |
967 * @param sConfig: ADC configuration structure. | |
968 * @retval HAL status | |
969 */ | |
970 HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) | |
971 { | |
972 /* Check the parameters */ | |
973 assert_param(IS_ADC_CHANNEL(sConfig->Channel)); | |
974 assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank)); | |
975 assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime)); | |
976 | |
977 /* Process locked */ | |
978 __HAL_LOCK(hadc); | |
979 | |
980 /* if ADC_Channel_10 ... ADC_Channel_18 is selected */ | |
981 if (sConfig->Channel > ADC_CHANNEL_9) | |
982 { | |
983 /* Clear the old sample time */ | |
984 hadc->Instance->SMPR1 &= ~ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel); | |
985 | |
986 /* Set the new sample time */ | |
987 hadc->Instance->SMPR1 |= ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel); | |
988 } | |
989 else /* ADC_Channel include in ADC_Channel_[0..9] */ | |
990 { | |
991 /* Clear the old sample time */ | |
992 hadc->Instance->SMPR2 &= ~ADC_SMPR2(ADC_SMPR2_SMP0, sConfig->Channel); | |
993 | |
994 /* Set the new sample time */ | |
995 hadc->Instance->SMPR2 |= ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel); | |
996 } | |
997 | |
998 /* For Rank 1 to 6 */ | |
999 if (sConfig->Rank < 7) | |
1000 { | |
1001 /* Clear the old SQx bits for the selected rank */ | |
1002 hadc->Instance->SQR3 &= ~ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank); | |
1003 | |
1004 /* Set the SQx bits for the selected rank */ | |
1005 hadc->Instance->SQR3 |= ADC_SQR3_RK(sConfig->Channel, sConfig->Rank); | |
1006 } | |
1007 /* For Rank 7 to 12 */ | |
1008 else if (sConfig->Rank < 13) | |
1009 { | |
1010 /* Clear the old SQx bits for the selected rank */ | |
1011 hadc->Instance->SQR2 &= ~ADC_SQR2_RK(ADC_SQR2_SQ7, sConfig->Rank); | |
1012 | |
1013 /* Set the SQx bits for the selected rank */ | |
1014 hadc->Instance->SQR2 |= ADC_SQR2_RK(sConfig->Channel, sConfig->Rank); | |
1015 } | |
1016 /* For Rank 13 to 16 */ | |
1017 else | |
1018 { | |
1019 /* Clear the old SQx bits for the selected rank */ | |
1020 hadc->Instance->SQR1 &= ~ADC_SQR1_RK(ADC_SQR1_SQ13, sConfig->Rank); | |
1021 | |
1022 /* Set the SQx bits for the selected rank */ | |
1023 hadc->Instance->SQR1 |= ADC_SQR1_RK(sConfig->Channel, sConfig->Rank); | |
1024 } | |
1025 | |
1026 /* if ADC1 Channel_18 is selected enable VBAT Channel */ | |
1027 if ((hadc->Instance == ADC1) && (sConfig->Channel == ADC_CHANNEL_VBAT)) | |
1028 { | |
1029 /* Enable the VBAT channel*/ | |
1030 ADC->CCR |= ADC_CCR_VBATE; | |
1031 } | |
1032 | |
1033 /* if ADC1 Channel_16 or Channel_17 is selected enable TSVREFE Channel(Temperature sensor and VREFINT) */ | |
1034 if ((hadc->Instance == ADC1) && ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || (sConfig->Channel == ADC_CHANNEL_VREFINT))) | |
1035 { | |
1036 /* Enable the TSVREFE channel*/ | |
1037 ADC->CCR |= ADC_CCR_TSVREFE; | |
1038 } | |
1039 | |
1040 /* Process unlocked */ | |
1041 __HAL_UNLOCK(hadc); | |
1042 | |
1043 /* Return function status */ | |
1044 return HAL_OK; | |
1045 } | |
1046 | |
1047 /** | |
1048 * @brief Configures the analog watchdog. | |
1049 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains | |
1050 * the configuration information for the specified ADC. | |
1051 * @param AnalogWDGConfig : pointer to an ADC_AnalogWDGConfTypeDef structure | |
1052 * that contains the configuration information of ADC analog watchdog. | |
1053 * @retval HAL status | |
1054 */ | |
1055 HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig) | |
1056 { | |
1057 #ifdef USE_FULL_ASSERT | |
1058 uint32_t tmp = 0; | |
1059 #endif /* USE_FULL_ASSERT */ | |
1060 | |
1061 /* Check the parameters */ | |
1062 assert_param(IS_ADC_ANALOG_WATCHDOG(AnalogWDGConfig->WatchdogMode)); | |
1063 assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel)); | |
1064 assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode)); | |
1065 | |
1066 #ifdef USE_FULL_ASSERT | |
1067 tmp = ADC_GET_RESOLUTION(hadc); | |
1068 assert_param(IS_ADC_RANGE(tmp, AnalogWDGConfig->HighThreshold)); | |
1069 assert_param(IS_ADC_RANGE(tmp, AnalogWDGConfig->LowThreshold)); | |
1070 #endif /* USE_FULL_ASSERT */ | |
1071 | |
1072 /* Process locked */ | |
1073 __HAL_LOCK(hadc); | |
1074 | |
1075 if(AnalogWDGConfig->ITMode == ENABLE) | |
1076 { | |
1077 /* Enable the ADC Analog watchdog interrupt */ | |
1078 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD); | |
1079 } | |
1080 else | |
1081 { | |
1082 /* Disable the ADC Analog watchdog interrupt */ | |
1083 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD); | |
1084 } | |
1085 | |
1086 /* Clear AWDEN, JAWDEN and AWDSGL bits */ | |
1087 hadc->Instance->CR1 &= ~(ADC_CR1_AWDSGL | ADC_CR1_JAWDEN | ADC_CR1_AWDEN); | |
1088 | |
1089 /* Set the analog watchdog enable mode */ | |
1090 hadc->Instance->CR1 |= AnalogWDGConfig->WatchdogMode; | |
1091 | |
1092 /* Set the high threshold */ | |
1093 hadc->Instance->HTR = AnalogWDGConfig->HighThreshold; | |
1094 | |
1095 /* Set the low threshold */ | |
1096 hadc->Instance->LTR = AnalogWDGConfig->LowThreshold; | |
1097 | |
1098 /* Clear the Analog watchdog channel select bits */ | |
1099 hadc->Instance->CR1 &= ~ADC_CR1_AWDCH; | |
1100 | |
1101 /* Set the Analog watchdog channel */ | |
1102 hadc->Instance->CR1 |= (uint32_t)((uint16_t)(AnalogWDGConfig->Channel)); | |
1103 | |
1104 /* Process unlocked */ | |
1105 __HAL_UNLOCK(hadc); | |
1106 | |
1107 /* Return function status */ | |
1108 return HAL_OK; | |
1109 } | |
1110 | |
1111 /** | |
1112 * @} | |
1113 */ | |
1114 | |
1115 /** @defgroup ADC_Exported_Functions_Group4 ADC Peripheral State functions | |
1116 * @brief ADC Peripheral State functions | |
1117 * | |
1118 @verbatim | |
1119 =============================================================================== | |
1120 ##### Peripheral State and errors functions ##### | |
1121 =============================================================================== | |
1122 [..] | |
1123 This subsection provides functions allowing to | |
1124 (+) Check the ADC state | |
1125 (+) Check the ADC Error | |
1126 | |
1127 @endverbatim | |
1128 * @{ | |
1129 */ | |
1130 | |
1131 /** | |
1132 * @brief return the ADC state | |
1133 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains | |
1134 * the configuration information for the specified ADC. | |
1135 * @retval HAL state | |
1136 */ | |
1137 HAL_ADC_StateTypeDef HAL_ADC_GetState(ADC_HandleTypeDef* hadc) | |
1138 { | |
1139 /* Return ADC state */ | |
1140 return hadc->State; | |
1141 } | |
1142 | |
1143 /** | |
1144 * @brief Return the ADC error code | |
1145 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains | |
1146 * the configuration information for the specified ADC. | |
1147 * @retval ADC Error Code | |
1148 */ | |
1149 uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc) | |
1150 { | |
1151 return hadc->ErrorCode; | |
1152 } | |
1153 | |
1154 /** | |
1155 * @} | |
1156 */ | |
1157 | |
1158 /** | |
1159 * @brief Initializes the ADCx peripheral according to the specified parameters | |
1160 * in the ADC_InitStruct without initializing the ADC MSP. | |
1161 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains | |
1162 * the configuration information for the specified ADC. | |
1163 * @retval None | |
1164 */ | |
1165 static void ADC_Init(ADC_HandleTypeDef* hadc) | |
1166 { | |
1167 | |
1168 /* Set ADC parameters */ | |
1169 /* Set the ADC clock prescaler */ | |
1170 ADC->CCR &= ~(ADC_CCR_ADCPRE); | |
1171 ADC->CCR |= hadc->Init.ClockPrescaler; | |
1172 | |
1173 /* Set ADC scan mode */ | |
1174 hadc->Instance->CR1 &= ~(ADC_CR1_SCAN); | |
1175 hadc->Instance->CR1 |= ADC_CR1_SCANCONV(hadc->Init.ScanConvMode); | |
1176 | |
1177 /* Set ADC resolution */ | |
1178 hadc->Instance->CR1 &= ~(ADC_CR1_RES); | |
1179 hadc->Instance->CR1 |= hadc->Init.Resolution; | |
1180 | |
1181 /* Set ADC data alignment */ | |
1182 hadc->Instance->CR2 &= ~(ADC_CR2_ALIGN); | |
1183 hadc->Instance->CR2 |= hadc->Init.DataAlign; | |
1184 | |
1185 /* Select external trigger to start conversion */ | |
1186 hadc->Instance->CR2 &= ~(ADC_CR2_EXTSEL); | |
1187 hadc->Instance->CR2 |= hadc->Init.ExternalTrigConv; | |
1188 | |
1189 /* Select external trigger polarity */ | |
1190 hadc->Instance->CR2 &= ~(ADC_CR2_EXTEN); | |
1191 hadc->Instance->CR2 |= hadc->Init.ExternalTrigConvEdge; | |
1192 | |
1193 /* Enable or disable ADC continuous conversion mode */ | |
1194 hadc->Instance->CR2 &= ~(ADC_CR2_CONT); | |
1195 hadc->Instance->CR2 |= ADC_CR2_CONTINUOUS(hadc->Init.ContinuousConvMode); | |
1196 | |
1197 if (hadc->Init.DiscontinuousConvMode != DISABLE) | |
1198 { | |
1199 assert_param(IS_ADC_REGULAR_DISC_NUMBER(hadc->Init.NbrOfDiscConversion)); | |
1200 | |
1201 /* Enable the selected ADC regular discontinuous mode */ | |
1202 hadc->Instance->CR1 |= (uint32_t)ADC_CR1_DISCEN; | |
1203 | |
1204 /* Set the number of channels to be converted in discontinuous mode */ | |
1205 hadc->Instance->CR1 &= ~(ADC_CR1_DISCNUM); | |
1206 hadc->Instance->CR1 |= ADC_CR1_DISCONTINUOUS(hadc->Init.NbrOfDiscConversion); | |
1207 } | |
1208 else | |
1209 { | |
1210 /* Disable the selected ADC regular discontinuous mode */ | |
1211 hadc->Instance->CR1 &= ~(ADC_CR1_DISCEN); | |
1212 } | |
1213 | |
1214 /* Set ADC number of conversion */ | |
1215 hadc->Instance->SQR1 &= ~(ADC_SQR1_L); | |
1216 hadc->Instance->SQR1 |= ADC_SQR1(hadc->Init.NbrOfConversion); | |
1217 | |
1218 /* Enable or disable ADC DMA continuous request */ | |
1219 hadc->Instance->CR2 &= ~(ADC_CR2_DDS); | |
1220 hadc->Instance->CR2 |= ADC_CR2_DMAContReq(hadc->Init.DMAContinuousRequests); | |
1221 | |
1222 /* Enable or disable ADC end of conversion selection */ | |
1223 hadc->Instance->CR2 &= ~(ADC_CR2_EOCS); | |
1224 hadc->Instance->CR2 |= ADC_CR2_EOCSelection(hadc->Init.EOCSelection); | |
1225 } | |
1226 | |
1227 /** | |
1228 * @brief DMA transfer complete callback. | |
1229 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains | |
1230 * the configuration information for the specified DMA module. | |
1231 * @retval None | |
1232 */ | |
1233 static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma) | |
1234 { | |
1235 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; | |
1236 | |
1237 /* Check if an injected conversion is ready */ | |
1238 if(hadc->State == HAL_ADC_STATE_EOC_INJ) | |
1239 { | |
1240 /* Change ADC state */ | |
1241 hadc->State = HAL_ADC_STATE_EOC_INJ_REG; | |
1242 } | |
1243 else | |
1244 { | |
1245 /* Change ADC state */ | |
1246 hadc->State = HAL_ADC_STATE_EOC_REG; | |
1247 } | |
1248 | |
1249 HAL_ADC_ConvCpltCallback(hadc); | |
1250 } | |
1251 | |
1252 /** | |
1253 * @brief DMA half transfer complete callback. | |
1254 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains | |
1255 * the configuration information for the specified DMA module. | |
1256 * @retval None | |
1257 */ | |
1258 static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma) | |
1259 { | |
1260 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; | |
1261 /* Conversion complete callback */ | |
1262 HAL_ADC_ConvHalfCpltCallback(hadc); | |
1263 } | |
1264 | |
1265 /** | |
1266 * @brief DMA error callback | |
1267 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains | |
1268 * the configuration information for the specified DMA module. | |
1269 * @retval None | |
1270 */ | |
1271 static void ADC_DMAError(DMA_HandleTypeDef *hdma) | |
1272 { | |
1273 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; | |
1274 hadc->State= HAL_ADC_STATE_ERROR; | |
1275 /* Set ADC error code to DMA error */ | |
1276 hadc->ErrorCode |= HAL_ADC_ERROR_DMA; | |
1277 HAL_ADC_ErrorCallback(hadc); | |
1278 } | |
1279 | |
1280 | |
1281 /** | |
1282 * @} | |
1283 */ | |
1284 | |
1285 #endif /* HAL_ADC_MODULE_ENABLED */ | |
1286 /** | |
1287 * @} | |
1288 */ | |
1289 | |
1290 /** | |
1291 * @} | |
1292 */ | |
1293 | |
1294 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |