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comparison Common/Drivers/STM32F4xx_HAL_DRIVER_v120/Inc/stm32f4xx_hal_sdram.h @ 38:5f11787b4f42
include in ostc4 repository
author | heinrichsweikamp |
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date | Sat, 28 Apr 2018 11:52:34 +0200 |
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1 /** | |
2 ****************************************************************************** | |
3 * @file stm32f4xx_hal_sdram.h | |
4 * @author MCD Application Team | |
5 * @version V1.2.0 | |
6 * @date 26-December-2014 | |
7 * @brief Header file of SDRAM HAL module. | |
8 ****************************************************************************** | |
9 * @attention | |
10 * | |
11 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> | |
12 * | |
13 * Redistribution and use in source and binary forms, with or without modification, | |
14 * are permitted provided that the following conditions are met: | |
15 * 1. Redistributions of source code must retain the above copyright notice, | |
16 * this list of conditions and the following disclaimer. | |
17 * 2. Redistributions in binary form must reproduce the above copyright notice, | |
18 * this list of conditions and the following disclaimer in the documentation | |
19 * and/or other materials provided with the distribution. | |
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors | |
21 * may be used to endorse or promote products derived from this software | |
22 * without specific prior written permission. | |
23 * | |
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | |
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE | |
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | |
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | |
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | |
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
34 * | |
35 ****************************************************************************** | |
36 */ | |
37 | |
38 /* Define to prevent recursive inclusion -------------------------------------*/ | |
39 #ifndef __STM32F4xx_HAL_SDRAM_H | |
40 #define __STM32F4xx_HAL_SDRAM_H | |
41 | |
42 #ifdef __cplusplus | |
43 extern "C" { | |
44 #endif | |
45 | |
46 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) | |
47 | |
48 /* Includes ------------------------------------------------------------------*/ | |
49 #include "stm32f4xx_ll_fmc.h" | |
50 | |
51 /** @addtogroup STM32F4xx_HAL_Driver | |
52 * @{ | |
53 */ | |
54 | |
55 /** @addtogroup SDRAM | |
56 * @{ | |
57 */ | |
58 | |
59 /* Exported typedef ----------------------------------------------------------*/ | |
60 /** @defgroup SDRAM_Exported_Types SDRAM Exported Types | |
61 * @{ | |
62 */ | |
63 | |
64 /** | |
65 * @brief HAL SDRAM State structure definition | |
66 */ | |
67 typedef enum | |
68 { | |
69 HAL_SDRAM_STATE_RESET = 0x00, /*!< SDRAM not yet initialized or disabled */ | |
70 HAL_SDRAM_STATE_READY = 0x01, /*!< SDRAM initialized and ready for use */ | |
71 HAL_SDRAM_STATE_BUSY = 0x02, /*!< SDRAM internal process is ongoing */ | |
72 HAL_SDRAM_STATE_ERROR = 0x03, /*!< SDRAM error state */ | |
73 HAL_SDRAM_STATE_WRITE_PROTECTED = 0x04, /*!< SDRAM device write protected */ | |
74 HAL_SDRAM_STATE_PRECHARGED = 0x05 /*!< SDRAM device precharged */ | |
75 | |
76 }HAL_SDRAM_StateTypeDef; | |
77 | |
78 /** | |
79 * @brief SDRAM handle Structure definition | |
80 */ | |
81 typedef struct | |
82 { | |
83 FMC_SDRAM_TypeDef *Instance; /*!< Register base address */ | |
84 | |
85 FMC_SDRAM_InitTypeDef Init; /*!< SDRAM device configuration parameters */ | |
86 | |
87 __IO HAL_SDRAM_StateTypeDef State; /*!< SDRAM access state */ | |
88 | |
89 HAL_LockTypeDef Lock; /*!< SDRAM locking object */ | |
90 | |
91 DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */ | |
92 | |
93 }SDRAM_HandleTypeDef; | |
94 /** | |
95 * @} | |
96 */ | |
97 | |
98 /* Exported constants --------------------------------------------------------*/ | |
99 /* Exported macro ------------------------------------------------------------*/ | |
100 /** @defgroup SDRAM_Exported_Macros SDRAM Exported Macros | |
101 * @{ | |
102 */ | |
103 | |
104 /** @brief Reset SDRAM handle state | |
105 * @param __HANDLE__: specifies the SDRAM handle. | |
106 * @retval None | |
107 */ | |
108 #define __HAL_SDRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SDRAM_STATE_RESET) | |
109 /** | |
110 * @} | |
111 */ | |
112 | |
113 /* Exported functions --------------------------------------------------------*/ | |
114 /** @addtogroup SDRAM_Exported_Functions SDRAM Exported Functions | |
115 * @{ | |
116 */ | |
117 | |
118 /** @addtogroup SDRAM_Exported_Functions_Group1 | |
119 * @{ | |
120 */ | |
121 | |
122 /* Initialization/de-initialization functions *********************************/ | |
123 HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing); | |
124 HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram); | |
125 void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram); | |
126 void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram); | |
127 | |
128 void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram); | |
129 void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram); | |
130 void HAL_SDRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma); | |
131 void HAL_SDRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma); | |
132 /** | |
133 * @} | |
134 */ | |
135 | |
136 /** @addtogroup SDRAM_Exported_Functions_Group2 | |
137 * @{ | |
138 */ | |
139 /* I/O operation functions ****************************************************/ | |
140 HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize); | |
141 HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize); | |
142 HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize); | |
143 HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize); | |
144 HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize); | |
145 HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize); | |
146 | |
147 HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t * pAddress, uint32_t *pDstBuffer, uint32_t BufferSize); | |
148 HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize); | |
149 /** | |
150 * @} | |
151 */ | |
152 | |
153 /** @addtogroup SDRAM_Exported_Functions_Group3 | |
154 * @{ | |
155 */ | |
156 /* SDRAM Control functions *****************************************************/ | |
157 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram); | |
158 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram); | |
159 HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout); | |
160 HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate); | |
161 HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber); | |
162 uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram); | |
163 /** | |
164 * @} | |
165 */ | |
166 | |
167 /** @addtogroup SDRAM_Exported_Functions_Group4 | |
168 * @{ | |
169 */ | |
170 /* SDRAM State functions ********************************************************/ | |
171 HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram); | |
172 /** | |
173 * @} | |
174 */ | |
175 | |
176 /** | |
177 * @} | |
178 */ | |
179 | |
180 /** | |
181 * @} | |
182 */ | |
183 | |
184 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ | |
185 | |
186 /** | |
187 * @} | |
188 */ | |
189 | |
190 #ifdef __cplusplus | |
191 } | |
192 #endif | |
193 | |
194 #endif /* __STM32F4xx_HAL_SDRAM_H */ | |
195 | |
196 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |