comparison Common/Drivers/STM32F4xx_HAL_DRIVER_v120/Inc/stm32f4xx_hal_sd.h @ 38:5f11787b4f42

include in ostc4 repository
author heinrichsweikamp
date Sat, 28 Apr 2018 11:52:34 +0200
parents
children
comparison
equal deleted inserted replaced
37:ccc45c0e1ea2 38:5f11787b4f42
1 /**
2 ******************************************************************************
3 * @file stm32f4xx_hal_sd.h
4 * @author MCD Application Team
5 * @version V1.2.0
6 * @date 26-December-2014
7 * @brief Header file of SD HAL module.
8 ******************************************************************************
9 * @attention
10 *
11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
12 *
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 ******************************************************************************
36 */
37
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32F4xx_HAL_SD_H
40 #define __STM32F4xx_HAL_SD_H
41
42 #ifdef __cplusplus
43 extern "C" {
44 #endif
45
46 /* Includes ------------------------------------------------------------------*/
47 #include "stm32f4xx_ll_sdmmc.h"
48
49 /** @addtogroup STM32F4xx_HAL_Driver
50 * @{
51 */
52
53 /** @defgroup SD SD
54 * @brief SD HAL module driver
55 * @{
56 */
57
58 /* Exported types ------------------------------------------------------------*/
59 /** @defgroup SD_Exported_Types SD Exported Types
60 * @{
61 */
62
63 /** @defgroup SD_Exported_Types_Group1 SD Handle Structure definition
64 * @{
65 */
66 #define SD_InitTypeDef SDIO_InitTypeDef
67 #define SD_TypeDef SDIO_TypeDef
68
69 typedef struct
70 {
71 SD_TypeDef *Instance; /*!< SDIO register base address */
72
73 SD_InitTypeDef Init; /*!< SD required parameters */
74
75 HAL_LockTypeDef Lock; /*!< SD locking object */
76
77 uint32_t CardType; /*!< SD card type */
78
79 uint32_t RCA; /*!< SD relative card address */
80
81 uint32_t CSD[4]; /*!< SD card specific data table */
82
83 uint32_t CID[4]; /*!< SD card identification number table */
84
85 __IO uint32_t SdTransferCplt; /*!< SD transfer complete flag in non blocking mode */
86
87 __IO uint32_t SdTransferErr; /*!< SD transfer error flag in non blocking mode */
88
89 __IO uint32_t DmaTransferCplt; /*!< SD DMA transfer complete flag */
90
91 __IO uint32_t SdOperation; /*!< SD transfer operation (read/write) */
92
93 DMA_HandleTypeDef *hdmarx; /*!< SD Rx DMA handle parameters */
94
95 DMA_HandleTypeDef *hdmatx; /*!< SD Tx DMA handle parameters */
96
97 }SD_HandleTypeDef;
98 /**
99 * @}
100 */
101
102 /** @defgroup SD_Exported_Types_Group2 Card Specific Data: CSD Register
103 * @{
104 */
105 typedef struct
106 {
107 __IO uint8_t CSDStruct; /*!< CSD structure */
108 __IO uint8_t SysSpecVersion; /*!< System specification version */
109 __IO uint8_t Reserved1; /*!< Reserved */
110 __IO uint8_t TAAC; /*!< Data read access time 1 */
111 __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */
112 __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */
113 __IO uint16_t CardComdClasses; /*!< Card command classes */
114 __IO uint8_t RdBlockLen; /*!< Max. read data block length */
115 __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */
116 __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */
117 __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */
118 __IO uint8_t DSRImpl; /*!< DSR implemented */
119 __IO uint8_t Reserved2; /*!< Reserved */
120 __IO uint32_t DeviceSize; /*!< Device Size */
121 __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */
122 __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */
123 __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */
124 __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */
125 __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */
126 __IO uint8_t EraseGrSize; /*!< Erase group size */
127 __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */
128 __IO uint8_t WrProtectGrSize; /*!< Write protect group size */
129 __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */
130 __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */
131 __IO uint8_t WrSpeedFact; /*!< Write speed factor */
132 __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */
133 __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */
134 __IO uint8_t Reserved3; /*!< Reserved */
135 __IO uint8_t ContentProtectAppli; /*!< Content protection application */
136 __IO uint8_t FileFormatGrouop; /*!< File format group */
137 __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */
138 __IO uint8_t PermWrProtect; /*!< Permanent write protection */
139 __IO uint8_t TempWrProtect; /*!< Temporary write protection */
140 __IO uint8_t FileFormat; /*!< File format */
141 __IO uint8_t ECC; /*!< ECC code */
142 __IO uint8_t CSD_CRC; /*!< CSD CRC */
143 __IO uint8_t Reserved4; /*!< Always 1 */
144
145 }HAL_SD_CSDTypedef;
146 /**
147 * @}
148 */
149
150 /** @defgroup SD_Exported_Types_Group3 Card Identification Data: CID Register
151 * @{
152 */
153 typedef struct
154 {
155 __IO uint8_t ManufacturerID; /*!< Manufacturer ID */
156 __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */
157 __IO uint32_t ProdName1; /*!< Product Name part1 */
158 __IO uint8_t ProdName2; /*!< Product Name part2 */
159 __IO uint8_t ProdRev; /*!< Product Revision */
160 __IO uint32_t ProdSN; /*!< Product Serial Number */
161 __IO uint8_t Reserved1; /*!< Reserved1 */
162 __IO uint16_t ManufactDate; /*!< Manufacturing Date */
163 __IO uint8_t CID_CRC; /*!< CID CRC */
164 __IO uint8_t Reserved2; /*!< Always 1 */
165
166 }HAL_SD_CIDTypedef;
167 /**
168 * @}
169 */
170
171 /** @defgroup SD_Exported_Types_Group4 SD Card Status returned by ACMD13
172 * @{
173 */
174 typedef struct
175 {
176 __IO uint8_t DAT_BUS_WIDTH; /*!< Shows the currently defined data bus width */
177 __IO uint8_t SECURED_MODE; /*!< Card is in secured mode of operation */
178 __IO uint16_t SD_CARD_TYPE; /*!< Carries information about card type */
179 __IO uint32_t SIZE_OF_PROTECTED_AREA; /*!< Carries information about the capacity of protected area */
180 __IO uint8_t SPEED_CLASS; /*!< Carries information about the speed class of the card */
181 __IO uint8_t PERFORMANCE_MOVE; /*!< Carries information about the card's performance move */
182 __IO uint8_t AU_SIZE; /*!< Carries information about the card's allocation unit size */
183 __IO uint16_t ERASE_SIZE; /*!< Determines the number of AUs to be erased in one operation */
184 __IO uint8_t ERASE_TIMEOUT; /*!< Determines the timeout for any number of AU erase */
185 __IO uint8_t ERASE_OFFSET; /*!< Carries information about the erase offset */
186
187 }HAL_SD_CardStatusTypedef;
188 /**
189 * @}
190 */
191
192 /** @defgroup SD_Exported_Types_Group5 SD Card information structure
193 * @{
194 */
195 typedef struct
196 {
197 HAL_SD_CSDTypedef SD_csd; /*!< SD card specific data register */
198 HAL_SD_CIDTypedef SD_cid; /*!< SD card identification number register */
199 uint64_t CardCapacity; /*!< Card capacity */
200 uint32_t CardBlockSize; /*!< Card block size */
201 uint16_t RCA; /*!< SD relative card address */
202 uint8_t CardType; /*!< SD card type */
203
204 }HAL_SD_CardInfoTypedef;
205 /**
206 * @}
207 */
208
209 /** @defgroup SD_Exported_Types_Group6 SD Error status enumeration Structure definition
210 * @{
211 */
212 typedef enum
213 {
214 /**
215 * @brief SD specific error defines
216 */
217 SD_CMD_CRC_FAIL = (1), /*!< Command response received (but CRC check failed) */
218 SD_DATA_CRC_FAIL = (2), /*!< Data block sent/received (CRC check failed) */
219 SD_CMD_RSP_TIMEOUT = (3), /*!< Command response timeout */
220 SD_DATA_TIMEOUT = (4), /*!< Data timeout */
221 SD_TX_UNDERRUN = (5), /*!< Transmit FIFO underrun */
222 SD_RX_OVERRUN = (6), /*!< Receive FIFO overrun */
223 SD_START_BIT_ERR = (7), /*!< Start bit not detected on all data signals in wide bus mode */
224 SD_CMD_OUT_OF_RANGE = (8), /*!< Command's argument was out of range. */
225 SD_ADDR_MISALIGNED = (9), /*!< Misaligned address */
226 SD_BLOCK_LEN_ERR = (10), /*!< Transferred block length is not allowed for the card or the number of transferred bytes does not match the block length */
227 SD_ERASE_SEQ_ERR = (11), /*!< An error in the sequence of erase command occurs. */
228 SD_BAD_ERASE_PARAM = (12), /*!< An invalid selection for erase groups */
229 SD_WRITE_PROT_VIOLATION = (13), /*!< Attempt to program a write protect block */
230 SD_LOCK_UNLOCK_FAILED = (14), /*!< Sequence or password error has been detected in unlock command or if there was an attempt to access a locked card */
231 SD_COM_CRC_FAILED = (15), /*!< CRC check of the previous command failed */
232 SD_ILLEGAL_CMD = (16), /*!< Command is not legal for the card state */
233 SD_CARD_ECC_FAILED = (17), /*!< Card internal ECC was applied but failed to correct the data */
234 SD_CC_ERROR = (18), /*!< Internal card controller error */
235 SD_GENERAL_UNKNOWN_ERROR = (19), /*!< General or unknown error */
236 SD_STREAM_READ_UNDERRUN = (20), /*!< The card could not sustain data transfer in stream read operation. */
237 SD_STREAM_WRITE_OVERRUN = (21), /*!< The card could not sustain data programming in stream mode */
238 SD_CID_CSD_OVERWRITE = (22), /*!< CID/CSD overwrite error */
239 SD_WP_ERASE_SKIP = (23), /*!< Only partial address space was erased */
240 SD_CARD_ECC_DISABLED = (24), /*!< Command has been executed without using internal ECC */
241 SD_ERASE_RESET = (25), /*!< Erase sequence was cleared before executing because an out of erase sequence command was received */
242 SD_AKE_SEQ_ERROR = (26), /*!< Error in sequence of authentication. */
243 SD_INVALID_VOLTRANGE = (27),
244 SD_ADDR_OUT_OF_RANGE = (28),
245 SD_SWITCH_ERROR = (29),
246 SD_SDIO_DISABLED = (30),
247 SD_SDIO_FUNCTION_BUSY = (31),
248 SD_SDIO_FUNCTION_FAILED = (32),
249 SD_SDIO_UNKNOWN_FUNCTION = (33),
250
251 /**
252 * @brief Standard error defines
253 */
254 SD_INTERNAL_ERROR = (34),
255 SD_NOT_CONFIGURED = (35),
256 SD_REQUEST_PENDING = (36),
257 SD_REQUEST_NOT_APPLICABLE = (37),
258 SD_INVALID_PARAMETER = (38),
259 SD_UNSUPPORTED_FEATURE = (39),
260 SD_UNSUPPORTED_HW = (40),
261 SD_ERROR = (41),
262 SD_OK = (0)
263
264 }HAL_SD_ErrorTypedef;
265 /**
266 * @}
267 */
268
269 /** @defgroup SD_Exported_Types_Group7 SD Transfer state enumeration structure
270 * @{
271 */
272 typedef enum
273 {
274 SD_TRANSFER_OK = 0, /*!< Transfer success */
275 SD_TRANSFER_BUSY = 1, /*!< Transfer is occurring */
276 SD_TRANSFER_ERROR = 2 /*!< Transfer failed */
277
278 }HAL_SD_TransferStateTypedef;
279 /**
280 * @}
281 */
282
283 /** @defgroup SD_Exported_Types_Group8 SD Card State enumeration structure
284 * @{
285 */
286 typedef enum
287 {
288 SD_CARD_READY = ((uint32_t)0x00000001), /*!< Card state is ready */
289 SD_CARD_IDENTIFICATION = ((uint32_t)0x00000002), /*!< Card is in identification state */
290 SD_CARD_STANDBY = ((uint32_t)0x00000003), /*!< Card is in standby state */
291 SD_CARD_TRANSFER = ((uint32_t)0x00000004), /*!< Card is in transfer state */
292 SD_CARD_SENDING = ((uint32_t)0x00000005), /*!< Card is sending an operation */
293 SD_CARD_RECEIVING = ((uint32_t)0x00000006), /*!< Card is receiving operation information */
294 SD_CARD_PROGRAMMING = ((uint32_t)0x00000007), /*!< Card is in programming state */
295 SD_CARD_DISCONNECTED = ((uint32_t)0x00000008), /*!< Card is disconnected */
296 SD_CARD_ERROR = ((uint32_t)0x000000FF) /*!< Card is in error state */
297
298 }HAL_SD_CardStateTypedef;
299 /**
300 * @}
301 */
302
303 /** @defgroup SD_Exported_Types_Group9 SD Operation enumeration structure
304 * @{
305 */
306 typedef enum
307 {
308 SD_READ_SINGLE_BLOCK = 0, /*!< Read single block operation */
309 SD_READ_MULTIPLE_BLOCK = 1, /*!< Read multiple blocks operation */
310 SD_WRITE_SINGLE_BLOCK = 2, /*!< Write single block operation */
311 SD_WRITE_MULTIPLE_BLOCK = 3 /*!< Write multiple blocks operation */
312
313 }HAL_SD_OperationTypedef;
314 /**
315 * @}
316 */
317
318 /**
319 * @}
320 */
321
322 /* Exported constants --------------------------------------------------------*/
323 /** @defgroup SD_Exported_Constants SD Exported Constants
324 * @{
325 */
326
327 /**
328 * @brief SD Commands Index
329 */
330 #define SD_CMD_GO_IDLE_STATE ((uint8_t)0) /*!< Resets the SD memory card. */
331 #define SD_CMD_SEND_OP_COND ((uint8_t)1) /*!< Sends host capacity support information and activates the card's initialization process. */
332 #define SD_CMD_ALL_SEND_CID ((uint8_t)2) /*!< Asks any card connected to the host to send the CID numbers on the CMD line. */
333 #define SD_CMD_SET_REL_ADDR ((uint8_t)3) /*!< Asks the card to publish a new relative address (RCA). */
334 #define SD_CMD_SET_DSR ((uint8_t)4) /*!< Programs the DSR of all cards. */
335 #define SD_CMD_SDIO_SEN_OP_COND ((uint8_t)5) /*!< Sends host capacity support information (HCS) and asks the accessed card to send its
336 operating condition register (OCR) content in the response on the CMD line. */
337 #define SD_CMD_HS_SWITCH ((uint8_t)6) /*!< Checks switchable function (mode 0) and switch card function (mode 1). */
338 #define SD_CMD_SEL_DESEL_CARD ((uint8_t)7) /*!< Selects the card by its own relative address and gets deselected by any other address */
339 #define SD_CMD_HS_SEND_EXT_CSD ((uint8_t)8) /*!< Sends SD Memory Card interface condition, which includes host supply voltage information
340 and asks the card whether card supports voltage. */
341 #define SD_CMD_SEND_CSD ((uint8_t)9) /*!< Addressed card sends its card specific data (CSD) on the CMD line. */
342 #define SD_CMD_SEND_CID ((uint8_t)10) /*!< Addressed card sends its card identification (CID) on the CMD line. */
343 #define SD_CMD_READ_DAT_UNTIL_STOP ((uint8_t)11) /*!< SD card doesn't support it. */
344 #define SD_CMD_STOP_TRANSMISSION ((uint8_t)12) /*!< Forces the card to stop transmission. */
345 #define SD_CMD_SEND_STATUS ((uint8_t)13) /*!< Addressed card sends its status register. */
346 #define SD_CMD_HS_BUSTEST_READ ((uint8_t)14)
347 #define SD_CMD_GO_INACTIVE_STATE ((uint8_t)15) /*!< Sends an addressed card into the inactive state. */
348 #define SD_CMD_SET_BLOCKLEN ((uint8_t)16) /*!< Sets the block length (in bytes for SDSC) for all following block commands
349 (read, write, lock). Default block length is fixed to 512 Bytes. Not effective
350 for SDHS and SDXC. */
351 #define SD_CMD_READ_SINGLE_BLOCK ((uint8_t)17) /*!< Reads single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of
352 fixed 512 bytes in case of SDHC and SDXC. */
353 #define SD_CMD_READ_MULT_BLOCK ((uint8_t)18) /*!< Continuously transfers data blocks from card to host until interrupted by
354 STOP_TRANSMISSION command. */
355 #define SD_CMD_HS_BUSTEST_WRITE ((uint8_t)19) /*!< 64 bytes tuning pattern is sent for SDR50 and SDR104. */
356 #define SD_CMD_WRITE_DAT_UNTIL_STOP ((uint8_t)20) /*!< Speed class control command. */
357 #define SD_CMD_SET_BLOCK_COUNT ((uint8_t)23) /*!< Specify block count for CMD18 and CMD25. */
358 #define SD_CMD_WRITE_SINGLE_BLOCK ((uint8_t)24) /*!< Writes single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of
359 fixed 512 bytes in case of SDHC and SDXC. */
360 #define SD_CMD_WRITE_MULT_BLOCK ((uint8_t)25) /*!< Continuously writes blocks of data until a STOP_TRANSMISSION follows. */
361 #define SD_CMD_PROG_CID ((uint8_t)26) /*!< Reserved for manufacturers. */
362 #define SD_CMD_PROG_CSD ((uint8_t)27) /*!< Programming of the programmable bits of the CSD. */
363 #define SD_CMD_SET_WRITE_PROT ((uint8_t)28) /*!< Sets the write protection bit of the addressed group. */
364 #define SD_CMD_CLR_WRITE_PROT ((uint8_t)29) /*!< Clears the write protection bit of the addressed group. */
365 #define SD_CMD_SEND_WRITE_PROT ((uint8_t)30) /*!< Asks the card to send the status of the write protection bits. */
366 #define SD_CMD_SD_ERASE_GRP_START ((uint8_t)32) /*!< Sets the address of the first write block to be erased. (For SD card only). */
367 #define SD_CMD_SD_ERASE_GRP_END ((uint8_t)33) /*!< Sets the address of the last write block of the continuous range to be erased. */
368 #define SD_CMD_ERASE_GRP_START ((uint8_t)35) /*!< Sets the address of the first write block to be erased. Reserved for each command
369 system set by switch function command (CMD6). */
370 #define SD_CMD_ERASE_GRP_END ((uint8_t)36) /*!< Sets the address of the last write block of the continuous range to be erased.
371 Reserved for each command system set by switch function command (CMD6). */
372 #define SD_CMD_ERASE ((uint8_t)38) /*!< Reserved for SD security applications. */
373 #define SD_CMD_FAST_IO ((uint8_t)39) /*!< SD card doesn't support it (Reserved). */
374 #define SD_CMD_GO_IRQ_STATE ((uint8_t)40) /*!< SD card doesn't support it (Reserved). */
375 #define SD_CMD_LOCK_UNLOCK ((uint8_t)42) /*!< Sets/resets the password or lock/unlock the card. The size of the data block is set by
376 the SET_BLOCK_LEN command. */
377 #define SD_CMD_APP_CMD ((uint8_t)55) /*!< Indicates to the card that the next command is an application specific command rather
378 than a standard command. */
379 #define SD_CMD_GEN_CMD ((uint8_t)56) /*!< Used either to transfer a data block to the card or to get a data block from the card
380 for general purpose/application specific commands. */
381 #define SD_CMD_NO_CMD ((uint8_t)64)
382
383 /**
384 * @brief Following commands are SD Card Specific commands.
385 * SDIO_APP_CMD should be sent before sending these commands.
386 */
387 #define SD_CMD_APP_SD_SET_BUSWIDTH ((uint8_t)6) /*!< (ACMD6) Defines the data bus width to be used for data transfer. The allowed data bus
388 widths are given in SCR register. */
389 #define SD_CMD_SD_APP_STATUS ((uint8_t)13) /*!< (ACMD13) Sends the SD status. */
390 #define SD_CMD_SD_APP_SEND_NUM_WRITE_BLOCKS ((uint8_t)22) /*!< (ACMD22) Sends the number of the written (without errors) write blocks. Responds with
391 32bit+CRC data block. */
392 #define SD_CMD_SD_APP_OP_COND ((uint8_t)41) /*!< (ACMD41) Sends host capacity support information (HCS) and asks the accessed card to
393 send its operating condition register (OCR) content in the response on the CMD line. */
394 #define SD_CMD_SD_APP_SET_CLR_CARD_DETECT ((uint8_t)42) /*!< (ACMD42) Connects/Disconnects the 50 KOhm pull-up resistor on CD/DAT3 (pin 1) of the card. */
395 #define SD_CMD_SD_APP_SEND_SCR ((uint8_t)51) /*!< Reads the SD Configuration Register (SCR). */
396 #define SD_CMD_SDIO_RW_DIRECT ((uint8_t)52) /*!< For SD I/O card only, reserved for security specification. */
397 #define SD_CMD_SDIO_RW_EXTENDED ((uint8_t)53) /*!< For SD I/O card only, reserved for security specification. */
398
399 /**
400 * @brief Following commands are SD Card Specific security commands.
401 * SD_CMD_APP_CMD should be sent before sending these commands.
402 */
403 #define SD_CMD_SD_APP_GET_MKB ((uint8_t)43) /*!< For SD card only */
404 #define SD_CMD_SD_APP_GET_MID ((uint8_t)44) /*!< For SD card only */
405 #define SD_CMD_SD_APP_SET_CER_RN1 ((uint8_t)45) /*!< For SD card only */
406 #define SD_CMD_SD_APP_GET_CER_RN2 ((uint8_t)46) /*!< For SD card only */
407 #define SD_CMD_SD_APP_SET_CER_RES2 ((uint8_t)47) /*!< For SD card only */
408 #define SD_CMD_SD_APP_GET_CER_RES1 ((uint8_t)48) /*!< For SD card only */
409 #define SD_CMD_SD_APP_SECURE_READ_MULTIPLE_BLOCK ((uint8_t)18) /*!< For SD card only */
410 #define SD_CMD_SD_APP_SECURE_WRITE_MULTIPLE_BLOCK ((uint8_t)25) /*!< For SD card only */
411 #define SD_CMD_SD_APP_SECURE_ERASE ((uint8_t)38) /*!< For SD card only */
412 #define SD_CMD_SD_APP_CHANGE_SECURE_AREA ((uint8_t)49) /*!< For SD card only */
413 #define SD_CMD_SD_APP_SECURE_WRITE_MKB ((uint8_t)48) /*!< For SD card only */
414
415 /**
416 * @brief Supported SD Memory Cards
417 */
418 #define STD_CAPACITY_SD_CARD_V1_1 ((uint32_t)0x00000000)
419 #define STD_CAPACITY_SD_CARD_V2_0 ((uint32_t)0x00000001)
420 #define HIGH_CAPACITY_SD_CARD ((uint32_t)0x00000002)
421 #define MULTIMEDIA_CARD ((uint32_t)0x00000003)
422 #define SECURE_DIGITAL_IO_CARD ((uint32_t)0x00000004)
423 #define HIGH_SPEED_MULTIMEDIA_CARD ((uint32_t)0x00000005)
424 #define SECURE_DIGITAL_IO_COMBO_CARD ((uint32_t)0x00000006)
425 #define HIGH_CAPACITY_MMC_CARD ((uint32_t)0x00000007)
426 /**
427 * @}
428 */
429
430 /* Exported macro ------------------------------------------------------------*/
431 /** @defgroup SD_Exported_macros SD Exported Macros
432 * @brief macros to handle interrupts and specific clock configurations
433 * @{
434 */
435
436 /**
437 * @brief Enable the SD device.
438 * @retval None
439 */
440 #define __HAL_SD_SDIO_ENABLE() __SDIO_ENABLE()
441
442 /**
443 * @brief Disable the SD device.
444 * @retval None
445 */
446 #define __HAL_SD_SDIO_DISABLE() __SDIO_DISABLE()
447
448 /**
449 * @brief Enable the SDIO DMA transfer.
450 * @retval None
451 */
452 #define __HAL_SD_SDIO_DMA_ENABLE() __SDIO_DMA_ENABLE()
453
454 /**
455 * @brief Disable the SDIO DMA transfer.
456 * @retval None
457 */
458 #define __HAL_SD_SDIO_DMA_DISABLE() __SDIO_DMA_DISABLE()
459
460 /**
461 * @brief Enable the SD device interrupt.
462 * @param __HANDLE__: SD Handle
463 * @param __INTERRUPT__: specifies the SDIO interrupt sources to be enabled.
464 * This parameter can be one or a combination of the following values:
465 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
466 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
467 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
468 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
469 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
470 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
471 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
472 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
473 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
474 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
475 * bus mode interrupt
476 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
477 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
478 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
479 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
480 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
481 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
482 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
483 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
484 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
485 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
486 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
487 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
488 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
489 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
490 * @retval None
491 */
492 #define __HAL_SD_SDIO_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
493
494 /**
495 * @brief Disable the SD device interrupt.
496 * @param __HANDLE__: SD Handle
497 * @param __INTERRUPT__: specifies the SDIO interrupt sources to be disabled.
498 * This parameter can be one or a combination of the following values:
499 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
500 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
501 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
502 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
503 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
504 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
505 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
506 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
507 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
508 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
509 * bus mode interrupt
510 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
511 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
512 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
513 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
514 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
515 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
516 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
517 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
518 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
519 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
520 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
521 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
522 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
523 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
524 * @retval None
525 */
526 #define __HAL_SD_SDIO_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
527
528 /**
529 * @brief Check whether the specified SD flag is set or not.
530 * @param __HANDLE__: SD Handle
531 * @param __FLAG__: specifies the flag to check.
532 * This parameter can be one of the following values:
533 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
534 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
535 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
536 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
537 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
538 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
539 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
540 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
541 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
542 * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode.
543 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
544 * @arg SDIO_FLAG_CMDACT: Command transfer in progress
545 * @arg SDIO_FLAG_TXACT: Data transmit in progress
546 * @arg SDIO_FLAG_RXACT: Data receive in progress
547 * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty
548 * @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full
549 * @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full
550 * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full
551 * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty
552 * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty
553 * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO
554 * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO
555 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
556 * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61
557 * @retval The new state of SD FLAG (SET or RESET).
558 */
559 #define __HAL_SD_SDIO_GET_FLAG(__HANDLE__, __FLAG__) __SDIO_GET_FLAG((__HANDLE__)->Instance, (__FLAG__))
560
561 /**
562 * @brief Clear the SD's pending flags.
563 * @param __HANDLE__: SD Handle
564 * @param __FLAG__: specifies the flag to clear.
565 * This parameter can be one or a combination of the following values:
566 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
567 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
568 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
569 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
570 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
571 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
572 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
573 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
574 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
575 * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode
576 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
577 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
578 * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61
579 * @retval None
580 */
581 #define __HAL_SD_SDIO_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDIO_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__))
582
583 /**
584 * @brief Check whether the specified SD interrupt has occurred or not.
585 * @param __HANDLE__: SD Handle
586 * @param __INTERRUPT__: specifies the SDIO interrupt source to check.
587 * This parameter can be one of the following values:
588 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
589 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
590 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
591 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
592 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
593 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
594 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
595 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
596 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
597 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
598 * bus mode interrupt
599 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
600 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
601 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
602 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
603 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
604 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
605 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
606 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
607 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
608 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
609 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
610 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
611 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
612 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
613 * @retval The new state of SD IT (SET or RESET).
614 */
615 #define __HAL_SD_SDIO_GET_IT (__HANDLE__, __INTERRUPT__) __SDIO_GET_IT ((__HANDLE__)->Instance, __INTERRUPT__)
616
617 /**
618 * @brief Clear the SD's interrupt pending bits.
619 * @param __HANDLE__ : SD Handle
620 * @param __INTERRUPT__: specifies the interrupt pending bit to clear.
621 * This parameter can be one or a combination of the following values:
622 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
623 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
624 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
625 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
626 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
627 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
628 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
629 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
630 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIO_DCOUNT, is zero) interrupt
631 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
632 * bus mode interrupt
633 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
634 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61
635 * @retval None
636 */
637 #define __HAL_SD_SDIO_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDIO_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__))
638 /**
639 * @}
640 */
641
642 /* Exported functions --------------------------------------------------------*/
643 /** @defgroup SD_Exported_Functions SD Exported Functions
644 * @{
645 */
646
647 /** @defgroup SD_Exported_Functions_Group1 Initialization and de-initialization functions
648 * @{
649 */
650 HAL_SD_ErrorTypedef HAL_SD_Init(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypedef *SDCardInfo);
651 HAL_StatusTypeDef HAL_SD_DeInit (SD_HandleTypeDef *hsd);
652 void HAL_SD_MspInit(SD_HandleTypeDef *hsd);
653 void HAL_SD_MspDeInit(SD_HandleTypeDef *hsd);
654 /**
655 * @}
656 */
657
658 /** @defgroup SD_Exported_Functions_Group2 I/O operation functions
659 * @{
660 */
661 /* Blocking mode: Polling */
662 HAL_SD_ErrorTypedef HAL_SD_ReadBlocks(SD_HandleTypeDef *hsd, uint32_t *pReadBuffer, uint64_t ReadAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
663 HAL_SD_ErrorTypedef HAL_SD_WriteBlocks(SD_HandleTypeDef *hsd, uint32_t *pWriteBuffer, uint64_t WriteAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
664 HAL_SD_ErrorTypedef HAL_SD_Erase(SD_HandleTypeDef *hsd, uint64_t startaddr, uint64_t endaddr);
665
666 /* Non-Blocking mode: Interrupt */
667 void HAL_SD_IRQHandler(SD_HandleTypeDef *hsd);
668
669 /* Callback in non blocking modes (DMA) */
670 void HAL_SD_DMA_RxCpltCallback(DMA_HandleTypeDef *hdma);
671 void HAL_SD_DMA_RxErrorCallback(DMA_HandleTypeDef *hdma);
672 void HAL_SD_DMA_TxCpltCallback(DMA_HandleTypeDef *hdma);
673 void HAL_SD_DMA_TxErrorCallback(DMA_HandleTypeDef *hdma);
674 void HAL_SD_XferCpltCallback(SD_HandleTypeDef *hsd);
675 void HAL_SD_XferErrorCallback(SD_HandleTypeDef *hsd);
676
677 /* Non-Blocking mode: DMA */
678 HAL_SD_ErrorTypedef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t *pReadBuffer, uint64_t ReadAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
679 HAL_SD_ErrorTypedef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t *pWriteBuffer, uint64_t WriteAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
680 HAL_SD_ErrorTypedef HAL_SD_CheckWriteOperation(SD_HandleTypeDef *hsd, uint32_t Timeout);
681 HAL_SD_ErrorTypedef HAL_SD_CheckReadOperation(SD_HandleTypeDef *hsd, uint32_t Timeout);
682 /**
683 * @}
684 */
685
686 /** @defgroup SD_Exported_Functions_Group3 Peripheral Control functions
687 * @{
688 */
689 HAL_SD_ErrorTypedef HAL_SD_Get_CardInfo(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypedef *pCardInfo);
690 HAL_SD_ErrorTypedef HAL_SD_WideBusOperation_Config(SD_HandleTypeDef *hsd, uint32_t WideMode);
691 HAL_SD_ErrorTypedef HAL_SD_StopTransfer(SD_HandleTypeDef *hsd);
692 HAL_SD_ErrorTypedef HAL_SD_HighSpeed (SD_HandleTypeDef *hsd);
693 /**
694 * @}
695 */
696
697 /* Peripheral State functions ************************************************/
698 /** @defgroup SD_Exported_Functions_Group4 Peripheral State functions
699 * @{
700 */
701 HAL_SD_ErrorTypedef HAL_SD_SendSDStatus(SD_HandleTypeDef *hsd, uint32_t *pSDstatus);
702 HAL_SD_ErrorTypedef HAL_SD_GetCardStatus(SD_HandleTypeDef *hsd, HAL_SD_CardStatusTypedef *pCardStatus);
703 HAL_SD_TransferStateTypedef HAL_SD_GetStatus(SD_HandleTypeDef *hsd);
704 /**
705 * @}
706 */
707
708 /**
709 * @}
710 */
711
712 /* Private types -------------------------------------------------------------*/
713 /** @defgroup SD_Private_Types SD Private Types
714 * @{
715 */
716
717 /**
718 * @}
719 */
720
721 /* Private defines -----------------------------------------------------------*/
722 /** @defgroup SD_Private_Defines SD Private Defines
723 * @{
724 */
725
726 /**
727 * @}
728 */
729
730 /* Private variables ---------------------------------------------------------*/
731 /** @defgroup SD_Private_Variables SD Private Variables
732 * @{
733 */
734
735 /**
736 * @}
737 */
738
739 /* Private constants ---------------------------------------------------------*/
740 /** @defgroup SD_Private_Constants SD Private Constants
741 * @{
742 */
743
744 /**
745 * @}
746 */
747
748 /* Private macros ------------------------------------------------------------*/
749 /** @defgroup SD_Private_Macros SD Private Macros
750 * @{
751 */
752
753 /**
754 * @}
755 */
756
757 /* Private functions prototypes ----------------------------------------------*/
758 /** @defgroup SD_Private_Functions_Prototypes SD Private Functions Prototypes
759 * @{
760 */
761
762 /**
763 * @}
764 */
765
766 /* Private functions ---------------------------------------------------------*/
767 /** @defgroup SD_Private_Functions SD Private Functions
768 * @{
769 */
770
771 /**
772 * @}
773 */
774
775 /**
776 * @}
777 */
778
779 /**
780 * @}
781 */
782
783 #ifdef __cplusplus
784 }
785 #endif
786
787 #endif /* __STM32F4xx_HAL_SD_H */
788
789 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/