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comparison Common/Drivers/STM32F4xx_HAL_DRIVER_v120/Inc/stm32f4xx_hal_pwr.h @ 38:5f11787b4f42
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author | heinrichsweikamp |
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date | Sat, 28 Apr 2018 11:52:34 +0200 |
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1 /** | |
2 ****************************************************************************** | |
3 * @file stm32f4xx_hal_pwr.h | |
4 * @author MCD Application Team | |
5 * @version V1.2.0 | |
6 * @date 26-December-2014 | |
7 * @brief Header file of PWR HAL module. | |
8 ****************************************************************************** | |
9 * @attention | |
10 * | |
11 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> | |
12 * | |
13 * Redistribution and use in source and binary forms, with or without modification, | |
14 * are permitted provided that the following conditions are met: | |
15 * 1. Redistributions of source code must retain the above copyright notice, | |
16 * this list of conditions and the following disclaimer. | |
17 * 2. Redistributions in binary form must reproduce the above copyright notice, | |
18 * this list of conditions and the following disclaimer in the documentation | |
19 * and/or other materials provided with the distribution. | |
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors | |
21 * may be used to endorse or promote products derived from this software | |
22 * without specific prior written permission. | |
23 * | |
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | |
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE | |
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | |
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | |
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | |
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
34 * | |
35 ****************************************************************************** | |
36 */ | |
37 | |
38 /* Define to prevent recursive inclusion -------------------------------------*/ | |
39 #ifndef __STM32F4xx_HAL_PWR_H | |
40 #define __STM32F4xx_HAL_PWR_H | |
41 | |
42 #ifdef __cplusplus | |
43 extern "C" { | |
44 #endif | |
45 | |
46 /* Includes ------------------------------------------------------------------*/ | |
47 #include "stm32f4xx_hal_def.h" | |
48 | |
49 /** @addtogroup STM32F4xx_HAL_Driver | |
50 * @{ | |
51 */ | |
52 | |
53 /** @addtogroup PWR | |
54 * @{ | |
55 */ | |
56 | |
57 /* Exported types ------------------------------------------------------------*/ | |
58 | |
59 /** @defgroup PWR_Exported_Types PWR Exported Types | |
60 * @{ | |
61 */ | |
62 | |
63 /** | |
64 * @brief PWR PVD configuration structure definition | |
65 */ | |
66 typedef struct | |
67 { | |
68 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level. | |
69 This parameter can be a value of @ref PWR_PVD_detection_level */ | |
70 | |
71 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. | |
72 This parameter can be a value of @ref PWR_PVD_Mode */ | |
73 }PWR_PVDTypeDef; | |
74 | |
75 /** | |
76 * @} | |
77 */ | |
78 | |
79 /* Exported constants --------------------------------------------------------*/ | |
80 /** @defgroup PWR_Exported_Constants PWR Exported Constants | |
81 * @{ | |
82 */ | |
83 | |
84 /** @defgroup PWR_WakeUp_Pins PWR WakeUp Pins | |
85 * @{ | |
86 */ | |
87 #define PWR_WAKEUP_PIN1 PWR_CSR_EWUP | |
88 /** | |
89 * @} | |
90 */ | |
91 | |
92 /** @defgroup PWR_PVD_detection_level PWR PVD detection level | |
93 * @{ | |
94 */ | |
95 #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0 | |
96 #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1 | |
97 #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2 | |
98 #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3 | |
99 #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4 | |
100 #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5 | |
101 #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6 | |
102 #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7/* External input analog voltage | |
103 (Compare internally to VREFINT) */ | |
104 /** | |
105 * @} | |
106 */ | |
107 | |
108 /** @defgroup PWR_PVD_Mode PWR PVD Mode | |
109 * @{ | |
110 */ | |
111 #define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000) /*!< basic mode is used */ | |
112 #define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001) /*!< External Interrupt Mode with Rising edge trigger detection */ | |
113 #define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002) /*!< External Interrupt Mode with Falling edge trigger detection */ | |
114 #define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ | |
115 #define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001) /*!< Event Mode with Rising edge trigger detection */ | |
116 #define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002) /*!< Event Mode with Falling edge trigger detection */ | |
117 #define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003) /*!< Event Mode with Rising/Falling edge trigger detection */ | |
118 /** | |
119 * @} | |
120 */ | |
121 | |
122 | |
123 /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in SLEEP/STOP mode | |
124 * @{ | |
125 */ | |
126 #define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000) | |
127 #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS | |
128 /** | |
129 * @} | |
130 */ | |
131 | |
132 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry | |
133 * @{ | |
134 */ | |
135 #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01) | |
136 #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02) | |
137 /** | |
138 * @} | |
139 */ | |
140 | |
141 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry | |
142 * @{ | |
143 */ | |
144 #define PWR_STOPENTRY_WFI ((uint8_t)0x01) | |
145 #define PWR_STOPENTRY_WFE ((uint8_t)0x02) | |
146 /** | |
147 * @} | |
148 */ | |
149 | |
150 /** @defgroup PWR_Regulator_Voltage_Scale PWR Regulator Voltage Scale | |
151 * @{ | |
152 */ | |
153 #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS | |
154 #define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR_VOS_1 | |
155 #define PWR_REGULATOR_VOLTAGE_SCALE3 PWR_CR_VOS_0 | |
156 /** | |
157 * @} | |
158 */ | |
159 | |
160 /** @defgroup PWR_Flag PWR Flag | |
161 * @{ | |
162 */ | |
163 #define PWR_FLAG_WU PWR_CSR_WUF | |
164 #define PWR_FLAG_SB PWR_CSR_SBF | |
165 #define PWR_FLAG_PVDO PWR_CSR_PVDO | |
166 #define PWR_FLAG_BRR PWR_CSR_BRR | |
167 #define PWR_FLAG_VOSRDY PWR_CSR_VOSRDY | |
168 /** | |
169 * @} | |
170 */ | |
171 | |
172 /** | |
173 * @} | |
174 */ | |
175 | |
176 /* Exported macro ------------------------------------------------------------*/ | |
177 /** @defgroup PWR_Exported_Macro PWR Exported Macro | |
178 * @{ | |
179 */ | |
180 | |
181 /** @brief macros configure the main internal regulator output voltage. | |
182 * @param __REGULATOR__: specifies the regulator output voltage to achieve | |
183 * a tradeoff between performance and power consumption when the device does | |
184 * not operate at the maximum frequency (refer to the datasheets for more details). | |
185 * This parameter can be one of the following values: | |
186 * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode | |
187 * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode | |
188 * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode | |
189 * @retval None | |
190 */ | |
191 #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) (MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__))) | |
192 | |
193 /** @brief Check PWR flag is set or not. | |
194 * @param __FLAG__: specifies the flag to check. | |
195 * This parameter can be one of the following values: | |
196 * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event | |
197 * was received from the WKUP pin or from the RTC alarm (Alarm A | |
198 * or Alarm B), RTC Tamper event, RTC TimeStamp event or RTC Wakeup. | |
199 * An additional wakeup event is detected if the WKUP pin is enabled | |
200 * (by setting the EWUP bit) when the WKUP pin level is already high. | |
201 * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was | |
202 * resumed from StandBy mode. | |
203 * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled | |
204 * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode | |
205 * For this reason, this bit is equal to 0 after Standby or reset | |
206 * until the PVDE bit is set. | |
207 * @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset | |
208 * when the device wakes up from Standby mode or by a system reset | |
209 * or power reset. | |
210 * @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage | |
211 * scaling output selection is ready. | |
212 * @retval The new state of __FLAG__ (TRUE or FALSE). | |
213 */ | |
214 #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__)) | |
215 | |
216 /** @brief Clear the PWR's pending flags. | |
217 * @param __FLAG__: specifies the flag to clear. | |
218 * This parameter can be one of the following values: | |
219 * @arg PWR_FLAG_WU: Wake Up flag | |
220 * @arg PWR_FLAG_SB: StandBy flag | |
221 */ | |
222 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2) | |
223 | |
224 /** | |
225 * @brief Enable the PVD Exti Line 16. | |
226 * @retval None. | |
227 */ | |
228 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD)) | |
229 | |
230 /** | |
231 * @brief Disable the PVD EXTI Line 16. | |
232 * @retval None. | |
233 */ | |
234 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD)) | |
235 | |
236 /** | |
237 * @brief Enable event on PVD Exti Line 16. | |
238 * @retval None. | |
239 */ | |
240 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD)) | |
241 | |
242 /** | |
243 * @brief Disable event on PVD Exti Line 16. | |
244 * @retval None. | |
245 */ | |
246 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD)) | |
247 | |
248 /** | |
249 * @brief Enable the PVD Extended Interrupt Rising Trigger. | |
250 * @retval None. | |
251 */ | |
252 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) | |
253 | |
254 /** | |
255 * @brief Disable the PVD Extended Interrupt Rising Trigger. | |
256 * @retval None. | |
257 */ | |
258 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD) | |
259 | |
260 /** | |
261 * @brief Enable the PVD Extended Interrupt Falling Trigger. | |
262 * @retval None. | |
263 */ | |
264 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) | |
265 | |
266 | |
267 /** | |
268 * @brief Disable the PVD Extended Interrupt Falling Trigger. | |
269 * @retval None. | |
270 */ | |
271 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD) | |
272 | |
273 | |
274 /** | |
275 * @brief PVD EXTI line configuration: set rising & falling edge trigger. | |
276 * @retval None. | |
277 */ | |
278 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); | |
279 | |
280 /** | |
281 * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. | |
282 * This parameter can be: | |
283 * @retval None. | |
284 */ | |
285 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); | |
286 | |
287 /** | |
288 * @brief checks whether the specified PVD Exti interrupt flag is set or not. | |
289 * @retval EXTI PVD Line Status. | |
290 */ | |
291 #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD)) | |
292 | |
293 /** | |
294 * @brief Clear the PVD Exti flag. | |
295 * @retval None. | |
296 */ | |
297 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD)) | |
298 | |
299 /** | |
300 * @brief Generates a Software interrupt on PVD EXTI line. | |
301 * @retval None | |
302 */ | |
303 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD)) | |
304 | |
305 /** | |
306 * @} | |
307 */ | |
308 | |
309 /* Include PWR HAL Extension module */ | |
310 #include "stm32f4xx_hal_pwr_ex.h" | |
311 | |
312 /* Exported functions --------------------------------------------------------*/ | |
313 /** @addtogroup PWR_Exported_Functions PWR Exported Functions | |
314 * @{ | |
315 */ | |
316 | |
317 /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions | |
318 * @{ | |
319 */ | |
320 /* Initialization and de-initialization functions *****************************/ | |
321 void HAL_PWR_DeInit(void); | |
322 void HAL_PWR_EnableBkUpAccess(void); | |
323 void HAL_PWR_DisableBkUpAccess(void); | |
324 /** | |
325 * @} | |
326 */ | |
327 | |
328 /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions | |
329 * @{ | |
330 */ | |
331 /* Peripheral Control functions **********************************************/ | |
332 /* PVD configuration */ | |
333 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD); | |
334 void HAL_PWR_EnablePVD(void); | |
335 void HAL_PWR_DisablePVD(void); | |
336 | |
337 /* WakeUp pins configuration */ | |
338 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx); | |
339 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); | |
340 | |
341 /* Low Power modes entry */ | |
342 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); | |
343 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); | |
344 void HAL_PWR_EnterSTANDBYMode(void); | |
345 | |
346 /* Power PVD IRQ Handler */ | |
347 void HAL_PWR_PVD_IRQHandler(void); | |
348 void HAL_PWR_PVDCallback(void); | |
349 | |
350 /* Cortex System Control functions *******************************************/ | |
351 void HAL_PWR_EnableSleepOnExit(void); | |
352 void HAL_PWR_DisableSleepOnExit(void); | |
353 void HAL_PWR_EnableSEVOnPend(void); | |
354 void HAL_PWR_DisableSEVOnPend(void); | |
355 /** | |
356 * @} | |
357 */ | |
358 | |
359 /** | |
360 * @} | |
361 */ | |
362 | |
363 /* Private types -------------------------------------------------------------*/ | |
364 /* Private variables ---------------------------------------------------------*/ | |
365 /* Private constants ---------------------------------------------------------*/ | |
366 /** @defgroup PWR_Private_Constants PWR Private Constants | |
367 * @{ | |
368 */ | |
369 | |
370 /** @defgroup PWR_PVD_EXTI_Line PWR PVD EXTI Line | |
371 * @{ | |
372 */ | |
373 #define PWR_EXTI_LINE_PVD ((uint32_t)0x00010000) /*!< External interrupt line 16 Connected to the PVD EXTI Line */ | |
374 /** | |
375 * @} | |
376 */ | |
377 | |
378 /** @defgroup PWR_register_alias_address PWR Register alias address | |
379 * @{ | |
380 */ | |
381 /* ------------- PWR registers bit address in the alias region ---------------*/ | |
382 #define PWR_OFFSET (PWR_BASE - PERIPH_BASE) | |
383 #define PWR_CR_OFFSET 0x00 | |
384 #define PWR_CSR_OFFSET 0x04 | |
385 #define PWR_CR_OFFSET_BB (PWR_OFFSET + PWR_CR_OFFSET) | |
386 #define PWR_CSR_OFFSET_BB (PWR_OFFSET + PWR_CSR_OFFSET) | |
387 /** | |
388 * @} | |
389 */ | |
390 | |
391 /** @defgroup PWR_CR_register_alias PWR CR Register alias address | |
392 * @{ | |
393 */ | |
394 /* --- CR Register ---*/ | |
395 /* Alias word address of DBP bit */ | |
396 #define DBP_BIT_NUMBER POSITION_VAL(PWR_CR_DBP) | |
397 #define CR_DBP_BB (PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (DBP_BIT_NUMBER * 4)) | |
398 | |
399 /* Alias word address of PVDE bit */ | |
400 #define PVDE_BIT_NUMBER POSITION_VAL(PWR_CR_PVDE) | |
401 #define CR_PVDE_BB (PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (PVDE_BIT_NUMBER * 4)) | |
402 | |
403 /* Alias word address of PMODE bit */ | |
404 #define PMODE_BIT_NUMBER POSITION_VAL(PWR_CR_PMODE) | |
405 #define CR_PMODE_BB (PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (PMODE_BIT_NUMBER * 4)) | |
406 /** | |
407 * @} | |
408 */ | |
409 | |
410 /** @defgroup PWR_CSR_register_alias PWR CSR Register alias address | |
411 * @{ | |
412 */ | |
413 /* --- CSR Register ---*/ | |
414 /* Alias word address of EWUP bit */ | |
415 #define EWUP_BIT_NUMBER POSITION_VAL(PWR_CSR_EWUP) | |
416 #define CSR_EWUP_BB (PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32) + (EWUP_BIT_NUMBER * 4)) | |
417 /** | |
418 * @} | |
419 */ | |
420 | |
421 /** | |
422 * @} | |
423 */ | |
424 /* Private macros ------------------------------------------------------------*/ | |
425 /** @defgroup PWR_Private_Macros PWR Private Macros | |
426 * @{ | |
427 */ | |
428 | |
429 /** @defgroup PWR_IS_PWR_Definitions PWR Private macros to check input parameters | |
430 * @{ | |
431 */ | |
432 #define IS_PWR_WAKEUP_PIN(PIN) ((PIN) == PWR_WAKEUP_PIN1) | |
433 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \ | |
434 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \ | |
435 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \ | |
436 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) | |
437 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \ | |
438 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \ | |
439 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \ | |
440 ((MODE) == PWR_PVD_MODE_NORMAL)) | |
441 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ | |
442 ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) | |
443 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE)) | |
444 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE)) | |
445 #define IS_PWR_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \ | |
446 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \ | |
447 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE3)) | |
448 | |
449 /** | |
450 * @} | |
451 */ | |
452 | |
453 /** | |
454 * @} | |
455 */ | |
456 | |
457 /** | |
458 * @} | |
459 */ | |
460 | |
461 /** | |
462 * @} | |
463 */ | |
464 | |
465 #ifdef __cplusplus | |
466 } | |
467 #endif | |
468 | |
469 | |
470 #endif /* __STM32F4xx_HAL_PWR_H */ | |
471 | |
472 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |