comparison Common/Drivers/STM32F4xx_HAL_DRIVER_v120/Inc/stm32f4xx_hal_i2s.h @ 38:5f11787b4f42

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date Sat, 28 Apr 2018 11:52:34 +0200
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1 /**
2 ******************************************************************************
3 * @file stm32f4xx_hal_i2s.h
4 * @author MCD Application Team
5 * @version V1.2.0
6 * @date 26-December-2014
7 * @brief Header file of I2S HAL module.
8 ******************************************************************************
9 * @attention
10 *
11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
12 *
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 ******************************************************************************
36 */
37
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32F4xx_HAL_I2S_H
40 #define __STM32F4xx_HAL_I2S_H
41
42 #ifdef __cplusplus
43 extern "C" {
44 #endif
45
46 /* Includes ------------------------------------------------------------------*/
47 #include "stm32f4xx_hal_def.h"
48
49 /** @addtogroup STM32F4xx_HAL_Driver
50 * @{
51 */
52
53 /** @addtogroup I2S
54 * @{
55 */
56
57 /* Exported types ------------------------------------------------------------*/
58 /** @defgroup I2S_Exported_Types I2S Exported Types
59 * @{
60 */
61
62 /**
63 * @brief I2S Init structure definition
64 */
65 typedef struct
66 {
67 uint32_t Mode; /*!< Specifies the I2S operating mode.
68 This parameter can be a value of @ref I2S_Mode */
69
70 uint32_t Standard; /*!< Specifies the standard used for the I2S communication.
71 This parameter can be a value of @ref I2S_Standard */
72
73 uint32_t DataFormat; /*!< Specifies the data format for the I2S communication.
74 This parameter can be a value of @ref I2S_Data_Format */
75
76 uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
77 This parameter can be a value of @ref I2S_MCLK_Output */
78
79 uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
80 This parameter can be a value of @ref I2S_Audio_Frequency */
81
82 uint32_t CPOL; /*!< Specifies the idle state of the I2S clock.
83 This parameter can be a value of @ref I2S_Clock_Polarity */
84
85 uint32_t ClockSource; /*!< Specifies the I2S Clock Source.
86 This parameter can be a value of @ref I2S_Clock_Source */
87
88 uint32_t FullDuplexMode; /*!< Specifies the I2S FullDuplex mode.
89 This parameter can be a value of @ref I2S_FullDuplex_Mode */
90
91 }I2S_InitTypeDef;
92
93 /**
94 * @brief HAL State structures definition
95 */
96 typedef enum
97 {
98 HAL_I2S_STATE_RESET = 0x00, /*!< I2S not yet initialized or disabled */
99 HAL_I2S_STATE_READY = 0x01, /*!< I2S initialized and ready for use */
100 HAL_I2S_STATE_BUSY = 0x02, /*!< I2S internal process is ongoing */
101 HAL_I2S_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
102 HAL_I2S_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
103 HAL_I2S_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */
104 HAL_I2S_STATE_TIMEOUT = 0x03, /*!< I2S timeout state */
105 HAL_I2S_STATE_ERROR = 0x04 /*!< I2S error state */
106
107 }HAL_I2S_StateTypeDef;
108
109 /**
110 * @brief I2S handle Structure definition
111 */
112 typedef struct
113 {
114 SPI_TypeDef *Instance; /* I2S registers base address */
115
116 I2S_InitTypeDef Init; /* I2S communication parameters */
117
118 uint16_t *pTxBuffPtr; /* Pointer to I2S Tx transfer buffer */
119
120 __IO uint16_t TxXferSize; /* I2S Tx transfer size */
121
122 __IO uint16_t TxXferCount; /* I2S Tx transfer Counter */
123
124 uint16_t *pRxBuffPtr; /* Pointer to I2S Rx transfer buffer */
125
126 __IO uint16_t RxXferSize; /* I2S Rx transfer size */
127
128 __IO uint16_t RxXferCount; /* I2S Rx transfer counter */
129
130 DMA_HandleTypeDef *hdmatx; /* I2S Tx DMA handle parameters */
131
132 DMA_HandleTypeDef *hdmarx; /* I2S Rx DMA handle parameters */
133
134 __IO HAL_LockTypeDef Lock; /* I2S locking object */
135
136 __IO HAL_I2S_StateTypeDef State; /* I2S communication state */
137
138 __IO uint32_t ErrorCode; /* I2S Error code */
139
140 }I2S_HandleTypeDef;
141 /**
142 * @}
143 */
144
145 /* Exported constants --------------------------------------------------------*/
146 /** @defgroup I2S_Exported_Constants I2S Exported Constants
147 * @{
148 */
149
150 /** @defgroup I2S_Error_Code I2S Error Code
151 * @brief I2S Error Code
152 * @{
153 */
154 #define HAL_I2S_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
155 #define HAL_I2S_ERROR_UDR ((uint32_t)0x00000001) /*!< I2S Underrun error */
156 #define HAL_I2S_ERROR_OVR ((uint32_t)0x00000002) /*!< I2S Overrun error */
157 #define HAL_I2SEX_ERROR_UDR ((uint32_t)0x00000004) /*!< I2S extended Underrun error */
158 #define HAL_I2SEX_ERROR_OVR ((uint32_t)0x00000008) /*!< I2S extended Overrun error */
159 #define HAL_I2S_ERROR_FRE ((uint32_t)0x00000010) /*!< I2S Frame format error */
160 #define HAL_I2S_ERROR_DMA ((uint32_t)0x00000020) /*!< DMA transfer error */
161 /**
162 * @}
163 */
164
165 /** @defgroup I2S_Clock_Source I2S Clock Source
166 * @{
167 */
168 #define I2S_CLOCK_PLL ((uint32_t)0x00000000)
169 #define I2S_CLOCK_EXTERNAL ((uint32_t)0x00000001)
170 /**
171 * @}
172 */
173
174 /** @defgroup I2S_Mode I2S Mode
175 * @{
176 */
177 #define I2S_MODE_SLAVE_TX ((uint32_t)0x00000000)
178 #define I2S_MODE_SLAVE_RX ((uint32_t)0x00000100)
179 #define I2S_MODE_MASTER_TX ((uint32_t)0x00000200)
180 #define I2S_MODE_MASTER_RX ((uint32_t)0x00000300)
181 /**
182 * @}
183 */
184
185 /** @defgroup I2S_Standard I2S Standard
186 * @{
187 */
188 #define I2S_STANDARD_PHILIPS ((uint32_t)0x00000000)
189 #define I2S_STANDARD_MSB ((uint32_t)0x00000010)
190 #define I2S_STANDARD_LSB ((uint32_t)0x00000020)
191 #define I2S_STANDARD_PCM_SHORT ((uint32_t)0x00000030)
192 #define I2S_STANDARD_PCM_LONG ((uint32_t)0x000000B0)
193 /**
194 * @}
195 */
196
197 /** @defgroup I2S_Data_Format I2S Data Format
198 * @{
199 */
200 #define I2S_DATAFORMAT_16B ((uint32_t)0x00000000)
201 #define I2S_DATAFORMAT_16B_EXTENDED ((uint32_t)0x00000001)
202 #define I2S_DATAFORMAT_24B ((uint32_t)0x00000003)
203 #define I2S_DATAFORMAT_32B ((uint32_t)0x00000005)
204 /**
205 * @}
206 */
207
208 /** @defgroup I2S_MCLK_Output I2S Mclk Output
209 * @{
210 */
211 #define I2S_MCLKOUTPUT_ENABLE ((uint32_t)SPI_I2SPR_MCKOE)
212 #define I2S_MCLKOUTPUT_DISABLE ((uint32_t)0x00000000)
213 /**
214 * @}
215 */
216
217 /** @defgroup I2S_Audio_Frequency I2S Audio Frequency
218 * @{
219 */
220 #define I2S_AUDIOFREQ_192K ((uint32_t)192000)
221 #define I2S_AUDIOFREQ_96K ((uint32_t)96000)
222 #define I2S_AUDIOFREQ_48K ((uint32_t)48000)
223 #define I2S_AUDIOFREQ_44K ((uint32_t)44100)
224 #define I2S_AUDIOFREQ_32K ((uint32_t)32000)
225 #define I2S_AUDIOFREQ_22K ((uint32_t)22050)
226 #define I2S_AUDIOFREQ_16K ((uint32_t)16000)
227 #define I2S_AUDIOFREQ_11K ((uint32_t)11025)
228 #define I2S_AUDIOFREQ_8K ((uint32_t)8000)
229 #define I2S_AUDIOFREQ_DEFAULT ((uint32_t)2)
230 /**
231 * @}
232 */
233
234 /** @defgroup I2S_FullDuplex_Mode I2S FullDuplex Mode
235 * @{
236 */
237 #define I2S_FULLDUPLEXMODE_DISABLE ((uint32_t)0x00000000)
238 #define I2S_FULLDUPLEXMODE_ENABLE ((uint32_t)0x00000001)
239 /**
240 * @}
241 */
242
243 /** @defgroup I2S_Clock_Polarity I2S Clock Polarity
244 * @{
245 */
246 #define I2S_CPOL_LOW ((uint32_t)0x00000000)
247 #define I2S_CPOL_HIGH ((uint32_t)SPI_I2SCFGR_CKPOL)
248 /**
249 * @}
250 */
251
252 /** @defgroup I2S_Interrupts_Definition I2S Interrupts Definition
253 * @{
254 */
255 #define I2S_IT_TXE SPI_CR2_TXEIE
256 #define I2S_IT_RXNE SPI_CR2_RXNEIE
257 #define I2S_IT_ERR SPI_CR2_ERRIE
258 /**
259 * @}
260 */
261
262 /** @defgroup I2S_Flags_Definition I2S Flags Definition
263 * @{
264 */
265 #define I2S_FLAG_TXE SPI_SR_TXE
266 #define I2S_FLAG_RXNE SPI_SR_RXNE
267
268 #define I2S_FLAG_UDR SPI_SR_UDR
269 #define I2S_FLAG_OVR SPI_SR_OVR
270 #define I2S_FLAG_FRE SPI_SR_FRE
271
272 #define I2S_FLAG_CHSIDE SPI_SR_CHSIDE
273 #define I2S_FLAG_BSY SPI_SR_BSY
274 /**
275 * @}
276 */
277
278 /**
279 * @}
280 */
281
282 /* Exported macro ------------------------------------------------------------*/
283 /** @defgroup I2S_Exported_Macros I2S Exported Macros
284 * @{
285 */
286
287 /** @brief Reset I2S handle state
288 * @param __HANDLE__: specifies the I2S Handle.
289 * @retval None
290 */
291 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)
292
293 /** @brief Enable or disable the specified SPI peripheral (in I2S mode).
294 * @param __HANDLE__: specifies the I2S Handle.
295 * @retval None
296 */
297 #define __HAL_I2S_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR |= SPI_I2SCFGR_I2SE)
298 #define __HAL_I2S_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR &= ~SPI_I2SCFGR_I2SE)
299
300 /** @brief Enable or disable the specified I2S interrupts.
301 * @param __HANDLE__: specifies the I2S Handle.
302 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
303 * This parameter can be one of the following values:
304 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
305 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
306 * @arg I2S_IT_ERR: Error interrupt enable
307 * @retval None
308 */
309 #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
310 #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= ~(__INTERRUPT__))
311
312 /** @brief Checks if the specified I2S interrupt source is enabled or disabled.
313 * @param __HANDLE__: specifies the I2S Handle.
314 * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral.
315 * @param __INTERRUPT__: specifies the I2S interrupt source to check.
316 * This parameter can be one of the following values:
317 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
318 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
319 * @arg I2S_IT_ERR: Error interrupt enable
320 * @retval The new state of __IT__ (TRUE or FALSE).
321 */
322 #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
323
324 /** @brief Checks whether the specified I2S flag is set or not.
325 * @param __HANDLE__: specifies the I2S Handle.
326 * @param __FLAG__: specifies the flag to check.
327 * This parameter can be one of the following values:
328 * @arg I2S_FLAG_RXNE: Receive buffer not empty flag
329 * @arg I2S_FLAG_TXE: Transmit buffer empty flag
330 * @arg I2S_FLAG_UDR: Underrun flag
331 * @arg I2S_FLAG_OVR: Overrun flag
332 * @arg I2S_FLAG_FRE: Frame error flag
333 * @arg I2S_FLAG_CHSIDE: Channel Side flag
334 * @arg I2S_FLAG_BSY: Busy flag
335 * @retval The new state of __FLAG__ (TRUE or FALSE).
336 */
337 #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
338
339 /** @brief Clears the I2S OVR pending flag.
340 * @param __HANDLE__: specifies the I2S Handle.
341 * @retval None
342 */
343 #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) \
344 do{ \
345 __IO uint32_t tmpreg; \
346 tmpreg = (__HANDLE__)->Instance->DR; \
347 tmpreg = (__HANDLE__)->Instance->SR; \
348 UNUSED(tmpreg); \
349 } while(0)
350
351 /** @brief Clears the I2S UDR pending flag.
352 * @param __HANDLE__: specifies the I2S Handle.
353 * @retval None
354 */
355 #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) \
356 do{ \
357 __IO uint32_t tmpreg; \
358 tmpreg = (__HANDLE__)->Instance->SR; \
359 UNUSED(tmpreg); \
360 } while(0)
361 /**
362 * @}
363 */
364
365 /* Include I2S Extension module */
366 #include "stm32f4xx_hal_i2s_ex.h"
367
368 /* Exported functions --------------------------------------------------------*/
369 /** @addtogroup I2S_Exported_Functions
370 * @{
371 */
372
373 /** @addtogroup I2S_Exported_Functions_Group1
374 * @{
375 */
376 /* Initialization/de-initialization functions **********************************/
377 HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s);
378 HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s);
379 void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s);
380 void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
381 /**
382 * @}
383 */
384
385 /** @addtogroup I2S_Exported_Functions_Group2
386 * @{
387 */
388 /* I/O operation functions *****************************************************/
389 /* Blocking mode: Polling */
390 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
391 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
392
393 /* Non-Blocking mode: Interrupt */
394 HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
395 HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
396 void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s);
397
398 /* Non-Blocking mode: DMA */
399 HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
400 HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
401
402 HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s);
403 HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s);
404 HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s);
405
406 /* Peripheral Control and State functions **************************************/
407 HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s);
408 uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s);
409
410 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
411 void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
412 void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s);
413 void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
414 void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s);
415 void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s);
416 /**
417 * @}
418 */
419
420 /**
421 * @}
422 */
423
424 /* Private types -------------------------------------------------------------*/
425 /* Private variables ---------------------------------------------------------*/
426 /* Private constants ---------------------------------------------------------*/
427 /** @defgroup I2S_Private_Constants I2S Private Constants
428 * @{
429 */
430
431 /**
432 * @}
433 */
434
435 /* Private macros ------------------------------------------------------------*/
436 /** @defgroup I2S_Private_Macros I2S Private Macros
437 * @{
438 */
439 #define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) || \
440 ((CLOCK) == I2S_CLOCK_PLL))
441
442 #define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \
443 ((MODE) == I2S_MODE_SLAVE_RX) || \
444 ((MODE) == I2S_MODE_MASTER_TX) || \
445 ((MODE) == I2S_MODE_MASTER_RX))
446
447 #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS) || \
448 ((STANDARD) == I2S_STANDARD_MSB) || \
449 ((STANDARD) == I2S_STANDARD_LSB) || \
450 ((STANDARD) == I2S_STANDARD_PCM_SHORT) || \
451 ((STANDARD) == I2S_STANDARD_PCM_LONG))
452
453 #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B) || \
454 ((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \
455 ((FORMAT) == I2S_DATAFORMAT_24B) || \
456 ((FORMAT) == I2S_DATAFORMAT_32B))
457
458 #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \
459 ((OUTPUT) == I2S_MCLKOUTPUT_DISABLE))
460
461 #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \
462 ((FREQ) <= I2S_AUDIOFREQ_192K)) || \
463 ((FREQ) == I2S_AUDIOFREQ_DEFAULT))
464
465 #define IS_I2S_FULLDUPLEX_MODE(MODE) (((MODE) == I2S_FULLDUPLEXMODE_DISABLE) || \
466 ((MODE) == I2S_FULLDUPLEXMODE_ENABLE))
467
468 #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \
469 ((CPOL) == I2S_CPOL_HIGH))
470
471 #define I2SxEXT(__INSTANCE__) ((__INSTANCE__) == (SPI2)? (SPI_TypeDef *)(I2S2ext_BASE): (SPI_TypeDef *)(I2S3ext_BASE))
472 /**
473 * @}
474 */
475
476 /* Private functions ---------------------------------------------------------*/
477 /** @defgroup I2S_Private_Functions I2S Private Functions
478 * @{
479 */
480 void I2S_DMATxCplt(DMA_HandleTypeDef *hdma);
481 void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
482 void I2S_DMARxCplt(DMA_HandleTypeDef *hdma);
483 void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
484 void I2S_DMAError(DMA_HandleTypeDef *hdma);
485 HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t Status, uint32_t Timeout);
486 /**
487 * @}
488 */
489
490 /**
491 * @}
492 */
493
494 /**
495 * @}
496 */
497
498 #ifdef __cplusplus
499 }
500 #endif
501
502
503 #endif /* __STM32F4xx_HAL_I2S_H */
504
505 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/