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comparison Common/Drivers/STM32F4xx_HAL_DRIVER_v120/Inc/stm32f4xx_hal_dma2d.h @ 38:5f11787b4f42

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date Sat, 28 Apr 2018 11:52:34 +0200
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1 /**
2 ******************************************************************************
3 * @file stm32f4xx_hal_dma2d.h
4 * @author MCD Application Team
5 * @version V1.2.0
6 * @date 26-December-2014
7 * @brief Header file of DMA2D HAL module.
8 ******************************************************************************
9 * @attention
10 *
11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
12 *
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 ******************************************************************************
36 */
37
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32F4xx_HAL_DMA2D_H
40 #define __STM32F4xx_HAL_DMA2D_H
41
42 #ifdef __cplusplus
43 extern "C" {
44 #endif
45
46 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
47 /* Includes ------------------------------------------------------------------*/
48 #include "stm32f4xx_hal_def.h"
49
50 /** @addtogroup STM32F4xx_HAL_Driver
51 * @{
52 */
53
54 /** @defgroup DMA2D DMA2D
55 * @brief DMA2D HAL module driver
56 * @{
57 */
58
59 /* Exported types ------------------------------------------------------------*/
60 /** @defgroup DMA2D_Exported_Types DMA2D Exported Types
61 * @{
62 */
63 #define MAX_DMA2D_LAYER 2
64
65 /**
66 * @brief DMA2D color Structure definition
67 */
68 typedef struct
69 {
70 uint32_t Blue; /*!< Configures the blue value.
71 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
72
73 uint32_t Green; /*!< Configures the green value.
74 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
75
76 uint32_t Red; /*!< Configures the red value.
77 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
78 } DMA2D_ColorTypeDef;
79
80 /**
81 * @brief DMA2D CLUT Structure definition
82 */
83 typedef struct
84 {
85 uint32_t *pCLUT; /*!< Configures the DMA2D CLUT memory address.*/
86
87 uint32_t CLUTColorMode; /*!< configures the DMA2D CLUT color mode.
88 This parameter can be one value of @ref DMA2D_CLUT_CM */
89
90 uint32_t Size; /*!< configures the DMA2D CLUT size.
91 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.*/
92 } DMA2D_CLUTCfgTypeDef;
93
94 /**
95 * @brief DMA2D Init structure definition
96 */
97 typedef struct
98 {
99 uint32_t Mode; /*!< configures the DMA2D transfer mode.
100 This parameter can be one value of @ref DMA2D_Mode */
101
102 uint32_t ColorMode; /*!< configures the color format of the output image.
103 This parameter can be one value of @ref DMA2D_Color_Mode */
104
105 uint32_t OutputOffset; /*!< Specifies the Offset value.
106 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */
107 } DMA2D_InitTypeDef;
108
109 /**
110 * @brief DMA2D Layer structure definition
111 */
112 typedef struct
113 {
114 uint32_t InputOffset; /*!< configures the DMA2D foreground offset.
115 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */
116
117 uint32_t InputColorMode; /*!< configures the DMA2D foreground color mode .
118 This parameter can be one value of @ref DMA2D_Input_Color_Mode */
119
120 uint32_t AlphaMode; /*!< configures the DMA2D foreground alpha mode.
121 This parameter can be one value of @ref DMA2D_ALPHA_MODE */
122
123 uint32_t InputAlpha; /*!< Specifies the DMA2D foreground alpha value and color value in case of A8 or A4 color mode.
124 This parameter must be a number between Min_Data = 0x00000000 and Max_Data = 0xFFFFFFFF
125 in case of A8 or A4 color mode (ARGB).
126 Otherwise, This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.*/
127
128 } DMA2D_LayerCfgTypeDef;
129
130 /**
131 * @brief HAL DMA2D State structures definition
132 */
133 typedef enum
134 {
135 HAL_DMA2D_STATE_RESET = 0x00, /*!< DMA2D not yet initialized or disabled */
136 HAL_DMA2D_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
137 HAL_DMA2D_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
138 HAL_DMA2D_STATE_TIMEOUT = 0x03, /*!< Timeout state */
139 HAL_DMA2D_STATE_ERROR = 0x04, /*!< DMA2D state error */
140 HAL_DMA2D_STATE_SUSPEND = 0x05 /*!< DMA2D process is suspended */
141 }HAL_DMA2D_StateTypeDef;
142
143 /**
144 * @brief DMA2D handle Structure definition
145 */
146 typedef struct __DMA2D_HandleTypeDef
147 {
148 DMA2D_TypeDef *Instance; /*!< DMA2D Register base address */
149
150 DMA2D_InitTypeDef Init; /*!< DMA2D communication parameters */
151
152 void (* XferCpltCallback)(struct __DMA2D_HandleTypeDef * hdma2d); /*!< DMA2D transfer complete callback */
153
154 void (* XferErrorCallback)(struct __DMA2D_HandleTypeDef * hdma2d); /*!< DMA2D transfer error callback */
155
156 DMA2D_LayerCfgTypeDef LayerCfg[MAX_DMA2D_LAYER]; /*!< DMA2D Layers parameters */
157
158 HAL_LockTypeDef Lock; /*!< DMA2D Lock */
159
160 __IO HAL_DMA2D_StateTypeDef State; /*!< DMA2D transfer state */
161
162 __IO uint32_t ErrorCode; /*!< DMA2D Error code */
163 } DMA2D_HandleTypeDef;
164 /**
165 * @}
166 */
167
168 /* Exported constants --------------------------------------------------------*/
169 /** @defgroup DMA2D_Exported_Constants DMA2D Exported Constants
170 * @{
171 */
172
173 /** @defgroup DMA2D_Error_Code DMA2D Error Code
174 * @{
175 */
176 #define HAL_DMA2D_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
177 #define HAL_DMA2D_ERROR_TE ((uint32_t)0x00000001) /*!< Transfer error */
178 #define HAL_DMA2D_ERROR_CE ((uint32_t)0x00000002) /*!< Configuration error */
179 #define HAL_DMA2D_ERROR_TIMEOUT ((uint32_t)0x00000020) /*!< Timeout error */
180 /**
181 * @}
182 */
183
184 /** @defgroup DMA2D_Mode DMA2D Mode
185 * @{
186 */
187 #define DMA2D_M2M ((uint32_t)0x00000000) /*!< DMA2D memory to memory transfer mode */
188 #define DMA2D_M2M_PFC ((uint32_t)0x00010000) /*!< DMA2D memory to memory with pixel format conversion transfer mode */
189 #define DMA2D_M2M_BLEND ((uint32_t)0x00020000) /*!< DMA2D memory to memory with blending transfer mode */
190 #define DMA2D_R2M ((uint32_t)0x00030000) /*!< DMA2D register to memory transfer mode */
191 /**
192 * @}
193 */
194
195 /** @defgroup DMA2D_Color_Mode DMA2D Color Mode
196 * @{
197 */
198 #define DMA2D_ARGB8888 ((uint32_t)0x00000000) /*!< ARGB8888 DMA2D color mode */
199 #define DMA2D_RGB888 ((uint32_t)0x00000001) /*!< RGB888 DMA2D color mode */
200 #define DMA2D_RGB565 ((uint32_t)0x00000002) /*!< RGB565 DMA2D color mode */
201 #define DMA2D_ARGB1555 ((uint32_t)0x00000003) /*!< ARGB1555 DMA2D color mode */
202 #define DMA2D_ARGB4444 ((uint32_t)0x00000004) /*!< ARGB4444 DMA2D color mode */
203 /**
204 * @}
205 */
206
207 /** @defgroup DMA2D_COLOR_VALUE DMA2D COLOR VALUE
208 * @{
209 */
210 #define COLOR_VALUE ((uint32_t)0x000000FF) /*!< color value mask */
211 /**
212 * @}
213 */
214
215 /** @defgroup DMA2D_SIZE DMA2D SIZE
216 * @{
217 */
218 #define DMA2D_PIXEL (DMA2D_NLR_PL >> 16) /*!< DMA2D pixel per line */
219 #define DMA2D_LINE DMA2D_NLR_NL /*!< DMA2D number of line */
220 /**
221 * @}
222 */
223
224 /** @defgroup DMA2D_Offset DMA2D Offset
225 * @{
226 */
227 #define DMA2D_OFFSET DMA2D_FGOR_LO /*!< Line Offset */
228 /**
229 * @}
230 */
231
232 /** @defgroup DMA2D_Input_Color_Mode DMA2D Input Color Mode
233 * @{
234 */
235 #define CM_ARGB8888 ((uint32_t)0x00000000) /*!< ARGB8888 color mode */
236 #define CM_RGB888 ((uint32_t)0x00000001) /*!< RGB888 color mode */
237 #define CM_RGB565 ((uint32_t)0x00000002) /*!< RGB565 color mode */
238 #define CM_ARGB1555 ((uint32_t)0x00000003) /*!< ARGB1555 color mode */
239 #define CM_ARGB4444 ((uint32_t)0x00000004) /*!< ARGB4444 color mode */
240 #define CM_L8 ((uint32_t)0x00000005) /*!< L8 color mode */
241 #define CM_AL44 ((uint32_t)0x00000006) /*!< AL44 color mode */
242 #define CM_AL88 ((uint32_t)0x00000007) /*!< AL88 color mode */
243 #define CM_L4 ((uint32_t)0x00000008) /*!< L4 color mode */
244 #define CM_A8 ((uint32_t)0x00000009) /*!< A8 color mode */
245 #define CM_A4 ((uint32_t)0x0000000A) /*!< A4 color mode */
246 /**
247 * @}
248 */
249
250 /** @defgroup DMA2D_ALPHA_MODE DMA2D ALPHA MODE
251 * @{
252 */
253 #define DMA2D_NO_MODIF_ALPHA ((uint32_t)0x00000000) /*!< No modification of the alpha channel value */
254 #define DMA2D_REPLACE_ALPHA ((uint32_t)0x00000001) /*!< Replace original alpha channel value by programmed alpha value */
255 #define DMA2D_COMBINE_ALPHA ((uint32_t)0x00000002) /*!< Replace original alpha channel value by programmed alpha value
256 with original alpha channel value */
257 /**
258 * @}
259 */
260
261 /** @defgroup DMA2D_CLUT_CM DMA2D CLUT CM
262 * @{
263 */
264 #define DMA2D_CCM_ARGB8888 ((uint32_t)0x00000000) /*!< ARGB8888 DMA2D C-LUT color mode */
265 #define DMA2D_CCM_RGB888 ((uint32_t)0x00000001) /*!< RGB888 DMA2D C-LUT color mode */
266 /**
267 * @}
268 */
269
270 /** @defgroup DMA2D_Size_Clut DMA2D Size Clut
271 * @{
272 */
273 #define DMA2D_CLUT_SIZE (DMA2D_FGPFCCR_CS >> 8) /*!< DMA2D C-LUT size */
274 /**
275 * @}
276 */
277
278 /** @defgroup DMA2D_DeadTime DMA2D DeadTime
279 * @{
280 */
281 #define LINE_WATERMARK DMA2D_LWR_LW
282 /**
283 * @}
284 */
285
286 /** @defgroup DMA2D_Interrupts DMA2D Interrupts
287 * @{
288 */
289 #define DMA2D_IT_CE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */
290 #define DMA2D_IT_CTC DMA2D_CR_CTCIE /*!< C-LUT Transfer Complete Interrupt */
291 #define DMA2D_IT_CAE DMA2D_CR_CAEIE /*!< C-LUT Access Error Interrupt */
292 #define DMA2D_IT_TW DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
293 #define DMA2D_IT_TC DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */
294 #define DMA2D_IT_TE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
295 /**
296 * @}
297 */
298
299 /** @defgroup DMA2D_Flag DMA2D Flag
300 * @{
301 */
302 #define DMA2D_FLAG_CE DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */
303 #define DMA2D_FLAG_CTC DMA2D_ISR_CTCIF /*!< C-LUT Transfer Complete Interrupt Flag */
304 #define DMA2D_FLAG_CAE DMA2D_ISR_CAEIF /*!< C-LUT Access Error Interrupt Flag */
305 #define DMA2D_FLAG_TW DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */
306 #define DMA2D_FLAG_TC DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */
307 #define DMA2D_FLAG_TE DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */
308 /**
309 * @}
310 */
311
312 /**
313 * @}
314 */
315 /* Exported macro ------------------------------------------------------------*/
316 /** @defgroup DMA2D_Exported_Macros DMA2D Exported Macros
317 * @{
318 */
319
320 /** @brief Reset DMA2D handle state
321 * @param __HANDLE__: specifies the DMA2D handle.
322 * @retval None
323 */
324 #define __HAL_DMA2D_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA2D_STATE_RESET)
325
326 /**
327 * @brief Enable the DMA2D.
328 * @param __HANDLE__: DMA2D handle
329 * @retval None.
330 */
331 #define __HAL_DMA2D_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= DMA2D_CR_START)
332
333 /**
334 * @brief Disable the DMA2D.
335 * @param __HANDLE__: DMA2D handle
336 * @retval None.
337 */
338 #define __HAL_DMA2D_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~DMA2D_CR_START)
339
340 /* Interrupt & Flag management */
341 /**
342 * @brief Get the DMA2D pending flags.
343 * @param __HANDLE__: DMA2D handle
344 * @param __FLAG__: Get the specified flag.
345 * This parameter can be any combination of the following values:
346 * @arg DMA2D_FLAG_CE: Configuration error flag
347 * @arg DMA2D_FLAG_CTC: C-LUT transfer complete flag
348 * @arg DMA2D_FLAG_CAE: C-LUT access error flag
349 * @arg DMA2D_FLAG_TW: Transfer Watermark flag
350 * @arg DMA2D_FLAG_TC: Transfer complete flag
351 * @arg DMA2D_FLAG_TE: Transfer error flag
352 * @retval The state of FLAG.
353 */
354 #define __HAL_DMA2D_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR & (__FLAG__))
355
356 /**
357 * @brief Clears the DMA2D pending flags.
358 * @param __HANDLE__: DMA2D handle
359 * @param __FLAG__: specifies the flag to clear.
360 * This parameter can be any combination of the following values:
361 * @arg DMA2D_FLAG_CE: Configuration error flag
362 * @arg DMA2D_FLAG_CTC: C-LUT transfer complete flag
363 * @arg DMA2D_FLAG_CAE: C-LUT access error flag
364 * @arg DMA2D_FLAG_TW: Transfer Watermark flag
365 * @arg DMA2D_FLAG_TC: Transfer complete flag
366 * @arg DMA2D_FLAG_TE: Transfer error flag
367 * @retval None
368 */
369 #define __HAL_DMA2D_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->IFCR = (__FLAG__))
370
371 /**
372 * @brief Enables the specified DMA2D interrupts.
373 * @param __HANDLE__: DMA2D handle
374 * @param __INTERRUPT__: specifies the DMA2D interrupt sources to be enabled.
375 * This parameter can be any combination of the following values:
376 * @arg DMA2D_IT_CE: Configuration error interrupt mask
377 * @arg DMA2D_IT_CTC: C-LUT transfer complete interrupt mask
378 * @arg DMA2D_IT_CAE: C-LUT access error interrupt mask
379 * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
380 * @arg DMA2D_IT_TC: Transfer complete interrupt mask
381 * @arg DMA2D_IT_TE: Transfer error interrupt mask
382 * @retval None
383 */
384 #define __HAL_DMA2D_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__))
385
386 /**
387 * @brief Disables the specified DMA2D interrupts.
388 * @param __HANDLE__: DMA2D handle
389 * @param __INTERRUPT__: specifies the DMA2D interrupt sources to be disabled.
390 * This parameter can be any combination of the following values:
391 * @arg DMA2D_IT_CE: Configuration error interrupt mask
392 * @arg DMA2D_IT_CTC: C-LUT transfer complete interrupt mask
393 * @arg DMA2D_IT_CAE: C-LUT access error interrupt mask
394 * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
395 * @arg DMA2D_IT_TC: Transfer complete interrupt mask
396 * @arg DMA2D_IT_TE: Transfer error interrupt mask
397 * @retval None
398 */
399 #define __HAL_DMA2D_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
400
401 /**
402 * @brief Checks whether the specified DMA2D interrupt has occurred or not.
403 * @param __HANDLE__: DMA2D handle
404 * @param __INTERRUPT__: specifies the DMA2D interrupt source to check.
405 * This parameter can be one of the following values:
406 * @arg DMA2D_IT_CE: Configuration error interrupt mask
407 * @arg DMA2D_IT_CTC: C-LUT transfer complete interrupt mask
408 * @arg DMA2D_IT_CAE: C-LUT access error interrupt mask
409 * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
410 * @arg DMA2D_IT_TC: Transfer complete interrupt mask
411 * @arg DMA2D_IT_TE: Transfer error interrupt mask
412 * @retval The state of INTERRUPT.
413 */
414 #define __HAL_DMA2D_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR & (__INTERRUPT__))
415 /**
416 * @}
417 */
418
419 /* Exported functions --------------------------------------------------------*/
420 /** @defgroup DMA2D_Exported_Functions DMA2D Exported Functions
421 * @{
422 */
423 /* Initialization and de-initialization functions *******************************/
424 HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d);
425 HAL_StatusTypeDef HAL_DMA2D_DeInit (DMA2D_HandleTypeDef *hdma2d);
426 void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d);
427 void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d);
428
429 /* IO operation functions *******************************************************/
430 HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
431 HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height);
432 HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
433 HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height);
434 HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d);
435 HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d);
436 HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d);
437 HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout);
438 void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d);
439
440 /* Peripheral Control functions *************************************************/
441 HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
442 HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx);
443 HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
444 HAL_StatusTypeDef HAL_DMA2D_DisableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
445 HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent(DMA2D_HandleTypeDef *hdma2d, uint32_t Line);
446
447 /* Peripheral State functions ***************************************************/
448 HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d);
449 uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d);
450 /**
451 * @}
452 */
453
454 /* Private types -------------------------------------------------------------*/
455 /** @defgroup DMA2D_Private_Types DMA2D Private Types
456 * @{
457 */
458
459 /**
460 * @}
461 */
462
463 /* Private defines -------------------------------------------------------------*/
464 /** @defgroup DMA2D_Private_Defines DMA2D Private Defines
465 * @{
466 */
467
468 /**
469 * @}
470 */
471
472 /* Private variables ---------------------------------------------------------*/
473 /** @defgroup DMA2D_Private_Variables DMA2D Private Variables
474 * @{
475 */
476
477 /**
478 * @}
479 */
480
481 /* Private constants ---------------------------------------------------------*/
482 /** @defgroup DMA2D_Private_Constants DMA2D Private Constants
483 * @{
484 */
485
486 /**
487 * @}
488 */
489
490 /* Private macros ------------------------------------------------------------*/
491 /** @defgroup DMA2D_Private_Macros DMA2D Private Macros
492 * @{
493 */
494 #define IS_DMA2D_LAYER(LAYER) ((LAYER) <= MAX_DMA2D_LAYER)
495 #define IS_DMA2D_MODE(MODE) (((MODE) == DMA2D_M2M) || ((MODE) == DMA2D_M2M_PFC) || \
496 ((MODE) == DMA2D_M2M_BLEND) || ((MODE) == DMA2D_R2M))
497 #define IS_DMA2D_CMODE(MODE_ARGB) (((MODE_ARGB) == DMA2D_ARGB8888) || ((MODE_ARGB) == DMA2D_RGB888) || \
498 ((MODE_ARGB) == DMA2D_RGB565) || ((MODE_ARGB) == DMA2D_ARGB1555) || \
499 ((MODE_ARGB) == DMA2D_ARGB4444))
500 #define IS_DMA2D_COLOR(COLOR) ((COLOR) <= COLOR_VALUE)
501 #define IS_DMA2D_LINE(LINE) ((LINE) <= DMA2D_LINE)
502 #define IS_DMA2D_PIXEL(PIXEL) ((PIXEL) <= DMA2D_PIXEL)
503 #define IS_DMA2D_OFFSET(OOFFSET) ((OOFFSET) <= DMA2D_OFFSET)
504 #define IS_DMA2D_INPUT_COLOR_MODE(INPUT_CM) (((INPUT_CM) == CM_ARGB8888) || ((INPUT_CM) == CM_RGB888) || \
505 ((INPUT_CM) == CM_RGB565) || ((INPUT_CM) == CM_ARGB1555) || \
506 ((INPUT_CM) == CM_ARGB4444) || ((INPUT_CM) == CM_L8) || \
507 ((INPUT_CM) == CM_AL44) || ((INPUT_CM) == CM_AL88) || \
508 ((INPUT_CM) == CM_L4) || ((INPUT_CM) == CM_A8) || \
509 ((INPUT_CM) == CM_A4))
510 #define IS_DMA2D_ALPHA_MODE(AlphaMode) (((AlphaMode) == DMA2D_NO_MODIF_ALPHA) || \
511 ((AlphaMode) == DMA2D_REPLACE_ALPHA) || \
512 ((AlphaMode) == DMA2D_COMBINE_ALPHA))
513 #define IS_DMA2D_CLUT_CM(CLUT_CM) (((CLUT_CM) == DMA2D_CCM_ARGB8888) || ((CLUT_CM) == DMA2D_CCM_RGB888))
514 #define IS_DMA2D_CLUT_SIZE(CLUT_SIZE) ((CLUT_SIZE) <= DMA2D_CLUT_SIZE)
515 #define IS_DMA2D_LineWatermark(LineWatermark) ((LineWatermark) <= LINE_WATERMARK)
516 /**
517 * @}
518 */
519
520 /* Private functions prototypes ---------------------------------------------------------*/
521 /** @defgroup DMA2D_Private_Functions_Prototypes DMA2D Private Functions Prototypes
522 * @{
523 */
524
525 /**
526 * @}
527 */
528
529 /* Private functions ---------------------------------------------------------*/
530 /** @defgroup DMA2D_Private_Functions DMA2D Private Functions
531 * @{
532 */
533
534 /**
535 * @}
536 */
537
538 /**
539 * @}
540 */
541
542 /**
543 * @}
544 */
545
546 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
547
548 #ifdef __cplusplus
549 }
550 #endif
551
552 #endif /* __STM32F4xx_HAL_DMA2D_H */
553
554 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/