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comparison Common/Drivers/STM32F4xx_HAL_DRIVER_v120/Inc/stm32f4xx_hal_can.h @ 38:5f11787b4f42

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date Sat, 28 Apr 2018 11:52:34 +0200
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1 /**
2 ******************************************************************************
3 * @file stm32f4xx_hal_can.h
4 * @author MCD Application Team
5 * @version V1.2.0
6 * @date 26-December-2014
7 * @brief Header file of CAN HAL module.
8 ******************************************************************************
9 * @attention
10 *
11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
12 *
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 ******************************************************************************
36 */
37
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32F4xx_HAL_CAN_H
40 #define __STM32F4xx_HAL_CAN_H
41
42 #ifdef __cplusplus
43 extern "C" {
44 #endif
45
46 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
47 /* Includes ------------------------------------------------------------------*/
48 #include "stm32f4xx_hal_def.h"
49
50 /** @addtogroup STM32F4xx_HAL_Driver
51 * @{
52 */
53
54 /** @addtogroup CAN
55 * @{
56 */
57
58 /* Exported types ------------------------------------------------------------*/
59 /** @defgroup CAN_Exported_Types CAN Exported Types
60 * @{
61 */
62
63 /**
64 * @brief HAL State structures definition
65 */
66 typedef enum
67 {
68 HAL_CAN_STATE_RESET = 0x00, /*!< CAN not yet initialized or disabled */
69 HAL_CAN_STATE_READY = 0x01, /*!< CAN initialized and ready for use */
70 HAL_CAN_STATE_BUSY = 0x02, /*!< CAN process is ongoing */
71 HAL_CAN_STATE_BUSY_TX = 0x12, /*!< CAN process is ongoing */
72 HAL_CAN_STATE_BUSY_RX = 0x22, /*!< CAN process is ongoing */
73 HAL_CAN_STATE_BUSY_TX_RX = 0x32, /*!< CAN process is ongoing */
74 HAL_CAN_STATE_TIMEOUT = 0x03, /*!< Timeout state */
75 HAL_CAN_STATE_ERROR = 0x04 /*!< CAN error state */
76
77 }HAL_CAN_StateTypeDef;
78
79 /**
80 * @brief CAN init structure definition
81 */
82 typedef struct
83 {
84 uint32_t Prescaler; /*!< Specifies the length of a time quantum.
85 This parameter must be a number between Min_Data = 1 and Max_Data = 1024 */
86
87 uint32_t Mode; /*!< Specifies the CAN operating mode.
88 This parameter can be a value of @ref CAN_operating_mode */
89
90 uint32_t SJW; /*!< Specifies the maximum number of time quanta
91 the CAN hardware is allowed to lengthen or
92 shorten a bit to perform resynchronization.
93 This parameter can be a value of @ref CAN_synchronisation_jump_width */
94
95 uint32_t BS1; /*!< Specifies the number of time quanta in Bit Segment 1.
96 This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */
97
98 uint32_t BS2; /*!< Specifies the number of time quanta in Bit Segment 2.
99 This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */
100
101 uint32_t TTCM; /*!< Enable or disable the time triggered communication mode.
102 This parameter can be set to ENABLE or DISABLE. */
103
104 uint32_t ABOM; /*!< Enable or disable the automatic bus-off management.
105 This parameter can be set to ENABLE or DISABLE */
106
107 uint32_t AWUM; /*!< Enable or disable the automatic wake-up mode.
108 This parameter can be set to ENABLE or DISABLE */
109
110 uint32_t NART; /*!< Enable or disable the non-automatic retransmission mode.
111 This parameter can be set to ENABLE or DISABLE */
112
113 uint32_t RFLM; /*!< Enable or disable the receive FIFO Locked mode.
114 This parameter can be set to ENABLE or DISABLE */
115
116 uint32_t TXFP; /*!< Enable or disable the transmit FIFO priority.
117 This parameter can be set to ENABLE or DISABLE */
118 }CAN_InitTypeDef;
119
120 /**
121 * @brief CAN filter configuration structure definition
122 */
123 typedef struct
124 {
125 uint32_t FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit
126 configuration, first one for a 16-bit configuration).
127 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
128
129 uint32_t FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit
130 configuration, second one for a 16-bit configuration).
131 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
132
133 uint32_t FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number,
134 according to the mode (MSBs for a 32-bit configuration,
135 first one for a 16-bit configuration).
136 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
137
138 uint32_t FilterMaskIdLow; /*!< Specifies the filter mask number or identification number,
139 according to the mode (LSBs for a 32-bit configuration,
140 second one for a 16-bit configuration).
141 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
142
143 uint32_t FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1) which will be assigned to the filter.
144 This parameter can be a value of @ref CAN_filter_FIFO */
145
146 uint32_t FilterNumber; /*!< Specifies the filter which will be initialized.
147 This parameter must be a number between Min_Data = 0 and Max_Data = 27 */
148
149 uint32_t FilterMode; /*!< Specifies the filter mode to be initialized.
150 This parameter can be a value of @ref CAN_filter_mode */
151
152 uint32_t FilterScale; /*!< Specifies the filter scale.
153 This parameter can be a value of @ref CAN_filter_scale */
154
155 uint32_t FilterActivation; /*!< Enable or disable the filter.
156 This parameter can be set to ENABLE or DISABLE. */
157
158 uint32_t BankNumber; /*!< Select the start slave bank filter.
159 This parameter must be a number between Min_Data = 0 and Max_Data = 28 */
160
161 }CAN_FilterConfTypeDef;
162
163 /**
164 * @brief CAN Tx message structure definition
165 */
166 typedef struct
167 {
168 uint32_t StdId; /*!< Specifies the standard identifier.
169 This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */
170
171 uint32_t ExtId; /*!< Specifies the extended identifier.
172 This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */
173
174 uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted.
175 This parameter can be a value of @ref CAN_Identifier_Type */
176
177 uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted.
178 This parameter can be a value of @ref CAN_remote_transmission_request */
179
180 uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted.
181 This parameter must be a number between Min_Data = 0 and Max_Data = 8 */
182
183 uint32_t Data[8]; /*!< Contains the data to be transmitted.
184 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
185
186 }CanTxMsgTypeDef;
187
188 /**
189 * @brief CAN Rx message structure definition
190 */
191 typedef struct
192 {
193 uint32_t StdId; /*!< Specifies the standard identifier.
194 This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */
195
196 uint32_t ExtId; /*!< Specifies the extended identifier.
197 This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */
198
199 uint32_t IDE; /*!< Specifies the type of identifier for the message that will be received.
200 This parameter can be a value of @ref CAN_Identifier_Type */
201
202 uint32_t RTR; /*!< Specifies the type of frame for the received message.
203 This parameter can be a value of @ref CAN_remote_transmission_request */
204
205 uint32_t DLC; /*!< Specifies the length of the frame that will be received.
206 This parameter must be a number between Min_Data = 0 and Max_Data = 8 */
207
208 uint32_t Data[8]; /*!< Contains the data to be received.
209 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
210
211 uint32_t FMI; /*!< Specifies the index of the filter the message stored in the mailbox passes through.
212 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
213
214 uint32_t FIFONumber; /*!< Specifies the receive FIFO number.
215 This parameter can be CAN_FIFO0 or CAN_FIFO1 */
216
217 }CanRxMsgTypeDef;
218
219 /**
220 * @brief CAN handle Structure definition
221 */
222 typedef struct
223 {
224 CAN_TypeDef *Instance; /*!< Register base address */
225
226 CAN_InitTypeDef Init; /*!< CAN required parameters */
227
228 CanTxMsgTypeDef* pTxMsg; /*!< Pointer to transmit structure */
229
230 CanRxMsgTypeDef* pRxMsg; /*!< Pointer to reception structure */
231
232 __IO HAL_CAN_StateTypeDef State; /*!< CAN communication state */
233
234 HAL_LockTypeDef Lock; /*!< CAN locking object */
235
236 __IO uint32_t ErrorCode; /*!< CAN Error code */
237
238 }CAN_HandleTypeDef;
239
240 /**
241 * @}
242 */
243
244 /* Exported constants --------------------------------------------------------*/
245 /** @defgroup CAN_Exported_Constants CAN Exported Constants
246 * @{
247 */
248
249 /** @defgroup HAL_CAN_Error_Code HAL CAN Error Code
250 * @{
251 */
252 #define HAL_CAN_ERROR_NONE 0x00 /*!< No error */
253 #define HAL_CAN_ERROR_EWG 0x01 /*!< EWG error */
254 #define HAL_CAN_ERROR_EPV 0x02 /*!< EPV error */
255 #define HAL_CAN_ERROR_BOF 0x04 /*!< BOF error */
256 #define HAL_CAN_ERROR_STF 0x08 /*!< Stuff error */
257 #define HAL_CAN_ERROR_FOR 0x10 /*!< Form error */
258 #define HAL_CAN_ERROR_ACK 0x20 /*!< Acknowledgment error */
259 #define HAL_CAN_ERROR_BR 0x40 /*!< Bit recessive */
260 #define HAL_CAN_ERROR_BD 0x80 /*!< LEC dominant */
261 #define HAL_CAN_ERROR_CRC 0x100 /*!< LEC transfer error */
262 /**
263 * @}
264 */
265
266 /** @defgroup CAN_InitStatus CAN InitStatus
267 * @{
268 */
269 #define CAN_INITSTATUS_FAILED ((uint8_t)0x00) /*!< CAN initialization failed */
270 #define CAN_INITSTATUS_SUCCESS ((uint8_t)0x01) /*!< CAN initialization OK */
271 /**
272 * @}
273 */
274
275 /** @defgroup CAN_operating_mode CAN Operating Mode
276 * @{
277 */
278 #define CAN_MODE_NORMAL ((uint32_t)0x00000000) /*!< Normal mode */
279 #define CAN_MODE_LOOPBACK ((uint32_t)CAN_BTR_LBKM) /*!< Loopback mode */
280 #define CAN_MODE_SILENT ((uint32_t)CAN_BTR_SILM) /*!< Silent mode */
281 #define CAN_MODE_SILENT_LOOPBACK ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM)) /*!< Loopback combined with silent mode */
282 /**
283 * @}
284 */
285
286 /** @defgroup CAN_synchronisation_jump_width CAN Synchronisation Jump Width
287 * @{
288 */
289 #define CAN_SJW_1TQ ((uint32_t)0x00000000) /*!< 1 time quantum */
290 #define CAN_SJW_2TQ ((uint32_t)CAN_BTR_SJW_0) /*!< 2 time quantum */
291 #define CAN_SJW_3TQ ((uint32_t)CAN_BTR_SJW_1) /*!< 3 time quantum */
292 #define CAN_SJW_4TQ ((uint32_t)CAN_BTR_SJW) /*!< 4 time quantum */
293 /**
294 * @}
295 */
296
297 /** @defgroup CAN_time_quantum_in_bit_segment_1 CAN Time Quantum in bit segment 1
298 * @{
299 */
300 #define CAN_BS1_1TQ ((uint32_t)0x00000000) /*!< 1 time quantum */
301 #define CAN_BS1_2TQ ((uint32_t)CAN_BTR_TS1_0) /*!< 2 time quantum */
302 #define CAN_BS1_3TQ ((uint32_t)CAN_BTR_TS1_1) /*!< 3 time quantum */
303 #define CAN_BS1_4TQ ((uint32_t)(CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 4 time quantum */
304 #define CAN_BS1_5TQ ((uint32_t)CAN_BTR_TS1_2) /*!< 5 time quantum */
305 #define CAN_BS1_6TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 6 time quantum */
306 #define CAN_BS1_7TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 7 time quantum */
307 #define CAN_BS1_8TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 8 time quantum */
308 #define CAN_BS1_9TQ ((uint32_t)CAN_BTR_TS1_3) /*!< 9 time quantum */
309 #define CAN_BS1_10TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_0)) /*!< 10 time quantum */
310 #define CAN_BS1_11TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1)) /*!< 11 time quantum */
311 #define CAN_BS1_12TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 12 time quantum */
312 #define CAN_BS1_13TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2)) /*!< 13 time quantum */
313 #define CAN_BS1_14TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 14 time quantum */
314 #define CAN_BS1_15TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 15 time quantum */
315 #define CAN_BS1_16TQ ((uint32_t)CAN_BTR_TS1) /*!< 16 time quantum */
316 /**
317 * @}
318 */
319
320 /** @defgroup CAN_time_quantum_in_bit_segment_2 CAN Time Quantum in bit segment 2
321 * @{
322 */
323 #define CAN_BS2_1TQ ((uint32_t)0x00000000) /*!< 1 time quantum */
324 #define CAN_BS2_2TQ ((uint32_t)CAN_BTR_TS2_0) /*!< 2 time quantum */
325 #define CAN_BS2_3TQ ((uint32_t)CAN_BTR_TS2_1) /*!< 3 time quantum */
326 #define CAN_BS2_4TQ ((uint32_t)(CAN_BTR_TS2_1 | CAN_BTR_TS2_0)) /*!< 4 time quantum */
327 #define CAN_BS2_5TQ ((uint32_t)CAN_BTR_TS2_2) /*!< 5 time quantum */
328 #define CAN_BS2_6TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_0)) /*!< 6 time quantum */
329 #define CAN_BS2_7TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_1)) /*!< 7 time quantum */
330 #define CAN_BS2_8TQ ((uint32_t)CAN_BTR_TS2) /*!< 8 time quantum */
331 /**
332 * @}
333 */
334
335 /** @defgroup CAN_filter_mode CAN Filter Mode
336 * @{
337 */
338 #define CAN_FILTERMODE_IDMASK ((uint8_t)0x00) /*!< Identifier mask mode */
339 #define CAN_FILTERMODE_IDLIST ((uint8_t)0x01) /*!< Identifier list mode */
340 /**
341 * @}
342 */
343
344 /** @defgroup CAN_filter_scale CAN Filter Scale
345 * @{
346 */
347 #define CAN_FILTERSCALE_16BIT ((uint8_t)0x00) /*!< Two 16-bit filters */
348 #define CAN_FILTERSCALE_32BIT ((uint8_t)0x01) /*!< One 32-bit filter */
349 /**
350 * @}
351 */
352
353 /** @defgroup CAN_filter_FIFO CAN Filter FIFO
354 * @{
355 */
356 #define CAN_FILTER_FIFO0 ((uint8_t)0x00) /*!< Filter FIFO 0 assignment for filter x */
357 #define CAN_FILTER_FIFO1 ((uint8_t)0x01) /*!< Filter FIFO 1 assignment for filter x */
358 /**
359 * @}
360 */
361
362 /** @defgroup CAN_Identifier_Type CAN Identifier Type
363 * @{
364 */
365 #define CAN_ID_STD ((uint32_t)0x00000000) /*!< Standard Id */
366 #define CAN_ID_EXT ((uint32_t)0x00000004) /*!< Extended Id */
367 /**
368 * @}
369 */
370
371 /** @defgroup CAN_remote_transmission_request CAN Remote Transmission Request
372 * @{
373 */
374 #define CAN_RTR_DATA ((uint32_t)0x00000000) /*!< Data frame */
375 #define CAN_RTR_REMOTE ((uint32_t)0x00000002) /*!< Remote frame */
376 /**
377 * @}
378 */
379
380 /** @defgroup CAN_receive_FIFO_number_constants CAN Receive FIFO Number Constants
381 * @{
382 */
383 #define CAN_FIFO0 ((uint8_t)0x00) /*!< CAN FIFO 0 used to receive */
384 #define CAN_FIFO1 ((uint8_t)0x01) /*!< CAN FIFO 1 used to receive */
385 /**
386 * @}
387 */
388
389 /** @defgroup CAN_flags CAN Flags
390 * @{
391 */
392 /* If the flag is 0x3XXXXXXX, it means that it can be used with CAN_GetFlagStatus()
393 and CAN_ClearFlag() functions. */
394 /* If the flag is 0x1XXXXXXX, it means that it can only be used with
395 CAN_GetFlagStatus() function. */
396
397 /* Transmit Flags */
398 #define CAN_FLAG_RQCP0 ((uint32_t)0x00000500) /*!< Request MailBox0 flag */
399 #define CAN_FLAG_RQCP1 ((uint32_t)0x00000508) /*!< Request MailBox1 flag */
400 #define CAN_FLAG_RQCP2 ((uint32_t)0x00000510) /*!< Request MailBox2 flag */
401 #define CAN_FLAG_TXOK0 ((uint32_t)0x00000501) /*!< Transmission OK MailBox0 flag */
402 #define CAN_FLAG_TXOK1 ((uint32_t)0x00000509) /*!< Transmission OK MailBox1 flag */
403 #define CAN_FLAG_TXOK2 ((uint32_t)0x00000511) /*!< Transmission OK MailBox2 flag */
404 #define CAN_FLAG_TME0 ((uint32_t)0x0000051A) /*!< Transmit mailbox 0 empty flag */
405 #define CAN_FLAG_TME1 ((uint32_t)0x0000051B) /*!< Transmit mailbox 0 empty flag */
406 #define CAN_FLAG_TME2 ((uint32_t)0x0000051C) /*!< Transmit mailbox 0 empty flag */
407
408 /* Receive Flags */
409 #define CAN_FLAG_FF0 ((uint32_t)0x00000203) /*!< FIFO 0 Full flag */
410 #define CAN_FLAG_FOV0 ((uint32_t)0x00000204) /*!< FIFO 0 Overrun flag */
411
412 #define CAN_FLAG_FF1 ((uint32_t)0x00000403) /*!< FIFO 1 Full flag */
413 #define CAN_FLAG_FOV1 ((uint32_t)0x00000404) /*!< FIFO 1 Overrun flag */
414
415 /* Operating Mode Flags */
416 #define CAN_FLAG_WKU ((uint32_t)0x00000103) /*!< Wake up flag */
417 #define CAN_FLAG_SLAK ((uint32_t)0x00000101) /*!< Sleep acknowledge flag */
418 #define CAN_FLAG_SLAKI ((uint32_t)0x00000104) /*!< Sleep acknowledge flag */
419 /* @note When SLAK interrupt is disabled (SLKIE=0), no polling on SLAKI is possible.
420 In this case the SLAK bit can be polled.*/
421
422 /* Error Flags */
423 #define CAN_FLAG_EWG ((uint32_t)0x00000300) /*!< Error warning flag */
424 #define CAN_FLAG_EPV ((uint32_t)0x00000301) /*!< Error passive flag */
425 #define CAN_FLAG_BOF ((uint32_t)0x00000302) /*!< Bus-Off flag */
426 /**
427 * @}
428 */
429
430 /** @defgroup CAN_Interrupts CAN Interrupts
431 * @{
432 */
433 #define CAN_IT_TME ((uint32_t)CAN_IER_TMEIE) /*!< Transmit mailbox empty interrupt */
434
435 /* Receive Interrupts */
436 #define CAN_IT_FMP0 ((uint32_t)CAN_IER_FMPIE0) /*!< FIFO 0 message pending interrupt */
437 #define CAN_IT_FF0 ((uint32_t)CAN_IER_FFIE0) /*!< FIFO 0 full interrupt */
438 #define CAN_IT_FOV0 ((uint32_t)CAN_IER_FOVIE0) /*!< FIFO 0 overrun interrupt */
439 #define CAN_IT_FMP1 ((uint32_t)CAN_IER_FMPIE1) /*!< FIFO 1 message pending interrupt */
440 #define CAN_IT_FF1 ((uint32_t)CAN_IER_FFIE1) /*!< FIFO 1 full interrupt */
441 #define CAN_IT_FOV1 ((uint32_t)CAN_IER_FOVIE1) /*!< FIFO 1 overrun interrupt */
442
443 /* Operating Mode Interrupts */
444 #define CAN_IT_WKU ((uint32_t)CAN_IER_WKUIE) /*!< Wake-up interrupt */
445 #define CAN_IT_SLK ((uint32_t)CAN_IER_SLKIE) /*!< Sleep acknowledge interrupt */
446
447 /* Error Interrupts */
448 #define CAN_IT_EWG ((uint32_t)CAN_IER_EWGIE) /*!< Error warning interrupt */
449 #define CAN_IT_EPV ((uint32_t)CAN_IER_EPVIE) /*!< Error passive interrupt */
450 #define CAN_IT_BOF ((uint32_t)CAN_IER_BOFIE) /*!< Bus-off interrupt */
451 #define CAN_IT_LEC ((uint32_t)CAN_IER_LECIE) /*!< Last error code interrupt */
452 #define CAN_IT_ERR ((uint32_t)CAN_IER_ERRIE) /*!< Error Interrupt */
453 /**
454 * @}
455 */
456
457 /** @defgroup CAN_Mailboxes_Definition CAN Mailboxes Definition
458 * @{
459 */
460 #define CAN_TXMAILBOX_0 ((uint8_t)0x00)
461 #define CAN_TXMAILBOX_1 ((uint8_t)0x01)
462 #define CAN_TXMAILBOX_2 ((uint8_t)0x02)
463 /**
464 * @}
465 */
466
467 /**
468 * @}
469 */
470
471 /* Exported macro ------------------------------------------------------------*/
472 /** @defgroup CAN_Exported_Macros CAN Exported Macros
473 * @{
474 */
475
476 /** @brief Reset CAN handle state
477 * @param __HANDLE__: specifies the CAN Handle.
478 * @retval None
479 */
480 #define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET)
481
482 /**
483 * @brief Enable the specified CAN interrupts.
484 * @param __HANDLE__: CAN handle
485 * @param __INTERRUPT__: CAN Interrupt
486 * @retval None
487 */
488 #define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__))
489
490 /**
491 * @brief Disable the specified CAN interrupts.
492 * @param __HANDLE__: CAN handle
493 * @param __INTERRUPT__: CAN Interrupt
494 * @retval None
495 */
496 #define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__))
497
498 /**
499 * @brief Return the number of pending received messages.
500 * @param __HANDLE__: CAN handle
501 * @param __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
502 * @retval The number of pending message.
503 */
504 #define __HAL_CAN_MSG_PENDING(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
505 ((uint8_t)((__HANDLE__)->Instance->RF0R&(uint32_t)0x03)) : ((uint8_t)((__HANDLE__)->Instance->RF1R&(uint32_t)0x03)))
506
507 /** @brief Check whether the specified CAN flag is set or not.
508 * @param __HANDLE__: CAN Handle
509 * @param __FLAG__: specifies the flag to check.
510 * This parameter can be one of the following values:
511 * @arg CAN_TSR_RQCP0: Request MailBox0 Flag
512 * @arg CAN_TSR_RQCP1: Request MailBox1 Flag
513 * @arg CAN_TSR_RQCP2: Request MailBox2 Flag
514 * @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
515 * @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
516 * @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
517 * @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
518 * @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
519 * @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
520 * @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
521 * @arg CAN_FLAG_FF0: FIFO 0 Full Flag
522 * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
523 * @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
524 * @arg CAN_FLAG_FF1: FIFO 1 Full Flag
525 * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
526 * @arg CAN_FLAG_WKU: Wake up Flag
527 * @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
528 * @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
529 * @arg CAN_FLAG_EWG: Error Warning Flag
530 * @arg CAN_FLAG_EPV: Error Passive Flag
531 * @arg CAN_FLAG_BOF: Bus-Off Flag
532 * @retval The new state of __FLAG__ (TRUE or FALSE).
533 */
534 #define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \
535 ((((__FLAG__) >> 8) == 5)? ((((__HANDLE__)->Instance->TSR) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
536 (((__FLAG__) >> 8) == 2)? ((((__HANDLE__)->Instance->RF0R) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
537 (((__FLAG__) >> 8) == 4)? ((((__HANDLE__)->Instance->RF1R) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
538 (((__FLAG__) >> 8) == 1)? ((((__HANDLE__)->Instance->MSR) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
539 ((((__HANDLE__)->Instance->ESR) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))))
540
541 /** @brief Clear the specified CAN pending flag.
542 * @param __HANDLE__: CAN Handle.
543 * @param __FLAG__: specifies the flag to check.
544 * This parameter can be one of the following values:
545 * @arg CAN_TSR_RQCP0: Request MailBox0 Flag
546 * @arg CAN_TSR_RQCP1: Request MailBox1 Flag
547 * @arg CAN_TSR_RQCP2: Request MailBox2 Flag
548 * @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
549 * @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
550 * @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
551 * @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
552 * @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
553 * @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
554 * @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
555 * @arg CAN_FLAG_FF0: FIFO 0 Full Flag
556 * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
557 * @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
558 * @arg CAN_FLAG_FF1: FIFO 1 Full Flag
559 * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
560 * @arg CAN_FLAG_WKU: Wake up Flag
561 * @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
562 * @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
563 * @arg CAN_FLAG_EWG: Error Warning Flag
564 * @arg CAN_FLAG_EPV: Error Passive Flag
565 * @arg CAN_FLAG_BOF: Bus-Off Flag
566 * @retval The new state of __FLAG__ (TRUE or FALSE).
567 */
568 #define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \
569 ((((__FLAG__) >> 8) == 5)? (((__HANDLE__)->Instance->TSR) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
570 (((__FLAG__) >> 8) == 2)? (((__HANDLE__)->Instance->RF0R) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
571 (((__FLAG__) >> 8) == 4)? (((__HANDLE__)->Instance->RF1R) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
572 (((__FLAG__) >> 8) == 1)? (((__HANDLE__)->Instance->MSR) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
573 (((__HANDLE__)->Instance->ESR) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))))
574
575 /** @brief Check if the specified CAN interrupt source is enabled or disabled.
576 * @param __HANDLE__: CAN Handle
577 * @param __INTERRUPT__: specifies the CAN interrupt source to check.
578 * This parameter can be one of the following values:
579 * @arg CAN_IT_TME: Transmit mailbox empty interrupt enable
580 * @arg CAN_IT_FMP0: FIFO0 message pending interrupt enable
581 * @arg CAN_IT_FMP1: FIFO1 message pending interrupt enable
582 * @retval The new state of __IT__ (TRUE or FALSE).
583 */
584 #define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
585
586 /**
587 * @brief Check the transmission status of a CAN Frame.
588 * @param __HANDLE__: CAN Handle
589 * @param __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission.
590 * @retval The new status of transmission (TRUE or FALSE).
591 */
592 #define __HAL_CAN_TRANSMIT_STATUS(__HANDLE__, __TRANSMITMAILBOX__)\
593 (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) == (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) :\
594 ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) == (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) :\
595 ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)) == (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)))
596
597 /**
598 * @brief Release the specified receive FIFO.
599 * @param __HANDLE__: CAN handle
600 * @param __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
601 * @retval None
602 */
603 #define __HAL_CAN_FIFO_RELEASE(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
604 ((__HANDLE__)->Instance->RF0R |= CAN_RF0R_RFOM0) : ((__HANDLE__)->Instance->RF1R |= CAN_RF1R_RFOM1))
605
606 /**
607 * @brief Cancel a transmit request.
608 * @param __HANDLE__: CAN Handle
609 * @param __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission.
610 * @retval None
611 */
612 #define __HAL_CAN_CANCEL_TRANSMIT(__HANDLE__, __TRANSMITMAILBOX__)\
613 (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ0) :\
614 ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ1) :\
615 ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ2))
616
617 /**
618 * @brief Enable or disable the DBG Freeze for CAN.
619 * @param __HANDLE__: CAN Handle
620 * @param __NEWSTATE__: new state of the CAN peripheral.
621 * This parameter can be: ENABLE (CAN reception/transmission is frozen
622 * during debug. Reception FIFOs can still be accessed/controlled normally)
623 * or DISABLE (CAN is working during debug).
624 * @retval None
625 */
626 #define __HAL_CAN_DBG_FREEZE(__HANDLE__, __NEWSTATE__) (((__NEWSTATE__) == ENABLE)? \
627 ((__HANDLE__)->Instance->MCR |= CAN_MCR_DBF) : ((__HANDLE__)->Instance->MCR &= ~CAN_MCR_DBF))
628
629 /**
630 * @}
631 */
632
633 /* Exported functions --------------------------------------------------------*/
634 /** @addtogroup CAN_Exported_Functions
635 * @{
636 */
637
638 /** @addtogroup CAN_Exported_Functions_Group1
639 * @{
640 */
641 /* Initialization/de-initialization functions ***********************************/
642 HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan);
643 HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTypeDef* sFilterConfig);
644 HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan);
645 void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan);
646 void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan);
647 /**
648 * @}
649 */
650
651 /** @addtogroup CAN_Exported_Functions_Group2
652 * @{
653 */
654 /* I/O operation functions ******************************************************/
655 HAL_StatusTypeDef HAL_CAN_Transmit(CAN_HandleTypeDef *hcan, uint32_t Timeout);
656 HAL_StatusTypeDef HAL_CAN_Transmit_IT(CAN_HandleTypeDef *hcan);
657 HAL_StatusTypeDef HAL_CAN_Receive(CAN_HandleTypeDef *hcan, uint8_t FIFONumber, uint32_t Timeout);
658 HAL_StatusTypeDef HAL_CAN_Receive_IT(CAN_HandleTypeDef *hcan, uint8_t FIFONumber);
659 HAL_StatusTypeDef HAL_CAN_Sleep(CAN_HandleTypeDef *hcan);
660 HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan);
661 void HAL_CAN_IRQHandler(CAN_HandleTypeDef* hcan);
662 void HAL_CAN_TxCpltCallback(CAN_HandleTypeDef* hcan);
663 void HAL_CAN_RxCpltCallback(CAN_HandleTypeDef* hcan);
664 void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan);
665 /**
666 * @}
667 */
668
669 /** @addtogroup CAN_Exported_Functions_Group3
670 * @{
671 */
672 /* Peripheral State functions ***************************************************/
673 uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan);
674 HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan);
675 /**
676 * @}
677 */
678
679 /**
680 * @}
681 */
682
683 /* Private types -------------------------------------------------------------*/
684 /** @defgroup CAN_Private_Types CAN Private Types
685 * @{
686 */
687
688 /**
689 * @}
690 */
691
692 /* Private variables ---------------------------------------------------------*/
693 /** @defgroup CAN_Private_Variables CAN Private Variables
694 * @{
695 */
696
697 /**
698 * @}
699 */
700
701 /* Private constants ---------------------------------------------------------*/
702 /** @defgroup CAN_Private_Constants CAN Private Constants
703 * @{
704 */
705 #define CAN_TXSTATUS_NOMAILBOX ((uint8_t)0x04) /*!< CAN cell did not provide CAN_TxStatus_NoMailBox */
706 #define CAN_FLAG_MASK ((uint32_t)0x000000FF)
707 /**
708 * @}
709 */
710
711 /* Private macros ------------------------------------------------------------*/
712 /** @defgroup CAN_Private_Macros CAN Private Macros
713 * @{
714 */
715 #define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \
716 ((MODE) == CAN_MODE_LOOPBACK)|| \
717 ((MODE) == CAN_MODE_SILENT) || \
718 ((MODE) == CAN_MODE_SILENT_LOOPBACK))
719 #define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) || ((SJW) == CAN_SJW_2TQ)|| \
720 ((SJW) == CAN_SJW_3TQ) || ((SJW) == CAN_SJW_4TQ))
721 #define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16TQ)
722 #define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8TQ)
723 #define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1) && ((PRESCALER) <= 1024))
724 #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27)
725 #define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \
726 ((MODE) == CAN_FILTERMODE_IDLIST))
727 #define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) || \
728 ((SCALE) == CAN_FILTERSCALE_32BIT))
729 #define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) || \
730 ((FIFO) == CAN_FILTER_FIFO1))
731 #define IS_CAN_BANKNUMBER(BANKNUMBER) ((BANKNUMBER) <= 28)
732
733 #define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02))
734 #define IS_CAN_STDID(STDID) ((STDID) <= ((uint32_t)0x7FF))
735 #define IS_CAN_EXTID(EXTID) ((EXTID) <= ((uint32_t)0x1FFFFFFF))
736 #define IS_CAN_DLC(DLC) ((DLC) <= ((uint8_t)0x08))
737
738 #define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_ID_STD) || \
739 ((IDTYPE) == CAN_ID_EXT))
740 #define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE))
741 #define IS_CAN_FIFO(FIFO) (((FIFO) == CAN_FIFO0) || ((FIFO) == CAN_FIFO1))
742
743 /**
744 * @}
745 */
746
747 /* Private functions ---------------------------------------------------------*/
748 /** @defgroup CAN_Private_Functions CAN Private Functions
749 * @{
750 */
751
752 /**
753 * @}
754 */
755
756 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
757
758 /**
759 * @}
760 */
761
762 /**
763 * @}
764 */
765
766 #ifdef __cplusplus
767 }
768 #endif
769
770 #endif /* __STM32F4xx_CAN_H */
771
772
773 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/