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comparison Common/Drivers/STM32F4xx_HAL_DRIVER_v120/Inc/stm32f4xx_hal.h @ 38:5f11787b4f42
include in ostc4 repository
author | heinrichsweikamp |
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date | Sat, 28 Apr 2018 11:52:34 +0200 |
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1 /** | |
2 ****************************************************************************** | |
3 * @file stm32f4xx_hal.h | |
4 * @author MCD Application Team | |
5 * @version V1.2.0 | |
6 * @date 26-December-2014 | |
7 * @brief This file contains all the functions prototypes for the HAL | |
8 * module driver. | |
9 ****************************************************************************** | |
10 * @attention | |
11 * | |
12 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> | |
13 * | |
14 * Redistribution and use in source and binary forms, with or without modification, | |
15 * are permitted provided that the following conditions are met: | |
16 * 1. Redistributions of source code must retain the above copyright notice, | |
17 * this list of conditions and the following disclaimer. | |
18 * 2. Redistributions in binary form must reproduce the above copyright notice, | |
19 * this list of conditions and the following disclaimer in the documentation | |
20 * and/or other materials provided with the distribution. | |
21 * 3. Neither the name of STMicroelectronics nor the names of its contributors | |
22 * may be used to endorse or promote products derived from this software | |
23 * without specific prior written permission. | |
24 * | |
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | |
28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE | |
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | |
31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | |
32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | |
33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
35 * | |
36 ****************************************************************************** | |
37 */ | |
38 | |
39 /* Define to prevent recursive inclusion -------------------------------------*/ | |
40 #ifndef __STM32F4xx_HAL_H | |
41 #define __STM32F4xx_HAL_H | |
42 | |
43 #ifdef __cplusplus | |
44 extern "C" { | |
45 #endif | |
46 | |
47 /* Includes ------------------------------------------------------------------*/ | |
48 #include "stm32f4xx_hal_conf.h" | |
49 | |
50 /** @addtogroup STM32F4xx_HAL_Driver | |
51 * @{ | |
52 */ | |
53 | |
54 /** @addtogroup HAL | |
55 * @{ | |
56 */ | |
57 | |
58 /* Exported types ------------------------------------------------------------*/ | |
59 /* Exported constants --------------------------------------------------------*/ | |
60 /* Exported macro ------------------------------------------------------------*/ | |
61 /** @defgroup HAL_Exported_Macros HAL Exported Macros | |
62 * @{ | |
63 */ | |
64 | |
65 /** @brief Freeze/Unfreeze Peripherals in Debug mode | |
66 */ | |
67 #define __HAL_DBGMCU_FREEZE_TIM2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM2_STOP)) | |
68 #define __HAL_DBGMCU_FREEZE_TIM3() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM3_STOP)) | |
69 #define __HAL_DBGMCU_FREEZE_TIM4() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM4_STOP)) | |
70 #define __HAL_DBGMCU_FREEZE_TIM5() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM5_STOP)) | |
71 #define __HAL_DBGMCU_FREEZE_TIM6() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM6_STOP)) | |
72 #define __HAL_DBGMCU_FREEZE_TIM7() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM7_STOP)) | |
73 #define __HAL_DBGMCU_FREEZE_TIM12() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM12_STOP)) | |
74 #define __HAL_DBGMCU_FREEZE_TIM13() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM13_STOP)) | |
75 #define __HAL_DBGMCU_FREEZE_TIM14() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM14_STOP)) | |
76 #define __HAL_DBGMCU_FREEZE_RTC() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_RTC_STOP)) | |
77 #define __HAL_DBGMCU_FREEZE_WWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_WWDG_STOP)) | |
78 #define __HAL_DBGMCU_FREEZE_IWDG() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_IWDG_STOP)) | |
79 #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT)) | |
80 #define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT)) | |
81 #define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT)) | |
82 #define __HAL_DBGMCU_FREEZE_CAN1() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN1_STOP)) | |
83 #define __HAL_DBGMCU_FREEZE_CAN2() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN2_STOP)) | |
84 #define __HAL_DBGMCU_FREEZE_TIM1() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM1_STOP)) | |
85 #define __HAL_DBGMCU_FREEZE_TIM8() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM8_STOP)) | |
86 #define __HAL_DBGMCU_FREEZE_TIM9() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM9_STOP)) | |
87 #define __HAL_DBGMCU_FREEZE_TIM10() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM10_STOP)) | |
88 #define __HAL_DBGMCU_FREEZE_TIM11() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM11_STOP)) | |
89 | |
90 #define __HAL_DBGMCU_UNFREEZE_TIM2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM2_STOP)) | |
91 #define __HAL_DBGMCU_UNFREEZE_TIM3() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM3_STOP)) | |
92 #define __HAL_DBGMCU_UNFREEZE_TIM4() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM4_STOP)) | |
93 #define __HAL_DBGMCU_UNFREEZE_TIM5() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM5_STOP)) | |
94 #define __HAL_DBGMCU_UNFREEZE_TIM6() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM6_STOP)) | |
95 #define __HAL_DBGMCU_UNFREEZE_TIM7() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM7_STOP)) | |
96 #define __HAL_DBGMCU_UNFREEZE_TIM12() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM12_STOP)) | |
97 #define __HAL_DBGMCU_UNFREEZE_TIM13() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM13_STOP)) | |
98 #define __HAL_DBGMCU_UNFREEZE_TIM14() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM14_STOP)) | |
99 #define __HAL_DBGMCU_UNFREEZE_RTC() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_RTC_STOP)) | |
100 #define __HAL_DBGMCU_UNFREEZE_WWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_WWDG_STOP)) | |
101 #define __HAL_DBGMCU_UNFREEZE_IWDG() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_IWDG_STOP)) | |
102 #define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT)) | |
103 #define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT)) | |
104 #define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT)) | |
105 #define __HAL_DBGMCU_UNFREEZE_CAN1() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN1_STOP)) | |
106 #define __HAL_DBGMCU_UNFREEZE_CAN2() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN2_STOP)) | |
107 #define __HAL_DBGMCU_UNFREEZE_TIM1() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM1_STOP)) | |
108 #define __HAL_DBGMCU_UNFREEZE_TIM8() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM8_STOP)) | |
109 #define __HAL_DBGMCU_UNFREEZE_TIM9() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM9_STOP)) | |
110 #define __HAL_DBGMCU_UNFREEZE_TIM10() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM10_STOP)) | |
111 #define __HAL_DBGMCU_UNFREEZE_TIM11() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM11_STOP)) | |
112 | |
113 /** @brief Main Flash memory mapped at 0x00000000 | |
114 */ | |
115 #define __HAL_SYSCFG_REMAPMEMORY_FLASH() (SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE)) | |
116 | |
117 /** @brief System Flash memory mapped at 0x00000000 | |
118 */ | |
119 #define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\ | |
120 SYSCFG->MEMRMP |= SYSCFG_MEMRMP_MEM_MODE_0;\ | |
121 }while(0); | |
122 | |
123 /** @brief Embedded SRAM mapped at 0x00000000 | |
124 */ | |
125 #define __HAL_SYSCFG_REMAPMEMORY_SRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\ | |
126 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_0 | SYSCFG_MEMRMP_MEM_MODE_1);\ | |
127 }while(0); | |
128 | |
129 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx) | |
130 /** @brief FSMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000 | |
131 */ | |
132 #define __HAL_SYSCFG_REMAPMEMORY_FSMC() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\ | |
133 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\ | |
134 }while(0); | |
135 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */ | |
136 | |
137 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) | |
138 /** @brief FMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000 | |
139 */ | |
140 #define __HAL_SYSCFG_REMAPMEMORY_FMC() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\ | |
141 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\ | |
142 }while(0); | |
143 | |
144 /** @brief FMC/SDRAM Bank 1 and 2 mapped at 0x00000000 | |
145 */ | |
146 #define __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\ | |
147 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_2);\ | |
148 }while(0); | |
149 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ | |
150 /** | |
151 * @} | |
152 */ | |
153 | |
154 /* Exported functions --------------------------------------------------------*/ | |
155 /** @addtogroup HAL_Exported_Functions | |
156 * @{ | |
157 */ | |
158 /** @addtogroup HAL_Exported_Functions_Group1 | |
159 * @{ | |
160 */ | |
161 /* Initialization and de-initialization functions ******************************/ | |
162 HAL_StatusTypeDef HAL_Init(void); | |
163 HAL_StatusTypeDef HAL_DeInit(void); | |
164 void HAL_MspInit(void); | |
165 void HAL_MspDeInit(void); | |
166 HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority); | |
167 /** | |
168 * @} | |
169 */ | |
170 | |
171 /** @addtogroup HAL_Exported_Functions_Group2 | |
172 * @{ | |
173 */ | |
174 /* Peripheral Control functions ************************************************/ | |
175 void HAL_IncTick(void); | |
176 void HAL_Delay(__IO uint32_t Delay); | |
177 uint32_t HAL_GetTick(void); | |
178 void HAL_SuspendTick(void); | |
179 void HAL_ResumeTick(void); | |
180 uint32_t HAL_GetHalVersion(void); | |
181 uint32_t HAL_GetREVID(void); | |
182 uint32_t HAL_GetDEVID(void); | |
183 void HAL_DBGMCU_EnableDBGSleepMode(void); | |
184 void HAL_DBGMCU_DisableDBGSleepMode(void); | |
185 void HAL_DBGMCU_EnableDBGStopMode(void); | |
186 void HAL_DBGMCU_DisableDBGStopMode(void); | |
187 void HAL_DBGMCU_EnableDBGStandbyMode(void); | |
188 void HAL_DBGMCU_DisableDBGStandbyMode(void); | |
189 void HAL_EnableCompensationCell(void); | |
190 void HAL_DisableCompensationCell(void); | |
191 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) | |
192 void HAL_EnableMemorySwappingBank(void); | |
193 void HAL_DisableMemorySwappingBank(void); | |
194 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ | |
195 /** | |
196 * @} | |
197 */ | |
198 | |
199 /** | |
200 * @} | |
201 */ | |
202 /* Private types -------------------------------------------------------------*/ | |
203 /* Private variables ---------------------------------------------------------*/ | |
204 /** @defgroup HAL_Private_Variables HAL Private Variables | |
205 * @{ | |
206 */ | |
207 /** | |
208 * @} | |
209 */ | |
210 /* Private constants ---------------------------------------------------------*/ | |
211 /** @defgroup HAL_Private_Constants HAL Private Constants | |
212 * @{ | |
213 */ | |
214 /** | |
215 * @} | |
216 */ | |
217 /* Private macros ------------------------------------------------------------*/ | |
218 /* Private functions ---------------------------------------------------------*/ | |
219 /** | |
220 * @} | |
221 */ | |
222 | |
223 /** | |
224 * @} | |
225 */ | |
226 | |
227 #ifdef __cplusplus | |
228 } | |
229 #endif | |
230 | |
231 #endif /* __STM32F4xx_HAL_H */ | |
232 | |
233 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |