Mercurial > public > ostc4
comparison Discovery/Src/ostc.c @ 1036:5865f0aeb438 Puls_Integration
Radio data integration:
Added functionality for displaying radio data as debug message. The USART3 has been configurated for receiption and a function for the visualization of the data has been added to the demo unit (draft implementation). For activation the radio as well as the logger functionality needs to be activated via compile switch. Note that at the moment bluetooth and radio DMA may not be operated in parallel.
| author | Ideenmodellierer |
|---|---|
| date | Sun, 10 Aug 2025 15:28:59 +0200 |
| parents | 33b91584d827 |
| children | 1d7c7a36df15 |
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| 1035:5b913cdaa9dc | 1036:5865f0aeb438 |
|---|---|
| 45 #ifdef USART_PIEZO | 45 #ifdef USART_PIEZO |
| 46 UART_HandleTypeDef UartPiezoTxHandle; | 46 UART_HandleTypeDef UartPiezoTxHandle; |
| 47 #endif | 47 #endif |
| 48 UART_HandleTypeDef UartIR_HUD_Handle; | 48 UART_HandleTypeDef UartIR_HUD_Handle; |
| 49 | 49 |
| 50 #ifdef ENABLE_USART_RADIO | |
| 51 UART_HandleTypeDef UartRadio_Handle; | |
| 52 #endif | |
| 53 | |
| 50 __IO ITStatus UartReady = RESET; | 54 __IO ITStatus UartReady = RESET; |
| 51 __IO ITStatus UartReadyHUD = RESET; | 55 __IO ITStatus UartReadyHUD = RESET; |
| 52 | 56 |
| 53 /* Private types -------------------------------------------------------------*/ | 57 /* Private types -------------------------------------------------------------*/ |
| 54 | 58 |
| 55 /* Private variables ---------------------------------------------------------*/ | 59 /* Private variables ---------------------------------------------------------*/ |
| 56 | 60 |
| 57 /* Private variables with external access via get_xxx() function -------------*/ | 61 /* Private variables with external access via get_xxx() function -------------*/ |
| 58 static uint8_t hardwareDisplay = 0; //< either OSTC4 LCD (=0) or new Screen (=1) | 62 static uint8_t hardwareDisplay = 0; //< either OSTC4 LCD (=0) or new Screen (=1) |
| 63 | |
| 64 #ifdef ENABLE_PULSE_SENSOR_BT | |
| 65 static DMA_HandleTypeDef hdma_uart_BT_rx; | |
| 66 #endif | |
| 67 | |
| 68 #ifdef ENABLE_USART_RADIO | |
| 69 static DMA_HandleTypeDef hdma_uart_radio_rx; | |
| 70 #endif | |
| 59 | 71 |
| 60 static uint16_t rxBufRead = 0; | 72 static uint16_t rxBufRead = 0; |
| 61 static uint16_t rxBufWrite = 0; | 73 static uint16_t rxBufWrite = 0; |
| 62 static uint8_t rxBufferUart[CHUNK_SIZE * CHUNKS_PER_BUFFER]; /* The complete buffer has a X * chunk size to allow variations in buffer read time */ | 74 static uint8_t rxBufferUart[CHUNK_SIZE * CHUNKS_PER_BUFFER]; /* The complete buffer has a X * chunk size to allow variations in buffer read time */ |
| 63 | 75 |
| 383 UartIR_HUD_Handle.Init.HwFlowCtl = UART_HWCONTROL_NONE; | 395 UartIR_HUD_Handle.Init.HwFlowCtl = UART_HWCONTROL_NONE; |
| 384 UartIR_HUD_Handle.Init.Mode = UART_MODE_TX_RX; | 396 UartIR_HUD_Handle.Init.Mode = UART_MODE_TX_RX; |
| 385 | 397 |
| 386 HAL_UART_Init(&UartIR_HUD_Handle); | 398 HAL_UART_Init(&UartIR_HUD_Handle); |
| 387 #endif | 399 #endif |
| 388 } | 400 |
| 389 | 401 #ifdef ENABLE_USART_RADIO |
| 390 static DMA_HandleTypeDef hdma_uart_BT_rx; | 402 UartRadio_Handle.Instance = USART_RADIO; |
| 391 | 403 UartRadio_Handle.Init.BaudRate = 9600; |
| 404 UartRadio_Handle.Init.WordLength = UART_WORDLENGTH_8B; | |
| 405 UartRadio_Handle.Init.StopBits = UART_STOPBITS_1; | |
| 406 UartRadio_Handle.Init.Parity = UART_PARITY_NONE; | |
| 407 UartRadio_Handle.Init.HwFlowCtl = UART_HWCONTROL_NONE; | |
| 408 UartRadio_Handle.Init.Mode = UART_MODE_RX; | |
| 409 | |
| 410 HAL_UART_Init(&UartRadio_Handle); | |
| 411 #endif | |
| 412 | |
| 413 } | |
| 414 | |
| 415 #ifdef ENABLE_PULSE_SENSOR_BT | |
| 392 void MX_UART_BT_Init_DMA() | 416 void MX_UART_BT_Init_DMA() |
| 393 { | 417 { |
| 394 | 418 |
| 395 __DMA2_CLK_ENABLE(); | 419 __DMA2_CLK_ENABLE(); |
| 396 __HAL_RCC_DMA2_CLK_ENABLE(); | 420 __HAL_RCC_DMA2_CLK_ENABLE(); |
| 410 __HAL_LINKDMA(&UartHandle, hdmarx, hdma_uart_BT_rx); | 434 __HAL_LINKDMA(&UartHandle, hdmarx, hdma_uart_BT_rx); |
| 411 | 435 |
| 412 HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, 0, 0); | 436 HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, 0, 0); |
| 413 HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn); | 437 HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn); |
| 414 } | 438 } |
| 439 #endif | |
| 440 | |
| 441 #ifdef ENABLE_USART_RADIO | |
| 442 void MX_UART_RADIO_Init_DMA() | |
| 443 { | |
| 444 | |
| 445 __DMA2_CLK_ENABLE(); | |
| 446 __HAL_RCC_DMA2_CLK_ENABLE(); | |
| 447 | |
| 448 hdma_uart_radio_rx.Instance = DMA2_Stream1; | |
| 449 hdma_uart_radio_rx.Init.Channel = DMA_CHANNEL_4; | |
| 450 hdma_uart_radio_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; | |
| 451 hdma_uart_radio_rx.Init.PeriphInc = DMA_PINC_DISABLE; | |
| 452 hdma_uart_radio_rx.Init.MemInc = DMA_MINC_ENABLE; | |
| 453 hdma_uart_radio_rx.Init.PeriphDataAlignment = DMA_MDATAALIGN_BYTE; | |
| 454 hdma_uart_radio_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; | |
| 455 hdma_uart_radio_rx.Init.Mode = DMA_NORMAL; | |
| 456 hdma_uart_radio_rx.Init.Priority = DMA_PRIORITY_LOW; | |
| 457 hdma_uart_radio_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; | |
| 458 HAL_DMA_Init(&hdma_uart_radio_rx); | |
| 459 | |
| 460 __HAL_LINKDMA(&UartRadio_Handle, hdmarx, hdma_uart_radio_rx); | |
| 461 | |
| 462 HAL_NVIC_SetPriority(DMA2_Stream1_IRQn, 0, 0); | |
| 463 HAL_NVIC_EnableIRQ(DMA2_Stream1_IRQn); | |
| 464 } | |
| 465 #endif | |
| 415 | 466 |
| 416 | 467 |
| 417 uint8_t UART_getChar() | 468 uint8_t UART_getChar() |
| 418 { | 469 { |
| 419 uint8_t retChar = 0; | 470 uint8_t retChar = 0; |
| 427 rxBufRead = 0; | 478 rxBufRead = 0; |
| 428 } | 479 } |
| 429 } | 480 } |
| 430 return retChar; | 481 return retChar; |
| 431 } | 482 } |
| 432 | 483 #ifdef ENABLE_PULSE_SENSOR_BT |
| 433 void UART_StartDMARx() | 484 void UART_StartDMARx() |
| 434 { | 485 { |
| 435 HAL_UART_Receive_DMA (&UartHandle, &rxBufferUart[rxBufWrite], CHUNK_SIZE); | 486 HAL_UART_Receive_DMA (&UartHandle, &rxBufferUart[rxBufWrite], CHUNK_SIZE); |
| 436 rxBufWrite += CHUNK_SIZE; | 487 rxBufWrite += CHUNK_SIZE; |
| 437 if(rxBufWrite >= CHUNK_SIZE * CHUNKS_PER_BUFFER) | 488 if(rxBufWrite >= CHUNK_SIZE * CHUNKS_PER_BUFFER) |
| 438 { | 489 { |
| 439 rxBufWrite = 0; | 490 rxBufWrite = 0; |
| 440 } | 491 } |
| 441 } | 492 } |
| 442 | |
| 443 void DMA2_Stream2_IRQHandler(void) | 493 void DMA2_Stream2_IRQHandler(void) |
| 444 { | 494 { |
| 445 HAL_DMA_IRQHandler(&hdma_uart_BT_rx); | 495 HAL_DMA_IRQHandler(&hdma_uart_BT_rx); |
| 446 } | 496 } |
| 497 #endif | |
| 498 | |
| 499 #ifdef ENABLE_USART_RADIO | |
| 500 void UART_StartDMARxRadio() | |
| 501 { | |
| 502 HAL_UART_Receive_DMA (&UartRadio_Handle, &rxBufferUart[rxBufWrite], CHUNK_SIZE); | |
| 503 rxBufWrite += CHUNK_SIZE; | |
| 504 if(rxBufWrite >= CHUNK_SIZE * CHUNKS_PER_BUFFER) | |
| 505 { | |
| 506 rxBufWrite = 0; | |
| 507 } | |
| 508 } | |
| 509 | |
| 510 void DMA2_Stream2_IRQHandler(void) | |
| 511 { | |
| 512 HAL_DMA_IRQHandler(&hdma_uart_radio_rx); | |
| 513 } | |
| 514 #endif | |
| 447 | 515 |
| 448 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) | 516 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) |
| 449 { | 517 { |
| 450 if(huart == &UartHandle) | 518 if(huart == &UartHandle) |
| 451 UartReady = SET; | 519 UartReady = SET; |
