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comparison Small_CPU/Src/compass.c @ 580:08af5d707c5a

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Bugfix bad resolution of compass LSM303AGR: The values of the variant LSM303AGR were more instabled compared to other variants. Root cause was that low power and high resolution are set in different registers and both options were enabled what is an invalid configuration => most likely the request for high resolution was ignored. To fix this the low power mode is only set in sleep and the high resolution is used in normal operation => compass performance same as in other variants.
author Ideenmodellierer
date Sat, 12 Dec 2020 19:16:37 +0100
parents 91a8f9893e68
children
comparison
equal deleted inserted replaced
579:4644891d2f51 580:08af5d707c5a
235 HAL_Delay(100); 235 HAL_Delay(100);
236 uint8_t data = WHO_AM_I; 236 uint8_t data = WHO_AM_I;
237 I2C_Master_Transmit( DEVICE_COMPASS_303D, &data, 1); 237 I2C_Master_Transmit( DEVICE_COMPASS_303D, &data, 1);
238 I2C_Master_Receive( DEVICE_COMPASS_303D, &data, 1); 238 I2C_Master_Receive( DEVICE_COMPASS_303D, &data, 1);
239 if(data == WHOIAM_VALUE_LSM303D) 239 if(data == WHOIAM_VALUE_LSM303D)
240 {
240 hardwareCompass = compass_generation2; //LSM303D; 241 hardwareCompass = compass_generation2; //LSM303D;
241 data = WHO_AM_I; 242 }
242 I2C_Master_Transmit( DEVICE_ACCELARATOR_303AGR, &data, 1); 243 else
243 I2C_Master_Receive( DEVICE_ACCELARATOR_303AGR, &data, 1); 244 {
244 if(data == WHOIAM_VALUE_LSM303AGR) 245 data = WHO_AM_I;
245 hardwareCompass = compass_generation3; //LSM303AGR; 246 I2C_Master_Transmit( DEVICE_ACCELARATOR_303AGR, &data, 1);
247 I2C_Master_Receive( DEVICE_ACCELARATOR_303AGR, &data, 1);
248 if(data == WHOIAM_VALUE_LSM303AGR)
249 hardwareCompass = compass_generation3; //LSM303AGR;
250 }
246 } 251 }
247 252
248 /* Assume that a HMC5883L is equipped by default if detection still failed */ 253 /* Assume that a HMC5883L is equipped by default if detection still failed */
249 if(hardwareCompass == compass_generation_undef) 254 if(hardwareCompass == compass_generation_undef)
250 hardwareCompass = compass_generation1; //HMC5883L; 255 hardwareCompass = compass_generation1; //HMC5883L;
596 void compass_init_LSM303D(uint8_t fast, uint8_t gain) 601 void compass_init_LSM303D(uint8_t fast, uint8_t gain)
597 { 602 {
598 if(fast == 0) 603 if(fast == 0)
599 { 604 {
600 LSM303D_write_checked_reg(ADDR_CTRL_REG0, 0x00); 605 LSM303D_write_checked_reg(ADDR_CTRL_REG0, 0x00);
601 LSM303D_write_checked_reg(ADDR_CTRL_REG1, 0x3F); // mod 12,5 Hz 3 instead of 6,25 Hz 2 606 LSM303D_write_checked_reg(ADDR_CTRL_REG1, 0x3F); // mod 12,5 Hz 3 instead of 6,25 Hz 2 BDU and all axis
602 LSM303D_write_checked_reg(ADDR_CTRL_REG2, 0xC0); 607 LSM303D_write_checked_reg(ADDR_CTRL_REG2, 0xC0); // 50Hz anti alias filter
603 LSM303D_write_checked_reg(ADDR_CTRL_REG3, 0x00); 608 LSM303D_write_checked_reg(ADDR_CTRL_REG3, 0x00); // no interrupts
604 LSM303D_write_checked_reg(ADDR_CTRL_REG4, 0x00); 609 LSM303D_write_checked_reg(ADDR_CTRL_REG4, 0x00); // no interrupts
605 LSM303D_write_checked_reg(ADDR_CTRL_REG5, 0x68); // mod 12,5 Hz 8 instead of 6,25 Hz 4 610 LSM303D_write_checked_reg(ADDR_CTRL_REG5, 0x68); // mod 12,5 Hz 8 instead of 6,25 Hz 4 High resolution
606 } 611 }
607 else 612 else
608 { 613 {
609 LSM303D_write_checked_reg(ADDR_CTRL_REG0, 0x00); 614 LSM303D_write_checked_reg(ADDR_CTRL_REG0, 0x00);
610 LSM303D_write_checked_reg(ADDR_CTRL_REG1, 0x6F); // 100 Hz 615 LSM303D_write_checked_reg(ADDR_CTRL_REG1, 0x6F); // 100 Hz
715 void compass_init_LSM303AGR(uint8_t fast, uint8_t gain) 720 void compass_init_LSM303AGR(uint8_t fast, uint8_t gain)
716 { 721 {
717 if(fast == 0) 722 if(fast == 0)
718 { 723 {
719 // init compass 724 // init compass
720 LSM303AGR_write_checked_reg(0x60, 0x80); // 10Hz 725 LSM303AGR_write_checked_reg(0x60, 0x80); // CFG_REG_A_M 10Hz continuous measurement
721 LSM303AGR_write_checked_reg(0x61, 0x03); // CFG_REG_B_M 726 LSM303AGR_write_checked_reg(0x61, 0x03); // CFG_REG_B_M Enable offset cancellation and low pass filter
722 LSM303AGR_write_checked_reg(0x62, 0x10); // CFG_REG_C_M 727 LSM303AGR_write_checked_reg(0x62, 0x10); // CFG_REG_C_M Avoid incoherence (BDU)
723 LSM303AGR_write_checked_reg(0x63, 0x00); // INT_CTRL_REG_M 728 LSM303AGR_write_checked_reg(0x63, 0x00); // INT_CTRL_REG_M No interrupts
724 729
725 // init accel (Same chip, but different address...) 730 // init accel (Same chip, but different address...)
726 LSM303AGR_acc_write_checked_reg(0x1F, 0x00); // TEMP_CFG_REG_A (Temp sensor off) 731 LSM303AGR_acc_write_checked_reg(0x1F, 0x00); // TEMP_CFG_REG_A (Temp sensor off)
727 LSM303AGR_acc_write_checked_reg(0x20, 0x4F); // CTRL_REG1_A (50Hz, x,y,z = ON) 732 LSM303AGR_acc_write_checked_reg(0x20, 0x27); // CTRL_REG1_A (10Hz, x,y,z = ON, low power mode)
728 LSM303AGR_acc_write_checked_reg(0x21, 0x00); // CTRL_REG2_A 733 LSM303AGR_acc_write_checked_reg(0x21, 0x00); // CTRL_REG2_A (High pass filter normal mode)
729 LSM303AGR_acc_write_checked_reg(0x22, 0x00); // CTRL_REG3_A 734 LSM303AGR_acc_write_checked_reg(0x22, 0x00); // CTRL_REG3_A (no interrupts)
730 LSM303AGR_acc_write_checked_reg(0x23, 0x08); // CTRL_REG4_A, High Resolution Mode enabled 735 LSM303AGR_acc_write_checked_reg(0x23, 0x88); // CTRL_REG4_A, High Resolution Mode enabled, enable BDU
731 } 736 }
732 else 737 else
733 { 738 {
734 // init compass 739 // init compass
735 LSM303AGR_write_checked_reg(0x60, 0x84); // 20Hz 740 LSM303AGR_write_checked_reg(0x60, 0x84); // 20Hz
737 LSM303AGR_write_checked_reg(0x62, 0x10); // CFG_REG_C_M 742 LSM303AGR_write_checked_reg(0x62, 0x10); // CFG_REG_C_M
738 LSM303AGR_write_checked_reg(0x63, 0x00); // INT_CTRL_REG_M 743 LSM303AGR_write_checked_reg(0x63, 0x00); // INT_CTRL_REG_M
739 744
740 // init accel (Same chip, but different address...) 745 // init accel (Same chip, but different address...)
741 LSM303AGR_acc_write_checked_reg(0x1F, 0x00); // TEMP_CFG_REG_A (Temp sensor off) 746 LSM303AGR_acc_write_checked_reg(0x1F, 0x00); // TEMP_CFG_REG_A (Temp sensor off)
742 LSM303AGR_acc_write_checked_reg(0x20, 0x4F); // CTRL_REG1_A (50Hz, x,y,z = ON) 747 LSM303AGR_acc_write_checked_reg(0x20, 0x47); // CTRL_REG1_A (50Hz, x,y,z = ON)
743 LSM303AGR_acc_write_checked_reg(0x21, 0x00); // CTRL_REG2_A 748 LSM303AGR_acc_write_checked_reg(0x21, 0x00); // CTRL_REG2_A
744 LSM303AGR_acc_write_checked_reg(0x22, 0x00); // CTRL_REG3_A 749 LSM303AGR_acc_write_checked_reg(0x22, 0x00); // CTRL_REG3_A
745 LSM303AGR_acc_write_checked_reg(0x23, 0x0); // CTRL_REG4_A, High Resolution Mode enabled 750 LSM303AGR_acc_write_checked_reg(0x23, 0x88); // CTRL_REG4_A, High Resolution Mode enabled
746 } 751 }
747 752
748 return; 753 return;
749 } 754 }
750 755
753 // compass_sleep_LSM303D 758 // compass_sleep_LSM303D
754 // @brief Gen 2 chip 759 // @brief Gen 2 chip
755 // =============================================================================== 760 // ===============================================================================
756 void compass_sleep_LSM303AGR(void) 761 void compass_sleep_LSM303AGR(void)
757 { 762 {
758 LSM303AGR_write_checked_reg(0x60, 0x03); // 763 LSM303AGR_write_checked_reg(0x60, 0x13); // low power and idle mode
759 LSM303AGR_write_checked_reg(0x61, 0x04); // 764 LSM303AGR_write_checked_reg(0x61, 0x04); // pulse only at power on
760 LSM303AGR_write_checked_reg(0x62, 0x51); // 765 LSM303AGR_write_checked_reg(0x62, 0x51); // int mag pin used (?), BDU and DRDY is output
761 LSM303AGR_write_checked_reg(0x63, 0x00); // 766 LSM303AGR_write_checked_reg(0x63, 0x00); // no interrupts
762 767
763 768
764 LSM303AGR_acc_write_checked_reg(0x1F, 0x00); // 769 LSM303AGR_acc_write_checked_reg(0x1F, 0x00); // temperature off
765 LSM303AGR_acc_write_checked_reg(0x20, 0x00); // 770 LSM303AGR_acc_write_checked_reg(0x20, 0x00); // power down
766 } 771 }
767 772
768 773
769 // =============================================================================== 774 // ===============================================================================
770 // acceleration_read_LSM303AGR 775 // acceleration_read_LSM303AGR