Mercurial > public > ostc4
annotate Small_CPU/Src/uart.c @ 902:d4622533271d Evo_2_23 tip
VPM table mode:
Because of the model maths, usage of float data type and so on it may happen that the TTS decreases during ascent and continues calculation of the vpm. To keep the values stable the vpm table mode has been introduces. Instead of continously calculation of the stops the stop time is decreased if the diver is close to a deco stop. If the table is violated (e.g. by not doing gas change) the table will be updated to the new, longer runtime. The table will not be switch back to a shorter version in case e.g. the missed gas change is performed
| author | Ideenmodellierer |
|---|---|
| date | Wed, 02 Oct 2024 22:18:19 +0200 |
| parents | 9e2f9b91e827 |
| children |
| rev | line source |
|---|---|
| 38 | 1 /** |
| 2 ****************************************************************************** | |
| 3 * @file uart.c | |
| 4 * @author heinrichs weikamp gmbh | |
| 5 * @version V0.0.1 | |
| 6 * @date 27-March-2014 | |
| 7 * @brief button control | |
| 8 * | |
| 9 @verbatim | |
| 10 ============================================================================== | |
| 11 ##### How to use ##### | |
| 12 ============================================================================== | |
| 13 @endverbatim | |
| 14 ****************************************************************************** | |
| 15 * @attention | |
| 16 * | |
| 17 * <h2><center>© COPYRIGHT(c) 2015 heinrichs weikamp</center></h2> | |
| 18 * | |
| 19 ****************************************************************************** | |
| 20 */ | |
| 21 /* Includes ------------------------------------------------------------------*/ | |
| 22 #include "uart.h" | |
| 794 | 23 #include "uartProtocol_O2.h" |
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24 #include "uartProtocol_Co2.h" |
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25 #include "uartProtocol_Sentinel.h" |
| 662 | 26 #include "externalInterface.h" |
| 27 #include "data_exchange.h" | |
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28 #include <string.h> /* memset */ |
| 38 | 29 |
| 889 | 30 |
| 38 | 31 /* Private variables ---------------------------------------------------------*/ |
| 32 | |
| 794 | 33 |
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34 |
| 781 | 35 #define CHUNK_SIZE (25u) /* the DMA will handle chunk size transfers */ |
| 36 #define CHUNKS_PER_BUFFER (5u) | |
| 794 | 37 |
| 889 | 38 |
| 662 | 39 |
| 889 | 40 DMA_HandleTypeDef hdma_usart1_rx, hdma_usart6_rx, hdma_usart6_tx; |
| 38 | 41 |
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42 uint8_t rxBuffer[CHUNK_SIZE * CHUNKS_PER_BUFFER]; /* The complete buffer has a X * chunk size to allow variations in buffer read time */ |
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43 uint8_t rxBufferUart6[CHUNK_SIZE * CHUNKS_PER_BUFFER]; /* The complete buffer has a X * chunk size to allow variations in buffer read time */ |
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44 uint8_t txBufferUart6[CHUNK_SIZE * CHUNKS_PER_BUFFER]; /* The complete buffer has a X * chunk size to allow variations in buffer read time */ |
| 889 | 45 |
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46 static uint8_t rxWriteIndex; /* Index of the data item which is analysed */ |
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47 static uint8_t rxReadIndex; /* Index at which new data is stared */ |
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48 static uint8_t lastCmdIndex; /* Index of last command which has not been completely received */ |
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49 static uint8_t dmaActive; /* Indicator if DMA reception needs to be started */ |
| 794 | 50 |
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51 |
| 889 | 52 |
| 53 | |
| 38 | 54 /* Exported functions --------------------------------------------------------*/ |
| 55 | |
| 794 | 56 |
| 662 | 57 void MX_USART1_UART_Init(void) |
| 38 | 58 { |
| 662 | 59 /* regular init */ |
| 60 | |
| 61 huart1.Instance = USART1; | |
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62 huart1.Init.BaudRate = 19200; |
| 662 | 63 huart1.Init.WordLength = UART_WORDLENGTH_8B; |
| 64 huart1.Init.StopBits = UART_STOPBITS_1; | |
| 65 huart1.Init.Parity = UART_PARITY_NONE; | |
| 66 huart1.Init.Mode = UART_MODE_TX_RX; | |
| 67 huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; | |
| 68 huart1.Init.OverSampling = UART_OVERSAMPLING_16; | |
| 69 | |
| 70 HAL_UART_Init(&huart1); | |
| 71 | |
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72 MX_USART1_DMA_Init(); |
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73 |
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74 memset(rxBuffer,BUFFER_NODATA,sizeof(rxBuffer)); |
| 662 | 75 rxReadIndex = 0; |
| 76 lastCmdIndex = 0; | |
| 77 rxWriteIndex = 0; | |
| 78 dmaActive = 0; | |
| 79 } | |
| 38 | 80 |
| 889 | 81 |
| 82 | |
| 662 | 83 void MX_USART1_UART_DeInit(void) |
| 84 { | |
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85 HAL_DMA_Abort(&hdma_usart1_rx); |
| 662 | 86 HAL_DMA_DeInit(&hdma_usart1_rx); |
| 87 HAL_UART_DeInit(&huart1); | |
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88 dmaActive = 0; |
| 662 | 89 } |
| 90 | |
| 91 void MX_USART1_DMA_Init() | |
| 92 { | |
| 93 /* DMA controller clock enable */ | |
| 94 __DMA2_CLK_ENABLE(); | |
| 95 | |
| 96 /* Peripheral DMA init*/ | |
| 97 hdma_usart1_rx.Instance = DMA2_Stream5; | |
| 98 hdma_usart1_rx.Init.Channel = DMA_CHANNEL_4; | |
| 99 hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; //DMA_MEMORY_TO_PERIPH; | |
| 100 hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE; | |
| 101 hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; | |
| 102 hdma_usart1_rx.Init.PeriphDataAlignment = DMA_MDATAALIGN_BYTE; | |
| 103 hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; | |
| 104 hdma_usart1_rx.Init.Mode = DMA_NORMAL; | |
| 105 hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; | |
| 106 hdma_usart1_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; | |
| 107 HAL_DMA_Init(&hdma_usart1_rx); | |
| 108 | |
| 109 __HAL_LINKDMA(&huart1,hdmarx,hdma_usart1_rx); | |
| 110 | |
| 111 /* DMA interrupt init */ | |
| 112 HAL_NVIC_SetPriority(DMA2_Stream5_IRQn, 0, 0); | |
| 113 HAL_NVIC_EnableIRQ(DMA2_Stream5_IRQn); | |
| 38 | 114 } |
| 115 | |
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116 |
| 889 | 117 void GNSS_IO_init() { |
| 118 | |
| 119 GPIO_InitTypeDef GPIO_InitStruct = { 0 }; | |
| 120 /* Peripheral clock enable */ | |
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121 __HAL_RCC_USART6_CLK_ENABLE() |
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122 ; |
| 889 | 123 |
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124 __HAL_RCC_GPIOA_CLK_ENABLE() |
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125 ; |
| 889 | 126 /**USART6 GPIO Configuration |
| 127 PA11 ------> USART6_TX | |
| 128 PA12 ------> USART6_RX | |
| 129 */ | |
| 130 GPIO_InitStruct.Pin = GPIO_PIN_11 | GPIO_PIN_12; | |
| 131 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; | |
| 132 GPIO_InitStruct.Pull = GPIO_NOPULL; | |
| 894 | 133 GPIO_InitStruct.Speed = GPIO_SPEED_FAST; |
| 889 | 134 GPIO_InitStruct.Alternate = GPIO_AF8_USART6; |
| 135 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); | |
| 136 | |
| 137 /* USART6 DMA Init */ | |
| 138 /* USART6_RX Init */ | |
| 139 hdma_usart6_rx.Instance = DMA2_Stream2; | |
| 140 hdma_usart6_rx.Init.Channel = DMA_CHANNEL_5; | |
| 141 hdma_usart6_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; | |
| 142 hdma_usart6_rx.Init.PeriphInc = DMA_PINC_DISABLE; | |
| 143 hdma_usart6_rx.Init.MemInc = DMA_MINC_ENABLE; | |
| 894 | 144 hdma_usart6_rx.Init.PeriphDataAlignment = DMA_MDATAALIGN_BYTE; |
| 889 | 145 hdma_usart6_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; |
| 146 hdma_usart6_rx.Init.Mode = DMA_NORMAL; | |
| 147 hdma_usart6_rx.Init.Priority = DMA_PRIORITY_LOW; | |
| 148 hdma_usart6_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; | |
| 149 HAL_DMA_Init(&hdma_usart6_rx); | |
| 150 | |
| 151 __HAL_LINKDMA(&huart6, hdmarx, hdma_usart6_rx); | |
| 152 | |
| 153 /* USART6_TX Init */ | |
| 154 hdma_usart6_tx.Instance = DMA2_Stream6; | |
| 155 hdma_usart6_tx.Init.Channel = DMA_CHANNEL_5; | |
| 156 hdma_usart6_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; | |
| 157 hdma_usart6_tx.Init.PeriphInc = DMA_PINC_DISABLE; | |
| 158 hdma_usart6_tx.Init.MemInc = DMA_MINC_ENABLE; | |
| 894 | 159 hdma_usart6_tx.Init.PeriphDataAlignment = DMA_MDATAALIGN_BYTE; |
| 889 | 160 hdma_usart6_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; |
| 161 hdma_usart6_tx.Init.Mode = DMA_NORMAL; | |
| 162 hdma_usart6_tx.Init.Priority = DMA_PRIORITY_LOW; | |
| 163 hdma_usart6_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; | |
| 164 HAL_DMA_Init(&hdma_usart6_tx); | |
| 165 | |
| 166 __HAL_LINKDMA(&huart6, hdmatx, hdma_usart6_tx); | |
| 167 | |
| 168 /* USART6 interrupt Init */ | |
| 169 HAL_NVIC_SetPriority(USART6_IRQn, 0, 0); | |
| 170 HAL_NVIC_EnableIRQ(USART6_IRQn); | |
| 171 | |
| 172 MX_USART6_DMA_Init(); | |
| 173 | |
| 174 } | |
| 175 | |
| 176 void MX_USART6_DMA_Init() { | |
| 177 /* DMA controller clock enable */ | |
| 178 __HAL_RCC_DMA2_CLK_ENABLE(); | |
| 179 | |
| 180 /* DMA interrupt init */ | |
| 181 /* DMA2_Stream2_IRQn interrupt configuration */ | |
| 182 HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, 0, 0); | |
| 183 HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn); | |
| 184 /* DMA2_Stream6_IRQn interrupt configuration */ | |
| 185 HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 0, 0); | |
| 186 HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn); | |
| 187 } | |
| 188 | |
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189 |
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190 void MX_USART6_UART_DeInit(void) |
| 889 | 191 { |
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192 HAL_DMA_Abort(&hdma_usart6_rx); |
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193 HAL_DMA_DeInit(&hdma_usart6_rx); |
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194 HAL_DMA_Abort(&hdma_usart6_tx); |
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195 HAL_DMA_DeInit(&hdma_usart6_tx); |
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196 HAL_UART_DeInit(&huart6); |
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197 HAL_UART_DeInit(&huart6); |
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198 } |
| 889 | 199 |
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200 void MX_USART6_UART_Init(void) { |
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201 huart6.Instance = USART6; |
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202 huart6.Init.BaudRate = 9600; |
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203 huart6.Init.WordLength = UART_WORDLENGTH_8B; |
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204 huart6.Init.StopBits = UART_STOPBITS_1; |
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205 huart6.Init.Parity = UART_PARITY_NONE; |
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206 huart6.Init.Mode = UART_MODE_TX_RX; |
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207 huart6.Init.HwFlowCtl = UART_HWCONTROL_NONE; |
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208 huart6.Init.OverSampling = UART_OVERSAMPLING_16; |
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209 HAL_UART_Init(&huart6); |
| 889 | 210 } |
| 211 | |
| 794 | 212 void UART_MUX_SelectAddress(uint8_t muxAddress) |
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213 { |
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214 uint8_t indexstr[4]; |
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215 |
| 794 | 216 if(muxAddress <= MAX_MUX_CHANNEL) |
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217 { |
| 794 | 218 indexstr[0] = '~'; |
| 219 indexstr[1] = muxAddress; | |
| 220 indexstr[2] = 0x0D; | |
| 221 indexstr[3] = 0x0A; | |
| 222 | |
| 223 HAL_UART_Transmit(&huart1,indexstr,4,10); | |
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224 } |
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225 } |
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226 |
| 794 | 227 |
| 228 void UART_SendCmdString(uint8_t *cmdString) | |
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229 { |
| 794 | 230 uint8_t cmdLength = strlen((char*)cmdString); |
| 231 | |
| 232 if(cmdLength < 20) /* A longer string is an indication for a missing 0 termination */ | |
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233 { |
| 794 | 234 if(dmaActive == 0) |
| 235 { | |
| 236 UART_StartDMA_Receiption(); | |
| 237 } | |
| 238 HAL_UART_Transmit(&huart1,cmdString,cmdLength,10); | |
| 239 } | |
| 240 } | |
| 241 | |
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242 |
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243 void StringToInt(char *pstr, uint32_t *puInt32) |
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244 { |
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245 uint8_t index = 0; |
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246 uint32_t result = 0; |
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247 while((pstr[index] >= '0') && (pstr[index] <= '9')) |
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248 { |
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249 result *=10; |
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250 result += pstr[index] - '0'; |
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251 index++; |
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252 } |
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253 *puInt32 = result; |
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254 } |
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255 |
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256 void StringToUInt64(char *pstr, uint64_t *puint64) |
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257 { |
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258 uint8_t index = 0; |
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259 uint64_t result = 0; |
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260 while((pstr[index] >= '0') && (pstr[index] <= '9')) |
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261 { |
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262 result *=10; |
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263 result += pstr[index] - '0'; |
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264 index++; |
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265 } |
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266 *puint64 = result; |
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267 } |
| 662 | 268 |
| 742 | 269 void UART_StartDMA_Receiption() |
| 270 { | |
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271 if(dmaActive == 0) |
| 742 | 272 { |
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273 if(HAL_OK == HAL_UART_Receive_DMA (&huart1, &rxBuffer[rxWriteIndex], CHUNK_SIZE)) |
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274 { |
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275 dmaActive = 1; |
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276 } |
| 742 | 277 } |
| 278 } | |
| 690 | 279 |
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280 void UART_ChangeBaudrate(uint32_t newBaudrate) |
| 38 | 281 { |
| 809 | 282 uint8_t dmaWasActive = dmaActive; |
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283 // HAL_DMA_Abort(&hdma_usart1_rx); |
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284 MX_USART1_UART_DeInit(); |
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285 //HAL_UART_Abort(&huart1); |
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286 //HAL_DMA_DeInit(&hdma_usart1_rx); |
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287 |
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288 |
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289 // huart1.Instance->BRR = UART_BRR_SAMPLING8(HAL_RCC_GetPCLK2Freq()/2, newBaudrate); |
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290 huart1.Init.BaudRate = newBaudrate; |
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291 HAL_UART_Init(&huart1); |
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292 MX_USART1_DMA_Init(); |
| 809 | 293 if(dmaWasActive) |
| 794 | 294 { |
| 809 | 295 memset(rxBuffer,BUFFER_NODATA,sizeof(rxBuffer)); |
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296 rxReadIndex = 0; |
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297 rxWriteIndex = 0; |
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298 dmaActive = 0; |
| 742 | 299 UART_StartDMA_Receiption(); |
| 662 | 300 } |
| 38 | 301 } |
| 690 | 302 |
| 662 | 303 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) |
| 38 | 304 { |
| 662 | 305 if(huart == &huart1) |
| 306 { | |
| 307 dmaActive = 0; | |
| 308 rxWriteIndex+=CHUNK_SIZE; | |
| 309 if(rxWriteIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) | |
| 310 { | |
| 311 rxWriteIndex = 0; | |
| 312 } | |
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313 if((rxWriteIndex / CHUNK_SIZE) != (rxReadIndex / CHUNK_SIZE) || (rxWriteIndex == rxReadIndex)) /* start next transfer if we did not catch up with read index */ |
| 662 | 314 { |
| 809 | 315 UART_StartDMA_Receiption(); |
| 662 | 316 } |
| 317 } | |
| 38 | 318 } |
| 319 | |
| 794 | 320 void UART_ReadData(uint8_t sensorType) |
| 321 { | |
| 322 uint8_t localRX = rxReadIndex; | |
| 38 | 323 |
| 794 | 324 while((rxBuffer[localRX]!=BUFFER_NODATA)) |
| 325 { | |
| 326 switch (sensorType) | |
| 327 { | |
| 328 case SENSOR_MUX: | |
| 329 case SENSOR_DIGO2: uartO2_ProcessData(rxBuffer[localRX]); | |
| 330 break; | |
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331 #ifdef ENABLE_CO2_SUPPORT |
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332 case SENSOR_CO2: uartCo2_ProcessData(rxBuffer[localRX]); |
| 794 | 333 break; |
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334 #endif |
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335 #ifdef ENABLE_SENTINEL_MODE |
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336 case SENSOR_SENTINEL: uartSentinel_ProcessData(rxBuffer[localRX]); |
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337 break; |
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338 #endif |
| 794 | 339 default: |
| 340 break; | |
| 341 } | |
| 342 | |
| 343 rxBuffer[localRX] = BUFFER_NODATA; | |
| 344 localRX++; | |
| 345 rxReadIndex++; | |
| 346 if(rxReadIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) | |
| 347 { | |
| 348 localRX = 0; | |
| 349 rxReadIndex = 0; | |
| 350 } | |
| 351 } | |
| 352 } | |
| 353 | |
| 354 void UART_FlushRxBuffer(void) | |
| 355 { | |
| 356 while(rxBuffer[rxReadIndex] != BUFFER_NODATA) | |
| 357 { | |
| 358 rxBuffer[rxReadIndex] = BUFFER_NODATA; | |
| 359 rxReadIndex++; | |
| 360 if(rxReadIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) | |
| 361 { | |
| 362 rxReadIndex = 0; | |
| 363 } | |
| 364 } | |
| 365 } | |
| 662 | 366 |
| 861 | 367 uint8_t UART_isComActive(uint8_t sensorId) |
| 368 { | |
| 369 uint8_t active = 1; | |
| 809 | 370 |
| 861 | 371 uint8_t ComState = externalInterface_GetSensorState(sensorId + EXT_INTERFACE_MUX_OFFSET); |
| 372 | |
| 373 if((ComState == UART_COMMON_INIT) || (ComState == UART_COMMON_IDLE) || (ComState == UART_COMMON_ERROR)) | |
| 374 { | |
| 375 active = 0; | |
| 376 } | |
| 377 return active; | |
| 378 } | |
| 809 | 379 |
| 38 | 380 /************************ (C) COPYRIGHT heinrichs weikamp *****END OF FILE****/ |