Mercurial > public > ostc4
annotate Small_CPU/Src/uart.c @ 849:fce639612464 Evo_2_23
Consider flipped screen for Predive menu:
In previous version some values were not optimized for the visualization while the screen is flipped.
author | Ideenmodellierer |
---|---|
date | Thu, 29 Feb 2024 18:49:55 +0100 |
parents | c3dd461ca3f9 |
children | ad96f99ebc78 |
rev | line source |
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38 | 1 /** |
2 ****************************************************************************** | |
3 * @file uart.c | |
4 * @author heinrichs weikamp gmbh | |
5 * @version V0.0.1 | |
6 * @date 27-March-2014 | |
7 * @brief button control | |
8 * | |
9 @verbatim | |
10 ============================================================================== | |
11 ##### How to use ##### | |
12 ============================================================================== | |
13 @endverbatim | |
14 ****************************************************************************** | |
15 * @attention | |
16 * | |
17 * <h2><center>© COPYRIGHT(c) 2015 heinrichs weikamp</center></h2> | |
18 * | |
19 ****************************************************************************** | |
20 */ | |
21 /* Includes ------------------------------------------------------------------*/ | |
22 #include "uart.h" | |
794 | 23 #include "uartProtocol_O2.h" |
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24 #include "uartProtocol_Co2.h" |
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25 #include "uartProtocol_Sentinel.h" |
662 | 26 #include "externalInterface.h" |
27 #include "data_exchange.h" | |
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28 #include <string.h> /* memset */ |
38 | 29 |
30 /* Private variables ---------------------------------------------------------*/ | |
31 | |
794 | 32 |
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33 |
781 | 34 #define CHUNK_SIZE (25u) /* the DMA will handle chunk size transfers */ |
35 #define CHUNKS_PER_BUFFER (5u) | |
794 | 36 |
662 | 37 UART_HandleTypeDef huart1; |
38 | |
39 DMA_HandleTypeDef hdma_usart1_rx; | |
38 | 40 |
662 | 41 uint8_t rxBuffer[CHUNK_SIZE * CHUNKS_PER_BUFFER]; /* The complete buffer has a X * chunk size to allow fariations in buffer read time */ |
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42 static uint8_t rxWriteIndex; /* Index of the data item which is analysed */ |
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43 static uint8_t rxReadIndex; /* Index at which new data is stared */ |
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44 static uint8_t lastCmdIndex; /* Index of last command which has not been completly received */ |
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45 static uint8_t dmaActive; /* Indicator if DMA reception needs to be started */ |
794 | 46 |
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47 |
38 | 48 /* Exported functions --------------------------------------------------------*/ |
49 | |
794 | 50 |
662 | 51 void MX_USART1_UART_Init(void) |
38 | 52 { |
662 | 53 /* regular init */ |
54 | |
55 huart1.Instance = USART1; | |
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56 huart1.Init.BaudRate = 19200; |
662 | 57 huart1.Init.WordLength = UART_WORDLENGTH_8B; |
58 huart1.Init.StopBits = UART_STOPBITS_1; | |
59 huart1.Init.Parity = UART_PARITY_NONE; | |
60 huart1.Init.Mode = UART_MODE_TX_RX; | |
61 huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; | |
62 huart1.Init.OverSampling = UART_OVERSAMPLING_16; | |
63 | |
64 HAL_UART_Init(&huart1); | |
65 | |
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66 MX_USART1_DMA_Init(); |
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67 |
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68 memset(rxBuffer,BUFFER_NODATA,sizeof(rxBuffer)); |
662 | 69 rxReadIndex = 0; |
70 lastCmdIndex = 0; | |
71 rxWriteIndex = 0; | |
72 dmaActive = 0; | |
73 } | |
38 | 74 |
662 | 75 void MX_USART1_UART_DeInit(void) |
76 { | |
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77 HAL_DMA_Abort(&hdma_usart1_rx); |
662 | 78 HAL_DMA_DeInit(&hdma_usart1_rx); |
79 HAL_UART_DeInit(&huart1); | |
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80 dmaActive = 0; |
662 | 81 } |
82 | |
83 void MX_USART1_DMA_Init() | |
84 { | |
85 /* DMA controller clock enable */ | |
86 __DMA2_CLK_ENABLE(); | |
87 | |
88 /* Peripheral DMA init*/ | |
89 hdma_usart1_rx.Instance = DMA2_Stream5; | |
90 hdma_usart1_rx.Init.Channel = DMA_CHANNEL_4; | |
91 hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; //DMA_MEMORY_TO_PERIPH; | |
92 hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE; | |
93 hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; | |
94 hdma_usart1_rx.Init.PeriphDataAlignment = DMA_MDATAALIGN_BYTE; | |
95 hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; | |
96 hdma_usart1_rx.Init.Mode = DMA_NORMAL; | |
97 hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; | |
98 hdma_usart1_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; | |
99 HAL_DMA_Init(&hdma_usart1_rx); | |
100 | |
101 __HAL_LINKDMA(&huart1,hdmarx,hdma_usart1_rx); | |
102 | |
103 /* DMA interrupt init */ | |
104 HAL_NVIC_SetPriority(DMA2_Stream5_IRQn, 0, 0); | |
105 HAL_NVIC_EnableIRQ(DMA2_Stream5_IRQn); | |
38 | 106 } |
107 | |
794 | 108 void UART_MUX_SelectAddress(uint8_t muxAddress) |
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109 { |
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110 uint8_t indexstr[4]; |
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111 |
794 | 112 if(muxAddress <= MAX_MUX_CHANNEL) |
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113 { |
794 | 114 indexstr[0] = '~'; |
115 indexstr[1] = muxAddress; | |
116 indexstr[2] = 0x0D; | |
117 indexstr[3] = 0x0A; | |
118 | |
119 HAL_UART_Transmit(&huart1,indexstr,4,10); | |
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120 } |
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121 } |
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122 |
794 | 123 |
124 void UART_SendCmdString(uint8_t *cmdString) | |
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125 { |
794 | 126 uint8_t cmdLength = strlen((char*)cmdString); |
127 | |
128 if(cmdLength < 20) /* A longer string is an indication for a missing 0 termination */ | |
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129 { |
794 | 130 if(dmaActive == 0) |
131 { | |
132 UART_StartDMA_Receiption(); | |
133 } | |
134 HAL_UART_Transmit(&huart1,cmdString,cmdLength,10); | |
135 } | |
136 } | |
137 | |
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138 |
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139 void StringToInt(char *pstr, uint32_t *puInt32) |
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140 { |
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141 uint8_t index = 0; |
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142 uint32_t result = 0; |
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143 while((pstr[index] >= '0') && (pstr[index] <= '9')) |
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144 { |
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145 result *=10; |
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146 result += pstr[index] - '0'; |
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147 index++; |
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148 } |
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149 *puInt32 = result; |
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150 } |
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151 |
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152 void StringToUInt64(char *pstr, uint64_t *puint64) |
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153 { |
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154 uint8_t index = 0; |
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155 uint64_t result = 0; |
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156 while((pstr[index] >= '0') && (pstr[index] <= '9')) |
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157 { |
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158 result *=10; |
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159 result += pstr[index] - '0'; |
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160 index++; |
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161 } |
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162 *puint64 = result; |
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163 } |
662 | 164 |
742 | 165 void UART_StartDMA_Receiption() |
166 { | |
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167 if(dmaActive == 0) |
742 | 168 { |
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169 if(HAL_OK == HAL_UART_Receive_DMA (&huart1, &rxBuffer[rxWriteIndex], CHUNK_SIZE)) |
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170 { |
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171 dmaActive = 1; |
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172 } |
742 | 173 } |
174 } | |
690 | 175 |
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176 void UART_ChangeBaudrate(uint32_t newBaudrate) |
38 | 177 { |
809 | 178 uint8_t dmaWasActive = dmaActive; |
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179 // HAL_DMA_Abort(&hdma_usart1_rx); |
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180 MX_USART1_UART_DeInit(); |
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181 //HAL_UART_Abort(&huart1); |
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182 //HAL_DMA_DeInit(&hdma_usart1_rx); |
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183 |
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184 |
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185 // huart1.Instance->BRR = UART_BRR_SAMPLING8(HAL_RCC_GetPCLK2Freq()/2, newBaudrate); |
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186 huart1.Init.BaudRate = newBaudrate; |
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187 HAL_UART_Init(&huart1); |
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188 MX_USART1_DMA_Init(); |
809 | 189 if(dmaWasActive) |
794 | 190 { |
809 | 191 memset(rxBuffer,BUFFER_NODATA,sizeof(rxBuffer)); |
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192 rxReadIndex = 0; |
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193 rxWriteIndex = 0; |
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194 dmaActive = 0; |
742 | 195 UART_StartDMA_Receiption(); |
662 | 196 } |
38 | 197 } |
690 | 198 |
662 | 199 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) |
38 | 200 { |
662 | 201 if(huart == &huart1) |
202 { | |
203 dmaActive = 0; | |
204 rxWriteIndex+=CHUNK_SIZE; | |
205 if(rxWriteIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) | |
206 { | |
207 rxWriteIndex = 0; | |
208 } | |
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209 if((rxWriteIndex / CHUNK_SIZE) != (rxReadIndex / CHUNK_SIZE) || (rxWriteIndex == rxReadIndex)) /* start next transfer if we did not catch up with read index */ |
662 | 210 { |
809 | 211 UART_StartDMA_Receiption(); |
662 | 212 } |
213 } | |
38 | 214 } |
215 | |
794 | 216 void UART_ReadData(uint8_t sensorType) |
217 { | |
218 uint8_t localRX = rxReadIndex; | |
38 | 219 |
794 | 220 while((rxBuffer[localRX]!=BUFFER_NODATA)) |
221 { | |
222 switch (sensorType) | |
223 { | |
224 case SENSOR_MUX: | |
225 case SENSOR_DIGO2: uartO2_ProcessData(rxBuffer[localRX]); | |
226 break; | |
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227 #ifdef ENABLE_CO2_SUPPORT |
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228 case SENSOR_CO2: uartCo2_ProcessData(rxBuffer[localRX]); |
794 | 229 break; |
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230 #endif |
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231 #ifdef ENABLE_SENTINEL_MODE |
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232 case SENSOR_SENTINEL: uartSentinel_ProcessData(rxBuffer[localRX]); |
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233 break; |
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234 #endif |
794 | 235 default: |
236 break; | |
237 } | |
238 | |
239 rxBuffer[localRX] = BUFFER_NODATA; | |
240 localRX++; | |
241 rxReadIndex++; | |
242 if(rxReadIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) | |
243 { | |
244 localRX = 0; | |
245 rxReadIndex = 0; | |
246 } | |
247 } | |
248 } | |
249 | |
250 void UART_FlushRxBuffer(void) | |
251 { | |
252 while(rxBuffer[rxReadIndex] != BUFFER_NODATA) | |
253 { | |
254 rxBuffer[rxReadIndex] = BUFFER_NODATA; | |
255 rxReadIndex++; | |
256 if(rxReadIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) | |
257 { | |
258 rxReadIndex = 0; | |
259 } | |
260 } | |
261 } | |
662 | 262 |
809 | 263 |
264 | |
38 | 265 /************************ (C) COPYRIGHT heinrichs weikamp *****END OF FILE****/ |