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annotate Common/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h @ 360:fc5e9fdcb156 MotionDetection

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Added trigger of middle button action in case of a detected shake
author ideenmodellierer
date Fri, 24 May 2019 22:01:46 +0200
parents c78bcbd5deda
children
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128
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1 /**
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2 ******************************************************************************
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3 * @file stm32f4xx_hal_tim_ex.h
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4 * @author MCD Application Team
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5 * @brief Header file of TIM HAL Extension module.
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6 ******************************************************************************
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7 * @attention
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8 *
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9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
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10 *
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11 * Redistribution and use in source and binary forms, with or without modification,
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12 * are permitted provided that the following conditions are met:
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13 * 1. Redistributions of source code must retain the above copyright notice,
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14 * this list of conditions and the following disclaimer.
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15 * 2. Redistributions in binary form must reproduce the above copyright notice,
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16 * this list of conditions and the following disclaimer in the documentation
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17 * and/or other materials provided with the distribution.
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18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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19 * may be used to endorse or promote products derived from this software
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20 * without specific prior written permission.
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21 *
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22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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32 *
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33 ******************************************************************************
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34 */
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35
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36 /* Define to prevent recursive inclusion -------------------------------------*/
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37 #ifndef __STM32F4xx_HAL_TIM_EX_H
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38 #define __STM32F4xx_HAL_TIM_EX_H
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39
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40 #ifdef __cplusplus
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41 extern "C" {
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42 #endif
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43
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44 /* Includes ------------------------------------------------------------------*/
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45 #include "stm32f4xx_hal_def.h"
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46
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47 /** @addtogroup STM32F4xx_HAL_Driver
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48 * @{
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49 */
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50
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51 /** @addtogroup TIMEx
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52 * @{
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53 */
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54
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55 /* Exported types ------------------------------------------------------------*/
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56 /** @defgroup TIMEx_Exported_Types TIM Exported Types
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57 * @{
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58 */
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59
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60 /**
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61 * @brief TIM Hall sensor Configuration Structure definition
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62 */
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63
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64 typedef struct
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65 {
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66
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67 uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
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68 This parameter can be a value of @ref TIM_Input_Capture_Polarity */
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69
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70 uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
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71 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
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72
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73 uint32_t IC1Filter; /*!< Specifies the input capture filter.
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74 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
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75
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76 uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
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77 This parameter can be a number between Min_Data = 0x0000U and Max_Data = 0xFFFFU */
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78 } TIM_HallSensor_InitTypeDef;
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79
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80 /**
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81 * @brief TIM Master configuration Structure definition
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82 */
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83 typedef struct {
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84 uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection.
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85 This parameter can be a value of @ref TIM_Master_Mode_Selection */
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86
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87 uint32_t MasterSlaveMode; /*!< Master/slave mode selection.
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88 This parameter can be a value of @ref TIM_Master_Slave_Mode */
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89 }TIM_MasterConfigTypeDef;
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90
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91 /**
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92 * @brief TIM Break and Dead time configuration Structure definition
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93 */
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94 typedef struct
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95 {
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96 uint32_t OffStateRunMode; /*!< TIM off state in run mode.
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97 This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */
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98 uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode.
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99 This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */
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100 uint32_t LockLevel; /*!< TIM Lock level.
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101 This parameter can be a value of @ref TIM_Lock_level */
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102 uint32_t DeadTime; /*!< TIM dead Time.
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103 This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */
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104 uint32_t BreakState; /*!< TIM Break State.
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105 This parameter can be a value of @ref TIM_Break_Input_enable_disable */
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106 uint32_t BreakPolarity; /*!< TIM Break input polarity.
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107 This parameter can be a value of @ref TIM_Break_Polarity */
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108 uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state.
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109 This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */
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110 }TIM_BreakDeadTimeConfigTypeDef;
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111 /**
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112 * @}
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113 */
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114
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115 /* Exported constants --------------------------------------------------------*/
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116 /** @defgroup TIMEx_Exported_Constants TIM Exported Constants
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117 * @{
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118 */
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119
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120 /** @defgroup TIMEx_Remap TIM Remap
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121 * @{
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122 */
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123 #define TIM_TIM2_TIM8_TRGO 0x00000000U
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124 #define TIM_TIM2_ETH_PTP 0x00000400U
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125 #define TIM_TIM2_USBFS_SOF 0x00000800U
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126 #define TIM_TIM2_USBHS_SOF 0x00000C00U
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127 #define TIM_TIM5_GPIO 0x00000000U
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128 #define TIM_TIM5_LSI 0x00000040U
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129 #define TIM_TIM5_LSE 0x00000080U
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130 #define TIM_TIM5_RTC 0x000000C0U
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131 #define TIM_TIM11_GPIO 0x00000000U
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132 #define TIM_TIM11_HSE 0x00000002U
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133
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134 #if defined(STM32F413xx) || defined(STM32F423xx)
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135 #define TIM_TIM9_TIM3_TRGO 0x10000000U
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136 #define TIM_TIM9_LPTIM 0x10000010U
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137 #define TIM_TIM5_TIM3_TRGO 0x10000000U
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138 #define TIM_TIM5_LPTIM 0x10000008U
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139 #define TIM_TIM1_TIM3_TRGO 0x10000000U
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140 #define TIM_TIM1_LPTIM 0x10000004U
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141 #endif /* STM32F413xx | STM32F423xx */
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142
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143 #if defined (STM32F446xx)
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144 #define TIM_TIM11_SPDIFRX 0x00000001U
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145 #endif /* STM32F446xx */
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146 /**
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147 * @}
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148 */
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149
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150 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F413xx) || defined(STM32F423xx)
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151 /** @defgroup TIMEx_SystemBreakInput TIM System Break Input
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152 * @{
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153 */
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154 #define TIM_SYSTEMBREAKINPUT_HARDFAULT 0x00000001U /* Core Lockup lock output(Hardfault) is connected to Break Input of TIM1 and TIM8 */
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155 #define TIM_SYSTEMBREAKINPUT_PVD 0x00000004U /* PVD Interrupt is connected to Break Input of TIM1 and TIM8 */
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156 #define TIM_SYSTEMBREAKINPUT_HARDFAULT_PVD 0x00000005U /* Core Lockup lock output(Hardfault) and PVD Interrupt are connected to Break Input of TIM1 and TIM8 */
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157 /**
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158 * @}
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159 */
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160 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx || STM32F413xx || STM32F423xx */
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161
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162 /**
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163 * @}
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164 */
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165 /* Exported macro ------------------------------------------------------------*/
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166 /* Exported functions --------------------------------------------------------*/
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167 /** @addtogroup TIMEx_Exported_Functions
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168 * @{
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169 */
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170
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171 /** @addtogroup TIMEx_Exported_Functions_Group1
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172 * @{
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173 */
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174 /* Timer Hall Sensor functions **********************************************/
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175 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef* htim, TIM_HallSensor_InitTypeDef* sConfig);
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176 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef* htim);
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177
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178 void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef* htim);
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179 void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef* htim);
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180
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181 /* Blocking mode: Polling */
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182 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef* htim);
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183 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef* htim);
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184 /* Non-Blocking mode: Interrupt */
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185 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef* htim);
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186 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef* htim);
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187 /* Non-Blocking mode: DMA */
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188 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef* htim, uint32_t *pData, uint16_t Length);
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189 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef* htim);
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190 /**
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191 * @}
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192 */
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193
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194 /** @addtogroup TIMEx_Exported_Functions_Group2
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195 * @{
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196 */
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197 /* Timer Complementary Output Compare functions *****************************/
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198 /* Blocking mode: Polling */
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199 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef* htim, uint32_t Channel);
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200 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef* htim, uint32_t Channel);
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201
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202 /* Non-Blocking mode: Interrupt */
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203 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
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204 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
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205
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206 /* Non-Blocking mode: DMA */
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207 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef* htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
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208 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef* htim, uint32_t Channel);
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209 /**
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210 * @}
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211 */
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212
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213 /** @addtogroup TIMEx_Exported_Functions_Group3
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214 * @{
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215 */
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216 /* Timer Complementary PWM functions ****************************************/
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217 /* Blocking mode: Polling */
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218 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef* htim, uint32_t Channel);
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219 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef* htim, uint32_t Channel);
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220
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221 /* Non-Blocking mode: Interrupt */
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222 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
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223 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
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224 /* Non-Blocking mode: DMA */
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225 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef* htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
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226 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef* htim, uint32_t Channel);
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227 /**
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228 * @}
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229 */
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230
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231 /** @addtogroup TIMEx_Exported_Functions_Group4
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232 * @{
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233 */
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234 /* Timer Complementary One Pulse functions **********************************/
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235 /* Blocking mode: Polling */
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236 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
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237 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
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238
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239 /* Non-Blocking mode: Interrupt */
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240 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
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241 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
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242 /**
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243 * @}
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244 */
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245
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246 /** @addtogroup TIMEx_Exported_Functions_Group5
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247 * @{
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248 */
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249 /* Extension Control functions ************************************************/
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250 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource);
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251 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource);
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252 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource);
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253 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef* htim, TIM_MasterConfigTypeDef * sMasterConfig);
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254 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef* htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);
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255 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef* htim, uint32_t Remap);
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256 /**
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257 * @}
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258 */
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259
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260 /** @addtogroup TIMEx_Exported_Functions_Group6
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261 * @{
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262 */
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263 /* Extension Callback *********************************************************/
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264 void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef* htim);
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265 void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef* htim);
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266 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
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267 /**
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268 * @}
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269 */
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270
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271 /** @addtogroup TIMEx_Exported_Functions_Group7
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272 * @{
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273 */
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274 /* Extension Peripheral State functions **************************************/
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275 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef* htim);
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276 /**
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277 * @}
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278 */
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279
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280 /**
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281 * @}
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282 */
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283
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284 /* Private types -------------------------------------------------------------*/
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285 /* Private variables ---------------------------------------------------------*/
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286 /* Private constants ---------------------------------------------------------*/
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287 /* Private macros ------------------------------------------------------------*/
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288 /** @defgroup TIMEx_Private_Macros TIM Private Macros
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289 * @{
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290 */
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291 #if defined (STM32F446xx)
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292 #define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO)||\
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293 ((TIM_REMAP) == TIM_TIM2_ETH_PTP)||\
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294 ((TIM_REMAP) == TIM_TIM2_USBFS_SOF)||\
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295 ((TIM_REMAP) == TIM_TIM2_USBHS_SOF)||\
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296 ((TIM_REMAP) == TIM_TIM5_GPIO)||\
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297 ((TIM_REMAP) == TIM_TIM5_LSI)||\
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298 ((TIM_REMAP) == TIM_TIM5_LSE)||\
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299 ((TIM_REMAP) == TIM_TIM5_RTC)||\
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300 ((TIM_REMAP) == TIM_TIM11_GPIO)||\
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301 ((TIM_REMAP) == TIM_TIM11_SPDIFRX)||\
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302 ((TIM_REMAP) == TIM_TIM11_HSE))
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303 #elif defined(STM32F413xx) || defined(STM32F423xx)
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304 #define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO)||\
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305 ((TIM_REMAP) == TIM_TIM2_ETH_PTP)||\
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306 ((TIM_REMAP) == TIM_TIM2_USBFS_SOF)||\
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307 ((TIM_REMAP) == TIM_TIM2_USBHS_SOF)||\
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308 ((TIM_REMAP) == TIM_TIM5_GPIO)||\
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309 ((TIM_REMAP) == TIM_TIM5_LSI)||\
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310 ((TIM_REMAP) == TIM_TIM5_LSE)||\
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311 ((TIM_REMAP) == TIM_TIM5_RTC)||\
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312 ((TIM_REMAP) == TIM_TIM11_GPIO)||\
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313 ((TIM_REMAP) == TIM_TIM11_HSE)||\
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314 ((TIM_REMAP) == TIM_TIM9_TIM3_TRGO)||\
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315 ((TIM_REMAP) == TIM_TIM9_LPTIM)||\
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316 ((TIM_REMAP) == TIM_TIM5_TIM3_TRGO)||\
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317 ((TIM_REMAP) == TIM_TIM5_LPTIM)||\
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318 ((TIM_REMAP) == TIM_TIM1_TIM3_TRGO)||\
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319 ((TIM_REMAP) == TIM_TIM1_LPTIM))
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320 #else
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321 #define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO)||\
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322 ((TIM_REMAP) == TIM_TIM2_ETH_PTP)||\
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323 ((TIM_REMAP) == TIM_TIM2_USBFS_SOF)||\
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324 ((TIM_REMAP) == TIM_TIM2_USBHS_SOF)||\
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325 ((TIM_REMAP) == TIM_TIM5_GPIO)||\
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326 ((TIM_REMAP) == TIM_TIM5_LSI)||\
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327 ((TIM_REMAP) == TIM_TIM5_LSE)||\
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328 ((TIM_REMAP) == TIM_TIM5_RTC)||\
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329 ((TIM_REMAP) == TIM_TIM11_GPIO)||\
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330 ((TIM_REMAP) == TIM_TIM11_HSE))
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331 #endif /* STM32F446xx */
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332
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333 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F413xx) || defined(STM32F423xx)
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334 #define IS_TIM_SYSTEMBREAKINPUT(BREAKINPUT) (((BREAKINPUT) == TIM_SYSTEMBREAKINPUT_HARDFAULT)||\
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335 ((BREAKINPUT) == TIM_SYSTEMBREAKINPUT_PVD)||\
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336 ((BREAKINPUT) == TIM_SYSTEMBREAKINPUT_HARDFAULT_PVD))
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337
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338 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx || STM32F413xx || STM32F423xx */
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339
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340 #define IS_TIM_DEADTIME(DEADTIME) ((DEADTIME) <= 0xFFU)
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341 /**
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342 * @}
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343 */
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344
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345 /* Private functions ---------------------------------------------------------*/
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346 /** @defgroup TIMEx_Private_Functions TIM Private Functions
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347 * @{
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348 */
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349
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350 /**
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351 * @}
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352 */
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353
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354 /**
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355 * @}
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356 */
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357
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358 /**
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359 * @}
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360 */
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361
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362 #ifdef __cplusplus
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363 }
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364 #endif
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365
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366 #endif /* __STM32F4xx_HAL_TIM_EX_H */
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367
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368 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/