annotate Discovery/Src/system_stm32f4xx_special_plus_256k.c @ 448:f7c66593ab82 minor_improvments

Added compile switch to show voltage parallel to charge status percantage Show aging of bottle sensor data by change of text color: Permanent connection is shown white. After two minutes timeout the text is shown red to indicate that the value shall no longer be trusted
author ideenmodellierer
date Mon, 23 Mar 2020 21:13:52 +0100
parents 5f11787b4f42
children
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1 ///////////////////////////////////////////////////////////////////////////////
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2 /// -*- coding: UTF-8 -*-
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3 ///
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4 /// \file Discovery/Src/system_stm32f4xx_special_plus_256k.c
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5 /// \brief Manage system init and clocks.
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6 /// \author Heinrichs Weikamp gmbh
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7 /// \date 17-February-2017
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8 ///
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9 /// \details
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10 /// From the CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
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11 ///
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12 /// This file provides two functions and one global variable to be called from
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13 /// user application:
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14 /// - SystemInit(): This function is called at startup just after reset and
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15 /// before branch to main program. This call is made inside
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16 /// the "startup_stm32f4xx.s" file.
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17 ///
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18 /// - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
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19 /// by the user application to setup the SysTick
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20 /// timer or configure other parameters.
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21 ///
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22 /// - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
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23 /// be called whenever the core clock is changed
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24 /// during program execution.
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25 /// $Id$
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26 ///////////////////////////////////////////////////////////////////////////////
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27 /// \par Copyright (c) 2014-2018 Heinrichs Weikamp gmbh
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28 ///
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29 /// This program is free software: you can redistribute it and/or modify
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30 /// it under the terms of the GNU General Public License as published by
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31 /// the Free Software Foundation, either version 3 of the License, or
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32 /// (at your option) any later version.
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33 ///
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34 /// This program is distributed in the hope that it will be useful,
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35 /// but WITHOUT ANY WARRANTY; without even the implied warranty of
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36 /// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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37 /// GNU General Public License for more details.
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38 ///
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39 /// You should have received a copy of the GNU General Public License
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40 /// along with this program. If not, see <http://www.gnu.org/licenses/>.
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41 //////////////////////////////////////////////////////////////////////////////
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42 /// \par Copyright (c) 2017 STMicroelectronics
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43 ///
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44 /// Redistribution and use in source and binary forms, with or without modification,
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45 /// are permitted provided that the following conditions are met:
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46 /// 1. Redistributions of source code must retain the above copyright notice,
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47 /// this list of conditions and the following disclaimer.
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48 /// 2. Redistributions in binary form must reproduce the above copyright notice,
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49 /// this list of conditions and the following disclaimer in the documentation
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50 /// and/or other materials provided with the distribution.
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51 /// 3. Neither the name of STMicroelectronics nor the names of its contributors
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52 /// may be used to endorse or promote products derived from this software
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53 /// without specific prior written permission.
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54 ///
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55 /// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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56 /// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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57 /// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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58 /// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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59 /// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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60 /// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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61 /// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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62 /// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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63 /// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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64 /// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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65 //////////////////////////////////////////////////////////////////////////////
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66
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67 #include "stm32f4xx_hal.h"
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68 #include "stm32f4xx.h"
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69
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70 #if !defined (HSE_VALUE)
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71 #define HSE_VALUE ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz */
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72 #endif /* HSE_VALUE */
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73
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74 #if !defined (HSI_VALUE)
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75 #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
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76 #endif /* HSI_VALUE */
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77
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78 /************************* Miscellaneous Configuration ************************/
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79 /*!< Uncomment the following line if you need to relocate your vector Table in
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80 Internal SRAM. */
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81 /* #define VECT_TAB_SRAM */
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82 #define VECT_TAB_OFFSET 0x40000 /*!< Vector Table base offset field.
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83 This value must be a multiple of 0x200. */
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84 /******************************************************************************/
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85
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86 /* This variable is updated in three ways:
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87 1) by calling CMSIS function SystemCoreClockUpdate()
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88 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
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89 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
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90 Note: If you use this function to configure the system clock; then there
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91 is no need to call the 2 first functions listed above, since SystemCoreClock
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92 variable is updated automatically.
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93 */
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94 uint32_t SystemCoreClock = 16000000;
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95 const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
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96 const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
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97
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98 /**
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99 * @brief Setup the microcontroller system
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100 * Initialize the FPU setting, vector table location and External memory
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101 * configuration.
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102 * @param None
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103 * @retval None
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104 */
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105 void SystemInit(void)
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106 {
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107 /* FPU settings ------------------------------------------------------------*/
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108 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
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109 SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
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110 #endif
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111 /* Reset the RCC clock configuration to the default reset state ------------*/
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112 /* Set HSION bit */
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113 RCC->CR |= (uint32_t)0x00000001;
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114
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115 /* Reset CFGR register */
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116 RCC->CFGR = 0x00000000;
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117
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118 /* Reset HSEON, CSSON and PLLON bits */
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119 RCC->CR &= (uint32_t)0xFEF6FFFF;
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120
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121 /* Reset PLLCFGR register */
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122 RCC->PLLCFGR = 0x24003010;
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123
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124 /* Reset HSEBYP bit */
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125 RCC->CR &= (uint32_t)0xFFFBFFFF;
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126
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127 /* Disable all interrupts */
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128 RCC->CIR = 0x00000000;
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129
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130
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131 /* Configure the Vector Table location add offset address ------------------*/
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132 #ifdef VECT_TAB_SRAM
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133 SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
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134 #else
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135 SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
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136 #endif
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137 }
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138
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139 /**
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140 * @brief Update SystemCoreClock variable according to Clock Register Values.
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141 * The SystemCoreClock variable contains the core clock (HCLK), it can
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142 * be used by the user application to setup the SysTick timer or configure
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143 * other parameters.
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144 *
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145 * @note Each time the core clock (HCLK) changes, this function must be called
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146 * to update SystemCoreClock variable value. Otherwise, any configuration
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147 * based on this variable will be incorrect.
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148 *
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149 * @note - The system frequency computed by this function is not the real
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150 * frequency in the chip. It is calculated based on the predefined
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151 * constant and the selected clock source:
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152 *
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153 * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
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154 *
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155 * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
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156 *
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157 * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
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158 * or HSI_VALUE(*) multiplied/divided by the PLL factors.
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159 *
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160 * (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
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161 * 16 MHz) but the real value may vary depending on the variations
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162 * in voltage and temperature.
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163 *
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164 * (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (its value
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165 * depends on the application requirements), user has to ensure that HSE_VALUE
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166 * is same as the real frequency of the crystal used. Otherwise, this function
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167 * may have wrong result.
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168 *
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169 * - The result of this function could be not correct when using fractional
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170 * value for HSE crystal.
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171 *
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172 * @param None
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173 * @retval None
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174 */
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175 void SystemCoreClockUpdate(void)
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176 {
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177 uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
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178
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179 /* Get SYSCLK source -------------------------------------------------------*/
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180 tmp = RCC->CFGR & RCC_CFGR_SWS;
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181
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182 switch (tmp)
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183 {
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184 case 0x00: /* HSI used as system clock source */
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185 SystemCoreClock = HSI_VALUE;
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186 break;
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187 case 0x04: /* HSE used as system clock source */
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188 SystemCoreClock = HSE_VALUE;
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189 break;
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190 case 0x08: /* PLL used as system clock source */
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191
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192 /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
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193 SYSCLK = PLL_VCO / PLL_P
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194 */
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195 pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
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196 pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
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197
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198 if (pllsource != 0)
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199 {
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200 /* HSE used as PLL clock source */
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201 pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
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202 }
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203 else
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204 {
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205 /* HSI used as PLL clock source */
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206 pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
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207 }
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208
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209 pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
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210 SystemCoreClock = pllvco/pllp;
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211 break;
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212 default:
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213 SystemCoreClock = HSI_VALUE;
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214 break;
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215 }
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216 /* Compute HCLK frequency --------------------------------------------------*/
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217 /* Get HCLK prescaler */
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218 tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
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219 /* HCLK frequency */
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220 SystemCoreClock >>= tmp;
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221 }