Mercurial > public > ostc4
annotate Common/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c @ 434:f68f2c4d71c7 Improve_BatteryGasGauge
Reduced timeout for common UART communication:
OSTC will slow down significant in case of a problem in Bluetoothconnection => reduces timeout which do not need to last one second
author | ideenmodellierer |
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date | Sun, 23 Feb 2020 21:13:28 +0100 |
parents | c78bcbd5deda |
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rev | line source |
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128
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1 /** |
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2 ****************************************************************************** |
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3 * @file stm32f4xx_hal_flash_ex.c |
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4 * @author MCD Application Team |
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5 * @brief Extended FLASH HAL module driver. |
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6 * This file provides firmware functions to manage the following |
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7 * functionalities of the FLASH extension peripheral: |
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8 * + Extended programming operations functions |
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9 * |
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10 @verbatim |
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11 ============================================================================== |
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12 ##### Flash Extension features ##### |
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13 ============================================================================== |
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14 |
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15 [..] Comparing to other previous devices, the FLASH interface for STM32F427xx/437xx and |
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16 STM32F429xx/439xx devices contains the following additional features |
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17 |
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18 (+) Capacity up to 2 Mbyte with dual bank architecture supporting read-while-write |
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19 capability (RWW) |
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20 (+) Dual bank memory organization |
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21 (+) PCROP protection for all banks |
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22 |
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23 ##### How to use this driver ##### |
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24 ============================================================================== |
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25 [..] This driver provides functions to configure and program the FLASH memory |
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26 of all STM32F427xx/437xx, STM32F429xx/439xx, STM32F469xx/479xx and STM32F446xx |
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27 devices. It includes |
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28 (#) FLASH Memory Erase functions: |
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29 (++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and |
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30 HAL_FLASH_Lock() functions |
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31 (++) Erase function: Erase sector, erase all sectors |
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32 (++) There are two modes of erase : |
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33 (+++) Polling Mode using HAL_FLASHEx_Erase() |
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34 (+++) Interrupt Mode using HAL_FLASHEx_Erase_IT() |
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35 |
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36 (#) Option Bytes Programming functions: Use HAL_FLASHEx_OBProgram() to : |
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37 (++) Set/Reset the write protection |
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38 (++) Set the Read protection Level |
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39 (++) Set the BOR level |
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40 (++) Program the user Option Bytes |
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41 (#) Advanced Option Bytes Programming functions: Use HAL_FLASHEx_AdvOBProgram() to : |
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42 (++) Extended space (bank 2) erase function |
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43 (++) Full FLASH space (2 Mo) erase (bank 1 and bank 2) |
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44 (++) Dual Boot activation |
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45 (++) Write protection configuration for bank 2 |
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46 (++) PCROP protection configuration and control for both banks |
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47 |
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48 @endverbatim |
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49 ****************************************************************************** |
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50 * @attention |
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51 * |
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52 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
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53 * |
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54 * Redistribution and use in source and binary forms, with or without modification, |
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55 * are permitted provided that the following conditions are met: |
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56 * 1. Redistributions of source code must retain the above copyright notice, |
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57 * this list of conditions and the following disclaimer. |
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58 * 2. Redistributions in binary form must reproduce the above copyright notice, |
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59 * this list of conditions and the following disclaimer in the documentation |
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60 * and/or other materials provided with the distribution. |
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61 * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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62 * may be used to endorse or promote products derived from this software |
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63 * without specific prior written permission. |
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64 * |
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65 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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66 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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67 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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68 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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69 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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70 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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71 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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72 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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73 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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74 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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75 * |
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76 ****************************************************************************** |
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77 */ |
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78 |
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79 /* Includes ------------------------------------------------------------------*/ |
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80 #include "stm32f4xx_hal.h" |
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81 |
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82 /** @addtogroup STM32F4xx_HAL_Driver |
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83 * @{ |
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84 */ |
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85 |
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86 /** @defgroup FLASHEx FLASHEx |
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87 * @brief FLASH HAL Extension module driver |
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88 * @{ |
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89 */ |
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90 |
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91 #ifdef HAL_FLASH_MODULE_ENABLED |
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92 |
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93 /* Private typedef -----------------------------------------------------------*/ |
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94 /* Private define ------------------------------------------------------------*/ |
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95 /** @addtogroup FLASHEx_Private_Constants |
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96 * @{ |
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97 */ |
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98 #define FLASH_TIMEOUT_VALUE 50000U /* 50 s */ |
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99 /** |
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100 * @} |
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101 */ |
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102 |
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103 /* Private macro -------------------------------------------------------------*/ |
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104 /* Private variables ---------------------------------------------------------*/ |
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105 /** @addtogroup FLASHEx_Private_Variables |
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106 * @{ |
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107 */ |
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108 extern FLASH_ProcessTypeDef pFlash; |
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109 /** |
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110 * @} |
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111 */ |
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112 |
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113 /* Private function prototypes -----------------------------------------------*/ |
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114 /** @addtogroup FLASHEx_Private_Functions |
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115 * @{ |
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116 */ |
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117 /* Option bytes control */ |
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118 static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks); |
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119 static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks); |
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120 static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks); |
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121 static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level); |
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122 static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby); |
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123 static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level); |
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124 static uint8_t FLASH_OB_GetUser(void); |
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125 static uint16_t FLASH_OB_GetWRP(void); |
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126 static uint8_t FLASH_OB_GetRDP(void); |
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127 static uint8_t FLASH_OB_GetBOR(void); |
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128 |
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129 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) ||\ |
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130 defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\ |
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131 defined(STM32F423xx) |
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132 static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector); |
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133 static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector); |
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134 #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx |
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135 STM32F413xx || STM32F423xx */ |
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136 |
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137 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) |
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138 static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks); |
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139 static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks); |
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140 static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig); |
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141 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ |
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142 |
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143 extern HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout); |
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144 /** |
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145 * @} |
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146 */ |
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147 |
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148 /* Exported functions --------------------------------------------------------*/ |
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149 /** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions |
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150 * @{ |
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151 */ |
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152 |
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153 /** @defgroup FLASHEx_Exported_Functions_Group1 Extended IO operation functions |
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154 * @brief Extended IO operation functions |
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155 * |
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156 @verbatim |
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157 =============================================================================== |
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158 ##### Extended programming operation functions ##### |
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159 =============================================================================== |
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160 [..] |
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161 This subsection provides a set of functions allowing to manage the Extension FLASH |
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162 programming operations. |
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163 |
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164 @endverbatim |
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165 * @{ |
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166 */ |
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167 /** |
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168 * @brief Perform a mass erase or erase the specified FLASH memory sectors |
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169 * @param[in] pEraseInit pointer to an FLASH_EraseInitTypeDef structure that |
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170 * contains the configuration information for the erasing. |
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171 * |
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172 * @param[out] SectorError pointer to variable that |
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173 * contains the configuration information on faulty sector in case of error |
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174 * (0xFFFFFFFFU means that all the sectors have been correctly erased) |
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175 * |
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176 * @retval HAL Status |
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177 */ |
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178 HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError) |
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179 { |
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180 HAL_StatusTypeDef status = HAL_ERROR; |
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181 uint32_t index = 0U; |
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182 |
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183 /* Process Locked */ |
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184 __HAL_LOCK(&pFlash); |
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185 |
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186 /* Check the parameters */ |
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187 assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); |
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188 |
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189 /* Wait for last operation to be completed */ |
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190 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
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191 |
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192 if(status == HAL_OK) |
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193 { |
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194 /*Initialization of SectorError variable*/ |
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195 *SectorError = 0xFFFFFFFFU; |
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196 |
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197 if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) |
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198 { |
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199 /*Mass erase to be done*/ |
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200 FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks); |
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201 |
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202 /* Wait for last operation to be completed */ |
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203 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
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204 |
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205 /* if the erase operation is completed, disable the MER Bit */ |
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206 FLASH->CR &= (~FLASH_MER_BIT); |
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207 } |
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208 else |
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209 { |
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210 /* Check the parameters */ |
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211 assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector)); |
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212 |
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213 /* Erase by sector by sector to be done*/ |
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214 for(index = pEraseInit->Sector; index < (pEraseInit->NbSectors + pEraseInit->Sector); index++) |
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215 { |
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216 FLASH_Erase_Sector(index, (uint8_t) pEraseInit->VoltageRange); |
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217 |
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218 /* Wait for last operation to be completed */ |
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219 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
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220 |
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221 /* If the erase operation is completed, disable the SER and SNB Bits */ |
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222 CLEAR_BIT(FLASH->CR, (FLASH_CR_SER | FLASH_CR_SNB)); |
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223 |
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224 if(status != HAL_OK) |
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225 { |
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226 /* In case of error, stop erase procedure and return the faulty sector*/ |
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227 *SectorError = index; |
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228 break; |
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229 } |
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230 } |
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231 } |
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232 /* Flush the caches to be sure of the data consistency */ |
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233 FLASH_FlushCaches(); |
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234 } |
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235 |
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236 /* Process Unlocked */ |
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237 __HAL_UNLOCK(&pFlash); |
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238 |
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239 return status; |
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240 } |
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241 |
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242 /** |
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243 * @brief Perform a mass erase or erase the specified FLASH memory sectors with interrupt enabled |
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244 * @param pEraseInit pointer to an FLASH_EraseInitTypeDef structure that |
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245 * contains the configuration information for the erasing. |
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246 * |
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247 * @retval HAL Status |
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248 */ |
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249 HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit) |
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250 { |
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251 HAL_StatusTypeDef status = HAL_OK; |
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252 |
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253 /* Process Locked */ |
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254 __HAL_LOCK(&pFlash); |
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255 |
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256 /* Check the parameters */ |
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257 assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); |
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258 |
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259 /* Enable End of FLASH Operation interrupt */ |
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260 __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP); |
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261 |
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262 /* Enable Error source interrupt */ |
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263 __HAL_FLASH_ENABLE_IT(FLASH_IT_ERR); |
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264 |
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265 /* Clear pending flags (if any) */ |
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266 __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR |\ |
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267 FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR| FLASH_FLAG_PGSERR); |
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268 |
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269 if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) |
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270 { |
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271 /*Mass erase to be done*/ |
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272 pFlash.ProcedureOnGoing = FLASH_PROC_MASSERASE; |
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273 pFlash.Bank = pEraseInit->Banks; |
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274 FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks); |
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275 } |
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276 else |
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277 { |
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278 /* Erase by sector to be done*/ |
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279 |
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280 /* Check the parameters */ |
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281 assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector)); |
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282 |
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283 pFlash.ProcedureOnGoing = FLASH_PROC_SECTERASE; |
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284 pFlash.NbSectorsToErase = pEraseInit->NbSectors; |
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285 pFlash.Sector = pEraseInit->Sector; |
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286 pFlash.VoltageForErase = (uint8_t)pEraseInit->VoltageRange; |
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287 |
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288 /*Erase 1st sector and wait for IT*/ |
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289 FLASH_Erase_Sector(pEraseInit->Sector, pEraseInit->VoltageRange); |
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290 } |
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291 |
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292 return status; |
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293 } |
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294 |
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295 /** |
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296 * @brief Program option bytes |
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297 * @param pOBInit pointer to an FLASH_OBInitStruct structure that |
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298 * contains the configuration information for the programming. |
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299 * |
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300 * @retval HAL Status |
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301 */ |
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302 HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit) |
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303 { |
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304 HAL_StatusTypeDef status = HAL_ERROR; |
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305 |
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306 /* Process Locked */ |
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307 __HAL_LOCK(&pFlash); |
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308 |
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309 /* Check the parameters */ |
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310 assert_param(IS_OPTIONBYTE(pOBInit->OptionType)); |
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311 |
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312 /*Write protection configuration*/ |
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313 if((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP) |
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314 { |
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315 assert_param(IS_WRPSTATE(pOBInit->WRPState)); |
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316 if(pOBInit->WRPState == OB_WRPSTATE_ENABLE) |
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317 { |
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318 /*Enable of Write protection on the selected Sector*/ |
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319 status = FLASH_OB_EnableWRP(pOBInit->WRPSector, pOBInit->Banks); |
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320 } |
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321 else |
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322 { |
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323 /*Disable of Write protection on the selected Sector*/ |
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324 status = FLASH_OB_DisableWRP(pOBInit->WRPSector, pOBInit->Banks); |
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325 } |
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326 } |
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327 |
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328 /*Read protection configuration*/ |
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329 if((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP) |
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330 { |
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331 status = FLASH_OB_RDP_LevelConfig(pOBInit->RDPLevel); |
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332 } |
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333 |
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334 /*USER configuration*/ |
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335 if((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER) |
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336 { |
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337 status = FLASH_OB_UserConfig(pOBInit->USERConfig&OB_IWDG_SW, |
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338 pOBInit->USERConfig&OB_STOP_NO_RST, |
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339 pOBInit->USERConfig&OB_STDBY_NO_RST); |
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340 } |
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341 |
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342 /*BOR Level configuration*/ |
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343 if((pOBInit->OptionType & OPTIONBYTE_BOR) == OPTIONBYTE_BOR) |
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344 { |
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345 status = FLASH_OB_BOR_LevelConfig(pOBInit->BORLevel); |
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346 } |
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347 |
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348 /* Process Unlocked */ |
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349 __HAL_UNLOCK(&pFlash); |
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350 |
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351 return status; |
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352 } |
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353 |
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354 /** |
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355 * @brief Get the Option byte configuration |
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356 * @param pOBInit pointer to an FLASH_OBInitStruct structure that |
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357 * contains the configuration information for the programming. |
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358 * |
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359 * @retval None |
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360 */ |
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361 void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit) |
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362 { |
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363 pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_BOR; |
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364 |
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365 /*Get WRP*/ |
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366 pOBInit->WRPSector = (uint32_t)FLASH_OB_GetWRP(); |
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367 |
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368 /*Get RDP Level*/ |
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369 pOBInit->RDPLevel = (uint32_t)FLASH_OB_GetRDP(); |
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370 |
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371 /*Get USER*/ |
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372 pOBInit->USERConfig = (uint8_t)FLASH_OB_GetUser(); |
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373 |
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374 /*Get BOR Level*/ |
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375 pOBInit->BORLevel = (uint32_t)FLASH_OB_GetBOR(); |
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376 } |
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377 |
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378 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ |
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379 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\ |
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380 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\ |
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381 defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\ |
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382 defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) |
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383 /** |
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384 * @brief Program option bytes |
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385 * @param pAdvOBInit pointer to an FLASH_AdvOBProgramInitTypeDef structure that |
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386 * contains the configuration information for the programming. |
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387 * |
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388 * @retval HAL Status |
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389 */ |
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390 HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit) |
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391 { |
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392 HAL_StatusTypeDef status = HAL_ERROR; |
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393 |
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394 /* Check the parameters */ |
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395 assert_param(IS_OBEX(pAdvOBInit->OptionType)); |
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396 |
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397 /*Program PCROP option byte*/ |
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398 if(((pAdvOBInit->OptionType) & OPTIONBYTE_PCROP) == OPTIONBYTE_PCROP) |
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399 { |
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400 /* Check the parameters */ |
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401 assert_param(IS_PCROPSTATE(pAdvOBInit->PCROPState)); |
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402 if((pAdvOBInit->PCROPState) == OB_PCROP_STATE_ENABLE) |
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403 { |
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404 /*Enable of Write protection on the selected Sector*/ |
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405 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\ |
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406 defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\ |
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407 defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) |
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408 status = FLASH_OB_EnablePCROP(pAdvOBInit->Sectors); |
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409 #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */ |
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410 status = FLASH_OB_EnablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks); |
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411 #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || |
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412 STM32F413xx || STM32F423xx */ |
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413 } |
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414 else |
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415 { |
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416 /*Disable of Write protection on the selected Sector*/ |
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417 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\ |
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418 defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\ |
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419 defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) |
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420 status = FLASH_OB_DisablePCROP(pAdvOBInit->Sectors); |
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421 #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */ |
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422 status = FLASH_OB_DisablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks); |
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423 #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || |
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424 STM32F413xx || STM32F423xx */ |
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425 } |
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426 } |
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427 |
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428 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) |
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429 /*Program BOOT config option byte*/ |
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430 if(((pAdvOBInit->OptionType) & OPTIONBYTE_BOOTCONFIG) == OPTIONBYTE_BOOTCONFIG) |
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431 { |
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432 status = FLASH_OB_BootConfig(pAdvOBInit->BootConfig); |
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433 } |
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434 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ |
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435 |
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436 return status; |
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437 } |
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438 |
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439 /** |
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440 * @brief Get the OBEX byte configuration |
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441 * @param pAdvOBInit pointer to an FLASH_AdvOBProgramInitTypeDef structure that |
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442 * contains the configuration information for the programming. |
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443 * |
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444 * @retval None |
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445 */ |
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446 void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit) |
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447 { |
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448 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\ |
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449 defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\ |
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450 defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) |
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451 /*Get Sector*/ |
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452 pAdvOBInit->Sectors = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS)); |
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453 #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */ |
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454 /*Get Sector for Bank1*/ |
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455 pAdvOBInit->SectorsBank1 = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS)); |
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456 |
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457 /*Get Sector for Bank2*/ |
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458 pAdvOBInit->SectorsBank2 = (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS)); |
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459 |
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460 /*Get Boot config OB*/ |
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461 pAdvOBInit->BootConfig = *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS; |
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462 #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || |
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463 STM32F413xx || STM32F423xx */ |
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464 } |
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465 |
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466 /** |
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467 * @brief Select the Protection Mode |
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468 * |
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469 * @note After PCROP activated Option Byte modification NOT POSSIBLE! excepted |
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470 * Global Read Out Protection modification (from level1 to level0) |
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471 * @note Once SPRMOD bit is active unprotection of a protected sector is not possible |
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472 * @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag |
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473 * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F401xx/STM32F411xx/STM32F446xx/ |
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474 * STM32F469xx/STM32F479xx/STM32F412xx/STM32F413xx devices. |
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475 * |
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476 * @retval HAL Status |
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477 */ |
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478 HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void) |
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479 { |
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480 uint8_t optiontmp = 0xFF; |
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481 |
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482 /* Mask SPRMOD bit */ |
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483 optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F); |
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484 |
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485 /* Update Option Byte */ |
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486 *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_SELECTED | optiontmp); |
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487 |
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488 return HAL_OK; |
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489 } |
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490 |
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491 /** |
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492 * @brief Deselect the Protection Mode |
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493 * |
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494 * @note After PCROP activated Option Byte modification NOT POSSIBLE! excepted |
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495 * Global Read Out Protection modification (from level1 to level0) |
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496 * @note Once SPRMOD bit is active unprotection of a protected sector is not possible |
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497 * @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag |
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498 * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F401xx/STM32F411xx/STM32F446xx/ |
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499 * STM32F469xx/STM32F479xx/STM32F412xx/STM32F413xx devices. |
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500 * |
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501 * @retval HAL Status |
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502 */ |
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503 HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void) |
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504 { |
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505 uint8_t optiontmp = 0xFF; |
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506 |
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507 /* Mask SPRMOD bit */ |
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508 optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F); |
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509 |
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510 /* Update Option Byte */ |
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511 *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_DESELECTED | optiontmp); |
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512 |
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513 return HAL_OK; |
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514 } |
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515 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F410xx ||\ |
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516 STM32F411xE || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || |
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517 STM32F413xx || STM32F423xx */ |
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518 |
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519 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) |
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520 /** |
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521 * @brief Returns the FLASH Write Protection Option Bytes value for Bank 2 |
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522 * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx devices. |
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523 * @retval The FLASH Write Protection Option Bytes value |
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524 */ |
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525 uint16_t HAL_FLASHEx_OB_GetBank2WRP(void) |
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526 { |
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527 /* Return the FLASH write protection Register value */ |
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528 return (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS)); |
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529 } |
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530 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ |
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531 |
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532 /** |
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533 * @} |
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534 */ |
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535 |
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536 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) |
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537 /** |
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538 * @brief Full erase of FLASH memory sectors |
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539 * @param VoltageRange The device voltage range which defines the erase parallelism. |
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540 * This parameter can be one of the following values: |
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541 * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V, |
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542 * the operation will be done by byte (8-bit) |
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543 * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V, |
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544 * the operation will be done by half word (16-bit) |
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545 * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V, |
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546 * the operation will be done by word (32-bit) |
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547 * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp, |
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548 * the operation will be done by double word (64-bit) |
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549 * |
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550 * @param Banks Banks to be erased |
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551 * This parameter can be one of the following values: |
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552 * @arg FLASH_BANK_1: Bank1 to be erased |
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553 * @arg FLASH_BANK_2: Bank2 to be erased |
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554 * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased |
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555 * |
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556 * @retval HAL Status |
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557 */ |
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558 static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks) |
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559 { |
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560 /* Check the parameters */ |
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561 assert_param(IS_VOLTAGERANGE(VoltageRange)); |
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562 assert_param(IS_FLASH_BANK(Banks)); |
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563 |
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564 /* if the previous operation is completed, proceed to erase all sectors */ |
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565 CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE); |
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566 |
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567 if(Banks == FLASH_BANK_BOTH) |
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568 { |
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569 /* bank1 & bank2 will be erased*/ |
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570 FLASH->CR |= FLASH_MER_BIT; |
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571 } |
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572 else if(Banks == FLASH_BANK_1) |
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573 { |
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574 /*Only bank1 will be erased*/ |
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575 FLASH->CR |= FLASH_CR_MER1; |
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576 } |
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577 else |
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578 { |
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579 /*Only bank2 will be erased*/ |
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580 FLASH->CR |= FLASH_CR_MER2; |
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581 } |
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582 FLASH->CR |= FLASH_CR_STRT | ((uint32_t)VoltageRange <<8U); |
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583 } |
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584 |
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585 /** |
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586 * @brief Erase the specified FLASH memory sector |
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587 * @param Sector FLASH sector to erase |
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588 * The value of this parameter depend on device used within the same series |
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589 * @param VoltageRange The device voltage range which defines the erase parallelism. |
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590 * This parameter can be one of the following values: |
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591 * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V, |
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592 * the operation will be done by byte (8-bit) |
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593 * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V, |
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594 * the operation will be done by half word (16-bit) |
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595 * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V, |
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596 * the operation will be done by word (32-bit) |
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597 * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp, |
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598 * the operation will be done by double word (64-bit) |
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599 * |
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600 * @retval None |
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601 */ |
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602 void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange) |
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603 { |
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604 uint32_t tmp_psize = 0U; |
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605 |
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606 /* Check the parameters */ |
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607 assert_param(IS_FLASH_SECTOR(Sector)); |
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608 assert_param(IS_VOLTAGERANGE(VoltageRange)); |
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609 |
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610 if(VoltageRange == FLASH_VOLTAGE_RANGE_1) |
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611 { |
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612 tmp_psize = FLASH_PSIZE_BYTE; |
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613 } |
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614 else if(VoltageRange == FLASH_VOLTAGE_RANGE_2) |
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615 { |
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616 tmp_psize = FLASH_PSIZE_HALF_WORD; |
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617 } |
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618 else if(VoltageRange == FLASH_VOLTAGE_RANGE_3) |
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619 { |
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620 tmp_psize = FLASH_PSIZE_WORD; |
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621 } |
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622 else |
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623 { |
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624 tmp_psize = FLASH_PSIZE_DOUBLE_WORD; |
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625 } |
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626 |
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627 /* Need to add offset of 4 when sector higher than FLASH_SECTOR_11 */ |
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628 if(Sector > FLASH_SECTOR_11) |
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629 { |
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630 Sector += 4U; |
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631 } |
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632 /* If the previous operation is completed, proceed to erase the sector */ |
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633 CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE); |
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634 FLASH->CR |= tmp_psize; |
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635 CLEAR_BIT(FLASH->CR, FLASH_CR_SNB); |
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636 FLASH->CR |= FLASH_CR_SER | (Sector << FLASH_CR_SNB_Pos); |
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637 FLASH->CR |= FLASH_CR_STRT; |
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638 } |
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639 |
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640 /** |
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641 * @brief Enable the write protection of the desired bank1 or bank 2 sectors |
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642 * |
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643 * @note When the memory read protection level is selected (RDP level = 1), |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
644 * it is not possible to program or erase the flash sector i if CortexM4 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
645 * debug features are connected or boot code is executed in RAM, even if nWRPi = 1 |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
646 * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
647 * |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
648 * @param WRPSector specifies the sector(s) to be write protected. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
649 * This parameter can be one of the following values: |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
650 * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23 |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
651 * @arg OB_WRP_SECTOR_All |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
652 * @note BANK2 starts from OB_WRP_SECTOR_12 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
653 * |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
654 * @param Banks Enable write protection on all the sectors for the specific bank |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
655 * This parameter can be one of the following values: |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
656 * @arg FLASH_BANK_1: WRP on all sectors of bank1 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
657 * @arg FLASH_BANK_2: WRP on all sectors of bank2 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
658 * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2 |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
659 * |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
660 * @retval HAL FLASH State |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
661 */ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
662 static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks) |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
663 { |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
664 HAL_StatusTypeDef status = HAL_OK; |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
665 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
666 /* Check the parameters */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
667 assert_param(IS_OB_WRP_SECTOR(WRPSector)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
668 assert_param(IS_FLASH_BANK(Banks)); |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
669 |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
670 /* Wait for last operation to be completed */ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
671 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
672 |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
673 if(status == HAL_OK) |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
674 { |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
675 if(((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) || |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
676 (WRPSector < OB_WRP_SECTOR_12)) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
677 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
678 if(WRPSector == OB_WRP_SECTOR_All) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
679 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
680 /*Write protection on all sector of BANK1*/ |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
681 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~(WRPSector>>12)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
682 } |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
683 else |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
684 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
685 /*Write protection done on sectors of BANK1*/ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
686 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~WRPSector); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
687 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
688 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
689 else |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
690 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
691 /*Write protection done on sectors of BANK2*/ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
692 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector>>12)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
693 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
694 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
695 /*Write protection on all sector of BANK2*/ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
696 if((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH)) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
697 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
698 /* Wait for last operation to be completed */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
699 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
700 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
701 if(status == HAL_OK) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
702 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
703 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector>>12)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
704 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
705 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
706 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
707 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
708 return status; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
709 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
710 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
711 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
712 * @brief Disable the write protection of the desired bank1 or bank 2 sectors |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
713 * |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
714 * @note When the memory read protection level is selected (RDP level = 1), |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
715 * it is not possible to program or erase the flash sector i if CortexM4 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
716 * debug features are connected or boot code is executed in RAM, even if nWRPi = 1 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
717 * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1). |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
718 * |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
719 * @param WRPSector specifies the sector(s) to be write protected. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
720 * This parameter can be one of the following values: |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
721 * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
722 * @arg OB_WRP_Sector_All |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
723 * @note BANK2 starts from OB_WRP_SECTOR_12 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
724 * |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
725 * @param Banks Disable write protection on all the sectors for the specific bank |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
726 * This parameter can be one of the following values: |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
727 * @arg FLASH_BANK_1: Bank1 to be erased |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
728 * @arg FLASH_BANK_2: Bank2 to be erased |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
729 * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
730 * |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
731 * @retval HAL Status |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
732 */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
733 static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
734 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
735 HAL_StatusTypeDef status = HAL_OK; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
736 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
737 /* Check the parameters */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
738 assert_param(IS_OB_WRP_SECTOR(WRPSector)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
739 assert_param(IS_FLASH_BANK(Banks)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
740 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
741 /* Wait for last operation to be completed */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
742 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
743 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
744 if(status == HAL_OK) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
745 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
746 if(((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) || |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
747 (WRPSector < OB_WRP_SECTOR_12)) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
748 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
749 if(WRPSector == OB_WRP_SECTOR_All) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
750 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
751 /*Write protection on all sector of BANK1*/ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
752 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
753 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
754 else |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
755 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
756 /*Write protection done on sectors of BANK1*/ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
757 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
758 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
759 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
760 else |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
761 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
762 /*Write protection done on sectors of BANK2*/ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
763 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
764 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
765 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
766 /*Write protection on all sector of BANK2*/ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
767 if((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH)) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
768 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
769 /* Wait for last operation to be completed */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
770 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
771 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
772 if(status == HAL_OK) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
773 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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774 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12); |
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|
775 } |
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|
776 } |
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|
777 |
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|
778 } |
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|
779 |
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|
780 return status; |
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|
781 } |
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|
782 |
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|
783 /** |
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|
784 * @brief Configure the Dual Bank Boot. |
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|
785 * |
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786 * @note This function can be used only for STM32F42xxx/43xxx devices. |
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787 * |
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|
788 * @param BootConfig specifies the Dual Bank Boot Option byte. |
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789 * This parameter can be one of the following values: |
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790 * @arg OB_Dual_BootEnabled: Dual Bank Boot Enable |
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791 * @arg OB_Dual_BootDisabled: Dual Bank Boot Disabled |
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792 * @retval None |
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793 */ |
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|
794 static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig) |
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795 { |
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|
796 HAL_StatusTypeDef status = HAL_OK; |
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|
797 |
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|
798 /* Check the parameters */ |
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799 assert_param(IS_OB_BOOT(BootConfig)); |
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|
800 |
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|
801 /* Wait for last operation to be completed */ |
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802 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
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|
803 |
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|
804 if(status == HAL_OK) |
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|
805 { |
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|
806 /* Set Dual Bank Boot */ |
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807 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BFB2); |
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808 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= BootConfig; |
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809 } |
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|
810 |
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811 return status; |
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812 } |
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|
813 |
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|
814 /** |
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815 * @brief Enable the read/write protection (PCROP) of the desired |
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816 * sectors of Bank 1 and/or Bank 2. |
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|
817 * @note This function can be used only for STM32F42xxx/43xxx devices. |
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818 * @param SectorBank1 Specifies the sector(s) to be read/write protected or unprotected for bank1. |
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819 * This parameter can be one of the following values: |
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820 * @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11 |
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821 * @arg OB_PCROP_SECTOR__All |
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822 * @param SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2. |
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823 * This parameter can be one of the following values: |
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Added current STM32 standandard libraries in version independend folder structure
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824 * @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23 |
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|
825 * @arg OB_PCROP_SECTOR__All |
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826 * @param Banks Enable PCROP protection on all the sectors for the specific bank |
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827 * This parameter can be one of the following values: |
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|
828 * @arg FLASH_BANK_1: WRP on all sectors of bank1 |
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829 * @arg FLASH_BANK_2: WRP on all sectors of bank2 |
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830 * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2 |
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|
831 * |
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832 * @retval HAL Status |
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|
833 */ |
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|
834 static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks) |
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835 { |
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836 HAL_StatusTypeDef status = HAL_OK; |
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|
837 |
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838 assert_param(IS_FLASH_BANK(Banks)); |
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|
839 |
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|
840 /* Wait for last operation to be completed */ |
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841 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
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|
842 |
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|
843 if(status == HAL_OK) |
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844 { |
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845 if((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH)) |
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846 { |
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847 assert_param(IS_OB_PCROP(SectorBank1)); |
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848 /*Write protection done on sectors of BANK1*/ |
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Added current STM32 standandard libraries in version independend folder structure
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849 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)SectorBank1; |
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|
850 } |
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|
851 else |
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|
852 { |
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|
853 assert_param(IS_OB_PCROP(SectorBank2)); |
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Added current STM32 standandard libraries in version independend folder structure
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|
854 /*Write protection done on sectors of BANK2*/ |
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Added current STM32 standandard libraries in version independend folder structure
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855 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2; |
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Added current STM32 standandard libraries in version independend folder structure
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|
856 } |
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|
857 |
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|
858 /*Write protection on all sector of BANK2*/ |
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Added current STM32 standandard libraries in version independend folder structure
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|
859 if(Banks == FLASH_BANK_BOTH) |
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|
860 { |
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|
861 assert_param(IS_OB_PCROP(SectorBank2)); |
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|
862 /* Wait for last operation to be completed */ |
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|
863 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
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|
864 |
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|
865 if(status == HAL_OK) |
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|
866 { |
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|
867 /*Write protection done on sectors of BANK2*/ |
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868 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2; |
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869 } |
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|
870 } |
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871 |
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|
872 } |
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|
873 |
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874 return status; |
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Added current STM32 standandard libraries in version independend folder structure
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|
875 } |
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|
876 |
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Added current STM32 standandard libraries in version independend folder structure
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|
877 |
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|
878 /** |
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879 * @brief Disable the read/write protection (PCROP) of the desired |
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880 * sectors of Bank 1 and/or Bank 2. |
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Added current STM32 standandard libraries in version independend folder structure
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881 * @note This function can be used only for STM32F42xxx/43xxx devices. |
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|
882 * @param SectorBank1 specifies the sector(s) to be read/write protected or unprotected for bank1. |
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883 * This parameter can be one of the following values: |
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884 * @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11 |
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885 * @arg OB_PCROP_SECTOR__All |
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886 * @param SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2. |
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|
887 * This parameter can be one of the following values: |
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|
888 * @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23 |
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|
889 * @arg OB_PCROP_SECTOR__All |
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890 * @param Banks Disable PCROP protection on all the sectors for the specific bank |
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891 * This parameter can be one of the following values: |
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Added current STM32 standandard libraries in version independend folder structure
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|
892 * @arg FLASH_BANK_1: WRP on all sectors of bank1 |
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893 * @arg FLASH_BANK_2: WRP on all sectors of bank2 |
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894 * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2 |
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|
895 * |
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896 * @retval HAL Status |
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|
897 */ |
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898 static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks) |
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|
899 { |
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900 HAL_StatusTypeDef status = HAL_OK; |
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|
901 |
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|
902 /* Check the parameters */ |
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903 assert_param(IS_FLASH_BANK(Banks)); |
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|
904 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
905 /* Wait for last operation to be completed */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
906 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
907 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
908 if(status == HAL_OK) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
909 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
910 if((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH)) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
911 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
912 assert_param(IS_OB_PCROP(SectorBank1)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
913 /*Write protection done on sectors of BANK1*/ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
914 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~SectorBank1); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
915 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
916 else |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
917 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
918 /*Write protection done on sectors of BANK2*/ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
919 assert_param(IS_OB_PCROP(SectorBank2)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
920 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
921 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
922 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
923 /*Write protection on all sector of BANK2*/ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
924 if(Banks == FLASH_BANK_BOTH) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
925 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
926 assert_param(IS_OB_PCROP(SectorBank2)); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
927 /* Wait for last operation to be completed */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
928 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
929 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
930 if(status == HAL_OK) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
931 { |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
932 /*Write protection done on sectors of BANK2*/ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
933 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2); |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
934 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
935 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
936 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
937 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
938 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
939 return status; |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
940 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
941 } |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
942 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
943 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
944 |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
945 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
946 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
947 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
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|
948 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\ |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
949 defined(STM32F423xx) |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
950 /** |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
951 * @brief Mass erase of FLASH memory |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
952 * @param VoltageRange The device voltage range which defines the erase parallelism. |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
953 * This parameter can be one of the following values: |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff
changeset
|
954 * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V, |
c78bcbd5deda
Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
955 * the operation will be done by byte (8-bit) |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
956 * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V, |
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Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff
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|
957 * the operation will be done by half word (16-bit) |
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Added current STM32 standandard libraries in version independend folder structure
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|
958 * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V, |
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|
959 * the operation will be done by word (32-bit) |
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Added current STM32 standandard libraries in version independend folder structure
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|
960 * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp, |
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Added current STM32 standandard libraries in version independend folder structure
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|
961 * the operation will be done by double word (64-bit) |
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Added current STM32 standandard libraries in version independend folder structure
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diff
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|
962 * |
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diff
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|
963 * @param Banks Banks to be erased |
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|
964 * This parameter can be one of the following values: |
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Added current STM32 standandard libraries in version independend folder structure
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|
965 * @arg FLASH_BANK_1: Bank1 to be erased |
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|
966 * |
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|
967 * @retval None |
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Added current STM32 standandard libraries in version independend folder structure
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|
968 */ |
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Added current STM32 standandard libraries in version independend folder structure
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parents:
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|
969 static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks) |
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|
970 { |
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Added current STM32 standandard libraries in version independend folder structure
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|
971 /* Check the parameters */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
972 assert_param(IS_VOLTAGERANGE(VoltageRange)); |
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Added current STM32 standandard libraries in version independend folder structure
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|
973 assert_param(IS_FLASH_BANK(Banks)); |
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|
974 |
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|
975 /* If the previous operation is completed, proceed to erase all sectors */ |
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|
976 CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE); |
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|
977 FLASH->CR |= FLASH_CR_MER; |
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|
978 FLASH->CR |= FLASH_CR_STRT | ((uint32_t)VoltageRange <<8U); |
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|
979 } |
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|
980 |
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|
981 /** |
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|
982 * @brief Erase the specified FLASH memory sector |
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|
983 * @param Sector FLASH sector to erase |
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|
984 * The value of this parameter depend on device used within the same series |
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|
985 * @param VoltageRange The device voltage range which defines the erase parallelism. |
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|
986 * This parameter can be one of the following values: |
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Added current STM32 standandard libraries in version independend folder structure
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|
987 * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V, |
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|
988 * the operation will be done by byte (8-bit) |
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|
989 * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V, |
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|
990 * the operation will be done by half word (16-bit) |
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|
991 * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V, |
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|
992 * the operation will be done by word (32-bit) |
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|
993 * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp, |
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|
994 * the operation will be done by double word (64-bit) |
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Added current STM32 standandard libraries in version independend folder structure
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|
995 * |
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|
996 * @retval None |
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Added current STM32 standandard libraries in version independend folder structure
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|
997 */ |
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|
998 void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange) |
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|
999 { |
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|
1000 uint32_t tmp_psize = 0U; |
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Added current STM32 standandard libraries in version independend folder structure
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|
1001 |
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diff
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|
1002 /* Check the parameters */ |
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Added current STM32 standandard libraries in version independend folder structure
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|
1003 assert_param(IS_FLASH_SECTOR(Sector)); |
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Added current STM32 standandard libraries in version independend folder structure
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|
1004 assert_param(IS_VOLTAGERANGE(VoltageRange)); |
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|
1005 |
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|
1006 if(VoltageRange == FLASH_VOLTAGE_RANGE_1) |
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|
1007 { |
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|
1008 tmp_psize = FLASH_PSIZE_BYTE; |
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|
1009 } |
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|
1010 else if(VoltageRange == FLASH_VOLTAGE_RANGE_2) |
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diff
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|
1011 { |
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|
1012 tmp_psize = FLASH_PSIZE_HALF_WORD; |
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|
1013 } |
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|
1014 else if(VoltageRange == FLASH_VOLTAGE_RANGE_3) |
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1015 { |
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|
1016 tmp_psize = FLASH_PSIZE_WORD; |
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|
1017 } |
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|
1018 else |
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|
1019 { |
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|
1020 tmp_psize = FLASH_PSIZE_DOUBLE_WORD; |
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|
1021 } |
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|
1022 |
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|
1023 /* If the previous operation is completed, proceed to erase the sector */ |
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|
1024 CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE); |
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1025 FLASH->CR |= tmp_psize; |
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|
1026 CLEAR_BIT(FLASH->CR, FLASH_CR_SNB); |
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1027 FLASH->CR |= FLASH_CR_SER | (Sector << FLASH_CR_SNB_Pos); |
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|
1028 FLASH->CR |= FLASH_CR_STRT; |
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|
1029 } |
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|
1030 |
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|
1031 /** |
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|
1032 * @brief Enable the write protection of the desired bank 1 sectors |
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1033 * |
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1034 * @note When the memory read protection level is selected (RDP level = 1), |
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1035 * it is not possible to program or erase the flash sector i if CortexM4 |
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1036 * debug features are connected or boot code is executed in RAM, even if nWRPi = 1 |
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1037 * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1). |
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1038 * |
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1039 * @param WRPSector specifies the sector(s) to be write protected. |
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1040 * The value of this parameter depend on device used within the same series |
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1041 * |
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1042 * @param Banks Enable write protection on all the sectors for the specific bank |
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1043 * This parameter can be one of the following values: |
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1044 * @arg FLASH_BANK_1: WRP on all sectors of bank1 |
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1045 * |
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1046 * @retval HAL Status |
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1047 */ |
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1048 static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks) |
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1049 { |
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1050 HAL_StatusTypeDef status = HAL_OK; |
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1051 |
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1052 /* Check the parameters */ |
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1053 assert_param(IS_OB_WRP_SECTOR(WRPSector)); |
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1054 assert_param(IS_FLASH_BANK(Banks)); |
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1055 |
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1056 /* Wait for last operation to be completed */ |
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1057 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
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1058 |
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1059 if(status == HAL_OK) |
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1060 { |
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1061 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~WRPSector); |
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1062 } |
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1063 |
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1064 return status; |
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1065 } |
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1066 |
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1067 /** |
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1068 * @brief Disable the write protection of the desired bank 1 sectors |
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1069 * |
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1070 * @note When the memory read protection level is selected (RDP level = 1), |
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1071 * it is not possible to program or erase the flash sector i if CortexM4 |
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1072 * debug features are connected or boot code is executed in RAM, even if nWRPi = 1 |
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1073 * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1). |
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1074 * |
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1075 * @param WRPSector specifies the sector(s) to be write protected. |
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1076 * The value of this parameter depend on device used within the same series |
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1077 * |
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1078 * @param Banks Enable write protection on all the sectors for the specific bank |
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1079 * This parameter can be one of the following values: |
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1080 * @arg FLASH_BANK_1: WRP on all sectors of bank1 |
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1081 * |
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1082 * @retval HAL Status |
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1083 */ |
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1084 static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks) |
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1085 { |
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1086 HAL_StatusTypeDef status = HAL_OK; |
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1087 |
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1088 /* Check the parameters */ |
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1089 assert_param(IS_OB_WRP_SECTOR(WRPSector)); |
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1090 assert_param(IS_FLASH_BANK(Banks)); |
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1091 |
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1092 /* Wait for last operation to be completed */ |
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1093 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
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1094 |
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1095 if(status == HAL_OK) |
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1096 { |
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1097 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector; |
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1098 } |
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1099 |
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1100 return status; |
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1101 } |
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1102 #endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx |
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1103 STM32F413xx || STM32F423xx */ |
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1104 |
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1105 #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\ |
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1106 defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\ |
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1107 defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) |
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1108 /** |
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1109 * @brief Enable the read/write protection (PCROP) of the desired sectors. |
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1110 * @note This function can be used only for STM32F401xx devices. |
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1111 * @param Sector specifies the sector(s) to be read/write protected or unprotected. |
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1112 * This parameter can be one of the following values: |
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1113 * @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5 |
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1114 * @arg OB_PCROP_Sector_All |
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1115 * @retval HAL Status |
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1116 */ |
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1117 static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector) |
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1118 { |
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1119 HAL_StatusTypeDef status = HAL_OK; |
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1120 |
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1121 /* Check the parameters */ |
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1122 assert_param(IS_OB_PCROP(Sector)); |
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1123 |
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1124 /* Wait for last operation to be completed */ |
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1125 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
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1126 |
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1127 if(status == HAL_OK) |
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1128 { |
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1129 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)Sector; |
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1130 } |
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1131 |
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1132 return status; |
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1133 } |
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1134 |
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1135 |
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1136 /** |
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1137 * @brief Disable the read/write protection (PCROP) of the desired sectors. |
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1138 * @note This function can be used only for STM32F401xx devices. |
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1139 * @param Sector specifies the sector(s) to be read/write protected or unprotected. |
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1140 * This parameter can be one of the following values: |
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1141 * @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5 |
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1142 * @arg OB_PCROP_Sector_All |
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1143 * @retval HAL Status |
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1144 */ |
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1145 static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector) |
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1146 { |
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1147 HAL_StatusTypeDef status = HAL_OK; |
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1148 |
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1149 /* Check the parameters */ |
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1150 assert_param(IS_OB_PCROP(Sector)); |
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1151 |
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1152 /* Wait for last operation to be completed */ |
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1153 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
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1154 |
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1155 if(status == HAL_OK) |
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1156 { |
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1157 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~Sector); |
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1158 } |
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1159 |
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1160 return status; |
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1161 |
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1162 } |
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1163 #endif /* STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx |
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1164 STM32F413xx || STM32F423xx */ |
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1165 |
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1166 /** |
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1167 * @brief Set the read protection level. |
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1168 * @param Level specifies the read protection level. |
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1169 * This parameter can be one of the following values: |
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1170 * @arg OB_RDP_LEVEL_0: No protection |
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1171 * @arg OB_RDP_LEVEL_1: Read protection of the memory |
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1172 * @arg OB_RDP_LEVEL_2: Full chip protection |
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1173 * |
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1174 * @note WARNING: When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0 |
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1175 * |
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1176 * @retval HAL Status |
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|
1177 */ |
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1178 static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level) |
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1179 { |
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1180 HAL_StatusTypeDef status = HAL_OK; |
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|
1181 |
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1182 /* Check the parameters */ |
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1183 assert_param(IS_OB_RDP_LEVEL(Level)); |
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1184 |
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1185 /* Wait for last operation to be completed */ |
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1186 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
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1187 |
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1188 if(status == HAL_OK) |
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1189 { |
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1190 *(__IO uint8_t*)OPTCR_BYTE1_ADDRESS = Level; |
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1191 } |
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1192 |
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1193 return status; |
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1194 } |
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1195 |
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1196 /** |
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1197 * @brief Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. |
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1198 * @param Iwdg Selects the IWDG mode |
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1199 * This parameter can be one of the following values: |
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1200 * @arg OB_IWDG_SW: Software IWDG selected |
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1201 * @arg OB_IWDG_HW: Hardware IWDG selected |
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1202 * @param Stop Reset event when entering STOP mode. |
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1203 * This parameter can be one of the following values: |
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1204 * @arg OB_STOP_NO_RST: No reset generated when entering in STOP |
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1205 * @arg OB_STOP_RST: Reset generated when entering in STOP |
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1206 * @param Stdby Reset event when entering Standby mode. |
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1207 * This parameter can be one of the following values: |
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1208 * @arg OB_STDBY_NO_RST: No reset generated when entering in STANDBY |
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1209 * @arg OB_STDBY_RST: Reset generated when entering in STANDBY |
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1210 * @retval HAL Status |
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1211 */ |
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1212 static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby) |
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1213 { |
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1214 uint8_t optiontmp = 0xFF; |
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1215 HAL_StatusTypeDef status = HAL_OK; |
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|
1216 |
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|
1217 /* Check the parameters */ |
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1218 assert_param(IS_OB_IWDG_SOURCE(Iwdg)); |
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1219 assert_param(IS_OB_STOP_SOURCE(Stop)); |
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1220 assert_param(IS_OB_STDBY_SOURCE(Stdby)); |
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1221 |
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1222 /* Wait for last operation to be completed */ |
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1223 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); |
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1224 |
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1225 if(status == HAL_OK) |
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1226 { |
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1227 /* Mask OPTLOCK, OPTSTRT, BOR_LEV and BFB2 bits */ |
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1228 optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE0_ADDRESS) & (uint8_t)0x1F); |
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1229 |
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|
1230 /* Update User Option Byte */ |
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Added current STM32 standandard libraries in version independend folder structure
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1231 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS = Iwdg | (uint8_t)(Stdby | (uint8_t)(Stop | ((uint8_t)optiontmp))); |
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1232 } |
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|
1233 |
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|
1234 return status; |
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|
1235 } |
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|
1236 |
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|
1237 /** |
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|
1238 * @brief Set the BOR Level. |
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Added current STM32 standandard libraries in version independend folder structure
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1239 * @param Level specifies the Option Bytes BOR Reset Level. |
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1240 * This parameter can be one of the following values: |
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Added current STM32 standandard libraries in version independend folder structure
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|
1241 * @arg OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V |
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1242 * @arg OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V |
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1243 * @arg OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V |
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1244 * @arg OB_BOR_OFF: Supply voltage ranges from 1.62 to 2.1 V |
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1245 * @retval HAL Status |
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|
1246 */ |
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|
1247 static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level) |
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|
1248 { |
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|
1249 /* Check the parameters */ |
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|
1250 assert_param(IS_OB_BOR_LEVEL(Level)); |
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|
1251 |
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|
1252 /* Set the BOR Level */ |
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|
1253 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BOR_LEV); |
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1254 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= Level; |
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|
1255 |
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1256 return HAL_OK; |
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|
1257 |
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|
1258 } |
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|
1259 |
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|
1260 /** |
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1261 * @brief Return the FLASH User Option Byte value. |
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1262 * @retval uint8_t FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1) |
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1263 * and RST_STDBY(Bit2). |
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1264 */ |
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|
1265 static uint8_t FLASH_OB_GetUser(void) |
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|
1266 { |
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|
1267 /* Return the User Option Byte */ |
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|
1268 return ((uint8_t)(FLASH->OPTCR & 0xE0)); |
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|
1269 } |
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|
1270 |
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|
1271 /** |
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|
1272 * @brief Return the FLASH Write Protection Option Bytes value. |
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|
1273 * @retval uint16_t FLASH Write Protection Option Bytes value |
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|
1274 */ |
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|
1275 static uint16_t FLASH_OB_GetWRP(void) |
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|
1276 { |
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|
1277 /* Return the FLASH write protection Register value */ |
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|
1278 return (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS)); |
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|
1279 } |
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|
1280 |
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|
1281 /** |
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|
1282 * @brief Returns the FLASH Read Protection level. |
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|
1283 * @retval FLASH ReadOut Protection Status: |
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|
1284 * This parameter can be one of the following values: |
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1285 * @arg OB_RDP_LEVEL_0: No protection |
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1286 * @arg OB_RDP_LEVEL_1: Read protection of the memory |
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1287 * @arg OB_RDP_LEVEL_2: Full chip protection |
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|
1288 */ |
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1289 static uint8_t FLASH_OB_GetRDP(void) |
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|
1290 { |
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1291 uint8_t readstatus = OB_RDP_LEVEL_0; |
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1292 |
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1293 if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_2)) |
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1294 { |
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1295 readstatus = OB_RDP_LEVEL_2; |
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1296 } |
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1297 else if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_1)) |
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1298 { |
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1299 readstatus = OB_RDP_LEVEL_1; |
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1300 } |
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1301 else |
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1302 { |
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1303 readstatus = OB_RDP_LEVEL_0; |
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1304 } |
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1305 |
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1306 return readstatus; |
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1307 } |
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1308 |
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1309 /** |
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1310 * @brief Returns the FLASH BOR level. |
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1311 * @retval uint8_t The FLASH BOR level: |
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1312 * - OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V |
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1313 * - OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V |
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1314 * - OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V |
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1315 * - OB_BOR_OFF : Supply voltage ranges from 1.62 to 2.1 V |
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1316 */ |
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1317 static uint8_t FLASH_OB_GetBOR(void) |
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1318 { |
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1319 /* Return the FLASH BOR level */ |
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1320 return (uint8_t)(*(__IO uint8_t *)(OPTCR_BYTE0_ADDRESS) & (uint8_t)0x0C); |
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1321 } |
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1322 |
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1323 /** |
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1324 * @brief Flush the instruction and data caches |
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1325 * @retval None |
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1326 */ |
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1327 void FLASH_FlushCaches(void) |
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1328 { |
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1329 /* Flush instruction cache */ |
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1330 if(READ_BIT(FLASH->ACR, FLASH_ACR_ICEN)!= RESET) |
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1331 { |
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1332 /* Disable instruction cache */ |
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1333 __HAL_FLASH_INSTRUCTION_CACHE_DISABLE(); |
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1334 /* Reset instruction cache */ |
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1335 __HAL_FLASH_INSTRUCTION_CACHE_RESET(); |
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1336 /* Enable instruction cache */ |
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1337 __HAL_FLASH_INSTRUCTION_CACHE_ENABLE(); |
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1338 } |
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1339 |
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1340 /* Flush data cache */ |
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1341 if(READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != RESET) |
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1342 { |
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1343 /* Disable data cache */ |
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1344 __HAL_FLASH_DATA_CACHE_DISABLE(); |
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1345 /* Reset data cache */ |
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1346 __HAL_FLASH_DATA_CACHE_RESET(); |
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1347 /* Enable data cache */ |
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1348 __HAL_FLASH_DATA_CACHE_ENABLE(); |
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1349 } |
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1350 } |
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1351 |
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1352 /** |
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1353 * @} |
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1354 */ |
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1355 |
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1356 #endif /* HAL_FLASH_MODULE_ENABLED */ |
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1357 |
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1358 /** |
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1359 * @} |
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1360 */ |
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1361 |
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1362 /** |
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1363 * @} |
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1364 */ |
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1365 |
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1366 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |