annotate Small_CPU/Src/stm32f4xx_it_v3.c @ 939:f41974734268 Evo_2_23 tip

Resume UART com with gnss after sleep: Some changes were needed to get the communication up and running again after the gnns modul was set into power mode. The config needs to be safed at shutdown and the receiver needs to be wake up using dummy bytes before real communication may be resumed
author Ideenmodellierer
date Tue, 10 Dec 2024 21:03:04 +0100
parents 6fc0e3d230e4
children
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1 /**
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2 ******************************************************************************
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3 * @file GPIO/GPIO_IOToggle/Src/stm32f4xx_it.c
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4 * @author MCD Application Team
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5 * @version V1.1.0
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6 * @date 26-June-2014
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7 * @brief Main Interrupt Service Routines.
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8 * This file provides template for all exceptions handler and
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9 * peripherals interrupt service routine.
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10 ******************************************************************************
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11 * @attention
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12 *
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13 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
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14 *
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15 * Redistribution and use in source and binary forms, with or without modification,
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16 * are permitted provided that the following conditions are met:
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17 * 1. Redistributions of source code must retain the above copyright notice,
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18 * this list of conditions and the following disclaimer.
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19 * 2. Redistributions in binary form must reproduce the above copyright notice,
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20 * this list of conditions and the following disclaimer in the documentation
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21 * and/or other materials provided with the distribution.
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22 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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23 * may be used to endorse or promote products derived from this software
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24 * without specific prior written permission.
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25 *
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26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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27 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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29 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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32 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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33 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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34 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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36 *
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37 ******************************************************************************
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38 */
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39
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40 /* Includes ------------------------------------------------------------------*/
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41 #include "baseCPU2.h"
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42 #include "stm32f4xx_it_v3.h"
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43
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44 /** @addtogroup STM32F4xx_HAL_Examples
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45 * @{
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46 */
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47
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48 /** @addtogroup GPIO_IOToggle
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49 * @{
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50 */
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51
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52 /* Private typedef -----------------------------------------------------------*/
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53 /* Private define ------------------------------------------------------------*/
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54 /* Private macro -------------------------------------------------------------*/
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55 /* Private variables ---------------------------------------------------------*/
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56 extern I2C_HandleTypeDef I2cHandle;
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57 extern SPI_HandleTypeDef hspi1;
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58 extern RTC_HandleTypeDef RTCHandle;
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59 extern ADC_HandleTypeDef AdcHandle;
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60
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61 extern UART_HandleTypeDef huart1;
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62 extern DMA_HandleTypeDef hdma_usart1_rx;
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63 extern DMA_HandleTypeDef hdma_usart1_tx;
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64 extern UART_HandleTypeDef huart6;
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65 extern DMA_HandleTypeDef hdma_usart6_rx;
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66 extern DMA_HandleTypeDef hdma_usart6_tx;
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67 /* Private function prototypes -----------------------------------------------*/
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68 /* Private functions ---------------------------------------------------------*/
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69
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70 /******************************************************************************/
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71 /* Cortex-M4 Processor Exceptions Handlers */
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72 /******************************************************************************/
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73
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74 /**
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75 * @brief This function handles NMI exception.
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76 * @param None
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77 * @retval None
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78 */
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79 void NMI_Handler(void)
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80 {
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81 }
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82
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83 /**
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84 * @brief This function handles Hard Fault exception.
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85 * @param None
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86 * @retval None
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87 */
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88 void HardFault_Handler(void)
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89 {
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90 /* Go to infinite loop when Hard Fault exception occurs */
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91 HAL_NVIC_SystemReset(); /* TODO Exception occures during startup and no iwdg is active ==> Call reset till iwdg is added */
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92 while (1)
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93 {
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94 }
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95 }
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96
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97 /**
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98 * @brief This function handles Memory Manage exception.
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99 * @param None
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100 * @retval None
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101 */
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102 void MemManage_Handler(void)
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103 {
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104 /* Go to infinite loop when Memory Manage exception occurs */
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105 while (1)
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106 {
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107 }
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108 }
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109
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110 /**
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111 * @brief This function handles Bus Fault exception.
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112 * @param None
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113 * @retval None
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114 */
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115 void BusFault_Handler(void)
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116 {
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117 /* Go to infinite loop when Bus Fault exception occurs */
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118 while (1)
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119 {
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120 }
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121 }
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122
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123 /**
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124 * @brief This function handles Usage Fault exception.
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125 * @param None
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126 * @retval None
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127 */
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128 void UsageFault_Handler(void)
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129 {
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130 /* Go to infinite loop when Usage Fault exception occurs */
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131 while (1)
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132 {
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133 }
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134 }
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135
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136 /**
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137 * @brief This function handles SVCall exception.
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138 * @param None
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139 * @retval None
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140 */
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141 void SVC_Handler(void)
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142 {
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143 }
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144
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145 /**
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146 * @brief This function handles Debug Monitor exception.
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147 * @param None
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148 * @retval None
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149 */
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150 void DebugMon_Handler(void)
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151 {
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152 }
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153
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154 /**
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155 * @brief This function handles PendSVC exception.
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156 * @param None
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157 * @retval None
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158 */
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159 void PendSV_Handler(void)
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160 {
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161 }
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162
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163 /**
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164 * @brief This function handles SysTick Handler.
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165 * @param None
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166 * @retval None
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167 */
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168 //void SysTick_Handler(void)
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169 //{
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170 // HAL_IncTick();
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171 //}
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172
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173
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174 /******************************************************************************/
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175 /* STM32F4xx Peripherals Interrupt Handlers */
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176 /* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
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177 /* available peripheral interrupt handler's name please refer to the startup */
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178 /* file (startup_stm32f4xx.s). */
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179 /******************************************************************************/
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180 /**
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181 * @brief This function handles I2C event interrupt request.
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182 * @param None
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183 * @retval None
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184 * @Note This function is redefined in "main.h" and related to I2C data transmission
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185 */
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186 void I2Cx_EV_IRQHandler(void)
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187 {
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188 HAL_I2C_EV_IRQHandler(& I2cHandle);
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189 }
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190
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191 /**
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192 * @brief This function handles I2C error interrupt request.
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193 * @param None
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194 * @retval None
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195 * @Note This function is redefined in "main.h" and related to I2C error
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196 */
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197 void I2Cx_ER_IRQHandler(void)
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198 {
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199 HAL_I2C_ER_IRQHandler(& I2cHandle);
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200 }
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201
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202
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203 /**
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204 * @brief This function handles SPI interrupt request.
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205 * @param None
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206 * @retval None
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207 */
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208
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209 /*
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210 void SPI1_IRQHandler(void)
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211 {
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212 HAL_SPI_IRQHandler(&hspi1);
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213 }
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214 */
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215
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216 /**
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217 * @brief This function handles DMA Tx interrupt request.
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218 * @param None
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219 * @retval None
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220 */
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221 void DMA2_Stream3_IRQHandler(void)
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222 {
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223 HAL_DMA_IRQHandler(hspi1.hdmatx);
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224 }
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225
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226 /**
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227 * @brief This function handles DMA Rx interrupt request.
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228 * @param None
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229 * @retval None
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230 */
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231 void DMA2_Stream0_IRQHandler(void)
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232 {
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233 HAL_DMA_IRQHandler(hspi1.hdmarx);
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234 }
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235
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236 /**
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237 * @brief This function handles PPP interrupt request.
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238 * @param None
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239 * @retval None
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240 */
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241
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242 void DMA2_Stream5_IRQHandler(void)
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243 {
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244 HAL_DMA_IRQHandler(&hdma_usart1_rx);
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245 }
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246
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247 void DMA2_Stream7_IRQHandler(void)
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248 {
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249 HAL_DMA_IRQHandler(&hdma_usart1_tx);
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250 }
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251
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252 #ifdef ENABLE_GPIO_V2
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253 void DMA2_Stream2_IRQHandler(void)
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254 {
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255 HAL_DMA_IRQHandler(&hdma_usart6_rx);
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256 }
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257
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258 void DMA2_Stream6_IRQHandler(void)
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259 {
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260 HAL_DMA_IRQHandler(&hdma_usart6_tx);
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261 }
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262 #endif
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263 /******************************************************************************/
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264 /* STM32F4xx Peripherals Interrupt Handlers */
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265 /* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
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266 /* available peripheral interrupt handler's name please refer to the startup */
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267 /* file (startup_stm32f4xx.s). */
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268 /******************************************************************************/
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269
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270
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271 /**
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272 * @brief This function handles RTC Auto wake-up interrupt request.
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273 * @param None
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274 * @retval None
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275 */
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276 void RTC_WKUP_IRQHandler(void)
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277 {
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278 HAL_RTCEx_WakeUpTimerIRQHandler(&RTCHandle);
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279 }
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280
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281 /**
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282 * @brief This function handles External line 0 interrupt request.
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283 * @param None
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284 * @retval None
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285 */
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286 void EXTI15_10_IRQHandler(void)
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287 {
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288 HAL_GPIO_EXTI_IRQHandler(0xFF);
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289 }
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290
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291 /* button */
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292 void EXTI0_IRQHandler(void)
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293 {
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294 HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_0);
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295 }
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296
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297 /* wireless 1 + 2 => was removed from OSTC4 code => placeholder*/
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298 void EXTI1_IRQHandler(void)
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299 {
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300 HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_1);
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301 }
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302
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303 void EXTI2_IRQHandler(void)
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304 {
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305 HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_2);
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306 }
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307
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308 /* test button */
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309 void EXTI3_IRQHandler(void)
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310 {
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311 HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_3);
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312 }
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313
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314 /**
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315 * @brief This function handles ADC interrupt request.
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316 * @param None
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317 * @retval None
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318 */
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319 void ADC_IRQHandler(void)
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320 {
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321 HAL_ADC_IRQHandler(&AdcHandle);
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322 }
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323
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324
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325 void USART1_IRQHandler(void)
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326 {
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327 HAL_UART_IRQHandler(&huart1);
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328 }
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329
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330 #ifdef ENABLE_GPIO_V2
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331 void USART6_IRQHandler(void)
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332 {
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333 HAL_UART_IRQHandler(&huart6);
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334 }
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335 #endif
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336
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337 /**
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338 * @brief This function handles PPP interrupt request.
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339 * @param None
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340 * @retval None
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341 */
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342 /*void PPP_IRQHandler(void)
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343 {
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344 }*/
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345
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346 /**
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347 * @}
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348 */
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349
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350 /**
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351 * @}
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352 */
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353
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354 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/