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1 /**
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2 ******************************************************************************
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3 * @file stm32f4xx_hal_dma2d.h
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4 * @author MCD Application Team
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5 * @version V1.2.0
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6 * @date 26-December-2014
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7 * @brief Header file of DMA2D HAL module.
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8 ******************************************************************************
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9 * @attention
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10 *
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11 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
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12 *
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13 * Redistribution and use in source and binary forms, with or without modification,
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14 * are permitted provided that the following conditions are met:
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15 * 1. Redistributions of source code must retain the above copyright notice,
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16 * this list of conditions and the following disclaimer.
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17 * 2. Redistributions in binary form must reproduce the above copyright notice,
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18 * this list of conditions and the following disclaimer in the documentation
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19 * and/or other materials provided with the distribution.
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20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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21 * may be used to endorse or promote products derived from this software
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22 * without specific prior written permission.
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23 *
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24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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34 *
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35 ******************************************************************************
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36 */
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37
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38 /* Define to prevent recursive inclusion -------------------------------------*/
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39 #ifndef __STM32F4xx_HAL_DMA2D_H
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40 #define __STM32F4xx_HAL_DMA2D_H
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41
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42 #ifdef __cplusplus
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43 extern "C" {
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44 #endif
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45
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46 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
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47 /* Includes ------------------------------------------------------------------*/
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48 #include "stm32f4xx_hal_def.h"
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49
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50 /** @addtogroup STM32F4xx_HAL_Driver
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51 * @{
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52 */
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53
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54 /** @defgroup DMA2D DMA2D
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55 * @brief DMA2D HAL module driver
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56 * @{
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57 */
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58
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59 /* Exported types ------------------------------------------------------------*/
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60 /** @defgroup DMA2D_Exported_Types DMA2D Exported Types
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61 * @{
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62 */
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63 #define MAX_DMA2D_LAYER 2
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64
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65 /**
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66 * @brief DMA2D color Structure definition
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67 */
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68 typedef struct
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69 {
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70 uint32_t Blue; /*!< Configures the blue value.
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71 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
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72
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73 uint32_t Green; /*!< Configures the green value.
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74 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
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75
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76 uint32_t Red; /*!< Configures the red value.
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77 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
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78 } DMA2D_ColorTypeDef;
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79
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80 /**
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81 * @brief DMA2D CLUT Structure definition
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82 */
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83 typedef struct
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84 {
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85 uint32_t *pCLUT; /*!< Configures the DMA2D CLUT memory address.*/
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86
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87 uint32_t CLUTColorMode; /*!< configures the DMA2D CLUT color mode.
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88 This parameter can be one value of @ref DMA2D_CLUT_CM */
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89
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90 uint32_t Size; /*!< configures the DMA2D CLUT size.
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91 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.*/
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92 } DMA2D_CLUTCfgTypeDef;
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93
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94 /**
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95 * @brief DMA2D Init structure definition
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96 */
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97 typedef struct
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98 {
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99 uint32_t Mode; /*!< configures the DMA2D transfer mode.
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100 This parameter can be one value of @ref DMA2D_Mode */
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101
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102 uint32_t ColorMode; /*!< configures the color format of the output image.
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103 This parameter can be one value of @ref DMA2D_Color_Mode */
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104
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105 uint32_t OutputOffset; /*!< Specifies the Offset value.
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106 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */
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107 } DMA2D_InitTypeDef;
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108
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109 /**
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110 * @brief DMA2D Layer structure definition
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111 */
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112 typedef struct
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113 {
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114 uint32_t InputOffset; /*!< configures the DMA2D foreground offset.
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115 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */
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116
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117 uint32_t InputColorMode; /*!< configures the DMA2D foreground color mode .
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118 This parameter can be one value of @ref DMA2D_Input_Color_Mode */
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119
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120 uint32_t AlphaMode; /*!< configures the DMA2D foreground alpha mode.
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121 This parameter can be one value of @ref DMA2D_ALPHA_MODE */
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122
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123 uint32_t InputAlpha; /*!< Specifies the DMA2D foreground alpha value and color value in case of A8 or A4 color mode.
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124 This parameter must be a number between Min_Data = 0x00000000 and Max_Data = 0xFFFFFFFF
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125 in case of A8 or A4 color mode (ARGB).
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126 Otherwise, This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.*/
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127
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128 } DMA2D_LayerCfgTypeDef;
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129
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130 /**
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131 * @brief HAL DMA2D State structures definition
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132 */
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133 typedef enum
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134 {
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135 HAL_DMA2D_STATE_RESET = 0x00, /*!< DMA2D not yet initialized or disabled */
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136 HAL_DMA2D_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
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137 HAL_DMA2D_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
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138 HAL_DMA2D_STATE_TIMEOUT = 0x03, /*!< Timeout state */
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139 HAL_DMA2D_STATE_ERROR = 0x04, /*!< DMA2D state error */
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140 HAL_DMA2D_STATE_SUSPEND = 0x05 /*!< DMA2D process is suspended */
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141 }HAL_DMA2D_StateTypeDef;
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142
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143 /**
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144 * @brief DMA2D handle Structure definition
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145 */
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146 typedef struct __DMA2D_HandleTypeDef
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147 {
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148 DMA2D_TypeDef *Instance; /*!< DMA2D Register base address */
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149
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150 DMA2D_InitTypeDef Init; /*!< DMA2D communication parameters */
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151
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152 void (* XferCpltCallback)(struct __DMA2D_HandleTypeDef * hdma2d); /*!< DMA2D transfer complete callback */
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153
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154 void (* XferErrorCallback)(struct __DMA2D_HandleTypeDef * hdma2d); /*!< DMA2D transfer error callback */
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155
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156 DMA2D_LayerCfgTypeDef LayerCfg[MAX_DMA2D_LAYER]; /*!< DMA2D Layers parameters */
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157
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158 HAL_LockTypeDef Lock; /*!< DMA2D Lock */
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159
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160 __IO HAL_DMA2D_StateTypeDef State; /*!< DMA2D transfer state */
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161
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162 __IO uint32_t ErrorCode; /*!< DMA2D Error code */
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163 } DMA2D_HandleTypeDef;
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164 /**
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165 * @}
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166 */
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167
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168 /* Exported constants --------------------------------------------------------*/
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169 /** @defgroup DMA2D_Exported_Constants DMA2D Exported Constants
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170 * @{
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171 */
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172
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173 /** @defgroup DMA2D_Error_Code DMA2D Error Code
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174 * @{
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175 */
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176 #define HAL_DMA2D_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
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177 #define HAL_DMA2D_ERROR_TE ((uint32_t)0x00000001) /*!< Transfer error */
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178 #define HAL_DMA2D_ERROR_CE ((uint32_t)0x00000002) /*!< Configuration error */
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179 #define HAL_DMA2D_ERROR_TIMEOUT ((uint32_t)0x00000020) /*!< Timeout error */
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180 /**
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181 * @}
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182 */
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183
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184 /** @defgroup DMA2D_Mode DMA2D Mode
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185 * @{
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186 */
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187 #define DMA2D_M2M ((uint32_t)0x00000000) /*!< DMA2D memory to memory transfer mode */
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188 #define DMA2D_M2M_PFC ((uint32_t)0x00010000) /*!< DMA2D memory to memory with pixel format conversion transfer mode */
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189 #define DMA2D_M2M_BLEND ((uint32_t)0x00020000) /*!< DMA2D memory to memory with blending transfer mode */
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190 #define DMA2D_R2M ((uint32_t)0x00030000) /*!< DMA2D register to memory transfer mode */
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191 /**
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192 * @}
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193 */
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194
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195 /** @defgroup DMA2D_Color_Mode DMA2D Color Mode
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196 * @{
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197 */
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198 #define DMA2D_ARGB8888 ((uint32_t)0x00000000) /*!< ARGB8888 DMA2D color mode */
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199 #define DMA2D_RGB888 ((uint32_t)0x00000001) /*!< RGB888 DMA2D color mode */
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200 #define DMA2D_RGB565 ((uint32_t)0x00000002) /*!< RGB565 DMA2D color mode */
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201 #define DMA2D_ARGB1555 ((uint32_t)0x00000003) /*!< ARGB1555 DMA2D color mode */
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202 #define DMA2D_ARGB4444 ((uint32_t)0x00000004) /*!< ARGB4444 DMA2D color mode */
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203 /**
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204 * @}
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205 */
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206
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207 /** @defgroup DMA2D_COLOR_VALUE DMA2D COLOR VALUE
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208 * @{
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209 */
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210 #define COLOR_VALUE ((uint32_t)0x000000FF) /*!< color value mask */
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211 /**
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212 * @}
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213 */
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214
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215 /** @defgroup DMA2D_SIZE DMA2D SIZE
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216 * @{
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217 */
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218 #define DMA2D_PIXEL (DMA2D_NLR_PL >> 16) /*!< DMA2D pixel per line */
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219 #define DMA2D_LINE DMA2D_NLR_NL /*!< DMA2D number of line */
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220 /**
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221 * @}
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222 */
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223
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224 /** @defgroup DMA2D_Offset DMA2D Offset
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225 * @{
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226 */
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227 #define DMA2D_OFFSET DMA2D_FGOR_LO /*!< Line Offset */
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228 /**
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229 * @}
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230 */
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231
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232 /** @defgroup DMA2D_Input_Color_Mode DMA2D Input Color Mode
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233 * @{
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234 */
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235 #define CM_ARGB8888 ((uint32_t)0x00000000) /*!< ARGB8888 color mode */
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236 #define CM_RGB888 ((uint32_t)0x00000001) /*!< RGB888 color mode */
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237 #define CM_RGB565 ((uint32_t)0x00000002) /*!< RGB565 color mode */
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238 #define CM_ARGB1555 ((uint32_t)0x00000003) /*!< ARGB1555 color mode */
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239 #define CM_ARGB4444 ((uint32_t)0x00000004) /*!< ARGB4444 color mode */
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240 #define CM_L8 ((uint32_t)0x00000005) /*!< L8 color mode */
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241 #define CM_AL44 ((uint32_t)0x00000006) /*!< AL44 color mode */
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242 #define CM_AL88 ((uint32_t)0x00000007) /*!< AL88 color mode */
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243 #define CM_L4 ((uint32_t)0x00000008) /*!< L4 color mode */
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244 #define CM_A8 ((uint32_t)0x00000009) /*!< A8 color mode */
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245 #define CM_A4 ((uint32_t)0x0000000A) /*!< A4 color mode */
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246 /**
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247 * @}
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248 */
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249
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250 /** @defgroup DMA2D_ALPHA_MODE DMA2D ALPHA MODE
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251 * @{
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252 */
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253 #define DMA2D_NO_MODIF_ALPHA ((uint32_t)0x00000000) /*!< No modification of the alpha channel value */
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254 #define DMA2D_REPLACE_ALPHA ((uint32_t)0x00000001) /*!< Replace original alpha channel value by programmed alpha value */
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255 #define DMA2D_COMBINE_ALPHA ((uint32_t)0x00000002) /*!< Replace original alpha channel value by programmed alpha value
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256 with original alpha channel value */
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257 /**
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258 * @}
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259 */
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260
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261 /** @defgroup DMA2D_CLUT_CM DMA2D CLUT CM
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262 * @{
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263 */
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264 #define DMA2D_CCM_ARGB8888 ((uint32_t)0x00000000) /*!< ARGB8888 DMA2D C-LUT color mode */
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265 #define DMA2D_CCM_RGB888 ((uint32_t)0x00000001) /*!< RGB888 DMA2D C-LUT color mode */
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266 /**
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267 * @}
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268 */
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269
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270 /** @defgroup DMA2D_Size_Clut DMA2D Size Clut
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271 * @{
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272 */
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273 #define DMA2D_CLUT_SIZE (DMA2D_FGPFCCR_CS >> 8) /*!< DMA2D C-LUT size */
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274 /**
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275 * @}
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276 */
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277
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278 /** @defgroup DMA2D_DeadTime DMA2D DeadTime
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279 * @{
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280 */
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281 #define LINE_WATERMARK DMA2D_LWR_LW
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282 /**
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283 * @}
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284 */
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285
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286 /** @defgroup DMA2D_Interrupts DMA2D Interrupts
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287 * @{
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288 */
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289 #define DMA2D_IT_CE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */
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290 #define DMA2D_IT_CTC DMA2D_CR_CTCIE /*!< C-LUT Transfer Complete Interrupt */
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291 #define DMA2D_IT_CAE DMA2D_CR_CAEIE /*!< C-LUT Access Error Interrupt */
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292 #define DMA2D_IT_TW DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
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293 #define DMA2D_IT_TC DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */
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294 #define DMA2D_IT_TE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
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295 /**
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296 * @}
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297 */
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298
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299 /** @defgroup DMA2D_Flag DMA2D Flag
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300 * @{
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301 */
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302 #define DMA2D_FLAG_CE DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */
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303 #define DMA2D_FLAG_CTC DMA2D_ISR_CTCIF /*!< C-LUT Transfer Complete Interrupt Flag */
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304 #define DMA2D_FLAG_CAE DMA2D_ISR_CAEIF /*!< C-LUT Access Error Interrupt Flag */
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305 #define DMA2D_FLAG_TW DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */
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306 #define DMA2D_FLAG_TC DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */
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307 #define DMA2D_FLAG_TE DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */
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308 /**
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309 * @}
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310 */
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311
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312 /**
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313 * @}
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314 */
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315 /* Exported macro ------------------------------------------------------------*/
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316 /** @defgroup DMA2D_Exported_Macros DMA2D Exported Macros
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317 * @{
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318 */
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319
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320 /** @brief Reset DMA2D handle state
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321 * @param __HANDLE__: specifies the DMA2D handle.
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322 * @retval None
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323 */
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324 #define __HAL_DMA2D_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA2D_STATE_RESET)
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325
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326 /**
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327 * @brief Enable the DMA2D.
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328 * @param __HANDLE__: DMA2D handle
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329 * @retval None.
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330 */
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331 #define __HAL_DMA2D_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= DMA2D_CR_START)
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332
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333 /**
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334 * @brief Disable the DMA2D.
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335 * @param __HANDLE__: DMA2D handle
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336 * @retval None.
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337 */
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338 #define __HAL_DMA2D_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~DMA2D_CR_START)
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339
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340 /* Interrupt & Flag management */
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341 /**
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342 * @brief Get the DMA2D pending flags.
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343 * @param __HANDLE__: DMA2D handle
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344 * @param __FLAG__: Get the specified flag.
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345 * This parameter can be any combination of the following values:
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346 * @arg DMA2D_FLAG_CE: Configuration error flag
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347 * @arg DMA2D_FLAG_CTC: C-LUT transfer complete flag
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348 * @arg DMA2D_FLAG_CAE: C-LUT access error flag
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349 * @arg DMA2D_FLAG_TW: Transfer Watermark flag
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350 * @arg DMA2D_FLAG_TC: Transfer complete flag
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351 * @arg DMA2D_FLAG_TE: Transfer error flag
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352 * @retval The state of FLAG.
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353 */
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354 #define __HAL_DMA2D_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR & (__FLAG__))
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355
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356 /**
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357 * @brief Clears the DMA2D pending flags.
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358 * @param __HANDLE__: DMA2D handle
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359 * @param __FLAG__: specifies the flag to clear.
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360 * This parameter can be any combination of the following values:
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361 * @arg DMA2D_FLAG_CE: Configuration error flag
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362 * @arg DMA2D_FLAG_CTC: C-LUT transfer complete flag
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363 * @arg DMA2D_FLAG_CAE: C-LUT access error flag
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364 * @arg DMA2D_FLAG_TW: Transfer Watermark flag
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365 * @arg DMA2D_FLAG_TC: Transfer complete flag
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366 * @arg DMA2D_FLAG_TE: Transfer error flag
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367 * @retval None
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368 */
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369 #define __HAL_DMA2D_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->IFCR = (__FLAG__))
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370
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371 /**
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372 * @brief Enables the specified DMA2D interrupts.
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373 * @param __HANDLE__: DMA2D handle
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374 * @param __INTERRUPT__: specifies the DMA2D interrupt sources to be enabled.
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375 * This parameter can be any combination of the following values:
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376 * @arg DMA2D_IT_CE: Configuration error interrupt mask
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377 * @arg DMA2D_IT_CTC: C-LUT transfer complete interrupt mask
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378 * @arg DMA2D_IT_CAE: C-LUT access error interrupt mask
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379 * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
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380 * @arg DMA2D_IT_TC: Transfer complete interrupt mask
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381 * @arg DMA2D_IT_TE: Transfer error interrupt mask
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382 * @retval None
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383 */
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384 #define __HAL_DMA2D_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__))
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385
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386 /**
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387 * @brief Disables the specified DMA2D interrupts.
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388 * @param __HANDLE__: DMA2D handle
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389 * @param __INTERRUPT__: specifies the DMA2D interrupt sources to be disabled.
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390 * This parameter can be any combination of the following values:
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391 * @arg DMA2D_IT_CE: Configuration error interrupt mask
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392 * @arg DMA2D_IT_CTC: C-LUT transfer complete interrupt mask
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393 * @arg DMA2D_IT_CAE: C-LUT access error interrupt mask
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394 * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
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395 * @arg DMA2D_IT_TC: Transfer complete interrupt mask
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396 * @arg DMA2D_IT_TE: Transfer error interrupt mask
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397 * @retval None
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398 */
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399 #define __HAL_DMA2D_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
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400
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401 /**
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402 * @brief Checks whether the specified DMA2D interrupt has occurred or not.
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403 * @param __HANDLE__: DMA2D handle
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404 * @param __INTERRUPT__: specifies the DMA2D interrupt source to check.
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405 * This parameter can be one of the following values:
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406 * @arg DMA2D_IT_CE: Configuration error interrupt mask
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407 * @arg DMA2D_IT_CTC: C-LUT transfer complete interrupt mask
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408 * @arg DMA2D_IT_CAE: C-LUT access error interrupt mask
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409 * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
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410 * @arg DMA2D_IT_TC: Transfer complete interrupt mask
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411 * @arg DMA2D_IT_TE: Transfer error interrupt mask
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412 * @retval The state of INTERRUPT.
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413 */
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414 #define __HAL_DMA2D_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR & (__INTERRUPT__))
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415 /**
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416 * @}
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417 */
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418
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419 /* Exported functions --------------------------------------------------------*/
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420 /** @defgroup DMA2D_Exported_Functions DMA2D Exported Functions
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421 * @{
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422 */
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423 /* Initialization and de-initialization functions *******************************/
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424 HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d);
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425 HAL_StatusTypeDef HAL_DMA2D_DeInit (DMA2D_HandleTypeDef *hdma2d);
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426 void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d);
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427 void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d);
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428
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429 /* IO operation functions *******************************************************/
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430 HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
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431 HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height);
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432 HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
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433 HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height);
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434 HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d);
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435 HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d);
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436 HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d);
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437 HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout);
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438 void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d);
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439
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440 /* Peripheral Control functions *************************************************/
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441 HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
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442 HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx);
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443 HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
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444 HAL_StatusTypeDef HAL_DMA2D_DisableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
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445 HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent(DMA2D_HandleTypeDef *hdma2d, uint32_t Line);
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446
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447 /* Peripheral State functions ***************************************************/
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448 HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d);
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449 uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d);
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450 /**
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451 * @}
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452 */
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453
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454 /* Private types -------------------------------------------------------------*/
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455 /** @defgroup DMA2D_Private_Types DMA2D Private Types
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456 * @{
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457 */
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458
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459 /**
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460 * @}
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461 */
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462
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463 /* Private defines -------------------------------------------------------------*/
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464 /** @defgroup DMA2D_Private_Defines DMA2D Private Defines
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465 * @{
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466 */
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467
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468 /**
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469 * @}
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470 */
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471
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472 /* Private variables ---------------------------------------------------------*/
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473 /** @defgroup DMA2D_Private_Variables DMA2D Private Variables
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474 * @{
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475 */
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476
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477 /**
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478 * @}
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479 */
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480
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481 /* Private constants ---------------------------------------------------------*/
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482 /** @defgroup DMA2D_Private_Constants DMA2D Private Constants
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483 * @{
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484 */
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485
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486 /**
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487 * @}
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488 */
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489
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490 /* Private macros ------------------------------------------------------------*/
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491 /** @defgroup DMA2D_Private_Macros DMA2D Private Macros
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492 * @{
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493 */
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494 #define IS_DMA2D_LAYER(LAYER) ((LAYER) <= MAX_DMA2D_LAYER)
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495 #define IS_DMA2D_MODE(MODE) (((MODE) == DMA2D_M2M) || ((MODE) == DMA2D_M2M_PFC) || \
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496 ((MODE) == DMA2D_M2M_BLEND) || ((MODE) == DMA2D_R2M))
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497 #define IS_DMA2D_CMODE(MODE_ARGB) (((MODE_ARGB) == DMA2D_ARGB8888) || ((MODE_ARGB) == DMA2D_RGB888) || \
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498 ((MODE_ARGB) == DMA2D_RGB565) || ((MODE_ARGB) == DMA2D_ARGB1555) || \
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499 ((MODE_ARGB) == DMA2D_ARGB4444))
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500 #define IS_DMA2D_COLOR(COLOR) ((COLOR) <= COLOR_VALUE)
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501 #define IS_DMA2D_LINE(LINE) ((LINE) <= DMA2D_LINE)
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502 #define IS_DMA2D_PIXEL(PIXEL) ((PIXEL) <= DMA2D_PIXEL)
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503 #define IS_DMA2D_OFFSET(OOFFSET) ((OOFFSET) <= DMA2D_OFFSET)
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504 #define IS_DMA2D_INPUT_COLOR_MODE(INPUT_CM) (((INPUT_CM) == CM_ARGB8888) || ((INPUT_CM) == CM_RGB888) || \
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505 ((INPUT_CM) == CM_RGB565) || ((INPUT_CM) == CM_ARGB1555) || \
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506 ((INPUT_CM) == CM_ARGB4444) || ((INPUT_CM) == CM_L8) || \
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507 ((INPUT_CM) == CM_AL44) || ((INPUT_CM) == CM_AL88) || \
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508 ((INPUT_CM) == CM_L4) || ((INPUT_CM) == CM_A8) || \
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509 ((INPUT_CM) == CM_A4))
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510 #define IS_DMA2D_ALPHA_MODE(AlphaMode) (((AlphaMode) == DMA2D_NO_MODIF_ALPHA) || \
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511 ((AlphaMode) == DMA2D_REPLACE_ALPHA) || \
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512 ((AlphaMode) == DMA2D_COMBINE_ALPHA))
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513 #define IS_DMA2D_CLUT_CM(CLUT_CM) (((CLUT_CM) == DMA2D_CCM_ARGB8888) || ((CLUT_CM) == DMA2D_CCM_RGB888))
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514 #define IS_DMA2D_CLUT_SIZE(CLUT_SIZE) ((CLUT_SIZE) <= DMA2D_CLUT_SIZE)
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515 #define IS_DMA2D_LineWatermark(LineWatermark) ((LineWatermark) <= LINE_WATERMARK)
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516 /**
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517 * @}
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518 */
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519
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520 /* Private functions prototypes ---------------------------------------------------------*/
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521 /** @defgroup DMA2D_Private_Functions_Prototypes DMA2D Private Functions Prototypes
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522 * @{
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523 */
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524
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525 /**
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526 * @}
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527 */
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528
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529 /* Private functions ---------------------------------------------------------*/
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530 /** @defgroup DMA2D_Private_Functions DMA2D Private Functions
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531 * @{
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532 */
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533
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534 /**
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535 * @}
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536 */
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537
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538 /**
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539 * @}
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540 */
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541
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542 /**
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543 * @}
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544 */
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545
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546 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
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547
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548 #ifdef __cplusplus
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549 }
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550 #endif
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551
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552 #endif /* __STM32F4xx_HAL_DMA2D_H */
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553
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554 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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