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annotate Common/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sai_ex.c @ 806:ee3c0029ed34

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Update Firmware version number
author heinrichsweikamp
date Sat, 26 Aug 2023 13:35:15 +0200
parents c78bcbd5deda
children
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128
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1 /**
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2 ******************************************************************************
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3 * @file stm32f4xx_hal_sai_ex.c
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4 * @author MCD Application Team
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5 * @brief SAI Extension HAL module driver.
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6 * This file provides firmware functions to manage the following
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7 * functionalities of SAI extension peripheral:
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8 * + Extension features functions
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9 *
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10 @verbatim
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11 ==============================================================================
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12 ##### SAI peripheral extension features #####
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13 ==============================================================================
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14
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15 [..] Comparing to other previous devices, the SAI interface for STM32F446xx
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16 devices contains the following additional features :
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17
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18 (+) Possibility to be clocked from PLLR
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19
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20 ##### How to use this driver #####
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21 ==============================================================================
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22 [..] This driver provides functions to manage several sources to clock SAI
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23
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24 @endverbatim
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25 ******************************************************************************
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26 * @attention
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27 *
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28 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
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29 *
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30 * Redistribution and use in source and binary forms, with or without modification,
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31 * are permitted provided that the following conditions are met:
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32 * 1. Redistributions of source code must retain the above copyright notice,
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33 * this list of conditions and the following disclaimer.
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34 * 2. Redistributions in binary form must reproduce the above copyright notice,
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35 * this list of conditions and the following disclaimer in the documentation
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36 * and/or other materials provided with the distribution.
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37 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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38 * may be used to endorse or promote products derived from this software
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39 * without specific prior written permission.
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40 *
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41 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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42 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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43 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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44 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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45 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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46 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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47 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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48 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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49 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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50 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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51 *
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52 ******************************************************************************
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53 */
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54
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55 /* Includes ------------------------------------------------------------------*/
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56 #include "stm32f4xx_hal.h"
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57
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58 /** @addtogroup STM32F4xx_HAL_Driver
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59 * @{
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60 */
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61
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62 /** @defgroup SAIEx SAIEx
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63 * @brief SAI Extension HAL module driver
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64 * @{
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65 */
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66
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67 #ifdef HAL_SAI_MODULE_ENABLED
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68
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69 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
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70 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F413xx) || \
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71 defined(STM32F423xx)
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72
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73 /* Private typedef -----------------------------------------------------------*/
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74 /* Private define ------------------------------------------------------------*/
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75 /* SAI registers Masks */
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76 /* Private macro -------------------------------------------------------------*/
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77 /* Private variables ---------------------------------------------------------*/
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78 /* Private function prototypes -----------------------------------------------*/
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79 /* Private functions ---------------------------------------------------------*/
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80
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81 /** @defgroup SAI_Private_Functions SAI Private Functions
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82 * @{
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83 */
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84 /**
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85 * @}
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86 */
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87
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88 /* Exported functions --------------------------------------------------------*/
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89 /** @defgroup SAIEx_Exported_Functions SAI Extended Exported Functions
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90 * @{
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91 */
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92
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93 /** @defgroup SAIEx_Exported_Functions_Group1 Extension features functions
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94 * @brief Extension features functions
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95 *
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96 @verbatim
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97 ===============================================================================
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98 ##### Extension features Functions #####
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99 ===============================================================================
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100 [..]
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101 This subsection provides a set of functions allowing to manage the possible
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102 SAI clock sources.
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103
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104 @endverbatim
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105 * @{
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106 */
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107
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108 /**
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109 * @brief Configure SAI Block synchronization mode
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110 * @param hsai pointer to a SAI_HandleTypeDef structure that contains
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111 * the configuration information for SAI module.
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112 * @retval SAI Clock Input
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113 */
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114 void SAI_BlockSynchroConfig(SAI_HandleTypeDef *hsai)
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115 {
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116 uint32_t tmpregisterGCR = 0U;
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117
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118 #if defined(STM32F446xx)
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119 /* This setting must be done with both audio block (A & B) disabled */
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120 switch(hsai->Init.SynchroExt)
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121 {
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122 case SAI_SYNCEXT_DISABLE :
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123 tmpregisterGCR = 0U;
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124 break;
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125 case SAI_SYNCEXT_OUTBLOCKA_ENABLE :
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126 tmpregisterGCR = SAI_GCR_SYNCOUT_0;
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127 break;
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128 case SAI_SYNCEXT_OUTBLOCKB_ENABLE :
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129 tmpregisterGCR = SAI_GCR_SYNCOUT_1;
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130 break;
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131 default:
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132 break;
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133 }
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134
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135 if((hsai->Init.Synchro) == SAI_SYNCHRONOUS_EXT_SAI2)
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136 {
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137 tmpregisterGCR |= SAI_GCR_SYNCIN_0;
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138 }
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139
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140 if((hsai->Instance == SAI1_Block_A) || (hsai->Instance == SAI1_Block_B))
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141 {
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142 SAI1->GCR = tmpregisterGCR;
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143 }
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144 else
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145 {
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146 SAI2->GCR = tmpregisterGCR;
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147 }
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148 #endif /* STM32F446xx */
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149 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
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150 defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F413xx) || defined(STM32F423xx)
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151 /* This setting must be done with both audio block (A & B) disabled */
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152 switch(hsai->Init.SynchroExt)
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153 {
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154 case SAI_SYNCEXT_DISABLE :
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155 tmpregisterGCR = 0U;
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156 break;
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157 case SAI_SYNCEXT_OUTBLOCKA_ENABLE :
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158 tmpregisterGCR = SAI_GCR_SYNCOUT_0;
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159 break;
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160 case SAI_SYNCEXT_OUTBLOCKB_ENABLE :
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161 tmpregisterGCR = SAI_GCR_SYNCOUT_1;
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162 break;
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163 default:
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164 break;
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165 }
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166 SAI1->GCR = tmpregisterGCR;
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167 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx || STM32F413xx || STM32F423xx */
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168 }
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169 /**
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170 * @brief Get SAI Input Clock based on SAI source clock selection
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171 * @param hsai pointer to a SAI_HandleTypeDef structure that contains
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172 * the configuration information for SAI module.
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173 * @retval SAI Clock Input
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174 */
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175 uint32_t SAI_GetInputClock(SAI_HandleTypeDef *hsai)
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176 {
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177 /* This variable used to store the SAI_CK_x (value in Hz) */
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178 uint32_t saiclocksource = 0U;
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179
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180 #if defined(STM32F446xx)
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181 if ((hsai->Instance == SAI1_Block_A) || (hsai->Instance == SAI1_Block_B))
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182 {
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183 saiclocksource = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SAI1);
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184 }
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185 else /* SAI2_Block_A || SAI2_Block_B*/
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186 {
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187 saiclocksource = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SAI2);
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188 }
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189 #endif /* STM32F446xx */
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190 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
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191 defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F413xx) || defined(STM32F423xx)
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192 uint32_t vcoinput = 0U, tmpreg = 0U;
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193
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194 /* Check the SAI Block parameters */
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195 assert_param(IS_SAI_CLK_SOURCE(hsai->Init.ClockSource));
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196
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197 /* SAI Block clock source selection */
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198 if(hsai->Instance == SAI1_Block_A)
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199 {
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200 __HAL_RCC_SAI_BLOCKACLKSOURCE_CONFIG(hsai->Init.ClockSource);
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201 }
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202 else
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203 {
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204 __HAL_RCC_SAI_BLOCKBCLKSOURCE_CONFIG((uint32_t)(hsai->Init.ClockSource << 2U));
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205 }
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206
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207 /* VCO Input Clock value calculation */
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208 if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSI)
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209 {
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210 /* In Case the PLL Source is HSI (Internal Clock) */
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211 vcoinput = (HSI_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM));
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212 }
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213 else
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214 {
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215 /* In Case the PLL Source is HSE (External Clock) */
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216 vcoinput = ((HSE_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM)));
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217 }
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218 #if defined(STM32F413xx) || defined(STM32F423xx)
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219 /* SAI_CLK_x : SAI Block Clock configuration for different clock sources selected */
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220 if(hsai->Init.ClockSource == SAI_CLKSOURCE_PLLR)
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221 {
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222 /* Configure the PLLI2S division factor */
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223 /* PLL_VCO Input = PLL_SOURCE/PLLM */
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224 /* PLL_VCO Output = PLL_VCO Input * PLLN */
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225 /* SAI_CLK(first level) = PLL_VCO Output/PLLR */
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226 tmpreg = (RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 28U;
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227 saiclocksource = (vcoinput * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6U))/(tmpreg);
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228
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229 /* SAI_CLK_x = SAI_CLK(first level)/PLLDIVR */
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230 tmpreg = (((RCC->DCKCFGR & RCC_DCKCFGR_PLLDIVR) >> 8U) + 1U);
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231
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232 saiclocksource = saiclocksource/(tmpreg);
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233
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234 }
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235 else if(hsai->Init.ClockSource == SAI_CLKSOURCE_PLLI2S)
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236 {
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237 /* Configure the PLLI2S division factor */
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238 /* PLLI2S_VCO Input = PLL_SOURCE/PLLM */
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239 /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
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240 /* SAI_CLK(first level) = PLLI2S_VCO Output/PLLI2SR */
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241 tmpreg = (RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> 28U;
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242 saiclocksource = (vcoinput * ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> 6U))/(tmpreg);
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243
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244 /* SAI_CLK_x = SAI_CLK(first level)/PLLI2SDIVR */
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245 tmpreg = ((RCC->DCKCFGR & RCC_DCKCFGR_PLLI2SDIVR) + 1U);
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246 saiclocksource = saiclocksource/(tmpreg);
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247 }
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248 else if(hsai->Init.ClockSource == SAI_CLKSOURCE_HS)
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249 {
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250 if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
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251 {
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252 /* Get the I2S source clock value */
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253 saiclocksource = (uint32_t)(HSE_VALUE);
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254 }
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255 else
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256 {
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257 /* Get the I2S source clock value */
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258 saiclocksource = (uint32_t)(HSI_VALUE);
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259 }
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260 }
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261 else /* sConfig->ClockSource == SAI_CLKSource_Ext */
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262 {
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263 saiclocksource = EXTERNAL_CLOCK_VALUE;
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264 }
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265 #else
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266 /* SAI_CLK_x : SAI Block Clock configuration for different clock sources selected */
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267 if(hsai->Init.ClockSource == SAI_CLKSOURCE_PLLSAI)
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268 {
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269 /* Configure the PLLI2S division factor */
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270 /* PLLSAI_VCO Input = PLL_SOURCE/PLLM */
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271 /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */
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272 /* SAI_CLK(first level) = PLLSAI_VCO Output/PLLSAIQ */
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273 tmpreg = (RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> 24U;
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274 saiclocksource = (vcoinput * ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIN) >> 6U))/(tmpreg);
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275
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276 /* SAI_CLK_x = SAI_CLK(first level)/PLLSAIDIVQ */
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277 tmpreg = (((RCC->DCKCFGR & RCC_DCKCFGR_PLLSAIDIVQ) >> 8U) + 1U);
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278 saiclocksource = saiclocksource/(tmpreg);
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279
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280 }
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281 else if(hsai->Init.ClockSource == SAI_CLKSOURCE_PLLI2S)
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282 {
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283 /* Configure the PLLI2S division factor */
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284 /* PLLI2S_VCO Input = PLL_SOURCE/PLLM */
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285 /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
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286 /* SAI_CLK(first level) = PLLI2S_VCO Output/PLLI2SQ */
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287 tmpreg = (RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> 24U;
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288 saiclocksource = (vcoinput * ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> 6U))/(tmpreg);
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289
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290 /* SAI_CLK_x = SAI_CLK(first level)/PLLI2SDIVQ */
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291 tmpreg = ((RCC->DCKCFGR & RCC_DCKCFGR_PLLI2SDIVQ) + 1U);
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292 saiclocksource = saiclocksource/(tmpreg);
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293 }
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294 else /* sConfig->ClockSource == SAI_CLKSource_Ext */
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295 {
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296 /* Enable the External Clock selection */
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297 __HAL_RCC_I2S_CONFIG(RCC_I2SCLKSOURCE_EXT);
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298
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299 saiclocksource = EXTERNAL_CLOCK_VALUE;
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300 }
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301 #endif /* STM32F413xx || STM32F423xx */
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302 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx || STM32F413xx || STM32F423xx */
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303 /* the return result is the value of SAI clock */
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304 return saiclocksource;
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305 }
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306
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307 /**
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308 * @}
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309 */
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310
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311 /**
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312 * @}
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313 */
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314
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315 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx || STM32F413xx || STM32F423xx */
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316 #endif /* HAL_SAI_MODULE_ENABLED */
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317 /**
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318 * @}
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319 */
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320
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321 /**
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322 * @}
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323 */
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324
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325 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/