Mercurial > public > ostc4
annotate Small_CPU/Src/uart.c @ 921:eb4109d7d1e9 Evo_2_23
Improved mix mode ADC conversion:
Activity of UART sensors may have an impact to ADC measurement. To avoid the ADC trigger was moved into a time window ~300ms after last UART command request => After UART sensor performed measurement but before next measurement is requested. In addition the general ADC measurement cycle has been changed to one second to avoid jitter in the value updates on the display.
author | Ideenmodellierer |
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date | Sun, 03 Nov 2024 18:19:51 +0100 |
parents | f72613a152dd |
children | 7c996354b8ac |
rev | line source |
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38 | 1 /** |
2 ****************************************************************************** | |
3 * @file uart.c | |
4 * @author heinrichs weikamp gmbh | |
5 * @version V0.0.1 | |
6 * @date 27-March-2014 | |
7 * @brief button control | |
8 * | |
9 @verbatim | |
10 ============================================================================== | |
11 ##### How to use ##### | |
12 ============================================================================== | |
13 @endverbatim | |
14 ****************************************************************************** | |
15 * @attention | |
16 * | |
17 * <h2><center>© COPYRIGHT(c) 2015 heinrichs weikamp</center></h2> | |
18 * | |
19 ****************************************************************************** | |
20 */ | |
21 /* Includes ------------------------------------------------------------------*/ | |
22 #include "uart.h" | |
794 | 23 #include "uartProtocol_O2.h" |
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24 #include "uartProtocol_Co2.h" |
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25 #include "uartProtocol_Sentinel.h" |
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26 #include "uartProtocol_GNSS.h" |
662 | 27 #include "externalInterface.h" |
28 #include "data_exchange.h" | |
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29 #include <string.h> /* memset */ |
38 | 30 |
889 | 31 |
38 | 32 /* Private variables ---------------------------------------------------------*/ |
33 | |
794 | 34 |
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35 #define TX_BUF_SIZE (40u) /* max length for commands */ |
781 | 36 #define CHUNK_SIZE (25u) /* the DMA will handle chunk size transfers */ |
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37 #define CHUNKS_PER_BUFFER (6u) |
794 | 38 |
889 | 39 |
662 | 40 |
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41 DMA_HandleTypeDef hdma_usart1_rx, hdma_usart1_tx, hdma_usart6_rx, hdma_usart6_tx; |
38 | 42 |
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43 uint8_t rxBuffer[CHUNK_SIZE * CHUNKS_PER_BUFFER]; /* The complete buffer has a X * chunk size to allow variations in buffer read time */ |
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44 uint8_t txBuffer[CHUNK_SIZE]; /* tx uses less bytes */ |
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45 uint8_t txBufferQue[TX_BUF_SIZE]; /* In MUX mode command may be send shortly after each other => allow q 1 entry que */ |
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46 uint8_t txBufferQueLen; |
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47 |
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48 uint8_t rxBufferUart6[CHUNK_SIZE * CHUNKS_PER_BUFFER]; /* The complete buffer has a X * chunk size to allow variations in buffer read time */ |
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49 uint8_t txBufferUart6[CHUNK_SIZE * CHUNKS_PER_BUFFER]; /* The complete buffer has a X * chunk size to allow variations in buffer read time */ |
889 | 50 |
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51 static uint8_t rxWriteIndex; /* Index of the data item which is analysed */ |
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52 static uint8_t rxReadIndex; /* Index at which new data is stared */ |
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53 static uint8_t lastCmdIndex; /* Index of last command which has not been completely received */ |
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54 static uint8_t dmaRxActive; /* Indicator if DMA reception needs to be started */ |
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55 static uint8_t dmaTxActive; /* Indicator if DMA reception needs to be started */ |
794 | 56 |
921 | 57 static uint32_t LastCmdRequestTick = 0; /* Used by ADC handler to avoid interferance with UART communication */ |
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58 |
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59 static uint8_t isEndIndication(uint8_t index); |
889 | 60 |
38 | 61 /* Exported functions --------------------------------------------------------*/ |
62 | |
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63 void UART_clearRxBuffer(void) |
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64 { |
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65 uint16_t index = 0; |
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66 do |
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67 { |
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68 rxBuffer[index++] = BUFFER_NODATA_LOW; |
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69 rxBuffer[index++] = BUFFER_NODATA_HIGH; |
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70 } while (index < sizeof(rxBuffer)); |
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71 |
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72 rxReadIndex = 0; |
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73 rxWriteIndex = 0; |
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74 } |
794 | 75 |
662 | 76 void MX_USART1_UART_Init(void) |
38 | 77 { |
662 | 78 /* regular init */ |
79 huart1.Instance = USART1; | |
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80 huart1.Init.BaudRate = 19200; |
662 | 81 huart1.Init.WordLength = UART_WORDLENGTH_8B; |
82 huart1.Init.StopBits = UART_STOPBITS_1; | |
83 huart1.Init.Parity = UART_PARITY_NONE; | |
84 huart1.Init.Mode = UART_MODE_TX_RX; | |
85 huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; | |
86 huart1.Init.OverSampling = UART_OVERSAMPLING_16; | |
87 | |
88 HAL_UART_Init(&huart1); | |
89 | |
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90 MX_USART1_DMA_Init(); |
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91 |
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92 UART_clearRxBuffer(); |
662 | 93 rxReadIndex = 0; |
94 lastCmdIndex = 0; | |
95 rxWriteIndex = 0; | |
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96 dmaRxActive = 0; |
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97 dmaTxActive = 0; |
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98 txBufferQueLen = 0; |
662 | 99 } |
38 | 100 |
889 | 101 |
102 | |
662 | 103 void MX_USART1_UART_DeInit(void) |
104 { | |
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105 HAL_DMA_Abort(&hdma_usart1_rx); |
662 | 106 HAL_DMA_DeInit(&hdma_usart1_rx); |
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107 HAL_DMA_Abort(&hdma_usart1_tx); |
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108 HAL_DMA_DeInit(&hdma_usart1_tx); |
662 | 109 HAL_UART_DeInit(&huart1); |
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110 dmaRxActive = 0; |
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111 dmaTxActive = 0; |
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112 txBufferQueLen = 0; |
662 | 113 } |
114 | |
115 void MX_USART1_DMA_Init() | |
116 { | |
117 /* DMA controller clock enable */ | |
118 __DMA2_CLK_ENABLE(); | |
119 | |
120 /* Peripheral DMA init*/ | |
121 hdma_usart1_rx.Instance = DMA2_Stream5; | |
122 hdma_usart1_rx.Init.Channel = DMA_CHANNEL_4; | |
123 hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; //DMA_MEMORY_TO_PERIPH; | |
124 hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE; | |
125 hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; | |
126 hdma_usart1_rx.Init.PeriphDataAlignment = DMA_MDATAALIGN_BYTE; | |
127 hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; | |
128 hdma_usart1_rx.Init.Mode = DMA_NORMAL; | |
129 hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; | |
130 hdma_usart1_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; | |
131 HAL_DMA_Init(&hdma_usart1_rx); | |
132 | |
133 __HAL_LINKDMA(&huart1,hdmarx,hdma_usart1_rx); | |
134 | |
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135 hdma_usart1_tx.Instance = DMA2_Stream7; |
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136 hdma_usart1_tx.Init.Channel = DMA_CHANNEL_4; |
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137 hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; |
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138 hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; |
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139 hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; |
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140 hdma_usart1_tx.Init.PeriphDataAlignment = DMA_MDATAALIGN_BYTE; |
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141 hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; |
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142 hdma_usart1_tx.Init.Mode = DMA_NORMAL; |
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143 hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW; |
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144 hdma_usart1_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; |
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145 HAL_DMA_Init(&hdma_usart1_tx); |
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146 |
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147 __HAL_LINKDMA(&huart1,hdmatx,hdma_usart1_tx); |
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148 |
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149 |
662 | 150 /* DMA interrupt init */ |
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151 HAL_NVIC_SetPriority(DMA2_Stream5_IRQn, 2, 2); |
662 | 152 HAL_NVIC_EnableIRQ(DMA2_Stream5_IRQn); |
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153 HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 2, 1); |
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154 HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); |
38 | 155 } |
156 | |
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157 |
889 | 158 void GNSS_IO_init() { |
159 | |
160 GPIO_InitTypeDef GPIO_InitStruct = { 0 }; | |
161 /* Peripheral clock enable */ | |
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162 __HAL_RCC_USART6_CLK_ENABLE() |
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163 ; |
889 | 164 |
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165 __HAL_RCC_GPIOA_CLK_ENABLE() |
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166 ; |
889 | 167 /**USART6 GPIO Configuration |
168 PA11 ------> USART6_TX | |
169 PA12 ------> USART6_RX | |
170 */ | |
171 GPIO_InitStruct.Pin = GPIO_PIN_11 | GPIO_PIN_12; | |
172 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; | |
173 GPIO_InitStruct.Pull = GPIO_NOPULL; | |
894 | 174 GPIO_InitStruct.Speed = GPIO_SPEED_FAST; |
889 | 175 GPIO_InitStruct.Alternate = GPIO_AF8_USART6; |
176 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); | |
177 | |
178 /* USART6 DMA Init */ | |
179 /* USART6_RX Init */ | |
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180 hdma_usart6_rx.Instance = DMA2_Stream1; |
889 | 181 hdma_usart6_rx.Init.Channel = DMA_CHANNEL_5; |
182 hdma_usart6_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; | |
183 hdma_usart6_rx.Init.PeriphInc = DMA_PINC_DISABLE; | |
184 hdma_usart6_rx.Init.MemInc = DMA_MINC_ENABLE; | |
894 | 185 hdma_usart6_rx.Init.PeriphDataAlignment = DMA_MDATAALIGN_BYTE; |
889 | 186 hdma_usart6_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; |
187 hdma_usart6_rx.Init.Mode = DMA_NORMAL; | |
188 hdma_usart6_rx.Init.Priority = DMA_PRIORITY_LOW; | |
189 hdma_usart6_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; | |
190 HAL_DMA_Init(&hdma_usart6_rx); | |
191 | |
192 __HAL_LINKDMA(&huart6, hdmarx, hdma_usart6_rx); | |
193 | |
194 /* USART6_TX Init */ | |
195 hdma_usart6_tx.Instance = DMA2_Stream6; | |
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196 hdma_usart6_tx.Init.Channel = DMA_CHANNEL_6; |
889 | 197 hdma_usart6_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; |
198 hdma_usart6_tx.Init.PeriphInc = DMA_PINC_DISABLE; | |
199 hdma_usart6_tx.Init.MemInc = DMA_MINC_ENABLE; | |
894 | 200 hdma_usart6_tx.Init.PeriphDataAlignment = DMA_MDATAALIGN_BYTE; |
889 | 201 hdma_usart6_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; |
202 hdma_usart6_tx.Init.Mode = DMA_NORMAL; | |
203 hdma_usart6_tx.Init.Priority = DMA_PRIORITY_LOW; | |
204 hdma_usart6_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; | |
205 HAL_DMA_Init(&hdma_usart6_tx); | |
206 | |
207 __HAL_LINKDMA(&huart6, hdmatx, hdma_usart6_tx); | |
208 | |
209 /* USART6 interrupt Init */ | |
210 HAL_NVIC_SetPriority(USART6_IRQn, 0, 0); | |
211 HAL_NVIC_EnableIRQ(USART6_IRQn); | |
212 | |
213 MX_USART6_DMA_Init(); | |
214 | |
215 } | |
216 | |
217 void MX_USART6_DMA_Init() { | |
218 /* DMA controller clock enable */ | |
219 __HAL_RCC_DMA2_CLK_ENABLE(); | |
220 | |
221 /* DMA interrupt init */ | |
222 /* DMA2_Stream2_IRQn interrupt configuration */ | |
223 HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, 0, 0); | |
224 HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn); | |
225 /* DMA2_Stream6_IRQn interrupt configuration */ | |
226 HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 0, 0); | |
227 HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn); | |
228 } | |
229 | |
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230 |
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231 void MX_USART6_UART_DeInit(void) |
889 | 232 { |
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233 HAL_DMA_Abort(&hdma_usart6_rx); |
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234 HAL_DMA_DeInit(&hdma_usart6_rx); |
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235 HAL_DMA_Abort(&hdma_usart6_tx); |
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236 HAL_DMA_DeInit(&hdma_usart6_tx); |
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237 HAL_UART_DeInit(&huart6); |
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238 HAL_UART_DeInit(&huart6); |
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239 } |
889 | 240 |
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241 void MX_USART6_UART_Init(void) { |
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242 huart6.Instance = USART6; |
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243 huart6.Init.BaudRate = 9600; |
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244 huart6.Init.WordLength = UART_WORDLENGTH_8B; |
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245 huart6.Init.StopBits = UART_STOPBITS_1; |
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246 huart6.Init.Parity = UART_PARITY_NONE; |
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247 huart6.Init.Mode = UART_MODE_TX_RX; |
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248 huart6.Init.HwFlowCtl = UART_HWCONTROL_NONE; |
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249 huart6.Init.OverSampling = UART_OVERSAMPLING_16; |
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250 HAL_UART_Init(&huart6); |
889 | 251 } |
252 | |
794 | 253 void UART_MUX_SelectAddress(uint8_t muxAddress) |
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254 { |
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255 uint8_t indexstr[4]; |
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256 |
794 | 257 if(muxAddress <= MAX_MUX_CHANNEL) |
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258 { |
794 | 259 indexstr[0] = '~'; |
260 indexstr[1] = muxAddress; | |
261 indexstr[2] = 0x0D; | |
262 indexstr[3] = 0x0A; | |
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263 if(!dmaTxActive) |
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264 { |
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265 memcpy(txBuffer, indexstr, 4); |
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266 dmaTxActive = 0; |
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267 if(HAL_OK == HAL_UART_Transmit_DMA(&huart1,txBuffer,4)) |
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268 { |
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269 dmaTxActive = 1; |
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270 while(dmaTxActive) |
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271 { |
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272 HAL_Delay(1); |
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273 } |
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274 } |
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275 } |
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276 else |
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277 { |
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278 memcpy(txBufferQue, indexstr, 4); |
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279 txBufferQueLen = 4; |
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280 } |
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281 } |
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282 } |
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283 |
794 | 284 |
285 void UART_SendCmdString(uint8_t *cmdString) | |
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286 { |
794 | 287 uint8_t cmdLength = strlen((char*)cmdString); |
288 | |
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289 if(dmaTxActive == 0) |
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290 { |
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291 if(cmdLength < TX_BUF_SIZE) /* A longer string is an indication for a missing 0 termination */ |
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292 { |
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293 if(dmaRxActive == 0) |
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294 { |
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295 UART_StartDMA_Receiption(); |
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296 } |
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297 memcpy(txBuffer, cmdString, cmdLength); |
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298 if(HAL_OK == HAL_UART_Transmit_DMA(&huart1,txBuffer,cmdLength)) |
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299 { |
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300 dmaTxActive = 1; |
921 | 301 LastCmdRequestTick = HAL_GetTick(); |
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302 } |
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303 } |
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304 } |
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305 else |
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306 { |
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307 memcpy(txBufferQue, cmdString, cmdLength); |
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308 txBufferQueLen = cmdLength; |
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309 } |
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310 } |
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311 |
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312 void UART_SendCmdUbx(uint8_t *cmd, uint8_t len) |
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313 { |
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314 if(len < TX_BUF_SIZE) /* A longer string is an indication for a missing 0 termination */ |
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315 { |
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316 if(dmaRxActive == 0) |
794 | 317 { |
318 UART_StartDMA_Receiption(); | |
319 } | |
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320 memcpy(txBuffer, cmd, len); |
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321 if(HAL_OK == HAL_UART_Transmit_DMA(&huart1,txBuffer,len)) |
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322 { |
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323 dmaTxActive = 1; |
921 | 324 LastCmdRequestTick = HAL_GetTick(); |
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325 } |
794 | 326 } |
327 } | |
328 | |
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329 |
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330 void StringToInt(char *pstr, uint32_t *puInt32) |
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331 { |
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332 uint8_t index = 0; |
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333 uint32_t result = 0; |
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334 while((pstr[index] >= '0') && (pstr[index] <= '9')) |
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335 { |
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336 result *=10; |
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337 result += pstr[index] - '0'; |
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338 index++; |
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339 } |
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340 *puInt32 = result; |
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341 } |
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342 |
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343 void StringToUInt64(char *pstr, uint64_t *puint64) |
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344 { |
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345 uint8_t index = 0; |
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346 uint64_t result = 0; |
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347 while((pstr[index] >= '0') && (pstr[index] <= '9')) |
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348 { |
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349 result *=10; |
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350 result += pstr[index] - '0'; |
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351 index++; |
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352 } |
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353 *puint64 = result; |
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354 } |
662 | 355 |
742 | 356 void UART_StartDMA_Receiption() |
357 { | |
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358 if(dmaRxActive == 0) |
742 | 359 { |
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360 if(((rxWriteIndex / CHUNK_SIZE) != (rxReadIndex / CHUNK_SIZE)) || ((isEndIndication(rxWriteIndex)) && (isEndIndication(rxWriteIndex + 1)))) /* start next transfer if we did not catch up with read index */ |
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361 { |
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362 if(HAL_OK == HAL_UART_Receive_DMA (&huart1, &rxBuffer[rxWriteIndex], CHUNK_SIZE)) |
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363 { |
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364 dmaRxActive = 1; |
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365 } |
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366 } |
742 | 367 } |
368 } | |
690 | 369 |
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370 void UART_ChangeBaudrate(uint32_t newBaudrate) |
38 | 371 { |
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372 MX_USART1_UART_DeInit(); |
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373 huart1.Init.BaudRate = newBaudrate; |
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374 HAL_UART_Init(&huart1); |
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375 MX_USART1_DMA_Init(); |
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376 HAL_NVIC_SetPriority(USART1_IRQn, 1, 3); |
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377 HAL_NVIC_EnableIRQ(USART1_IRQn); |
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378 |
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379 UART_clearRxBuffer(); |
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380 rxReadIndex = 0; |
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381 rxWriteIndex = 0; |
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382 dmaRxActive = 0; |
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383 txBufferQueLen = 0; |
38 | 384 } |
690 | 385 |
662 | 386 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) |
38 | 387 { |
662 | 388 if(huart == &huart1) |
389 { | |
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390 dmaRxActive = 0; |
662 | 391 rxWriteIndex+=CHUNK_SIZE; |
392 if(rxWriteIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) | |
393 { | |
394 rxWriteIndex = 0; | |
395 } | |
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396 UART_StartDMA_Receiption(); |
662 | 397 } |
38 | 398 } |
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399 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) |
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400 { |
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401 if(huart == &huart1) |
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402 { |
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403 dmaTxActive = 0; |
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404 UART_WriteData(); |
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405 if(txBufferQueLen) |
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406 { |
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407 memcpy(txBuffer, txBufferQue, txBufferQueLen); |
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408 HAL_UART_Transmit_DMA(&huart1,txBuffer,txBufferQueLen); |
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409 dmaTxActive = 1; |
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410 txBufferQueLen = 0; |
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411 } |
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412 } |
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413 } |
38 | 414 |
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415 uint8_t isEndIndication(uint8_t index) |
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416 { |
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417 uint8_t ret = 0; |
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418 if(index % 2) |
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419 { |
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420 if(rxBuffer[index] == BUFFER_NODATA_HIGH) |
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421 { |
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422 ret = 1; |
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423 } |
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424 } |
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425 else |
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426 { |
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427 if(rxBuffer[index] == BUFFER_NODATA_LOW) |
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428 { |
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429 ret = 1; |
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430 } |
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431 } |
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432 |
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433 return ret; |
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434 } |
794 | 435 void UART_ReadData(uint8_t sensorType) |
436 { | |
437 uint8_t localRX = rxReadIndex; | |
916
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438 uint8_t futureIndex = rxReadIndex + 1; |
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439 uint8_t moreData = 0; |
38 | 440 |
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441 if(futureIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) |
794 | 442 { |
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443 futureIndex = 0; |
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444 } |
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445 |
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446 if((!isEndIndication(localRX)) || (!isEndIndication(futureIndex))) do |
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447 { |
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448 while((!isEndIndication(localRX)) || (moreData)) |
794 | 449 { |
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450 moreData = 0; |
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451 switch (sensorType) |
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452 { |
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453 case SENSOR_MUX: |
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454 case SENSOR_DIGO2: uartO2_ProcessData(rxBuffer[localRX]); |
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455 break; |
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456 #ifdef ENABLE_CO2_SUPPORT |
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457 case SENSOR_CO2: uartCo2_ProcessData(rxBuffer[localRX]); |
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458 break; |
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459 #endif |
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460 #ifdef ENABLE_GNSS_SUPPORT |
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461 case SENSOR_GNSS: uartGnss_ProcessData(rxBuffer[localRX]); |
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462 break; |
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463 #endif |
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464 #ifdef ENABLE_SENTINEL_MODE |
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465 case SENSOR_SENTINEL: uartSentinel_ProcessData(rxBuffer[localRX]); |
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466 break; |
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467 #endif |
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468 default: |
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469 break; |
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470 } |
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471 if(localRX % 2) |
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472 { |
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473 rxBuffer[localRX] = BUFFER_NODATA_HIGH; |
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474 } |
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475 else |
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476 { |
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477 rxBuffer[localRX] = BUFFER_NODATA_LOW; |
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478 } |
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479 |
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480 localRX++; |
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481 rxReadIndex++; |
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482 if(rxReadIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) |
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483 { |
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484 localRX = 0; |
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485 rxReadIndex = 0; |
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486 } |
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487 futureIndex++; |
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488 if(futureIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) |
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489 { |
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490 futureIndex = 0; |
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491 } |
794 | 492 } |
916
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493 if(!isEndIndication(futureIndex)) |
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494 { |
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495 moreData = 1; |
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496 } |
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497 } while(moreData); |
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498 } |
794 | 499 |
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500 void UART_WriteData(void) |
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501 { |
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502 if(huart1.hdmatx->State == HAL_DMA_STATE_READY) |
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503 { |
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504 huart1.gState = HAL_UART_STATE_READY; |
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505 dmaTxActive = 0; |
794 | 506 } |
918
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507 if(huart1.hdmarx->State == HAL_DMA_STATE_READY) |
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508 { |
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Switch external interface tx communication to DMA:
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509 huart1.RxState = HAL_UART_STATE_READY; |
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Switch external interface tx communication to DMA:
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510 dmaRxActive = 0; |
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511 } |
794 | 512 } |
513 | |
514 void UART_FlushRxBuffer(void) | |
515 { | |
916
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516 uint8_t futureIndex = rxReadIndex + 1; |
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517 |
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518 if(futureIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) |
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519 { |
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520 futureIndex = 0; |
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521 } |
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522 while((rxBuffer[rxReadIndex] != BUFFER_NODATA_LOW) && (rxBuffer[futureIndex] != BUFFER_NODATA_HIGH)) |
794 | 523 { |
916
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524 if(rxReadIndex % 2) |
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525 { |
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526 rxBuffer[rxReadIndex++] = BUFFER_NODATA_HIGH; |
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527 } |
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528 else |
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|
529 { |
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530 rxBuffer[rxReadIndex++] = BUFFER_NODATA_LOW; |
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531 } |
794 | 532 if(rxReadIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) |
533 { | |
534 rxReadIndex = 0; | |
535 } | |
916
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536 futureIndex++; |
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537 if(futureIndex >= CHUNK_SIZE * CHUNKS_PER_BUFFER) |
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|
538 { |
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539 futureIndex = 0; |
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540 } |
794 | 541 } |
542 } | |
662 | 543 |
861 | 544 uint8_t UART_isComActive(uint8_t sensorId) |
545 { | |
546 uint8_t active = 1; | |
809 | 547 |
861 | 548 uint8_t ComState = externalInterface_GetSensorState(sensorId + EXT_INTERFACE_MUX_OFFSET); |
549 | |
921 | 550 if(time_elapsed_ms(LastCmdRequestTick, HAL_GetTick()) > 300) /* UART activity should be inactive 300ms after last command */ |
861 | 551 { |
552 active = 0; | |
553 } | |
554 return active; | |
555 } | |
809 | 556 |
921 | 557 |
38 | 558 /************************ (C) COPYRIGHT heinrichs weikamp *****END OF FILE****/ |