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annotate Common/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_i2c.c @ 921:eb4109d7d1e9 Evo_2_23

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Improved mix mode ADC conversion: Activity of UART sensors may have an impact to ADC measurement. To avoid the ADC trigger was moved into a time window ~300ms after last UART command request => After UART sensor performed measurement but before next measurement is requested. In addition the general ADC measurement cycle has been changed to one second to avoid jitter in the value updates on the display.
author Ideenmodellierer
date Sun, 03 Nov 2024 18:19:51 +0100
parents c78bcbd5deda
children
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1 /**
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2 ******************************************************************************
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3 * @file stm32f4xx_ll_i2c.c
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4 * @author MCD Application Team
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5 * @brief I2C LL module driver.
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6 ******************************************************************************
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7 * @attention
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8 *
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9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
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10 *
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11 * Redistribution and use in source and binary forms, with or without modification,
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12 * are permitted provided that the following conditions are met:
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13 * 1. Redistributions of source code must retain the above copyright notice,
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14 * this list of conditions and the following disclaimer.
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15 * 2. Redistributions in binary form must reproduce the above copyright notice,
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16 * this list of conditions and the following disclaimer in the documentation
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17 * and/or other materials provided with the distribution.
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18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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19 * may be used to endorse or promote products derived from this software
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20 * without specific prior written permission.
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21 *
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22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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32 *
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33 ******************************************************************************
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34 */
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35 #if defined(USE_FULL_LL_DRIVER)
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36
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37 /* Includes ------------------------------------------------------------------*/
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38 #include "stm32f4xx_ll_i2c.h"
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39 #include "stm32f4xx_ll_bus.h"
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40 #include "stm32f4xx_ll_rcc.h"
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41 #ifdef USE_FULL_ASSERT
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42 #include "stm32_assert.h"
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43 #else
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44 #define assert_param(expr) ((void)0U)
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45 #endif
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46
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47 /** @addtogroup STM32F4xx_LL_Driver
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48 * @{
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49 */
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50
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51 #if defined (I2C1) || defined (I2C2) || defined (I2C3)
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52
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53 /** @defgroup I2C_LL I2C
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54 * @{
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55 */
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56
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57 /* Private types -------------------------------------------------------------*/
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58 /* Private variables ---------------------------------------------------------*/
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59 /* Private constants ---------------------------------------------------------*/
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60 /* Private macros ------------------------------------------------------------*/
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61 /** @addtogroup I2C_LL_Private_Macros
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62 * @{
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63 */
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64
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65 #define IS_LL_I2C_PERIPHERAL_MODE(__VALUE__) (((__VALUE__) == LL_I2C_MODE_I2C) || \
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66 ((__VALUE__) == LL_I2C_MODE_SMBUS_HOST) || \
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67 ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE) || \
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68 ((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE_ARP))
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69
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70 #define IS_LL_I2C_CLOCK_SPEED(__VALUE__) (((__VALUE__) > 0U) && ((__VALUE__) <= LL_I2C_MAX_SPEED_FAST))
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71
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72 #define IS_LL_I2C_DUTY_CYCLE(__VALUE__) (((__VALUE__) == LL_I2C_DUTYCYCLE_2) || \
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73 ((__VALUE__) == LL_I2C_DUTYCYCLE_16_9))
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74
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75 #if defined(I2C_FLTR_ANOFF)&&defined(I2C_FLTR_DNF)
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76 #define IS_LL_I2C_ANALOG_FILTER(__VALUE__) (((__VALUE__) == LL_I2C_ANALOGFILTER_ENABLE) || \
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77 ((__VALUE__) == LL_I2C_ANALOGFILTER_DISABLE))
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78
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79 #define IS_LL_I2C_DIGITAL_FILTER(__VALUE__) ((__VALUE__) <= 0x0000000FU)
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80
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81 #endif
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82 #define IS_LL_I2C_OWN_ADDRESS1(__VALUE__) ((__VALUE__) <= 0x000003FFU)
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83
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84 #define IS_LL_I2C_TYPE_ACKNOWLEDGE(__VALUE__) (((__VALUE__) == LL_I2C_ACK) || \
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85 ((__VALUE__) == LL_I2C_NACK))
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86
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87 #define IS_LL_I2C_OWN_ADDRSIZE(__VALUE__) (((__VALUE__) == LL_I2C_OWNADDRESS1_7BIT) || \
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88 ((__VALUE__) == LL_I2C_OWNADDRESS1_10BIT))
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89 /**
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90 * @}
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91 */
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92
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93 /* Private function prototypes -----------------------------------------------*/
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94
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95 /* Exported functions --------------------------------------------------------*/
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96 /** @addtogroup I2C_LL_Exported_Functions
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97 * @{
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98 */
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99
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100 /** @addtogroup I2C_LL_EF_Init
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101 * @{
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102 */
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103
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104 /**
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105 * @brief De-initialize the I2C registers to their default reset values.
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106 * @param I2Cx I2C Instance.
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107 * @retval An ErrorStatus enumeration value:
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108 * - SUCCESS: I2C registers are de-initialized
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109 * - ERROR: I2C registers are not de-initialized
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110 */
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111 uint32_t LL_I2C_DeInit(I2C_TypeDef *I2Cx)
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112 {
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113 ErrorStatus status = SUCCESS;
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114
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115 /* Check the I2C Instance I2Cx */
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116 assert_param(IS_I2C_ALL_INSTANCE(I2Cx));
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117
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118 if (I2Cx == I2C1)
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119 {
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120 /* Force reset of I2C clock */
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121 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C1);
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122
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123 /* Release reset of I2C clock */
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124 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C1);
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125 }
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126 else if (I2Cx == I2C2)
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127 {
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128 /* Force reset of I2C clock */
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129 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C2);
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130
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131 /* Release reset of I2C clock */
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132 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C2);
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133
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134 }
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135 #if defined(I2C3)
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136 else if (I2Cx == I2C3)
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137 {
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138 /* Force reset of I2C clock */
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139 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C3);
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140
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141 /* Release reset of I2C clock */
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142 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C3);
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143 }
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144 #endif
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145 else
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146 {
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147 status = ERROR;
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148 }
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149
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150 return status;
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151 }
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152
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153 /**
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154 * @brief Initialize the I2C registers according to the specified parameters in I2C_InitStruct.
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155 * @param I2Cx I2C Instance.
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156 * @param I2C_InitStruct pointer to a @ref LL_I2C_InitTypeDef structure.
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157 * @retval An ErrorStatus enumeration value:
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158 * - SUCCESS: I2C registers are initialized
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159 * - ERROR: Not applicable
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160 */
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161 uint32_t LL_I2C_Init(I2C_TypeDef *I2Cx, LL_I2C_InitTypeDef *I2C_InitStruct)
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162 {
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163 LL_RCC_ClocksTypeDef rcc_clocks;
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164
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165 /* Check the I2C Instance I2Cx */
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166 assert_param(IS_I2C_ALL_INSTANCE(I2Cx));
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167
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168 /* Check the I2C parameters from I2C_InitStruct */
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169 assert_param(IS_LL_I2C_PERIPHERAL_MODE(I2C_InitStruct->PeripheralMode));
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170 assert_param(IS_LL_I2C_CLOCK_SPEED(I2C_InitStruct->ClockSpeed));
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171 assert_param(IS_LL_I2C_DUTY_CYCLE(I2C_InitStruct->DutyCycle));
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172 #if defined(I2C_FLTR_ANOFF)&&defined(I2C_FLTR_DNF)
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173 assert_param(IS_LL_I2C_ANALOG_FILTER(I2C_InitStruct->AnalogFilter));
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174 assert_param(IS_LL_I2C_DIGITAL_FILTER(I2C_InitStruct->DigitalFilter));
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175 #endif
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176 assert_param(IS_LL_I2C_OWN_ADDRESS1(I2C_InitStruct->OwnAddress1));
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177 assert_param(IS_LL_I2C_TYPE_ACKNOWLEDGE(I2C_InitStruct->TypeAcknowledge));
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178 assert_param(IS_LL_I2C_OWN_ADDRSIZE(I2C_InitStruct->OwnAddrSize));
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179
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180 /* Disable the selected I2Cx Peripheral */
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181 LL_I2C_Disable(I2Cx);
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182
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183 /* Retrieve Clock frequencies */
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184 LL_RCC_GetSystemClocksFreq(&rcc_clocks);
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185
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186 #if defined(I2C_FLTR_ANOFF)&&defined(I2C_FLTR_DNF)
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187 /*---------------------------- I2Cx FLTR Configuration -----------------------
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188 * Configure the analog and digital noise filters with parameters :
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189 * - AnalogFilter: I2C_FLTR_ANFOFF bit
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190 * - DigitalFilter: I2C_FLTR_DNF[3:0] bits
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191 */
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192 LL_I2C_ConfigFilters(I2Cx, I2C_InitStruct->AnalogFilter, I2C_InitStruct->DigitalFilter);
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193
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194 #endif
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195 /*---------------------------- I2Cx SCL Clock Speed Configuration ------------
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196 * Configure the SCL speed :
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197 * - ClockSpeed: I2C_CR2_FREQ[5:0], I2C_TRISE_TRISE[5:0], I2C_CCR_FS,
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198 * and I2C_CCR_CCR[11:0] bits
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199 * - DutyCycle: I2C_CCR_DUTY[7:0] bits
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200 */
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201 LL_I2C_ConfigSpeed(I2Cx, rcc_clocks.PCLK1_Frequency, I2C_InitStruct->ClockSpeed, I2C_InitStruct->DutyCycle);
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202
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203 /*---------------------------- I2Cx OAR1 Configuration -----------------------
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204 * Disable, Configure and Enable I2Cx device own address 1 with parameters :
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205 * - OwnAddress1: I2C_OAR1_ADD[9:8], I2C_OAR1_ADD[7:1] and I2C_OAR1_ADD0 bits
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206 * - OwnAddrSize: I2C_OAR1_ADDMODE bit
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207 */
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208 LL_I2C_SetOwnAddress1(I2Cx, I2C_InitStruct->OwnAddress1, I2C_InitStruct->OwnAddrSize);
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209
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210 /*---------------------------- I2Cx MODE Configuration -----------------------
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211 * Configure I2Cx peripheral mode with parameter :
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212 * - PeripheralMode: I2C_CR1_SMBUS, I2C_CR1_SMBTYPE and I2C_CR1_ENARP bits
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213 */
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214 LL_I2C_SetMode(I2Cx, I2C_InitStruct->PeripheralMode);
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215
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216 /* Enable the selected I2Cx Peripheral */
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217 LL_I2C_Enable(I2Cx);
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218
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219 /*---------------------------- I2Cx CR2 Configuration ------------------------
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220 * Configure the ACKnowledge or Non ACKnowledge condition
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221 * after the address receive match code or next received byte with parameter :
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222 * - TypeAcknowledge: I2C_CR2_NACK bit
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223 */
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224 LL_I2C_AcknowledgeNextData(I2Cx, I2C_InitStruct->TypeAcknowledge);
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225
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226 return SUCCESS;
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227 }
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228
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229 /**
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230 * @brief Set each @ref LL_I2C_InitTypeDef field to default value.
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231 * @param I2C_InitStruct Pointer to a @ref LL_I2C_InitTypeDef structure.
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232 * @retval None
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233 */
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234 void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct)
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235 {
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236 /* Set I2C_InitStruct fields to default values */
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237 I2C_InitStruct->PeripheralMode = LL_I2C_MODE_I2C;
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238 I2C_InitStruct->ClockSpeed = 5000U;
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239 I2C_InitStruct->DutyCycle = LL_I2C_DUTYCYCLE_2;
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240 #if defined(I2C_FLTR_ANOFF)&&defined(I2C_FLTR_DNF)
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241 I2C_InitStruct->AnalogFilter = LL_I2C_ANALOGFILTER_ENABLE;
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242 I2C_InitStruct->DigitalFilter = 0U;
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243 #endif
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244 I2C_InitStruct->OwnAddress1 = 0U;
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245 I2C_InitStruct->TypeAcknowledge = LL_I2C_NACK;
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246 I2C_InitStruct->OwnAddrSize = LL_I2C_OWNADDRESS1_7BIT;
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247 }
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248
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249 /**
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250 * @}
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251 */
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252
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253 /**
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254 * @}
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255 */
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256
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257 /**
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258 * @}
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259 */
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260
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261 #endif /* I2C1 || I2C2 || I2C3 */
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262
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263 /**
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264 * @}
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265 */
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266
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267 #endif /* USE_FULL_LL_DRIVER */
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268
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269 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/