annotate Common/Drivers/STM32F4xx_HAL_DRIVER_v120/Src/stm32f4xx_hal_sdram.c @ 84:e6abbef57475 kittz

Remove unusable code!!! prepare data for SPI in ONLY 1 IRQ!!!!
author Dmitry Romanov <kitt@bk.ru>
date Wed, 21 Nov 2018 10:25:15 +0300
parents 5f11787b4f42
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
38
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
1 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
2 ******************************************************************************
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
3 * @file stm32f4xx_hal_sdram.c
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
4 * @author MCD Application Team
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
5 * @version V1.2.0
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
6 * @date 26-December-2014
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
7 * @brief SDRAM HAL module driver.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
8 * This file provides a generic firmware to drive SDRAM memories mounted
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
9 * as external device.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
10 *
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
11 @verbatim
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
12 ==============================================================================
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
13 ##### How to use this driver #####
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
14 ==============================================================================
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
15 [..]
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
16 This driver is a generic layered driver which contains a set of APIs used to
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
17 control SDRAM memories. It uses the FMC layer functions to interface
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
18 with SDRAM devices.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
19 The following sequence should be followed to configure the FMC to interface
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
20 with SDRAM memories:
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
21
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
22 (#) Declare a SDRAM_HandleTypeDef handle structure, for example:
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
23 SDRAM_HandleTypeDef hdsram
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
24
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
25 (++) Fill the SDRAM_HandleTypeDef handle "Init" field with the allowed
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
26 values of the structure member.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
27
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
28 (++) Fill the SDRAM_HandleTypeDef handle "Instance" field with a predefined
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
29 base register instance for NOR or SDRAM device
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
30
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
31 (#) Declare a FMC_SDRAM_TimingTypeDef structure; for example:
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
32 FMC_SDRAM_TimingTypeDef Timing;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
33 and fill its fields with the allowed values of the structure member.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
34
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
35 (#) Initialize the SDRAM Controller by calling the function HAL_SDRAM_Init(). This function
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
36 performs the following sequence:
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
37
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
38 (##) MSP hardware layer configuration using the function HAL_SDRAM_MspInit()
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
39 (##) Control register configuration using the FMC SDRAM interface function
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
40 FMC_SDRAM_Init()
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
41 (##) Timing register configuration using the FMC SDRAM interface function
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
42 FMC_SDRAM_Timing_Init()
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
43 (##) Program the SDRAM external device by applying its initialization sequence
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
44 according to the device plugged in your hardware. This step is mandatory
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
45 for accessing the SDRAM device.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
46
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
47 (#) At this stage you can perform read/write accesses from/to the memory connected
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
48 to the SDRAM Bank. You can perform either polling or DMA transfer using the
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
49 following APIs:
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
50 (++) HAL_SDRAM_Read()/HAL_SDRAM_Write() for polling read/write access
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
51 (++) HAL_SDRAM_Read_DMA()/HAL_SDRAM_Write_DMA() for DMA read/write transfer
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
52
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
53 (#) You can also control the SDRAM device by calling the control APIs HAL_SDRAM_WriteOperation_Enable()/
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
54 HAL_SDRAM_WriteOperation_Disable() to respectively enable/disable the SDRAM write operation or
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
55 the function HAL_SDRAM_SendCommand() to send a specified command to the SDRAM
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
56 device. The command to be sent must be configured with the FMC_SDRAM_CommandTypeDef
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
57 structure.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
58
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
59 (#) You can continuously monitor the SDRAM device HAL state by calling the function
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
60 HAL_SDRAM_GetState()
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
61
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
62 @endverbatim
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
63 ******************************************************************************
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
64 * @attention
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
65 *
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
66 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
67 *
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
68 * Redistribution and use in source and binary forms, with or without modification,
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
69 * are permitted provided that the following conditions are met:
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
70 * 1. Redistributions of source code must retain the above copyright notice,
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
71 * this list of conditions and the following disclaimer.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
72 * 2. Redistributions in binary form must reproduce the above copyright notice,
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
73 * this list of conditions and the following disclaimer in the documentation
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
74 * and/or other materials provided with the distribution.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
75 * 3. Neither the name of STMicroelectronics nor the names of its contributors
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
76 * may be used to endorse or promote products derived from this software
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
77 * without specific prior written permission.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
78 *
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
79 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
80 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
81 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
82 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
83 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
84 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
85 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
86 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
87 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
88 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
89 *
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
90 ******************************************************************************
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
91 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
92
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
93 /* Includes ------------------------------------------------------------------*/
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
94 #include "stm32f4xx_hal.h"
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
95
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
96 /** @addtogroup STM32F4xx_HAL_Driver
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
97 * @{
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
98 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
99
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
100 /** @defgroup SDRAM SDRAM
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
101 * @brief SDRAM driver modules
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
102 * @{
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
103 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
104 #ifdef HAL_SDRAM_MODULE_ENABLED
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
105 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
106
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
107 /* Private typedef -----------------------------------------------------------*/
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
108 /* Private define ------------------------------------------------------------*/
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
109 /* Private macro -------------------------------------------------------------*/
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
110 /* Private variables ---------------------------------------------------------*/
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
111 /* Private functions ---------------------------------------------------------*/
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
112 /* Exported functions --------------------------------------------------------*/
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
113 /** @defgroup SDRAM_Exported_Functions SDRAM Exported Functions
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
114 * @{
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
115 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
116
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
117 /** @defgroup SDRAM_Exported_Functions_Group1 Initialization and de-initialization functions
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
118 * @brief Initialization and Configuration functions
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
119 *
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
120 @verbatim
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
121 ==============================================================================
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
122 ##### SDRAM Initialization and de_initialization functions #####
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
123 ==============================================================================
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
124 [..]
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
125 This section provides functions allowing to initialize/de-initialize
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
126 the SDRAM memory
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
127
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
128 @endverbatim
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
129 * @{
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
130 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
131
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
132 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
133 * @brief Performs the SDRAM device initialization sequence.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
134 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
135 * the configuration information for SDRAM module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
136 * @param Timing: Pointer to SDRAM control timing structure
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
137 * @retval HAL status
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
138 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
139 HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
140 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
141 /* Check the SDRAM handle parameter */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
142 if(hsdram == NULL)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
143 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
144 return HAL_ERROR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
145 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
146
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
147 if(hsdram->State == HAL_SDRAM_STATE_RESET)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
148 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
149 /* Initialize the low level hardware (MSP) */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
150 HAL_SDRAM_MspInit(hsdram);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
151 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
152
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
153 /* Initialize the SDRAM controller state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
154 hsdram->State = HAL_SDRAM_STATE_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
155
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
156 /* Initialize SDRAM control Interface */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
157 FMC_SDRAM_Init(hsdram->Instance, &(hsdram->Init));
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
158
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
159 /* Initialize SDRAM timing Interface */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
160 FMC_SDRAM_Timing_Init(hsdram->Instance, Timing, hsdram->Init.SDBank);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
161
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
162 /* Update the SDRAM controller state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
163 hsdram->State = HAL_SDRAM_STATE_READY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
164
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
165 return HAL_OK;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
166 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
167
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
168 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
169 * @brief Perform the SDRAM device initialization sequence.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
170 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
171 * the configuration information for SDRAM module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
172 * @retval HAL status
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
173 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
174 HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
175 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
176 /* Initialize the low level hardware (MSP) */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
177 HAL_SDRAM_MspDeInit(hsdram);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
178
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
179 /* Configure the SDRAM registers with their reset values */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
180 FMC_SDRAM_DeInit(hsdram->Instance, hsdram->Init.SDBank);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
181
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
182 /* Reset the SDRAM controller state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
183 hsdram->State = HAL_SDRAM_STATE_RESET;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
184
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
185 /* Release Lock */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
186 __HAL_UNLOCK(hsdram);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
187
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
188 return HAL_OK;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
189 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
190
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
191 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
192 * @brief SDRAM MSP Init.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
193 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
194 * the configuration information for SDRAM module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
195 * @retval None
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
196 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
197 __weak void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
198 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
199 /* NOTE: This function Should not be modified, when the callback is needed,
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
200 the HAL_SDRAM_MspInit could be implemented in the user file
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
201 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
202 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
203
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
204 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
205 * @brief SDRAM MSP DeInit.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
206 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
207 * the configuration information for SDRAM module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
208 * @retval None
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
209 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
210 __weak void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
211 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
212 /* NOTE: This function Should not be modified, when the callback is needed,
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
213 the HAL_SDRAM_MspDeInit could be implemented in the user file
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
214 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
215 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
216
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
217 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
218 * @brief This function handles SDRAM refresh error interrupt request.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
219 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
220 * the configuration information for SDRAM module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
221 * @retval HAL status
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
222 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
223 void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
224 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
225 /* Check SDRAM interrupt Rising edge flag */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
226 if(__FMC_SDRAM_GET_FLAG(hsdram->Instance, FMC_SDRAM_FLAG_REFRESH_IT))
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
227 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
228 /* SDRAM refresh error interrupt callback */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
229 HAL_SDRAM_RefreshErrorCallback(hsdram);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
230
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
231 /* Clear SDRAM refresh error interrupt pending bit */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
232 __FMC_SDRAM_CLEAR_FLAG(hsdram->Instance, FMC_SDRAM_FLAG_REFRESH_ERROR);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
233 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
234 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
235
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
236 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
237 * @brief SDRAM Refresh error callback.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
238 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
239 * the configuration information for SDRAM module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
240 * @retval None
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
241 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
242 __weak void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
243 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
244 /* NOTE: This function Should not be modified, when the callback is needed,
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
245 the HAL_SDRAM_RefreshErrorCallback could be implemented in the user file
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
246 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
247 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
248
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
249 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
250 * @brief DMA transfer complete callback.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
251 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
252 * the configuration information for the specified DMA module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
253 * @retval None
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
254 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
255 __weak void HAL_SDRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
256 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
257 /* NOTE: This function Should not be modified, when the callback is needed,
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
258 the HAL_SDRAM_DMA_XferCpltCallback could be implemented in the user file
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
259 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
260 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
261
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
262 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
263 * @brief DMA transfer complete error callback.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
264 * @param hdma: DMA handle
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
265 * @retval None
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
266 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
267 __weak void HAL_SDRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
268 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
269 /* NOTE: This function Should not be modified, when the callback is needed,
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
270 the HAL_SDRAM_DMA_XferErrorCallback could be implemented in the user file
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
271 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
272 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
273 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
274 * @}
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
275 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
276
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
277 /** @defgroup SDRAM_Exported_Functions_Group2 Input and Output functions
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
278 * @brief Input Output and memory control functions
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
279 *
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
280 @verbatim
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
281 ==============================================================================
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
282 ##### SDRAM Input and Output functions #####
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
283 ==============================================================================
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
284 [..]
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
285 This section provides functions allowing to use and control the SDRAM memory
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
286
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
287 @endverbatim
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
288 * @{
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
289 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
290
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
291 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
292 * @brief Reads 8-bit data buffer from the SDRAM memory.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
293 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
294 * the configuration information for SDRAM module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
295 * @param pAddress: Pointer to read start address
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
296 * @param pDstBuffer: Pointer to destination buffer
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
297 * @param BufferSize: Size of the buffer to read from memory
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
298 * @retval HAL status
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
299 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
300 HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
301 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
302 __IO uint8_t *pSdramAddress = (uint8_t *)pAddress;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
303
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
304 /* Process Locked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
305 __HAL_LOCK(hsdram);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
306
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
307 /* Check the SDRAM controller state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
308 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
309 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
310 return HAL_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
311 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
312 else if(hsdram->State == HAL_SDRAM_STATE_PRECHARGED)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
313 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
314 return HAL_ERROR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
315 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
316
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
317 /* Read data from source */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
318 for(; BufferSize != 0; BufferSize--)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
319 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
320 *pDstBuffer = *(__IO uint8_t *)pSdramAddress;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
321 pDstBuffer++;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
322 pSdramAddress++;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
323 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
324
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
325 /* Process Unlocked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
326 __HAL_UNLOCK(hsdram);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
327
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
328 return HAL_OK;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
329 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
330
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
331 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
332 * @brief Writes 8-bit data buffer to SDRAM memory.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
333 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
334 * the configuration information for SDRAM module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
335 * @param pAddress: Pointer to write start address
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
336 * @param pSrcBuffer: Pointer to source buffer to write
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
337 * @param BufferSize: Size of the buffer to write to memory
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
338 * @retval HAL status
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
339 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
340 HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
341 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
342 __IO uint8_t *pSdramAddress = (uint8_t *)pAddress;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
343 uint32_t tmp = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
344
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
345 /* Process Locked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
346 __HAL_LOCK(hsdram);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
347
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
348 /* Check the SDRAM controller state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
349 tmp = hsdram->State;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
350
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
351 if(tmp == HAL_SDRAM_STATE_BUSY)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
352 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
353 return HAL_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
354 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
355 else if((tmp == HAL_SDRAM_STATE_PRECHARGED) || (tmp == HAL_SDRAM_STATE_WRITE_PROTECTED))
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
356 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
357 return HAL_ERROR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
358 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
359
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
360 /* Write data to memory */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
361 for(; BufferSize != 0; BufferSize--)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
362 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
363 *(__IO uint8_t *)pSdramAddress = *pSrcBuffer;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
364 pSrcBuffer++;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
365 pSdramAddress++;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
366 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
367
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
368 /* Process Unlocked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
369 __HAL_UNLOCK(hsdram);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
370
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
371 return HAL_OK;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
372 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
373
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
374 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
375 * @brief Reads 16-bit data buffer from the SDRAM memory.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
376 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
377 * the configuration information for SDRAM module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
378 * @param pAddress: Pointer to read start address
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
379 * @param pDstBuffer: Pointer to destination buffer
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
380 * @param BufferSize: Size of the buffer to read from memory
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
381 * @retval HAL status
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
382 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
383 HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
384 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
385 __IO uint16_t *pSdramAddress = (uint16_t *)pAddress;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
386
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
387 /* Process Locked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
388 __HAL_LOCK(hsdram);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
389
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
390 /* Check the SDRAM controller state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
391 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
392 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
393 return HAL_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
394 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
395 else if(hsdram->State == HAL_SDRAM_STATE_PRECHARGED)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
396 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
397 return HAL_ERROR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
398 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
399
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
400 /* Read data from source */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
401 for(; BufferSize != 0; BufferSize--)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
402 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
403 *pDstBuffer = *(__IO uint16_t *)pSdramAddress;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
404 pDstBuffer++;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
405 pSdramAddress++;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
406 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
407
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
408 /* Process Unlocked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
409 __HAL_UNLOCK(hsdram);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
410
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
411 return HAL_OK;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
412 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
413
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
414 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
415 * @brief Writes 16-bit data buffer to SDRAM memory.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
416 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
417 * the configuration information for SDRAM module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
418 * @param pAddress: Pointer to write start address
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
419 * @param pSrcBuffer: Pointer to source buffer to write
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
420 * @param BufferSize: Size of the buffer to write to memory
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
421 * @retval HAL status
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
422 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
423 HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
424 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
425 __IO uint16_t *pSdramAddress = (uint16_t *)pAddress;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
426 uint32_t tmp = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
427
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
428 /* Process Locked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
429 __HAL_LOCK(hsdram);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
430
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
431 /* Check the SDRAM controller state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
432 tmp = hsdram->State;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
433
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
434 if(tmp == HAL_SDRAM_STATE_BUSY)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
435 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
436 return HAL_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
437 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
438 else if((tmp == HAL_SDRAM_STATE_PRECHARGED) || (tmp == HAL_SDRAM_STATE_WRITE_PROTECTED))
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
439 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
440 return HAL_ERROR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
441 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
442
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
443 /* Write data to memory */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
444 for(; BufferSize != 0; BufferSize--)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
445 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
446 *(__IO uint16_t *)pSdramAddress = *pSrcBuffer;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
447 pSrcBuffer++;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
448 pSdramAddress++;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
449 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
450
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
451 /* Process Unlocked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
452 __HAL_UNLOCK(hsdram);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
453
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
454 return HAL_OK;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
455 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
456
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
457 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
458 * @brief Reads 32-bit data buffer from the SDRAM memory.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
459 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
460 * the configuration information for SDRAM module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
461 * @param pAddress: Pointer to read start address
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
462 * @param pDstBuffer: Pointer to destination buffer
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
463 * @param BufferSize: Size of the buffer to read from memory
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
464 * @retval HAL status
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
465 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
466 HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
467 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
468 __IO uint32_t *pSdramAddress = (uint32_t *)pAddress;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
469
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
470 /* Process Locked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
471 __HAL_LOCK(hsdram);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
472
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
473 /* Check the SDRAM controller state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
474 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
475 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
476 return HAL_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
477 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
478 else if(hsdram->State == HAL_SDRAM_STATE_PRECHARGED)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
479 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
480 return HAL_ERROR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
481 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
482
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
483 /* Read data from source */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
484 for(; BufferSize != 0; BufferSize--)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
485 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
486 *pDstBuffer = *(__IO uint32_t *)pSdramAddress;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
487 pDstBuffer++;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
488 pSdramAddress++;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
489 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
490
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
491 /* Process Unlocked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
492 __HAL_UNLOCK(hsdram);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
493
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
494 return HAL_OK;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
495 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
496
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
497 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
498 * @brief Writes 32-bit data buffer to SDRAM memory.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
499 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
500 * the configuration information for SDRAM module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
501 * @param pAddress: Pointer to write start address
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
502 * @param pSrcBuffer: Pointer to source buffer to write
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
503 * @param BufferSize: Size of the buffer to write to memory
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
504 * @retval HAL status
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
505 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
506 HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
507 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
508 __IO uint32_t *pSdramAddress = (uint32_t *)pAddress;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
509 uint32_t tmp = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
510
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
511 /* Process Locked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
512 __HAL_LOCK(hsdram);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
513
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
514 /* Check the SDRAM controller state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
515 tmp = hsdram->State;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
516
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
517 if(tmp == HAL_SDRAM_STATE_BUSY)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
518 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
519 return HAL_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
520 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
521 else if((tmp == HAL_SDRAM_STATE_PRECHARGED) || (tmp == HAL_SDRAM_STATE_WRITE_PROTECTED))
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
522 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
523 return HAL_ERROR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
524 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
525
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
526 /* Write data to memory */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
527 for(; BufferSize != 0; BufferSize--)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
528 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
529 *(__IO uint32_t *)pSdramAddress = *pSrcBuffer;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
530 pSrcBuffer++;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
531 pSdramAddress++;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
532 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
533
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
534 /* Process Unlocked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
535 __HAL_UNLOCK(hsdram);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
536
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
537 return HAL_OK;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
538 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
539
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
540 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
541 * @brief Reads a Words data from the SDRAM memory using DMA transfer.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
542 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
543 * the configuration information for SDRAM module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
544 * @param pAddress: Pointer to read start address
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
545 * @param pDstBuffer: Pointer to destination buffer
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
546 * @param BufferSize: Size of the buffer to read from memory
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
547 * @retval HAL status
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
548 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
549 HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
550 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
551 uint32_t tmp = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
552
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
553 /* Process Locked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
554 __HAL_LOCK(hsdram);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
555
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
556 /* Check the SDRAM controller state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
557 tmp = hsdram->State;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
558
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
559 if(tmp == HAL_SDRAM_STATE_BUSY)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
560 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
561 return HAL_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
562 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
563 else if(tmp == HAL_SDRAM_STATE_PRECHARGED)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
564 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
565 return HAL_ERROR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
566 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
567
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
568 /* Configure DMA user callbacks */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
569 hsdram->hdma->XferCpltCallback = HAL_SDRAM_DMA_XferCpltCallback;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
570 hsdram->hdma->XferErrorCallback = HAL_SDRAM_DMA_XferErrorCallback;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
571
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
572 /* Enable the DMA Stream */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
573 HAL_DMA_Start_IT(hsdram->hdma, (uint32_t)pAddress, (uint32_t)pDstBuffer, (uint32_t)BufferSize);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
574
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
575 /* Process Unlocked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
576 __HAL_UNLOCK(hsdram);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
577
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
578 return HAL_OK;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
579 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
580
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
581 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
582 * @brief Writes a Words data buffer to SDRAM memory using DMA transfer.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
583 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
584 * the configuration information for SDRAM module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
585 * @param pAddress: Pointer to write start address
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
586 * @param pSrcBuffer: Pointer to source buffer to write
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
587 * @param BufferSize: Size of the buffer to write to memory
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
588 * @retval HAL status
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
589 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
590 HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
591 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
592 uint32_t tmp = 0;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
593
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
594 /* Process Locked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
595 __HAL_LOCK(hsdram);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
596
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
597 /* Check the SDRAM controller state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
598 tmp = hsdram->State;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
599
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
600 if(tmp == HAL_SDRAM_STATE_BUSY)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
601 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
602 return HAL_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
603 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
604 else if((tmp == HAL_SDRAM_STATE_PRECHARGED) || (tmp == HAL_SDRAM_STATE_WRITE_PROTECTED))
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
605 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
606 return HAL_ERROR;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
607 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
608
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
609 /* Configure DMA user callbacks */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
610 hsdram->hdma->XferCpltCallback = HAL_SDRAM_DMA_XferCpltCallback;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
611 hsdram->hdma->XferErrorCallback = HAL_SDRAM_DMA_XferErrorCallback;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
612
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
613 /* Enable the DMA Stream */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
614 HAL_DMA_Start_IT(hsdram->hdma, (uint32_t)pSrcBuffer, (uint32_t)pAddress, (uint32_t)BufferSize);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
615
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
616 /* Process Unlocked */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
617 __HAL_UNLOCK(hsdram);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
618
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
619 return HAL_OK;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
620 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
621 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
622 * @}
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
623 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
624
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
625 /** @defgroup SDRAM_Exported_Functions_Group3 Control functions
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
626 * @brief management functions
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
627 *
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
628 @verbatim
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
629 ==============================================================================
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
630 ##### SDRAM Control functions #####
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
631 ==============================================================================
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
632 [..]
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
633 This subsection provides a set of functions allowing to control dynamically
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
634 the SDRAM interface.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
635
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
636 @endverbatim
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
637 * @{
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
638 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
639
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
640 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
641 * @brief Enables dynamically SDRAM write protection.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
642 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
643 * the configuration information for SDRAM module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
644 * @retval HAL status
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
645 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
646 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
647 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
648 /* Check the SDRAM controller state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
649 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
650 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
651 return HAL_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
652 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
653
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
654 /* Update the SDRAM state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
655 hsdram->State = HAL_SDRAM_STATE_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
656
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
657 /* Enable write protection */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
658 FMC_SDRAM_WriteProtection_Enable(hsdram->Instance, hsdram->Init.SDBank);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
659
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
660 /* Update the SDRAM state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
661 hsdram->State = HAL_SDRAM_STATE_WRITE_PROTECTED;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
662
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
663 return HAL_OK;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
664 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
665
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
666 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
667 * @brief Disables dynamically SDRAM write protection.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
668 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
669 * the configuration information for SDRAM module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
670 * @retval HAL status
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
671 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
672 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
673 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
674 /* Check the SDRAM controller state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
675 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
676 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
677 return HAL_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
678 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
679
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
680 /* Update the SDRAM state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
681 hsdram->State = HAL_SDRAM_STATE_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
682
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
683 /* Disable write protection */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
684 FMC_SDRAM_WriteProtection_Disable(hsdram->Instance, hsdram->Init.SDBank);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
685
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
686 /* Update the SDRAM state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
687 hsdram->State = HAL_SDRAM_STATE_READY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
688
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
689 return HAL_OK;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
690 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
691
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
692 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
693 * @brief Sends Command to the SDRAM bank.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
694 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
695 * the configuration information for SDRAM module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
696 * @param Command: SDRAM command structure
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
697 * @param Timeout: Timeout duration
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
698 * @retval HAL status
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
699 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
700 HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
701 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
702 /* Check the SDRAM controller state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
703 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
704 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
705 return HAL_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
706 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
707
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
708 /* Update the SDRAM state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
709 hsdram->State = HAL_SDRAM_STATE_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
710
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
711 /* Send SDRAM command */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
712 FMC_SDRAM_SendCommand(hsdram->Instance, Command, Timeout);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
713
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
714 /* Update the SDRAM controller state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
715 if(Command->CommandMode == FMC_SDRAM_CMD_PALL)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
716 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
717 hsdram->State = HAL_SDRAM_STATE_PRECHARGED;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
718 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
719 else
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
720 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
721 hsdram->State = HAL_SDRAM_STATE_READY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
722 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
723
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
724 return HAL_OK;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
725 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
726
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
727 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
728 * @brief Programs the SDRAM Memory Refresh rate.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
729 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
730 * the configuration information for SDRAM module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
731 * @param RefreshRate: The SDRAM refresh rate value
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
732 * @retval HAL status
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
733 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
734 HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
735 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
736 /* Check the SDRAM controller state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
737 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
738 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
739 return HAL_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
740 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
741
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
742 /* Update the SDRAM state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
743 hsdram->State = HAL_SDRAM_STATE_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
744
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
745 /* Program the refresh rate */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
746 FMC_SDRAM_ProgramRefreshRate(hsdram->Instance ,RefreshRate);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
747
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
748 /* Update the SDRAM state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
749 hsdram->State = HAL_SDRAM_STATE_READY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
750
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
751 return HAL_OK;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
752 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
753
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
754 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
755 * @brief Sets the Number of consecutive SDRAM Memory auto Refresh commands.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
756 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
757 * the configuration information for SDRAM module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
758 * @param AutoRefreshNumber: The SDRAM auto Refresh number
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
759 * @retval HAL status
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
760 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
761 HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
762 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
763 /* Check the SDRAM controller state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
764 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
765 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
766 return HAL_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
767 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
768
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
769 /* Update the SDRAM state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
770 hsdram->State = HAL_SDRAM_STATE_BUSY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
771
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
772 /* Set the Auto-Refresh number */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
773 FMC_SDRAM_SetAutoRefreshNumber(hsdram->Instance ,AutoRefreshNumber);
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
774
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
775 /* Update the SDRAM state */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
776 hsdram->State = HAL_SDRAM_STATE_READY;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
777
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
778 return HAL_OK;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
779 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
780
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
781 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
782 * @brief Returns the SDRAM memory current mode.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
783 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
784 * the configuration information for SDRAM module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
785 * @retval The SDRAM memory mode.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
786 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
787 uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
788 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
789 /* Return the SDRAM memory current mode */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
790 return(FMC_SDRAM_GetModeStatus(hsdram->Instance, hsdram->Init.SDBank));
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
791 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
792
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
793 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
794 * @}
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
795 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
796
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
797 /** @defgroup SDRAM_Exported_Functions_Group4 State functions
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
798 * @brief Peripheral State functions
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
799 *
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
800 @verbatim
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
801 ==============================================================================
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
802 ##### SDRAM State functions #####
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
803 ==============================================================================
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
804 [..]
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
805 This subsection permits to get in run-time the status of the SDRAM controller
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
806 and the data flow.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
807
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
808 @endverbatim
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
809 * @{
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
810 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
811
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
812 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
813 * @brief Returns the SDRAM state.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
814 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
815 * the configuration information for SDRAM module.
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
816 * @retval HAL state
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
817 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
818 HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram)
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
819 {
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
820 return hsdram->State;
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
821 }
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
822
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
823 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
824 * @}
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
825 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
826
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
827 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
828 * @}
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
829 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
830 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
831 #endif /* HAL_SDRAM_MODULE_ENABLED */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
832 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
833 * @}
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
834 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
835
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
836 /**
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
837 * @}
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
838 */
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
839
5f11787b4f42 include in ostc4 repository
heinrichsweikamp
parents:
diff changeset
840 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/