Mercurial > public > ostc4
annotate Common/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd_ex.c @ 220:e524a824d8f2 Improve_IPC_Sync
Added schedule point for functions executed once in a second
SPI communication takes place every 100ms triggered by the master (main). Synchronisation is done using the SPI RX complete callback which is called ~4ms after communication was started. In the previous implementation this could happen in parallel to usage of data. To solve this potential problem the execution of functions called once a second was moved from 1000ms to 980ms giving a 20ms window for execution.
author | ideenmodellierer |
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date | Sun, 31 Mar 2019 15:49:47 +0200 |
parents | c78bcbd5deda |
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rev | line source |
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128
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1 /** |
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2 ****************************************************************************** |
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3 * @file stm32f4xx_hal_pcd_ex.c |
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4 * @author MCD Application Team |
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5 * @brief PCD HAL module driver. |
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6 * This file provides firmware functions to manage the following |
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7 * functionalities of the USB Peripheral Controller: |
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8 * + Extended features functions |
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9 * |
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10 ****************************************************************************** |
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11 * @attention |
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12 * |
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13 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
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14 * |
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15 * Redistribution and use in source and binary forms, with or without modification, |
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16 * are permitted provided that the following conditions are met: |
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17 * 1. Redistributions of source code must retain the above copyright notice, |
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18 * this list of conditions and the following disclaimer. |
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19 * 2. Redistributions in binary form must reproduce the above copyright notice, |
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20 * this list of conditions and the following disclaimer in the documentation |
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21 * and/or other materials provided with the distribution. |
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22 * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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23 * may be used to endorse or promote products derived from this software |
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24 * without specific prior written permission. |
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25 * |
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26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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27 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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29 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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32 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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33 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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34 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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36 * |
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37 ****************************************************************************** |
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38 */ |
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39 |
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40 /* Includes ------------------------------------------------------------------*/ |
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41 #include "stm32f4xx_hal.h" |
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42 |
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43 /** @addtogroup STM32F4xx_HAL_Driver |
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44 * @{ |
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45 */ |
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46 |
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47 /** @defgroup PCDEx PCDEx |
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48 * @brief PCD Extended HAL module driver |
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49 * @{ |
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50 */ |
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51 #ifdef HAL_PCD_MODULE_ENABLED |
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52 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \ |
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53 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \ |
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54 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \ |
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55 defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \ |
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56 defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) |
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57 /* Private types -------------------------------------------------------------*/ |
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58 /* Private variables ---------------------------------------------------------*/ |
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59 /* Private constants ---------------------------------------------------------*/ |
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60 /* Private macros ------------------------------------------------------------*/ |
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61 /* Private functions ---------------------------------------------------------*/ |
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62 /* Exported functions --------------------------------------------------------*/ |
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63 |
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64 /** @defgroup PCDEx_Exported_Functions PCD Extended Exported Functions |
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65 * @{ |
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66 */ |
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67 |
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68 /** @defgroup PCDEx_Exported_Functions_Group1 Peripheral Control functions |
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69 * @brief PCDEx control functions |
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70 * |
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71 @verbatim |
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72 =============================================================================== |
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73 ##### Extended features functions ##### |
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74 =============================================================================== |
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75 [..] This section provides functions allowing to: |
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76 (+) Update FIFO configuration |
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77 |
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78 @endverbatim |
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79 * @{ |
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80 */ |
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81 |
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82 /** |
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83 * @brief Set Tx FIFO |
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84 * @param hpcd PCD handle |
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85 * @param fifo The number of Tx fifo |
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86 * @param size Fifo size |
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87 * @retval HAL status |
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88 */ |
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89 HAL_StatusTypeDef HAL_PCDEx_SetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo, uint16_t size) |
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90 { |
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91 uint8_t i = 0; |
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92 uint32_t Tx_Offset = 0U; |
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93 |
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94 /* TXn min size = 16 words. (n : Transmit FIFO index) |
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95 When a TxFIFO is not used, the Configuration should be as follows: |
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96 case 1 : n > m and Txn is not used (n,m : Transmit FIFO indexes) |
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97 --> Txm can use the space allocated for Txn. |
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98 case2 : n < m and Txn is not used (n,m : Transmit FIFO indexes) |
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99 --> Txn should be configured with the minimum space of 16 words |
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100 The FIFO is used optimally when used TxFIFOs are allocated in the top |
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101 of the FIFO.Ex: use EP1 and EP2 as IN instead of EP1 and EP3 as IN ones. |
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102 When DMA is used 3n * FIFO locations should be reserved for internal DMA registers */ |
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103 |
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104 Tx_Offset = hpcd->Instance->GRXFSIZ; |
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105 |
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106 if(fifo == 0) |
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107 { |
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108 hpcd->Instance->DIEPTXF0_HNPTXFSIZ = (uint32_t)(((uint32_t)size << 16U) | Tx_Offset); |
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109 } |
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110 else |
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111 { |
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112 Tx_Offset += (hpcd->Instance->DIEPTXF0_HNPTXFSIZ) >> 16U; |
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113 for (i = 0; i < (fifo - 1); i++) |
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114 { |
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115 Tx_Offset += (hpcd->Instance->DIEPTXF[i] >> 16U); |
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116 } |
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117 |
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118 /* Multiply Tx_Size by 2 to get higher performance */ |
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119 hpcd->Instance->DIEPTXF[fifo - 1] = (uint32_t)(((uint32_t)size << 16U) | Tx_Offset); |
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120 } |
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121 |
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122 return HAL_OK; |
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123 } |
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124 |
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125 /** |
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126 * @brief Set Rx FIFO |
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127 * @param hpcd PCD handle |
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128 * @param size Size of Rx fifo |
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129 * @retval HAL status |
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130 */ |
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131 HAL_StatusTypeDef HAL_PCDEx_SetRxFiFo(PCD_HandleTypeDef *hpcd, uint16_t size) |
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132 { |
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133 hpcd->Instance->GRXFSIZ = size; |
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134 |
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135 return HAL_OK; |
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136 } |
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137 |
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138 #if defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \ |
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139 defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) |
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140 /** |
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141 * @brief Activate LPM feature |
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142 * @param hpcd PCD handle |
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143 * @retval HAL status |
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144 */ |
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145 HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd) |
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146 { |
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147 USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; |
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148 |
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149 hpcd->lpm_active = ENABLE; |
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150 hpcd->LPM_State = LPM_L0; |
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151 USBx->GINTMSK |= USB_OTG_GINTMSK_LPMINTM; |
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152 USBx->GLPMCFG |= (USB_OTG_GLPMCFG_LPMEN | USB_OTG_GLPMCFG_LPMACK | USB_OTG_GLPMCFG_ENBESL); |
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153 |
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154 return HAL_OK; |
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155 } |
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156 |
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157 /** |
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158 * @brief Deactivate LPM feature. |
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159 * @param hpcd PCD handle |
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160 * @retval HAL status |
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161 */ |
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162 HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd) |
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163 { |
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164 USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; |
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165 |
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166 hpcd->lpm_active = DISABLE; |
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167 USBx->GINTMSK &= ~USB_OTG_GINTMSK_LPMINTM; |
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168 USBx->GLPMCFG &= ~(USB_OTG_GLPMCFG_LPMEN | USB_OTG_GLPMCFG_LPMACK | USB_OTG_GLPMCFG_ENBESL); |
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169 |
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170 return HAL_OK; |
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171 } |
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172 |
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173 /** |
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174 * @brief Send LPM message to user layer callback. |
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175 * @param hpcd PCD handle |
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176 * @param msg LPM message |
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177 * @retval HAL status |
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178 */ |
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179 __weak void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg) |
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180 { |
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181 /* Prevent unused argument(s) compilation warning */ |
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182 UNUSED(hpcd); |
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183 UNUSED(msg); |
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184 } |
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185 #endif /* STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Rx || STM32F412Vx || STM32F412Cx || STM32F413xx || STM32F423xx */ |
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186 |
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187 #if defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) |
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188 /** |
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189 * @brief HAL_PCDEx_BCD_VBUSDetect : handle BatteryCharging Process |
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190 * @param hpcd PCD handle |
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191 * @retval HAL status |
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192 */ |
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193 void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd) |
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194 { |
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195 USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; |
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196 uint32_t tickstart = HAL_GetTick(); |
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197 |
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198 /* Start BCD When device is connected */ |
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199 if (USBx_DEVICE->DCTL & USB_OTG_DCTL_SDIS) |
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200 { |
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201 /* Enable DCD : Data Contact Detect */ |
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202 USBx->GCCFG |= USB_OTG_GCCFG_DCDEN; |
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203 |
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204 /* Wait Detect flag or a timeout is happen*/ |
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205 while ((USBx->GCCFG & USB_OTG_GCCFG_DCDET) == 0U) |
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206 { |
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207 /* Check for the Timeout */ |
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208 if((HAL_GetTick() - tickstart ) > 1000U) |
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209 { |
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210 HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_ERROR); |
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211 return; |
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212 } |
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213 } |
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214 |
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215 /* Right response got */ |
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216 HAL_Delay(100U); |
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217 |
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218 /* Check Detect flag*/ |
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219 if (USBx->GCCFG & USB_OTG_GCCFG_DCDET) |
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220 { |
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221 HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_CONTACT_DETECTION); |
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222 } |
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223 |
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224 /*Primary detection: checks if connected to Standard Downstream Port |
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225 (without charging capability) */ |
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226 USBx->GCCFG &=~ USB_OTG_GCCFG_DCDEN; |
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227 USBx->GCCFG |= USB_OTG_GCCFG_PDEN; |
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228 HAL_Delay(100U); |
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229 |
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230 if (!(USBx->GCCFG & USB_OTG_GCCFG_PDET)) |
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231 { |
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232 /* Case of Standard Downstream Port */ |
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233 HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_STD_DOWNSTREAM_PORT); |
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234 } |
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235 else |
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236 { |
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237 /* start secondary detection to check connection to Charging Downstream |
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238 Port or Dedicated Charging Port */ |
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239 USBx->GCCFG &=~ USB_OTG_GCCFG_PDEN; |
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240 USBx->GCCFG |= USB_OTG_GCCFG_SDEN; |
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241 HAL_Delay(100U); |
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242 |
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243 if ((USBx->GCCFG) & USB_OTG_GCCFG_SDET) |
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244 { |
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245 /* case Dedicated Charging Port */ |
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246 HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_DEDICATED_CHARGING_PORT); |
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247 } |
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248 else |
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249 { |
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250 /* case Charging Downstream Port */ |
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251 HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_CHARGING_DOWNSTREAM_PORT); |
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252 } |
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253 } |
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254 /* Battery Charging capability discovery finished */ |
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255 HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_DISCOVERY_COMPLETED); |
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256 } |
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257 } |
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258 |
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259 /** |
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260 * @brief HAL_PCDEx_ActivateBCD : active BatteryCharging feature |
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261 * @param hpcd PCD handle |
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262 * @retval HAL status |
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263 */ |
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264 HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd) |
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265 { |
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266 USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; |
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267 |
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268 hpcd->battery_charging_active = ENABLE; |
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269 USBx->GCCFG |= (USB_OTG_GCCFG_BCDEN); |
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270 |
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271 return HAL_OK; |
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272 } |
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273 |
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274 /** |
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275 * @brief HAL_PCDEx_DeActivateBCD : de-active BatteryCharging feature |
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276 * @param hpcd PCD handle |
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277 * @retval HAL status |
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278 */ |
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279 HAL_StatusTypeDef HAL_PCDEx_DeActivateBCD(PCD_HandleTypeDef *hpcd) |
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280 { |
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281 USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; |
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282 hpcd->battery_charging_active = DISABLE; |
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283 USBx->GCCFG &= ~(USB_OTG_GCCFG_BCDEN); |
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284 return HAL_OK; |
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285 } |
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286 |
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287 /** |
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288 * @brief HAL_PCDEx_BatteryCharging_Callback : Send BatteryCharging message to user layer |
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289 * @param hpcd PCD handle |
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290 * @param msg LPM message |
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291 * @retval HAL status |
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292 */ |
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293 __weak void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg) |
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294 { |
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295 /* Prevent unused argument(s) compilation warning */ |
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296 UNUSED(hpcd); |
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297 UNUSED(msg); |
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298 } |
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299 |
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300 #endif /* STM32F412Zx || STM32F412Rx || STM32F412Vx || STM32F412Cx || STM32F413xx || STM32F423xx */ |
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301 |
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302 /** |
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303 * @} |
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304 */ |
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305 |
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306 /** |
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307 * @} |
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308 */ |
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309 |
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310 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || |
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311 STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Rx || |
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312 STM32F412Vx || STM32F412Cx || STM32F413xx || STM32F423xx */ |
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313 #endif /* HAL_PCD_MODULE_ENABLED */ |
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314 /** |
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315 * @} |
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316 */ |
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317 |
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318 /** |
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319 * @} |
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320 */ |
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321 |
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322 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |