Mercurial > public > ostc4
annotate Common/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sd.h @ 901:e4e9acfde839 Evo_2_23
Bugfix simulator/planer:
For deco calculation two structures are used. The calculation structure and the input structure. During simulation fast forward (+5min) the input structure is manipulated. Especially for vpm calculation it could happen that the input structure was manipulated and then overwritten by the calculation structure => deco and tts may have wrong values. To avoid this thedeco calculation status is now checked before doing the FF manupulation. Based an calculation state deco or input structures are manipulated.
Surface time stamp in planer view:
The planer used its own (buggy) implementation for calculation of tts. The timestamp for the surface arrival did not match the bottom time + TTS. The new implementation uses the tts calculated by the deco loop for generation of surface time stamp.
author | Ideenmodellierer |
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date | Wed, 02 Oct 2024 22:07:13 +0200 |
parents | c78bcbd5deda |
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rev | line source |
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128
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1 /** |
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2 ****************************************************************************** |
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3 * @file stm32f4xx_hal_sd.h |
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4 * @author MCD Application Team |
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5 * @brief Header file of SD HAL module. |
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6 ****************************************************************************** |
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7 * @attention |
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8 * |
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9 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
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10 * |
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11 * Redistribution and use in source and binary forms, with or without modification, |
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12 * are permitted provided that the following conditions are met: |
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13 * 1. Redistributions of source code must retain the above copyright notice, |
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14 * this list of conditions and the following disclaimer. |
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15 * 2. Redistributions in binary form must reproduce the above copyright notice, |
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16 * this list of conditions and the following disclaimer in the documentation |
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17 * and/or other materials provided with the distribution. |
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18 * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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19 * may be used to endorse or promote products derived from this software |
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20 * without specific prior written permission. |
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21 * |
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22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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32 * |
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33 ****************************************************************************** |
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34 */ |
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35 |
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36 /* Define to prevent recursive inclusion -------------------------------------*/ |
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37 #ifndef __STM32F4xx_HAL_SD_H |
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38 #define __STM32F4xx_HAL_SD_H |
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39 |
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40 #ifdef __cplusplus |
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41 extern "C" { |
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42 #endif |
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43 |
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44 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \ |
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45 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \ |
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46 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \ |
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47 defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \ |
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48 defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) |
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49 |
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50 /* Includes ------------------------------------------------------------------*/ |
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51 #include "stm32f4xx_ll_sdmmc.h" |
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52 |
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53 /** @addtogroup STM32F4xx_HAL_Driver |
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54 * @{ |
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55 */ |
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56 |
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57 /** @defgroup SD SD |
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58 * @brief SD HAL module driver |
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59 * @{ |
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60 */ |
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61 |
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62 /* Exported types ------------------------------------------------------------*/ |
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63 /** @defgroup SD_Exported_Types SD Exported Types |
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64 * @{ |
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65 */ |
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66 |
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67 /** @defgroup SD_Exported_Types_Group1 SD State enumeration structure |
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68 * @{ |
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69 */ |
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70 typedef enum |
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71 { |
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72 HAL_SD_STATE_RESET = 0x00000000U, /*!< SD not yet initialized or disabled */ |
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73 HAL_SD_STATE_READY = 0x00000001U, /*!< SD initialized and ready for use */ |
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74 HAL_SD_STATE_TIMEOUT = 0x00000002U, /*!< SD Timeout state */ |
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75 HAL_SD_STATE_BUSY = 0x00000003U, /*!< SD process ongoing */ |
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76 HAL_SD_STATE_PROGRAMMING = 0x00000004U, /*!< SD Programming State */ |
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77 HAL_SD_STATE_RECEIVING = 0x00000005U, /*!< SD Receinving State */ |
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78 HAL_SD_STATE_TRANSFER = 0x00000006U, /*!< SD Transfert State */ |
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79 HAL_SD_STATE_ERROR = 0x0000000FU /*!< SD is in error state */ |
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80 }HAL_SD_StateTypeDef; |
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81 /** |
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82 * @} |
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83 */ |
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84 |
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85 /** @defgroup SD_Exported_Types_Group2 SD Card State enumeration structure |
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86 * @{ |
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87 */ |
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88 typedef enum |
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89 { |
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90 HAL_SD_CARD_READY = 0x00000001U, /*!< Card state is ready */ |
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91 HAL_SD_CARD_IDENTIFICATION = 0x00000002U, /*!< Card is in identification state */ |
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92 HAL_SD_CARD_STANDBY = 0x00000003U, /*!< Card is in standby state */ |
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93 HAL_SD_CARD_TRANSFER = 0x00000004U, /*!< Card is in transfer state */ |
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94 HAL_SD_CARD_SENDING = 0x00000005U, /*!< Card is sending an operation */ |
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95 HAL_SD_CARD_RECEIVING = 0x00000006U, /*!< Card is receiving operation information */ |
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96 HAL_SD_CARD_PROGRAMMING = 0x00000007U, /*!< Card is in programming state */ |
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97 HAL_SD_CARD_DISCONNECTED = 0x00000008U, /*!< Card is disconnected */ |
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98 HAL_SD_CARD_ERROR = 0x000000FFU /*!< Card response Error */ |
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99 }HAL_SD_CardStateTypeDef; |
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100 /** |
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101 * @} |
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102 */ |
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103 |
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104 /** @defgroup SD_Exported_Types_Group3 SD Handle Structure definition |
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105 * @{ |
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106 */ |
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107 #define SD_InitTypeDef SDIO_InitTypeDef |
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108 #define SD_TypeDef SDIO_TypeDef |
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109 |
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110 /** |
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111 * @brief SD Card Information Structure definition |
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112 */ |
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113 typedef struct |
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114 { |
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115 uint32_t CardType; /*!< Specifies the card Type */ |
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116 |
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117 uint32_t CardVersion; /*!< Specifies the card version */ |
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118 |
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119 uint32_t Class; /*!< Specifies the class of the card class */ |
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120 |
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121 uint32_t RelCardAdd; /*!< Specifies the Relative Card Address */ |
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122 |
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123 uint32_t BlockNbr; /*!< Specifies the Card Capacity in blocks */ |
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124 |
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125 uint32_t BlockSize; /*!< Specifies one block size in bytes */ |
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126 |
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127 uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks */ |
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128 |
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129 uint32_t LogBlockSize; /*!< Specifies logical block size in bytes */ |
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130 |
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131 }HAL_SD_CardInfoTypeDef; |
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132 |
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133 /** |
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134 * @brief SD handle Structure definition |
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135 */ |
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136 typedef struct |
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137 { |
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138 SD_TypeDef *Instance; /*!< SD registers base address */ |
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139 |
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140 SD_InitTypeDef Init; /*!< SD required parameters */ |
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141 |
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142 HAL_LockTypeDef Lock; /*!< SD locking object */ |
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143 |
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144 uint32_t *pTxBuffPtr; /*!< Pointer to SD Tx transfer Buffer */ |
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145 |
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146 uint32_t TxXferSize; /*!< SD Tx Transfer size */ |
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147 |
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148 uint32_t *pRxBuffPtr; /*!< Pointer to SD Rx transfer Buffer */ |
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149 |
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150 uint32_t RxXferSize; /*!< SD Rx Transfer size */ |
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151 |
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152 __IO uint32_t Context; /*!< SD transfer context */ |
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153 |
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154 __IO HAL_SD_StateTypeDef State; /*!< SD card State */ |
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155 |
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156 __IO uint32_t ErrorCode; /*!< SD Card Error codes */ |
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157 |
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158 DMA_HandleTypeDef *hdmarx; /*!< SD Rx DMA handle parameters */ |
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159 |
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160 DMA_HandleTypeDef *hdmatx; /*!< SD Tx DMA handle parameters */ |
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161 |
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162 HAL_SD_CardInfoTypeDef SdCard; /*!< SD Card information */ |
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163 |
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164 uint32_t CSD[4]; /*!< SD card specific data table */ |
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165 |
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166 uint32_t CID[4]; /*!< SD card identification number table */ |
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167 |
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168 }SD_HandleTypeDef; |
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169 |
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170 /** |
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171 * @} |
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172 */ |
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173 |
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174 /** @defgroup SD_Exported_Types_Group4 Card Specific Data: CSD Register |
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175 * @{ |
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176 */ |
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177 typedef struct |
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178 { |
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179 __IO uint8_t CSDStruct; /*!< CSD structure */ |
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180 __IO uint8_t SysSpecVersion; /*!< System specification version */ |
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181 __IO uint8_t Reserved1; /*!< Reserved */ |
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182 __IO uint8_t TAAC; /*!< Data read access time 1 */ |
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183 __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */ |
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184 __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */ |
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185 __IO uint16_t CardComdClasses; /*!< Card command classes */ |
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186 __IO uint8_t RdBlockLen; /*!< Max. read data block length */ |
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187 __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */ |
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188 __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */ |
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189 __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */ |
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190 __IO uint8_t DSRImpl; /*!< DSR implemented */ |
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191 __IO uint8_t Reserved2; /*!< Reserved */ |
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192 __IO uint32_t DeviceSize; /*!< Device Size */ |
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193 __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */ |
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194 __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */ |
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195 __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */ |
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196 __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */ |
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197 __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */ |
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198 __IO uint8_t EraseGrSize; /*!< Erase group size */ |
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199 __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */ |
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200 __IO uint8_t WrProtectGrSize; /*!< Write protect group size */ |
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201 __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */ |
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202 __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */ |
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203 __IO uint8_t WrSpeedFact; /*!< Write speed factor */ |
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204 __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */ |
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205 __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */ |
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206 __IO uint8_t Reserved3; /*!< Reserved */ |
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207 __IO uint8_t ContentProtectAppli; /*!< Content protection application */ |
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208 __IO uint8_t FileFormatGrouop; /*!< File format group */ |
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209 __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */ |
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210 __IO uint8_t PermWrProtect; /*!< Permanent write protection */ |
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211 __IO uint8_t TempWrProtect; /*!< Temporary write protection */ |
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212 __IO uint8_t FileFormat; /*!< File format */ |
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213 __IO uint8_t ECC; /*!< ECC code */ |
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214 __IO uint8_t CSD_CRC; /*!< CSD CRC */ |
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215 __IO uint8_t Reserved4; /*!< Always 1 */ |
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216 |
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217 }HAL_SD_CardCSDTypeDef; |
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218 /** |
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219 * @} |
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220 */ |
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221 |
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222 /** @defgroup SD_Exported_Types_Group5 Card Identification Data: CID Register |
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223 * @{ |
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224 */ |
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225 typedef struct |
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226 { |
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227 __IO uint8_t ManufacturerID; /*!< Manufacturer ID */ |
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228 __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */ |
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229 __IO uint32_t ProdName1; /*!< Product Name part1 */ |
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230 __IO uint8_t ProdName2; /*!< Product Name part2 */ |
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231 __IO uint8_t ProdRev; /*!< Product Revision */ |
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232 __IO uint32_t ProdSN; /*!< Product Serial Number */ |
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233 __IO uint8_t Reserved1; /*!< Reserved1 */ |
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234 __IO uint16_t ManufactDate; /*!< Manufacturing Date */ |
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235 __IO uint8_t CID_CRC; /*!< CID CRC */ |
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236 __IO uint8_t Reserved2; /*!< Always 1 */ |
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237 |
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238 }HAL_SD_CardCIDTypeDef; |
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239 /** |
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240 * @} |
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241 */ |
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242 |
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243 /** @defgroup SD_Exported_Types_Group6 SD Card Status returned by ACMD13 |
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244 * @{ |
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245 */ |
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246 typedef struct |
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247 { |
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248 __IO uint8_t DataBusWidth; /*!< Shows the currently defined data bus width */ |
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249 __IO uint8_t SecuredMode; /*!< Card is in secured mode of operation */ |
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250 __IO uint16_t CardType; /*!< Carries information about card type */ |
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251 __IO uint32_t ProtectedAreaSize; /*!< Carries information about the capacity of protected area */ |
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252 __IO uint8_t SpeedClass; /*!< Carries information about the speed class of the card */ |
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253 __IO uint8_t PerformanceMove; /*!< Carries information about the card's performance move */ |
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254 __IO uint8_t AllocationUnitSize; /*!< Carries information about the card's allocation unit size */ |
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255 __IO uint16_t EraseSize; /*!< Determines the number of AUs to be erased in one operation */ |
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256 __IO uint8_t EraseTimeout; /*!< Determines the timeout for any number of AU erase */ |
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257 __IO uint8_t EraseOffset; /*!< Carries information about the erase offset */ |
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258 |
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259 }HAL_SD_CardStatusTypeDef; |
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260 /** |
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261 * @} |
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262 */ |
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263 |
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264 /** |
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265 * @} |
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266 */ |
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267 |
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268 /* Exported constants --------------------------------------------------------*/ |
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269 /** @defgroup SD_Exported_Constants Exported Constants |
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270 * @{ |
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271 */ |
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272 |
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273 #define BLOCKSIZE 512U /*!< Block size is 512 bytes */ |
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274 |
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275 /** @defgroup SD_Exported_Constansts_Group1 SD Error status enumeration Structure definition |
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276 * @{ |
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277 */ |
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278 #define HAL_SD_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */ |
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279 #define HAL_SD_ERROR_CMD_CRC_FAIL SDMMC_ERROR_CMD_CRC_FAIL /*!< Command response received (but CRC check failed) */ |
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280 #define HAL_SD_ERROR_DATA_CRC_FAIL SDMMC_ERROR_DATA_CRC_FAIL /*!< Data block sent/received (CRC check failed) */ |
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281 #define HAL_SD_ERROR_CMD_RSP_TIMEOUT SDMMC_ERROR_CMD_RSP_TIMEOUT /*!< Command response timeout */ |
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282 #define HAL_SD_ERROR_DATA_TIMEOUT SDMMC_ERROR_DATA_TIMEOUT /*!< Data timeout */ |
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283 #define HAL_SD_ERROR_TX_UNDERRUN SDMMC_ERROR_TX_UNDERRUN /*!< Transmit FIFO underrun */ |
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284 #define HAL_SD_ERROR_RX_OVERRUN SDMMC_ERROR_RX_OVERRUN /*!< Receive FIFO overrun */ |
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285 #define HAL_SD_ERROR_ADDR_MISALIGNED SDMMC_ERROR_ADDR_MISALIGNED /*!< Misaligned address */ |
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286 #define HAL_SD_ERROR_BLOCK_LEN_ERR SDMMC_ERROR_BLOCK_LEN_ERR /*!< Transferred block length is not allowed for the card or the |
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287 number of transferred bytes does not match the block length */ |
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288 #define HAL_SD_ERROR_ERASE_SEQ_ERR SDMMC_ERROR_ERASE_SEQ_ERR /*!< An error in the sequence of erase command occurs */ |
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289 #define HAL_SD_ERROR_BAD_ERASE_PARAM SDMMC_ERROR_BAD_ERASE_PARAM /*!< An invalid selection for erase groups */ |
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290 #define HAL_SD_ERROR_WRITE_PROT_VIOLATION SDMMC_ERROR_WRITE_PROT_VIOLATION /*!< Attempt to program a write protect block */ |
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291 #define HAL_SD_ERROR_LOCK_UNLOCK_FAILED SDMMC_ERROR_LOCK_UNLOCK_FAILED /*!< Sequence or password error has been detected in unlock |
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292 command or if there was an attempt to access a locked card */ |
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293 #define HAL_SD_ERROR_COM_CRC_FAILED SDMMC_ERROR_COM_CRC_FAILED /*!< CRC check of the previous command failed */ |
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294 #define HAL_SD_ERROR_ILLEGAL_CMD SDMMC_ERROR_ILLEGAL_CMD /*!< Command is not legal for the card state */ |
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295 #define HAL_SD_ERROR_CARD_ECC_FAILED SDMMC_ERROR_CARD_ECC_FAILED /*!< Card internal ECC was applied but failed to correct the data */ |
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296 #define HAL_SD_ERROR_CC_ERR SDMMC_ERROR_CC_ERR /*!< Internal card controller error */ |
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297 #define HAL_SD_ERROR_GENERAL_UNKNOWN_ERR SDMMC_ERROR_GENERAL_UNKNOWN_ERR /*!< General or unknown error */ |
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298 #define HAL_SD_ERROR_STREAM_READ_UNDERRUN SDMMC_ERROR_STREAM_READ_UNDERRUN /*!< The card could not sustain data reading in stream rmode */ |
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299 #define HAL_SD_ERROR_STREAM_WRITE_OVERRUN SDMMC_ERROR_STREAM_WRITE_OVERRUN /*!< The card could not sustain data programming in stream mode */ |
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300 #define HAL_SD_ERROR_CID_CSD_OVERWRITE SDMMC_ERROR_CID_CSD_OVERWRITE /*!< CID/CSD overwrite error */ |
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301 #define HAL_SD_ERROR_WP_ERASE_SKIP SDMMC_ERROR_WP_ERASE_SKIP /*!< Only partial address space was erased */ |
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302 #define HAL_SD_ERROR_CARD_ECC_DISABLED SDMMC_ERROR_CARD_ECC_DISABLED /*!< Command has been executed without using internal ECC */ |
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303 #define HAL_SD_ERROR_ERASE_RESET SDMMC_ERROR_ERASE_RESET /*!< Erase sequence was cleared before executing because an out |
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304 of erase sequence command was received */ |
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305 #define HAL_SD_ERROR_AKE_SEQ_ERR SDMMC_ERROR_AKE_SEQ_ERR /*!< Error in sequence of authentication */ |
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306 #define HAL_SD_ERROR_INVALID_VOLTRANGE SDMMC_ERROR_INVALID_VOLTRANGE /*!< Error in case of invalid voltage range */ |
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307 #define HAL_SD_ERROR_ADDR_OUT_OF_RANGE SDMMC_ERROR_ADDR_OUT_OF_RANGE /*!< Error when addressed block is out of range */ |
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308 #define HAL_SD_ERROR_REQUEST_NOT_APPLICABLE SDMMC_ERROR_REQUEST_NOT_APPLICABLE /*!< Error when command request is not applicable */ |
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309 #define HAL_SD_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */ |
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310 #define HAL_SD_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */ |
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311 #define HAL_SD_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */ |
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312 #define HAL_SD_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */ |
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313 #define HAL_SD_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */ |
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314 |
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315 /** |
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316 * @} |
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317 */ |
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318 |
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319 /** @defgroup SD_Exported_Constansts_Group2 SD context enumeration |
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320 * @{ |
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321 */ |
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322 #define SD_CONTEXT_NONE 0x00000000U /*!< None */ |
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323 #define SD_CONTEXT_READ_SINGLE_BLOCK 0x00000001U /*!< Read single block operation */ |
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324 #define SD_CONTEXT_READ_MULTIPLE_BLOCK 0x00000002U /*!< Read multiple blocks operation */ |
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325 #define SD_CONTEXT_WRITE_SINGLE_BLOCK 0x00000010U /*!< Write single block operation */ |
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326 #define SD_CONTEXT_WRITE_MULTIPLE_BLOCK 0x00000020U /*!< Write multiple blocks operation */ |
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327 #define SD_CONTEXT_IT 0x00000008U /*!< Process in Interrupt mode */ |
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328 #define SD_CONTEXT_DMA 0x00000080U /*!< Process in DMA mode */ |
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329 |
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330 /** |
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331 * @} |
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332 */ |
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333 |
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334 /** @defgroup SD_Exported_Constansts_Group3 SD Supported Memory Cards |
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335 * @{ |
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336 */ |
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337 #define CARD_SDSC 0x00000000U |
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338 #define CARD_SDHC_SDXC 0x00000001U |
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339 #define CARD_SECURED 0x00000003U |
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340 |
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341 /** |
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342 * @} |
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343 */ |
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344 |
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345 /** @defgroup SD_Exported_Constansts_Group4 SD Supported Version |
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346 * @{ |
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347 */ |
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348 #define CARD_V1_X 0x00000000U |
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349 #define CARD_V2_X 0x00000001U |
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350 /** |
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351 * @} |
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352 */ |
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353 |
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354 /** |
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355 * @} |
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356 */ |
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357 |
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358 /* Exported macro ------------------------------------------------------------*/ |
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359 /** @defgroup SD_Exported_macros SD Exported Macros |
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360 * @brief macros to handle interrupts and specific clock configurations |
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361 * @{ |
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362 */ |
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363 |
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364 /** |
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365 * @brief Enable the SD device. |
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366 * @retval None |
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367 */ |
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368 #define __HAL_SD_ENABLE(__HANDLE__) __SDIO_ENABLE((__HANDLE__)->Instance) |
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369 |
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370 /** |
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371 * @brief Disable the SD device. |
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372 * @retval None |
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373 */ |
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374 #define __HAL_SD_DISABLE(__HANDLE__) __SDIO_DISABLE((__HANDLE__)->Instance) |
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375 |
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376 /** |
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377 * @brief Enable the SDMMC DMA transfer. |
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378 * @retval None |
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379 */ |
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380 #define __HAL_SD_DMA_ENABLE(__HANDLE__) __SDIO_DMA_ENABLE((__HANDLE__)->Instance) |
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381 |
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382 /** |
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383 * @brief Disable the SDMMC DMA transfer. |
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384 * @retval None |
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385 */ |
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386 #define __HAL_SD_DMA_DISABLE(__HANDLE__) __SDIO_DMA_DISABLE((__HANDLE__)->Instance) |
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387 |
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388 /** |
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389 * @brief Enable the SD device interrupt. |
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390 * @param __HANDLE__ SD Handle |
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391 * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be enabled. |
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392 * This parameter can be one or a combination of the following values: |
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393 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
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394 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
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395 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
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396 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
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397 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
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398 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
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399 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
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400 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
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401 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt |
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402 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
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403 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
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404 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
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405 * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
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406 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
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407 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt |
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408 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt |
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409 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
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410 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
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411 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
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412 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
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413 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
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414 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
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415 * @retval None |
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416 */ |
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417 #define __HAL_SD_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
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418 |
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419 /** |
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420 * @brief Disable the SD device interrupt. |
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421 * @param __HANDLE__ SD Handle |
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422 * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be disabled. |
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423 * This parameter can be one or a combination of the following values: |
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424 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
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425 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
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426 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
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427 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
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428 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
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429 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
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430 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
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431 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
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432 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt |
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433 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
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434 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
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435 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
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436 * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
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437 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
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438 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt |
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439 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt |
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440 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
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441 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
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442 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
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443 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
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444 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
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445 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
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446 * @retval None |
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447 */ |
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448 #define __HAL_SD_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
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449 |
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450 /** |
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451 * @brief Check whether the specified SD flag is set or not. |
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452 * @param __HANDLE__ SD Handle |
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453 * @param __FLAG__ specifies the flag to check. |
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454 * This parameter can be one of the following values: |
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455 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed) |
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456 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) |
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457 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout |
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458 * @arg SDIO_FLAG_DTIMEOUT: Data timeout |
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459 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error |
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460 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error |
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461 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) |
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462 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) |
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463 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero) |
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464 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) |
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465 * @arg SDIO_FLAG_CMDACT: Command transfer in progress |
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466 * @arg SDIO_FLAG_TXACT: Data transmit in progress |
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467 * @arg SDIO_FLAG_RXACT: Data receive in progress |
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468 * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty |
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469 * @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full |
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470 * @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full |
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471 * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full |
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472 * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty |
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473 * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty |
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474 * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO |
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475 * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO |
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476 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received |
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477 * @retval The new state of SD FLAG (SET or RESET). |
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478 */ |
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479 #define __HAL_SD_GET_FLAG(__HANDLE__, __FLAG__) __SDIO_GET_FLAG((__HANDLE__)->Instance, (__FLAG__)) |
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480 |
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481 /** |
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482 * @brief Clear the SD's pending flags. |
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483 * @param __HANDLE__ SD Handle |
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484 * @param __FLAG__ specifies the flag to clear. |
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485 * This parameter can be one or a combination of the following values: |
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486 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed) |
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487 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) |
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488 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout |
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489 * @arg SDIO_FLAG_DTIMEOUT: Data timeout |
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490 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error |
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491 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error |
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492 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) |
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493 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) |
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494 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero) |
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495 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) |
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496 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received |
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497 * @retval None |
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498 */ |
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499 #define __HAL_SD_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDIO_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__)) |
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500 |
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501 /** |
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502 * @brief Check whether the specified SD interrupt has occurred or not. |
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503 * @param __HANDLE__ SD Handle |
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504 * @param __INTERRUPT__ specifies the SDMMC interrupt source to check. |
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505 * This parameter can be one of the following values: |
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506 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
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507 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
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508 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
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509 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
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510 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
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511 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
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512 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
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513 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
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514 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt |
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515 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
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516 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
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517 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
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518 * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
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519 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
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520 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt |
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521 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt |
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522 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
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523 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
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524 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
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525 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
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526 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
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527 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
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528 * @retval The new state of SD IT (SET or RESET). |
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529 */ |
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530 #define __HAL_SD_GET_IT(__HANDLE__, __INTERRUPT__) __SDIO_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
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531 |
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532 /** |
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533 * @brief Clear the SD's interrupt pending bits. |
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534 * @param __HANDLE__ SD Handle |
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535 * @param __INTERRUPT__ specifies the interrupt pending bit to clear. |
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536 * This parameter can be one or a combination of the following values: |
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537 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
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538 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
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539 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
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540 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
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541 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
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542 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
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543 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
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544 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
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545 * @arg SDIO_IT_DATAEND: Data end (data counter, SDMMC_DCOUNT, is zero) interrupt |
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546 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
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547 * @retval None |
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548 */ |
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549 #define __HAL_SD_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDIO_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
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550 |
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551 /** |
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552 * @} |
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553 */ |
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554 |
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555 /* Exported functions --------------------------------------------------------*/ |
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556 /** @defgroup SD_Exported_Functions SD Exported Functions |
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557 * @{ |
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558 */ |
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559 |
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560 /** @defgroup SD_Exported_Functions_Group1 Initialization and de-initialization functions |
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561 * @{ |
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562 */ |
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563 HAL_StatusTypeDef HAL_SD_Init(SD_HandleTypeDef *hsd); |
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564 HAL_StatusTypeDef HAL_SD_InitCard(SD_HandleTypeDef *hsd); |
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565 HAL_StatusTypeDef HAL_SD_DeInit (SD_HandleTypeDef *hsd); |
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566 void HAL_SD_MspInit(SD_HandleTypeDef *hsd); |
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567 void HAL_SD_MspDeInit(SD_HandleTypeDef *hsd); |
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568 /** |
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569 * @} |
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570 */ |
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571 |
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572 /** @defgroup SD_Exported_Functions_Group2 Input and Output operation functions |
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573 * @{ |
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574 */ |
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575 /* Blocking mode: Polling */ |
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576 HAL_StatusTypeDef HAL_SD_ReadBlocks(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout); |
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577 HAL_StatusTypeDef HAL_SD_WriteBlocks(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout); |
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578 HAL_StatusTypeDef HAL_SD_Erase(SD_HandleTypeDef *hsd, uint32_t BlockStartAdd, uint32_t BlockEndAdd); |
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579 /* Non-Blocking mode: IT */ |
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580 HAL_StatusTypeDef HAL_SD_ReadBlocks_IT(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); |
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581 HAL_StatusTypeDef HAL_SD_WriteBlocks_IT(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); |
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582 /* Non-Blocking mode: DMA */ |
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583 HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); |
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584 HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); |
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585 |
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586 void HAL_SD_IRQHandler(SD_HandleTypeDef *hsd); |
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587 |
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588 /* Callback in non blocking modes (DMA) */ |
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589 void HAL_SD_TxCpltCallback(SD_HandleTypeDef *hsd); |
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590 void HAL_SD_RxCpltCallback(SD_HandleTypeDef *hsd); |
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591 void HAL_SD_ErrorCallback(SD_HandleTypeDef *hsd); |
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592 void HAL_SD_AbortCallback(SD_HandleTypeDef *hsd); |
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593 /** |
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594 * @} |
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595 */ |
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596 |
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597 /** @defgroup SD_Exported_Functions_Group3 Peripheral Control functions |
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598 * @{ |
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599 */ |
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600 HAL_StatusTypeDef HAL_SD_ConfigWideBusOperation(SD_HandleTypeDef *hsd, uint32_t WideMode); |
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601 /** |
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602 * @} |
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603 */ |
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604 |
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605 /** @defgroup SD_Exported_Functions_Group4 SD card related functions |
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606 * @{ |
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607 */ |
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608 HAL_StatusTypeDef HAL_SD_SendSDStatus(SD_HandleTypeDef *hsd, uint32_t *pSDstatus); |
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609 HAL_SD_CardStateTypeDef HAL_SD_GetCardState(SD_HandleTypeDef *hsd); |
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610 HAL_StatusTypeDef HAL_SD_GetCardCID(SD_HandleTypeDef *hsd, HAL_SD_CardCIDTypeDef *pCID); |
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611 HAL_StatusTypeDef HAL_SD_GetCardCSD(SD_HandleTypeDef *hsd, HAL_SD_CardCSDTypeDef *pCSD); |
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612 HAL_StatusTypeDef HAL_SD_GetCardStatus(SD_HandleTypeDef *hsd, HAL_SD_CardStatusTypeDef *pStatus); |
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613 HAL_StatusTypeDef HAL_SD_GetCardInfo(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypeDef *pCardInfo); |
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614 /** |
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615 * @} |
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616 */ |
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617 |
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618 /** @defgroup SD_Exported_Functions_Group5 Peripheral State and Errors functions |
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619 * @{ |
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620 */ |
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621 HAL_SD_StateTypeDef HAL_SD_GetState(SD_HandleTypeDef *hsd); |
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622 uint32_t HAL_SD_GetError(SD_HandleTypeDef *hsd); |
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623 /** |
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624 * @} |
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625 */ |
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626 |
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627 /** @defgroup SD_Exported_Functions_Group6 Perioheral Abort management |
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628 * @{ |
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629 */ |
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630 HAL_StatusTypeDef HAL_SD_Abort(SD_HandleTypeDef *hsd); |
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631 HAL_StatusTypeDef HAL_SD_Abort_IT(SD_HandleTypeDef *hsd); |
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632 /** |
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633 * @} |
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634 */ |
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635 |
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636 /* Private types -------------------------------------------------------------*/ |
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637 /** @defgroup SD_Private_Types SD Private Types |
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638 * @{ |
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639 */ |
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640 |
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641 /** |
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642 * @} |
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643 */ |
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644 |
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645 /* Private defines -----------------------------------------------------------*/ |
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646 /** @defgroup SD_Private_Defines SD Private Defines |
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647 * @{ |
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648 */ |
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649 |
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650 /** |
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651 * @} |
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652 */ |
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653 |
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654 /* Private variables ---------------------------------------------------------*/ |
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655 /** @defgroup SD_Private_Variables SD Private Variables |
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656 * @{ |
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657 */ |
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658 |
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659 /** |
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660 * @} |
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661 */ |
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662 |
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663 /* Private constants ---------------------------------------------------------*/ |
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664 /** @defgroup SD_Private_Constants SD Private Constants |
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665 * @{ |
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666 */ |
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667 |
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668 /** |
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669 * @} |
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670 */ |
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671 |
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672 /* Private macros ------------------------------------------------------------*/ |
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673 /** @defgroup SD_Private_Macros SD Private Macros |
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674 * @{ |
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675 */ |
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676 |
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677 /** |
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678 * @} |
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679 */ |
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680 |
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681 /* Private functions prototypes ----------------------------------------------*/ |
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682 /** @defgroup SD_Private_Functions_Prototypes SD Private Functions Prototypes |
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683 * @{ |
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684 */ |
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685 |
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686 /** |
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687 * @} |
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688 */ |
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689 |
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690 /* Private functions ---------------------------------------------------------*/ |
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691 /** @defgroup SD_Private_Functions SD Private Functions |
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692 * @{ |
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693 */ |
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694 |
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695 /** |
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696 * @} |
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697 */ |
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698 |
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699 |
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700 /** |
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701 * @} |
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702 */ |
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703 |
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704 /** |
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705 * @} |
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706 */ |
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707 |
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708 /** |
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709 * @} |
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710 */ |
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711 |
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712 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || |
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713 STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx || |
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714 STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */ |
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715 |
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716 #ifdef __cplusplus |
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717 } |
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718 #endif |
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719 |
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720 |
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721 #endif /* __STM32F4xx_HAL_SD_H */ |
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722 |
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723 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |