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annotate Common/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_rng.h @ 311:ddbe8bed5096 cleanup-4

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bugfix: make stopwatch and divetime run in sync And this shows the fundamental issue in the difference between dive time and stopwatch time. The dive time is constructed on the RTE, and rather independently, the stopwatch time is constructed on CPU1. This works rather well, but not perfect. This commit fixes things in a relatively straightforward way. Instead of incrementing the stopwatch locally on CPU1, simply use the same time data that is coming from the RTE. Some logic was added to make this stopwatch resettable again. Signed-off-by: Jan Mulder <jlmulder@xs4all.nl>
author Jan Mulder <jlmulder@xs4all.nl>
date Wed, 29 May 2019 14:02:27 +0200
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1 /**
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2 ******************************************************************************
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3 * @file stm32f4xx_ll_rng.h
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4 * @author MCD Application Team
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5 * @brief Header file of RNG LL module.
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6 ******************************************************************************
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7 * @attention
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8 *
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9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
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10 *
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11 * Redistribution and use in source and binary forms, with or without modification,
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12 * are permitted provided that the following conditions are met:
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13 * 1. Redistributions of source code must retain the above copyright notice,
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14 * this list of conditions and the following disclaimer.
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15 * 2. Redistributions in binary form must reproduce the above copyright notice,
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16 * this list of conditions and the following disclaimer in the documentation
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17 * and/or other materials provided with the distribution.
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18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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19 * may be used to endorse or promote products derived from this software
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20 * without specific prior written permission.
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21 *
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22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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32 *
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33 ******************************************************************************
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34 */
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35
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36 /* Define to prevent recursive inclusion -------------------------------------*/
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37 #ifndef __STM32F4xx_LL_RNG_H
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38 #define __STM32F4xx_LL_RNG_H
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39
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40 #ifdef __cplusplus
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41 extern "C" {
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42 #endif
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43
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44 /* Includes ------------------------------------------------------------------*/
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45 #include "stm32f4xx.h"
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46
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47 /** @addtogroup STM32F4xx_LL_Driver
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48 * @{
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49 */
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50
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51 #if defined(RNG)
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52
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53 /** @defgroup RNG_LL RNG
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54 * @{
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55 */
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56
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57 /* Private types -------------------------------------------------------------*/
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58 /* Private variables ---------------------------------------------------------*/
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59 /* Private constants ---------------------------------------------------------*/
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60 /* Private macros ------------------------------------------------------------*/
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61
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62 /* Exported types ------------------------------------------------------------*/
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63 /* Exported constants --------------------------------------------------------*/
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64 /** @defgroup RNG_LL_Exported_Constants RNG Exported Constants
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65 * @{
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66 */
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67
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68 /** @defgroup RNG_LL_EC_GET_FLAG Get Flags Defines
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69 * @brief Flags defines which can be used with LL_RNG_ReadReg function
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70 * @{
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71 */
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72 #define LL_RNG_SR_DRDY RNG_SR_DRDY /*!< Register contains valid random data */
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73 #define LL_RNG_SR_CECS RNG_SR_CECS /*!< Clock error current status */
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74 #define LL_RNG_SR_SECS RNG_SR_SECS /*!< Seed error current status */
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75 #define LL_RNG_SR_CEIS RNG_SR_CEIS /*!< Clock error interrupt status */
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76 #define LL_RNG_SR_SEIS RNG_SR_SEIS /*!< Seed error interrupt status */
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77 /**
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78 * @}
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79 */
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80
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81 /** @defgroup RNG_LL_EC_IT IT Defines
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82 * @brief IT defines which can be used with LL_RNG_ReadReg and LL_RNG_WriteReg macros
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83 * @{
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84 */
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85 #define LL_RNG_CR_IE RNG_CR_IE /*!< RNG Interrupt enable */
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86 /**
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87 * @}
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88 */
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89
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90 /**
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91 * @}
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92 */
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93
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94 /* Exported macro ------------------------------------------------------------*/
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95 /** @defgroup RNG_LL_Exported_Macros RNG Exported Macros
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96 * @{
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97 */
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98
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99 /** @defgroup RNG_LL_EM_WRITE_READ Common Write and read registers Macros
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100 * @{
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101 */
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102
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103 /**
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104 * @brief Write a value in RNG register
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105 * @param __INSTANCE__ RNG Instance
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106 * @param __REG__ Register to be written
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107 * @param __VALUE__ Value to be written in the register
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108 * @retval None
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109 */
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110 #define LL_RNG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
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111
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112 /**
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113 * @brief Read a value in RNG register
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114 * @param __INSTANCE__ RNG Instance
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115 * @param __REG__ Register to be read
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116 * @retval Register value
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117 */
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118 #define LL_RNG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
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119 /**
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120 * @}
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121 */
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122
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123 /**
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124 * @}
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125 */
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126
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127
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128 /* Exported functions --------------------------------------------------------*/
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129 /** @defgroup RNG_LL_Exported_Functions RNG Exported Functions
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130 * @{
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131 */
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132 /** @defgroup RNG_LL_EF_Configuration RNG Configuration functions
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133 * @{
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134 */
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135
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136 /**
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137 * @brief Enable Random Number Generation
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138 * @rmtoll CR RNGEN LL_RNG_Enable
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139 * @param RNGx RNG Instance
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140 * @retval None
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141 */
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142 __STATIC_INLINE void LL_RNG_Enable(RNG_TypeDef *RNGx)
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143 {
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144 SET_BIT(RNGx->CR, RNG_CR_RNGEN);
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145 }
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146
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147 /**
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148 * @brief Disable Random Number Generation
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149 * @rmtoll CR RNGEN LL_RNG_Disable
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150 * @param RNGx RNG Instance
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151 * @retval None
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152 */
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153 __STATIC_INLINE void LL_RNG_Disable(RNG_TypeDef *RNGx)
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154 {
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155 CLEAR_BIT(RNGx->CR, RNG_CR_RNGEN);
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156 }
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157
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158 /**
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159 * @brief Check if Random Number Generator is enabled
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160 * @rmtoll CR RNGEN LL_RNG_IsEnabled
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161 * @param RNGx RNG Instance
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162 * @retval State of bit (1 or 0).
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163 */
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164 __STATIC_INLINE uint32_t LL_RNG_IsEnabled(RNG_TypeDef *RNGx)
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165 {
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166 return (READ_BIT(RNGx->CR, RNG_CR_RNGEN) == (RNG_CR_RNGEN));
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167 }
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168
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169 /**
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170 * @}
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171 */
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172
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173 /** @defgroup RNG_LL_EF_FLAG_Management FLAG Management
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174 * @{
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175 */
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176
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177 /**
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178 * @brief Indicate if the RNG Data ready Flag is set or not
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179 * @rmtoll SR DRDY LL_RNG_IsActiveFlag_DRDY
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180 * @param RNGx RNG Instance
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181 * @retval State of bit (1 or 0).
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182 */
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183 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_DRDY(RNG_TypeDef *RNGx)
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184 {
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185 return (READ_BIT(RNGx->SR, RNG_SR_DRDY) == (RNG_SR_DRDY));
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186 }
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187
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188 /**
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189 * @brief Indicate if the Clock Error Current Status Flag is set or not
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190 * @rmtoll SR CECS LL_RNG_IsActiveFlag_CECS
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191 * @param RNGx RNG Instance
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192 * @retval State of bit (1 or 0).
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193 */
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194 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CECS(RNG_TypeDef *RNGx)
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195 {
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196 return (READ_BIT(RNGx->SR, RNG_SR_CECS) == (RNG_SR_CECS));
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197 }
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198
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199 /**
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200 * @brief Indicate if the Seed Error Current Status Flag is set or not
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201 * @rmtoll SR SECS LL_RNG_IsActiveFlag_SECS
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202 * @param RNGx RNG Instance
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203 * @retval State of bit (1 or 0).
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204 */
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205 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SECS(RNG_TypeDef *RNGx)
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206 {
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207 return (READ_BIT(RNGx->SR, RNG_SR_SECS) == (RNG_SR_SECS));
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208 }
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209
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210 /**
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211 * @brief Indicate if the Clock Error Interrupt Status Flag is set or not
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212 * @rmtoll SR CEIS LL_RNG_IsActiveFlag_CEIS
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213 * @param RNGx RNG Instance
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214 * @retval State of bit (1 or 0).
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215 */
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216 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CEIS(RNG_TypeDef *RNGx)
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217 {
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218 return (READ_BIT(RNGx->SR, RNG_SR_CEIS) == (RNG_SR_CEIS));
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219 }
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220
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221 /**
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222 * @brief Indicate if the Seed Error Interrupt Status Flag is set or not
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223 * @rmtoll SR SEIS LL_RNG_IsActiveFlag_SEIS
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224 * @param RNGx RNG Instance
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225 * @retval State of bit (1 or 0).
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226 */
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227 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SEIS(RNG_TypeDef *RNGx)
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228 {
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229 return (READ_BIT(RNGx->SR, RNG_SR_SEIS) == (RNG_SR_SEIS));
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230 }
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231
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232 /**
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233 * @brief Clear Clock Error interrupt Status (CEIS) Flag
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234 * @rmtoll SR CEIS LL_RNG_ClearFlag_CEIS
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235 * @param RNGx RNG Instance
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236 * @retval None
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237 */
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238 __STATIC_INLINE void LL_RNG_ClearFlag_CEIS(RNG_TypeDef *RNGx)
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239 {
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240 WRITE_REG(RNGx->SR, ~RNG_SR_CEIS);
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241 }
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242
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243 /**
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244 * @brief Clear Seed Error interrupt Status (SEIS) Flag
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245 * @rmtoll SR SEIS LL_RNG_ClearFlag_SEIS
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246 * @param RNGx RNG Instance
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247 * @retval None
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248 */
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249 __STATIC_INLINE void LL_RNG_ClearFlag_SEIS(RNG_TypeDef *RNGx)
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250 {
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251 WRITE_REG(RNGx->SR, ~RNG_SR_SEIS);
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252 }
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253
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254 /**
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255 * @}
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256 */
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257
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258 /** @defgroup RNG_LL_EF_IT_Management IT Management
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259 * @{
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260 */
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261
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262 /**
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263 * @brief Enable Random Number Generator Interrupt
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264 * (applies for either Seed error, Clock Error or Data ready interrupts)
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265 * @rmtoll CR IE LL_RNG_EnableIT
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266 * @param RNGx RNG Instance
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267 * @retval None
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268 */
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269 __STATIC_INLINE void LL_RNG_EnableIT(RNG_TypeDef *RNGx)
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270 {
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271 SET_BIT(RNGx->CR, RNG_CR_IE);
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272 }
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273
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274 /**
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275 * @brief Disable Random Number Generator Interrupt
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276 * (applies for either Seed error, Clock Error or Data ready interrupts)
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277 * @rmtoll CR IE LL_RNG_DisableIT
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278 * @param RNGx RNG Instance
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279 * @retval None
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280 */
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281 __STATIC_INLINE void LL_RNG_DisableIT(RNG_TypeDef *RNGx)
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282 {
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283 CLEAR_BIT(RNGx->CR, RNG_CR_IE);
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284 }
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285
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286 /**
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287 * @brief Check if Random Number Generator Interrupt is enabled
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288 * (applies for either Seed error, Clock Error or Data ready interrupts)
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289 * @rmtoll CR IE LL_RNG_IsEnabledIT
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290 * @param RNGx RNG Instance
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291 * @retval State of bit (1 or 0).
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292 */
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293 __STATIC_INLINE uint32_t LL_RNG_IsEnabledIT(RNG_TypeDef *RNGx)
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294 {
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295 return (READ_BIT(RNGx->CR, RNG_CR_IE) == (RNG_CR_IE));
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296 }
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297
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298 /**
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299 * @}
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300 */
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301
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302 /** @defgroup RNG_LL_EF_Data_Management Data Management
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303 * @{
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304 */
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305
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306 /**
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307 * @brief Return32-bit Random Number value
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308 * @rmtoll DR RNDATA LL_RNG_ReadRandData32
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309 * @param RNGx RNG Instance
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310 * @retval Generated 32-bit random value
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311 */
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312 __STATIC_INLINE uint32_t LL_RNG_ReadRandData32(RNG_TypeDef *RNGx)
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313 {
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314 return (uint32_t)(READ_REG(RNGx->DR));
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315 }
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316
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317 /**
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318 * @}
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319 */
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320
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321 #if defined(USE_FULL_LL_DRIVER)
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322 /** @defgroup RNG_LL_EF_Init Initialization and de-initialization functions
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323 * @{
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324 */
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325
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326 ErrorStatus LL_RNG_DeInit(RNG_TypeDef *RNGx);
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327
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328 /**
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329 * @}
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330 */
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331 #endif /* USE_FULL_LL_DRIVER */
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332
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333 /**
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334 * @}
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335 */
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336
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337 /**
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338 * @}
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339 */
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340
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341 #endif /* defined(RNG) */
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342
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343 /**
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344 * @}
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345 */
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346
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347 #ifdef __cplusplus
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348 }
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349 #endif
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350
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351 #endif /* __STM32F4xx_LL_RNG_H */
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352
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353 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/