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annotate Common/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h @ 311:ddbe8bed5096 cleanup-4

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bugfix: make stopwatch and divetime run in sync And this shows the fundamental issue in the difference between dive time and stopwatch time. The dive time is constructed on the RTE, and rather independently, the stopwatch time is constructed on CPU1. This works rather well, but not perfect. This commit fixes things in a relatively straightforward way. Instead of incrementing the stopwatch locally on CPU1, simply use the same time data that is coming from the RTE. Some logic was added to make this stopwatch resettable again. Signed-off-by: Jan Mulder <jlmulder@xs4all.nl>
author Jan Mulder <jlmulder@xs4all.nl>
date Wed, 29 May 2019 14:02:27 +0200
parents c78bcbd5deda
children
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1 /**
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2 ******************************************************************************
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3 * @file stm32f4xx_hal_hcd.h
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4 * @author MCD Application Team
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5 * @brief Header file of HCD HAL module.
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6 ******************************************************************************
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7 * @attention
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8 *
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9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
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10 *
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11 * Redistribution and use in source and binary forms, with or without modification,
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12 * are permitted provided that the following conditions are met:
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13 * 1. Redistributions of source code must retain the above copyright notice,
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14 * this list of conditions and the following disclaimer.
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15 * 2. Redistributions in binary form must reproduce the above copyright notice,
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16 * this list of conditions and the following disclaimer in the documentation
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17 * and/or other materials provided with the distribution.
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18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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19 * may be used to endorse or promote products derived from this software
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20 * without specific prior written permission.
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21 *
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22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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32 *
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33 ******************************************************************************
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34 */
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35
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36 /* Define to prevent recursive inclusion -------------------------------------*/
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37 #ifndef __STM32F4xx_HAL_HCD_H
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38 #define __STM32F4xx_HAL_HCD_H
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39
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40 #ifdef __cplusplus
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41 extern "C" {
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42 #endif
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43 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
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44 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
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45 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \
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46 defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
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47 defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
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48 /* Includes ------------------------------------------------------------------*/
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49 #include "stm32f4xx_ll_usb.h"
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50
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51 /** @addtogroup STM32F4xx_HAL_Driver
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52 * @{
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53 */
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54
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55 /** @addtogroup HCD
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56 * @{
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57 */
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58
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59 /* Exported types ------------------------------------------------------------*/
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60 /** @defgroup HCD_Exported_Types HCD Exported Types
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61 * @{
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62 */
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63
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64 /** @defgroup HCD_Exported_Types_Group1 HCD State Structure definition
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65 * @{
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66 */
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67 typedef enum
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68 {
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69 HAL_HCD_STATE_RESET = 0x00U,
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70 HAL_HCD_STATE_READY = 0x01U,
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71 HAL_HCD_STATE_ERROR = 0x02U,
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72 HAL_HCD_STATE_BUSY = 0x03U,
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73 HAL_HCD_STATE_TIMEOUT = 0x04U
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74 } HCD_StateTypeDef;
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75
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76 typedef USB_OTG_GlobalTypeDef HCD_TypeDef;
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77 typedef USB_OTG_CfgTypeDef HCD_InitTypeDef;
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78 typedef USB_OTG_HCTypeDef HCD_HCTypeDef ;
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79 typedef USB_OTG_URBStateTypeDef HCD_URBStateTypeDef ;
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80 typedef USB_OTG_HCStateTypeDef HCD_HCStateTypeDef ;
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81 /**
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82 * @}
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83 */
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84
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85 /** @defgroup HCD_Exported_Types_Group2 HCD Handle Structure definition
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86 * @{
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87 */
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88 typedef struct
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89 {
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90 HCD_TypeDef *Instance; /*!< Register base address */
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91 HCD_InitTypeDef Init; /*!< HCD required parameters */
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92 HCD_HCTypeDef hc[15U]; /*!< Host channels parameters */
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93 HAL_LockTypeDef Lock; /*!< HCD peripheral status */
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94 __IO HCD_StateTypeDef State; /*!< HCD communication state */
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95 void *pData; /*!< Pointer Stack Handler */
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96 } HCD_HandleTypeDef;
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97 /**
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98 * @}
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99 */
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100
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101 /**
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102 * @}
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103 */
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104
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105 /* Exported constants --------------------------------------------------------*/
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106 /** @defgroup HCD_Exported_Constants HCD Exported Constants
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107 * @{
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108 */
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109
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110 /** @defgroup HCD_Speed HCD Speed
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111 * @{
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112 */
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113 #define HCD_SPEED_HIGH 0U
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114 #define HCD_SPEED_LOW 2U
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115 #define HCD_SPEED_FULL 3U
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116 /**
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117 * @}
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118 */
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119
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120 /** @defgroup HCD_PHY_Module HCD PHY Module
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121 * @{
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122 */
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123 #define HCD_PHY_ULPI 1U
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124 #define HCD_PHY_EMBEDDED 2U
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125 /**
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126 * @}
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127 */
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128
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129 /**
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130 * @}
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131 */
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132
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133 /* Exported macro ------------------------------------------------------------*/
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134 /** @defgroup HCD_Exported_Macros HCD Exported Macros
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135 * @brief macros to handle interrupts and specific clock configurations
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136 * @{
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137 */
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138 #define __HAL_HCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance)
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139 #define __HAL_HCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance)
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140
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141 #define __HAL_HCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
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142 #define __HAL_HCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) = (__INTERRUPT__))
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143 #define __HAL_HCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U)
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144
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145 #define __HAL_HCD_CLEAR_HC_INT(chnum, __INTERRUPT__) (USBx_HC(chnum)->HCINT = (__INTERRUPT__))
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146 #define __HAL_HCD_MASK_HALT_HC_INT(chnum) (USBx_HC(chnum)->HCINTMSK &= ~USB_OTG_HCINTMSK_CHHM)
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147 #define __HAL_HCD_UNMASK_HALT_HC_INT(chnum) (USBx_HC(chnum)->HCINTMSK |= USB_OTG_HCINTMSK_CHHM)
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148 #define __HAL_HCD_MASK_ACK_HC_INT(chnum) (USBx_HC(chnum)->HCINTMSK &= ~USB_OTG_HCINTMSK_ACKM)
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149 #define __HAL_HCD_UNMASK_ACK_HC_INT(chnum) (USBx_HC(chnum)->HCINTMSK |= USB_OTG_HCINTMSK_ACKM)
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150 /**
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151 * @}
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152 */
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153
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154 /* Exported functions --------------------------------------------------------*/
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155 /** @addtogroup HCD_Exported_Functions HCD Exported Functions
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156 * @{
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157 */
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158
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159 /* Initialization/de-initialization functions ********************************/
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160 /** @addtogroup HCD_Exported_Functions_Group1 Initialization and de-initialization functions
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161 * @{
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162 */
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163 HAL_StatusTypeDef HAL_HCD_Init(HCD_HandleTypeDef *hhcd);
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164 HAL_StatusTypeDef HAL_HCD_DeInit(HCD_HandleTypeDef *hhcd);
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165 HAL_StatusTypeDef HAL_HCD_HC_Init(HCD_HandleTypeDef *hhcd,
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166 uint8_t ch_num,
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167 uint8_t epnum,
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168 uint8_t dev_address,
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169 uint8_t speed,
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170 uint8_t ep_type,
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171 uint16_t mps);
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172
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173 HAL_StatusTypeDef HAL_HCD_HC_Halt(HCD_HandleTypeDef *hhcd, uint8_t ch_num);
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174
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175 void HAL_HCD_MspInit(HCD_HandleTypeDef *hhcd);
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176 void HAL_HCD_MspDeInit(HCD_HandleTypeDef *hhcd);
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177 /**
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178 * @}
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179 */
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180
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181 /* I/O operation functions ***************************************************/
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182 /** @addtogroup HCD_Exported_Functions_Group2 Input and Output operation functions
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183 * @{
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184 */
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185 HAL_StatusTypeDef HAL_HCD_HC_SubmitRequest(HCD_HandleTypeDef *hhcd,
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186 uint8_t ch_num,
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187 uint8_t direction,
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188 uint8_t ep_type,
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189 uint8_t token,
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190 uint8_t* pbuff,
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191 uint16_t length,
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192 uint8_t do_ping);
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193
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194 /* Non-Blocking mode: Interrupt */
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195 void HAL_HCD_IRQHandler(HCD_HandleTypeDef *hhcd);
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196 void HAL_HCD_SOF_Callback(HCD_HandleTypeDef *hhcd);
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197 void HAL_HCD_Connect_Callback(HCD_HandleTypeDef *hhcd);
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198 void HAL_HCD_Disconnect_Callback(HCD_HandleTypeDef *hhcd);
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199 void HAL_HCD_HC_NotifyURBChange_Callback(HCD_HandleTypeDef *hhcd,
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200 uint8_t chnum,
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201 HCD_URBStateTypeDef urb_state);
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202 /**
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203 * @}
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204 */
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205
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206 /* Peripheral Control functions **********************************************/
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207 /** @addtogroup HCD_Exported_Functions_Group3 Peripheral Control functions
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208 * @{
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209 */
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210 HAL_StatusTypeDef HAL_HCD_ResetPort(HCD_HandleTypeDef *hhcd);
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211 HAL_StatusTypeDef HAL_HCD_Start(HCD_HandleTypeDef *hhcd);
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212 HAL_StatusTypeDef HAL_HCD_Stop(HCD_HandleTypeDef *hhcd);
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213 /**
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214 * @}
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215 */
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216
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217 /* Peripheral State functions ************************************************/
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218 /** @addtogroup HCD_Exported_Functions_Group4 Peripheral State functions
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219 * @{
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220 */
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221 HCD_StateTypeDef HAL_HCD_GetState(HCD_HandleTypeDef *hhcd);
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222 HCD_URBStateTypeDef HAL_HCD_HC_GetURBState(HCD_HandleTypeDef *hhcd, uint8_t chnum);
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223 uint32_t HAL_HCD_HC_GetXferCount(HCD_HandleTypeDef *hhcd, uint8_t chnum);
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224 HCD_HCStateTypeDef HAL_HCD_HC_GetState(HCD_HandleTypeDef *hhcd, uint8_t chnum);
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225 uint32_t HAL_HCD_GetCurrentFrame(HCD_HandleTypeDef *hhcd);
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226 uint32_t HAL_HCD_GetCurrentSpeed(HCD_HandleTypeDef *hhcd);
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227 /**
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228 * @}
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229 */
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230
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231 /**
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232 * @}
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233 */
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234
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235 /* Private macros ------------------------------------------------------------*/
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236 /** @defgroup HCD_Private_Macros HCD Private Macros
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237 * @{
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238 */
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239
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240 /**
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241 * @}
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242 */
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243
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244 /**
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245 * @}
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246 */
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247
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248 /**
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249 * @}
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250 */
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251 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
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252 STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Rx ||
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253 STM32F412Vx || STM32F412Cx || defined(STM32F413xx) || defined(STM32F423xx) */
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254 #ifdef __cplusplus
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255 }
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256 #endif
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257
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258 #endif /* __STM32F4xx_HAL_HCD_H */
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259
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260 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/