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annotate Common/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fsmc.c @ 514:d9dbfa496f7e

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Properly send compass 3 into sleepmode (end-2019 hardware)
author heinrichsweikamp
date Wed, 16 Sep 2020 10:30:28 +0200
parents c78bcbd5deda
children
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1 /**
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2 ******************************************************************************
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3 * @file stm32f4xx_ll_fsmc.c
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4 * @author MCD Application Team
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5 * @brief FSMC Low Layer HAL module driver.
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6 *
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7 * This file provides firmware functions to manage the following
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8 * functionalities of the Flexible Static Memory Controller (FSMC) peripheral memories:
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9 * + Initialization/de-initialization functions
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10 * + Peripheral Control functions
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11 * + Peripheral State functions
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12 *
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13 @verbatim
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14 ==============================================================================
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15 ##### FSMC peripheral features #####
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16 ==============================================================================
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17 [..] The Flexible static memory controller (FSMC) includes two memory controllers:
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18 (+) The NOR/PSRAM memory controller
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19 (+) The NAND/PC Card memory controller
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20
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21 [..] The FSMC functional block makes the interface with synchronous and asynchronous static
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22 memories, SDRAM memories, and 16-bit PC memory cards. Its main purposes are:
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23 (+) to translate AHB transactions into the appropriate external device protocol.
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24 (+) to meet the access time requirements of the external memory devices.
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25
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26 [..] All external memories share the addresses, data and control signals with the controller.
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27 Each external device is accessed by means of a unique Chip Select. The FSMC performs
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28 only one access at a time to an external device.
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29 The main features of the FSMC controller are the following:
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30 (+) Interface with static-memory mapped devices including:
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31 (++) Static random access memory (SRAM).
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32 (++) Read-only memory (ROM).
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33 (++) NOR Flash memory/OneNAND Flash memory.
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34 (++) PSRAM (4 memory banks).
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35 (++) 16-bit PC Card compatible devices.
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36 (++) Two banks of NAND Flash memory with ECC hardware to check up to 8 Kbytes of
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37 data.
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38 (+) Independent Chip Select control for each memory bank.
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39 (+) Independent configuration for each memory bank.
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40
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41 @endverbatim
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42 ******************************************************************************
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43 * @attention
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44 *
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45 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
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46 *
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47 * Redistribution and use in source and binary forms, with or without modification,
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48 * are permitted provided that the following conditions are met:
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49 * 1. Redistributions of source code must retain the above copyright notice,
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50 * this list of conditions and the following disclaimer.
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51 * 2. Redistributions in binary form must reproduce the above copyright notice,
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52 * this list of conditions and the following disclaimer in the documentation
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53 * and/or other materials provided with the distribution.
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54 * 3. Neither the name of STMicroelectronics nor the names of its contributors
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55 * may be used to endorse or promote products derived from this software
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56 * without specific prior written permission.
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57 *
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58 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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59 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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60 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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61 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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62 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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63 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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64 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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65 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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66 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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67 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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68 *
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69 ******************************************************************************
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70 */
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71
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72 /* Includes ------------------------------------------------------------------*/
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73 #include "stm32f4xx_hal.h"
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74
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75 /** @addtogroup STM32F4xx_HAL_Driver
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76 * @{
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77 */
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78
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79 /** @defgroup FSMC_LL FSMC Low Layer
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80 * @brief FSMC driver modules
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81 * @{
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82 */
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83
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84 #if defined (HAL_SRAM_MODULE_ENABLED) || defined(HAL_NOR_MODULE_ENABLED) || defined(HAL_NAND_MODULE_ENABLED) || defined(HAL_PCCARD_MODULE_ENABLED)
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85 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F412Zx) ||\
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86 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F413xx) || defined(STM32F423xx)
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87 /* Private typedef -----------------------------------------------------------*/
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88 /* Private define ------------------------------------------------------------*/
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89 /* Private macro -------------------------------------------------------------*/
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90 /* Private variables ---------------------------------------------------------*/
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91 /* Private function prototypes -----------------------------------------------*/
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92 /* Private functions ---------------------------------------------------------*/
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93 /** @addtogroup FSMC_LL_Private_Functions
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94 * @{
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95 */
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96
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97 /** @addtogroup FSMC_LL_NORSRAM
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98 * @brief NORSRAM Controller functions
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99 *
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100 @verbatim
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101 ==============================================================================
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102 ##### How to use NORSRAM device driver #####
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103 ==============================================================================
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104
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105 [..]
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106 This driver contains a set of APIs to interface with the FSMC NORSRAM banks in order
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107 to run the NORSRAM external devices.
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108
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109 (+) FSMC NORSRAM bank reset using the function FSMC_NORSRAM_DeInit()
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110 (+) FSMC NORSRAM bank control configuration using the function FSMC_NORSRAM_Init()
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111 (+) FSMC NORSRAM bank timing configuration using the function FSMC_NORSRAM_Timing_Init()
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112 (+) FSMC NORSRAM bank extended timing configuration using the function
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113 FSMC_NORSRAM_Extended_Timing_Init()
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114 (+) FSMC NORSRAM bank enable/disable write operation using the functions
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115 FSMC_NORSRAM_WriteOperation_Enable()/FSMC_NORSRAM_WriteOperation_Disable()
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116
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117 @endverbatim
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118 * @{
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119 */
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120
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121 /** @addtogroup FSMC_LL_NORSRAM_Private_Functions_Group1
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122 * @brief Initialization and Configuration functions
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123 *
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124 @verbatim
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125 ==============================================================================
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126 ##### Initialization and de_initialization functions #####
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127 ==============================================================================
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128 [..]
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129 This section provides functions allowing to:
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130 (+) Initialize and configure the FSMC NORSRAM interface
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131 (+) De-initialize the FSMC NORSRAM interface
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132 (+) Configure the FSMC clock and associated GPIOs
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133
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134 @endverbatim
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135 * @{
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136 */
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137
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138 /**
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139 * @brief Initialize the FSMC_NORSRAM device according to the specified
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140 * control parameters in the FSMC_NORSRAM_InitTypeDef
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141 * @param Device Pointer to NORSRAM device instance
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142 * @param Init Pointer to NORSRAM Initialization structure
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143 * @retval HAL status
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144 */
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145 HAL_StatusTypeDef FSMC_NORSRAM_Init(FSMC_NORSRAM_TypeDef *Device, FSMC_NORSRAM_InitTypeDef* Init)
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146 {
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147 uint32_t tmpr = 0U;
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148
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149 /* Check the parameters */
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150 assert_param(IS_FSMC_NORSRAM_DEVICE(Device));
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151 assert_param(IS_FSMC_NORSRAM_BANK(Init->NSBank));
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152 assert_param(IS_FSMC_MUX(Init->DataAddressMux));
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153 assert_param(IS_FSMC_MEMORY(Init->MemoryType));
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154 assert_param(IS_FSMC_NORSRAM_MEMORY_WIDTH(Init->MemoryDataWidth));
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155 assert_param(IS_FSMC_BURSTMODE(Init->BurstAccessMode));
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156 assert_param(IS_FSMC_WAIT_POLARITY(Init->WaitSignalPolarity));
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157 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
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158 assert_param(IS_FSMC_WRAP_MODE(Init->WrapMode));
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159 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
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160 assert_param(IS_FSMC_WAIT_SIGNAL_ACTIVE(Init->WaitSignalActive));
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161 assert_param(IS_FSMC_WRITE_OPERATION(Init->WriteOperation));
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162 assert_param(IS_FSMC_WAITE_SIGNAL(Init->WaitSignal));
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163 assert_param(IS_FSMC_EXTENDED_MODE(Init->ExtendedMode));
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164 assert_param(IS_FSMC_ASYNWAIT(Init->AsynchronousWait));
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165 assert_param(IS_FSMC_WRITE_BURST(Init->WriteBurst));
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166 assert_param(IS_FSMC_PAGESIZE(Init->PageSize));
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167 #if defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F413xx) || defined(STM32F423xx)
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168 assert_param(IS_FSMC_WRITE_FIFO(Init->WriteFifo));
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169 assert_param(IS_FSMC_CONTINOUS_CLOCK(Init->ContinuousClock));
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170 #endif /* STM32F412Zx || STM32F412Vx || STM32F413xx || STM32F423xx */
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171
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172 /* Get the BTCR register value */
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173 tmpr = Device->BTCR[Init->NSBank];
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174
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175 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
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176 /* Clear MBKEN, MUXEN, MTYP, MWID, FACCEN, BURSTEN, WAITPOL, WRAPMOD, WAITCFG, WREN,
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177 WAITEN, EXTMOD, ASYNCWAIT, CPSIZE and CBURSTRW bits */
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178 tmpr &= ((uint32_t)~(FSMC_BCR1_MBKEN | FSMC_BCR1_MUXEN | FSMC_BCR1_MTYP | \
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179 FSMC_BCR1_MWID | FSMC_BCR1_FACCEN | FSMC_BCR1_BURSTEN | \
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180 FSMC_BCR1_WAITPOL | FSMC_BCR1_WRAPMOD | FSMC_BCR1_WAITCFG | \
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181 FSMC_BCR1_WREN | FSMC_BCR1_WAITEN | FSMC_BCR1_EXTMOD | \
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182 FSMC_BCR1_ASYNCWAIT | FSMC_BCR1_CPSIZE | FSMC_BCR1_CBURSTRW));
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183 /* Set NORSRAM device control parameters */
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184 tmpr |= (uint32_t)(Init->DataAddressMux |\
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185 Init->MemoryType |\
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186 Init->MemoryDataWidth |\
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187 Init->BurstAccessMode |\
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188 Init->WaitSignalPolarity |\
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189 Init->WrapMode |\
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190 Init->WaitSignalActive |\
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191 Init->WriteOperation |\
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192 Init->WaitSignal |\
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193 Init->ExtendedMode |\
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194 Init->AsynchronousWait |\
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195 Init->PageSize |\
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196 Init->WriteBurst
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197 );
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198 #else /* STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F413xx || STM32F423xx */
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199 /* Clear MBKEN, MUXEN, MTYP, MWID, FACCEN, BURSTEN, WAITPOL, WAITCFG, WREN,
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200 WAITEN, EXTMOD, ASYNCWAIT,CPSIZE, CBURSTRW, CCLKEN and WFDIS bits */
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201 tmpr &= ((uint32_t)~(FSMC_BCR1_MBKEN | FSMC_BCR1_MUXEN | FSMC_BCR1_MTYP | \
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202 FSMC_BCR1_MWID | FSMC_BCR1_FACCEN | FSMC_BCR1_BURSTEN | \
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203 FSMC_BCR1_WAITPOL | FSMC_BCR1_WAITCFG | FSMC_BCR1_WREN | \
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204 FSMC_BCR1_WAITEN | FSMC_BCR1_EXTMOD | FSMC_BCR1_ASYNCWAIT | \
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205 FSMC_BCR1_CPSIZE | FSMC_BCR1_CBURSTRW | FSMC_BCR1_CCLKEN | \
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206 FSMC_BCR1_WFDIS));
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207 /* Set NORSRAM device control parameters */
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208 tmpr |= (uint32_t)(Init->DataAddressMux |\
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209 Init->MemoryType |\
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210 Init->MemoryDataWidth |\
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211 Init->BurstAccessMode |\
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212 Init->WaitSignalPolarity |\
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213 Init->WaitSignalActive |\
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214 Init->WriteOperation |\
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215 Init->WaitSignal |\
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216 Init->ExtendedMode |\
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217 Init->AsynchronousWait |\
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218 Init->WriteBurst |\
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219 Init->ContinuousClock |\
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220 Init->PageSize |\
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221 Init->WriteFifo);
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222 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
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223
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224 if(Init->MemoryType == FSMC_MEMORY_TYPE_NOR)
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225 {
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226 tmpr |= (uint32_t)FSMC_NORSRAM_FLASH_ACCESS_ENABLE;
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227 }
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228
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229 Device->BTCR[Init->NSBank] = tmpr;
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230
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231 #if defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F413xx) || defined(STM32F423xx)
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232 /* Configure synchronous mode when Continuous clock is enabled for bank2..4 */
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233 if((Init->ContinuousClock == FSMC_CONTINUOUS_CLOCK_SYNC_ASYNC) && (Init->NSBank != FSMC_NORSRAM_BANK1))
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234 {
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235 Device->BTCR[FSMC_NORSRAM_BANK1] |= (uint32_t)(Init->ContinuousClock);
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236 }
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237
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238 if(Init->NSBank != FSMC_NORSRAM_BANK1)
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239 {
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240 Device->BTCR[FSMC_NORSRAM_BANK1] |= (uint32_t)(Init->WriteFifo);
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241 }
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242 #endif /* STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F413xx || STM32F423xx */
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243
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244 return HAL_OK;
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245 }
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246
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247 /**
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248 * @brief DeInitialize the FSMC_NORSRAM peripheral
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249 * @param Device Pointer to NORSRAM device instance
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250 * @param ExDevice Pointer to NORSRAM extended mode device instance
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251 * @param Bank NORSRAM bank number
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252 * @retval HAL status
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253 */
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254 HAL_StatusTypeDef FSMC_NORSRAM_DeInit(FSMC_NORSRAM_TypeDef *Device, FSMC_NORSRAM_EXTENDED_TypeDef *ExDevice, uint32_t Bank)
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255 {
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256 /* Check the parameters */
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257 assert_param(IS_FSMC_NORSRAM_DEVICE(Device));
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258 assert_param(IS_FSMC_NORSRAM_EXTENDED_DEVICE(ExDevice));
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259 assert_param(IS_FSMC_NORSRAM_BANK(Bank));
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260
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261 /* Disable the FSMC_NORSRAM device */
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262 __FSMC_NORSRAM_DISABLE(Device, Bank);
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263
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264 /* De-initialize the FSMC_NORSRAM device */
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265 /* FSMC_NORSRAM_BANK1 */
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266 if(Bank == FSMC_NORSRAM_BANK1)
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267 {
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268 Device->BTCR[Bank] = 0x000030DBU;
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269 }
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270 /* FSMC_NORSRAM_BANK2, FSMC_NORSRAM_BANK3 or FSMC_NORSRAM_BANK4 */
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271 else
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272 {
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273 Device->BTCR[Bank] = 0x000030D2U;
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274 }
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275
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276 Device->BTCR[Bank + 1U] = 0x0FFFFFFFU;
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277 ExDevice->BWTR[Bank] = 0x0FFFFFFFU;
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278
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279 return HAL_OK;
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280 }
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281
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282
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283 /**
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284 * @brief Initialize the FSMC_NORSRAM Timing according to the specified
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285 * parameters in the FSMC_NORSRAM_TimingTypeDef
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286 * @param Device Pointer to NORSRAM device instance
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287 * @param Timing Pointer to NORSRAM Timing structure
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288 * @param Bank NORSRAM bank number
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289 * @retval HAL status
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290 */
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291 HAL_StatusTypeDef FSMC_NORSRAM_Timing_Init(FSMC_NORSRAM_TypeDef *Device, FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank)
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292 {
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293 uint32_t tmpr = 0U;
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294
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295 /* Check the parameters */
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296 assert_param(IS_FSMC_NORSRAM_DEVICE(Device));
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297 assert_param(IS_FSMC_ADDRESS_SETUP_TIME(Timing->AddressSetupTime));
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298 assert_param(IS_FSMC_ADDRESS_HOLD_TIME(Timing->AddressHoldTime));
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299 assert_param(IS_FSMC_DATASETUP_TIME(Timing->DataSetupTime));
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300 assert_param(IS_FSMC_TURNAROUND_TIME(Timing->BusTurnAroundDuration));
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301 assert_param(IS_FSMC_CLK_DIV(Timing->CLKDivision));
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302 assert_param(IS_FSMC_DATA_LATENCY(Timing->DataLatency));
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303 assert_param(IS_FSMC_ACCESS_MODE(Timing->AccessMode));
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304 assert_param(IS_FSMC_NORSRAM_BANK(Bank));
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305
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306 /* Get the BTCR register value */
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307 tmpr = Device->BTCR[Bank + 1U];
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308
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309 /* Clear ADDSET, ADDHLD, DATAST, BUSTURN, CLKDIV, DATLAT and ACCMOD bits */
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310 tmpr &= ((uint32_t)~(FSMC_BTR1_ADDSET | FSMC_BTR1_ADDHLD | FSMC_BTR1_DATAST | \
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311 FSMC_BTR1_BUSTURN | FSMC_BTR1_CLKDIV | FSMC_BTR1_DATLAT | \
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312 FSMC_BTR1_ACCMOD));
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313
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314 /* Set FSMC_NORSRAM device timing parameters */
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315 tmpr |= (uint32_t)(Timing->AddressSetupTime |\
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316 ((Timing->AddressHoldTime) << 4U) |\
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317 ((Timing->DataSetupTime) << 8U) |\
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318 ((Timing->BusTurnAroundDuration) << 16U) |\
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319 (((Timing->CLKDivision)-1U) << 20U) |\
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320 (((Timing->DataLatency)-2U) << 24U) |\
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321 (Timing->AccessMode));
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322
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323 Device->BTCR[Bank + 1] = tmpr;
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324
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325 #if defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F413xx) || defined(STM32F423xx)
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326 /* Configure Clock division value (in NORSRAM bank 1) when continuous clock is enabled */
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327 if(HAL_IS_BIT_SET(Device->BTCR[FSMC_NORSRAM_BANK1], FSMC_BCR1_CCLKEN))
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328 {
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329 tmpr = (uint32_t)(Device->BTCR[FSMC_NORSRAM_BANK1 + 1U] & ~(0x0FU << 20U));
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330 tmpr |= (uint32_t)(((Timing->CLKDivision)-1U) << 20U);
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331 Device->BTCR[FSMC_NORSRAM_BANK1 + 1U] = tmpr;
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332 }
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333 #endif /* STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F413xx || STM32F423xx */
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334
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335 return HAL_OK;
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336 }
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337
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338 /**
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339 * @brief Initialize the FSMC_NORSRAM Extended mode Timing according to the specified
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340 * parameters in the FSMC_NORSRAM_TimingTypeDef
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341 * @param Device Pointer to NORSRAM device instance
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342 * @param Timing Pointer to NORSRAM Timing structure
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343 * @param Bank NORSRAM bank number
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344 * @retval HAL status
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345 */
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346 HAL_StatusTypeDef FSMC_NORSRAM_Extended_Timing_Init(FSMC_NORSRAM_EXTENDED_TypeDef *Device, FSMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, uint32_t ExtendedMode)
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347 {
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348 uint32_t tmpr = 0U;
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349
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350 /* Check the parameters */
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351 assert_param(IS_FSMC_EXTENDED_MODE(ExtendedMode));
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352
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353 /* Set NORSRAM device timing register for write configuration, if extended mode is used */
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354 if(ExtendedMode == FSMC_EXTENDED_MODE_ENABLE)
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355 {
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356 /* Check the parameters */
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357 assert_param(IS_FSMC_NORSRAM_EXTENDED_DEVICE(Device));
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358 assert_param(IS_FSMC_ADDRESS_SETUP_TIME(Timing->AddressSetupTime));
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359 assert_param(IS_FSMC_ADDRESS_HOLD_TIME(Timing->AddressHoldTime));
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360 assert_param(IS_FSMC_DATASETUP_TIME(Timing->DataSetupTime));
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361 assert_param(IS_FSMC_TURNAROUND_TIME(Timing->BusTurnAroundDuration));
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362 assert_param(IS_FSMC_ACCESS_MODE(Timing->AccessMode));
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363 assert_param(IS_FSMC_NORSRAM_BANK(Bank));
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364
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365 /* Get the BWTR register value */
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366 tmpr = Device->BWTR[Bank];
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367
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368 /* Clear ADDSET, ADDHLD, DATAST, BUSTURN and ACCMOD bits */
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369 tmpr &= ((uint32_t)~(FSMC_BWTR1_ADDSET | FSMC_BWTR1_ADDHLD | FSMC_BWTR1_DATAST | \
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370 FSMC_BWTR1_BUSTURN | FSMC_BWTR1_ACCMOD));
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371
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372 tmpr |= (uint32_t)(Timing->AddressSetupTime |\
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373 ((Timing->AddressHoldTime) << 4U) |\
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374 ((Timing->DataSetupTime) << 8U) |\
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375 ((Timing->BusTurnAroundDuration) << 16U) |\
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376 (Timing->AccessMode));
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377
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378 Device->BWTR[Bank] = tmpr;
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379 }
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380 else
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381 {
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382 Device->BWTR[Bank] = 0x0FFFFFFFU;
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383 }
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384
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385 return HAL_OK;
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386 }
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387 /**
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388 * @}
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389 */
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390
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391 /** @addtogroup FSMC_LL_NORSRAM_Private_Functions_Group2
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392 * @brief management functions
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393 *
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394 @verbatim
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395 ==============================================================================
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396 ##### FSMC_NORSRAM Control functions #####
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397 ==============================================================================
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398 [..]
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399 This subsection provides a set of functions allowing to control dynamically
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400 the FSMC NORSRAM interface.
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401
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402 @endverbatim
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403 * @{
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404 */
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405
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406 /**
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407 * @brief Enables dynamically FSMC_NORSRAM write operation.
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408 * @param Device Pointer to NORSRAM device instance
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409 * @param Bank NORSRAM bank number
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410 * @retval HAL status
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411 */
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412 HAL_StatusTypeDef FSMC_NORSRAM_WriteOperation_Enable(FSMC_NORSRAM_TypeDef *Device, uint32_t Bank)
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413 {
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414 /* Check the parameters */
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415 assert_param(IS_FSMC_NORSRAM_DEVICE(Device));
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416 assert_param(IS_FSMC_NORSRAM_BANK(Bank));
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417
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418 /* Enable write operation */
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419 Device->BTCR[Bank] |= FSMC_WRITE_OPERATION_ENABLE;
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420
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421 return HAL_OK;
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422 }
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423
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424 /**
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425 * @brief Disables dynamically FSMC_NORSRAM write operation.
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426 * @param Device Pointer to NORSRAM device instance
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427 * @param Bank NORSRAM bank number
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428 * @retval HAL status
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429 */
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430 HAL_StatusTypeDef FSMC_NORSRAM_WriteOperation_Disable(FSMC_NORSRAM_TypeDef *Device, uint32_t Bank)
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431 {
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432 /* Check the parameters */
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433 assert_param(IS_FSMC_NORSRAM_DEVICE(Device));
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434 assert_param(IS_FSMC_NORSRAM_BANK(Bank));
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435
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436 /* Disable write operation */
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437 Device->BTCR[Bank] &= ~FSMC_WRITE_OPERATION_ENABLE;
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438
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439 return HAL_OK;
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440 }
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441 /**
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442 * @}
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443 */
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444
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445 /**
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446 * @}
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447 */
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448
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449 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
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450 /** @addtogroup FSMC_LL_NAND
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451 * @brief NAND Controller functions
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452 *
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453 @verbatim
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454 ==============================================================================
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455 ##### How to use NAND device driver #####
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456 ==============================================================================
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457 [..]
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458 This driver contains a set of APIs to interface with the FSMC NAND banks in order
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459 to run the NAND external devices.
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460
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461 (+) FSMC NAND bank reset using the function FSMC_NAND_DeInit()
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462 (+) FSMC NAND bank control configuration using the function FSMC_NAND_Init()
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463 (+) FSMC NAND bank common space timing configuration using the function
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464 FSMC_NAND_CommonSpace_Timing_Init()
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465 (+) FSMC NAND bank attribute space timing configuration using the function
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466 FSMC_NAND_AttributeSpace_Timing_Init()
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467 (+) FSMC NAND bank enable/disable ECC correction feature using the functions
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468 FSMC_NAND_ECC_Enable()/FSMC_NAND_ECC_Disable()
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469 (+) FSMC NAND bank get ECC correction code using the function FSMC_NAND_GetECC()
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470
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471 @endverbatim
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472 * @{
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473 */
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474
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475 /** @addtogroup FSMC_LL_NAND_Private_Functions_Group1
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476 * @brief Initialization and Configuration functions
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477 *
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478 @verbatim
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479 ==============================================================================
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480 ##### Initialization and de_initialization functions #####
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481 ==============================================================================
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482 [..]
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483 This section provides functions allowing to:
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484 (+) Initialize and configure the FSMC NAND interface
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485 (+) De-initialize the FSMC NAND interface
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486 (+) Configure the FSMC clock and associated GPIOs
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487
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488 @endverbatim
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489 * @{
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490 */
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491
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492 /**
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493 * @brief Initializes the FSMC_NAND device according to the specified
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494 * control parameters in the FSMC_NAND_HandleTypeDef
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495 * @param Device Pointer to NAND device instance
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496 * @param Init Pointer to NAND Initialization structure
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497 * @retval HAL status
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498 */
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499 HAL_StatusTypeDef FSMC_NAND_Init(FSMC_NAND_TypeDef *Device, FSMC_NAND_InitTypeDef *Init)
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500 {
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501 uint32_t tmpr = 0U;
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502
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503 /* Check the parameters */
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504 assert_param(IS_FSMC_NAND_BANK(Init->NandBank));
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505 assert_param(IS_FSMC_WAIT_FEATURE(Init->Waitfeature));
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506 assert_param(IS_FSMC_NAND_MEMORY_WIDTH(Init->MemoryDataWidth));
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507 assert_param(IS_FSMC_ECC_STATE(Init->EccComputation));
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508 assert_param(IS_FSMC_ECCPAGE_SIZE(Init->ECCPageSize));
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509 assert_param(IS_FSMC_TCLR_TIME(Init->TCLRSetupTime));
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510 assert_param(IS_FSMC_TAR_TIME(Init->TARSetupTime));
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511
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512 if(Init->NandBank == FSMC_NAND_BANK2)
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513 {
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514 /* Get the NAND bank 2 register value */
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515 tmpr = Device->PCR2;
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516 }
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517 else
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518 {
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519 /* Get the NAND bank 3 register value */
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520 tmpr = Device->PCR3;
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521 }
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522
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523 /* Clear PWAITEN, PBKEN, PTYP, PWID, ECCEN, TCLR, TAR and ECCPS bits */
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524 tmpr &= ((uint32_t)~(FSMC_PCR2_PWAITEN | FSMC_PCR2_PBKEN | FSMC_PCR2_PTYP | \
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525 FSMC_PCR2_PWID | FSMC_PCR2_ECCEN | FSMC_PCR2_TCLR | \
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526 FSMC_PCR2_TAR | FSMC_PCR2_ECCPS));
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527
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528 /* Set NAND device control parameters */
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529 tmpr |= (uint32_t)(Init->Waitfeature |\
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530 FSMC_PCR_MEMORY_TYPE_NAND |\
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531 Init->MemoryDataWidth |\
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532 Init->EccComputation |\
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533 Init->ECCPageSize |\
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534 ((Init->TCLRSetupTime) << 9U) |\
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535 ((Init->TARSetupTime) << 13U));
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536
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537 if(Init->NandBank == FSMC_NAND_BANK2)
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538 {
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539 /* NAND bank 2 registers configuration */
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540 Device->PCR2 = tmpr;
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541 }
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542 else
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543 {
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544 /* NAND bank 3 registers configuration */
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545 Device->PCR3 = tmpr;
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546 }
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547
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548 return HAL_OK;
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549 }
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550
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551 /**
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552 * @brief Initializes the FSMC_NAND Common space Timing according to the specified
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553 * parameters in the FSMC_NAND_PCC_TimingTypeDef
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554 * @param Device Pointer to NAND device instance
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555 * @param Timing Pointer to NAND timing structure
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556 * @param Bank NAND bank number
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557 * @retval HAL status
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558 */
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559 HAL_StatusTypeDef FSMC_NAND_CommonSpace_Timing_Init(FSMC_NAND_TypeDef *Device, FSMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank)
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560 {
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561 uint32_t tmpr = 0U;
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562
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563 /* Check the parameters */
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564 assert_param(IS_FSMC_SETUP_TIME(Timing->SetupTime));
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565 assert_param(IS_FSMC_WAIT_TIME(Timing->WaitSetupTime));
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566 assert_param(IS_FSMC_HOLD_TIME(Timing->HoldSetupTime));
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567 assert_param(IS_FSMC_HIZ_TIME(Timing->HiZSetupTime));
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568
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569 if(Bank == FSMC_NAND_BANK2)
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570 {
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571 /* Get the NAND bank 2 register value */
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572 tmpr = Device->PMEM2;
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573 }
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574 else
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575 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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576 /* Get the NAND bank 3 register value */
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577 tmpr = Device->PMEM3;
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578 }
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579
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580 /* Clear MEMSETx, MEMWAITx, MEMHOLDx and MEMHIZx bits */
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581 tmpr &= ((uint32_t)~(FSMC_PMEM2_MEMSET2 | FSMC_PMEM2_MEMWAIT2 | FSMC_PMEM2_MEMHOLD2 | \
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582 FSMC_PMEM2_MEMHIZ2));
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583
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584 /* Set FSMC_NAND device timing parameters */
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585 tmpr |= (uint32_t)(Timing->SetupTime |\
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586 ((Timing->WaitSetupTime) << 8U) |\
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587 ((Timing->HoldSetupTime) << 16U) |\
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
588 ((Timing->HiZSetupTime) << 24U)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
589 );
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
590
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
591 if(Bank == FSMC_NAND_BANK2)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
592 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
593 /* NAND bank 2 registers configuration */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
594 Device->PMEM2 = tmpr;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
595 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
596 else
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
597 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
598 /* NAND bank 3 registers configuration */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
599 Device->PMEM3 = tmpr;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
600 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
601
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
602 return HAL_OK;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
603 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
604
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
605 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
606 * @brief Initializes the FSMC_NAND Attribute space Timing according to the specified
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
607 * parameters in the FSMC_NAND_PCC_TimingTypeDef
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
608 * @param Device Pointer to NAND device instance
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
609 * @param Timing Pointer to NAND timing structure
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
610 * @param Bank NAND bank number
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
611 * @retval HAL status
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
612 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
613 HAL_StatusTypeDef FSMC_NAND_AttributeSpace_Timing_Init(FSMC_NAND_TypeDef *Device, FSMC_NAND_PCC_TimingTypeDef *Timing, uint32_t Bank)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
614 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff changeset
615 uint32_t tmpr = 0U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
616
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
617 /* Check the parameters */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
618 assert_param(IS_FSMC_SETUP_TIME(Timing->SetupTime));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff changeset
619 assert_param(IS_FSMC_WAIT_TIME(Timing->WaitSetupTime));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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620 assert_param(IS_FSMC_HOLD_TIME(Timing->HoldSetupTime));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
621 assert_param(IS_FSMC_HIZ_TIME(Timing->HiZSetupTime));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
622
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
623 if(Bank == FSMC_NAND_BANK2)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
624 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
625 /* Get the NAND bank 2 register value */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff changeset
626 tmpr = Device->PATT2;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
627 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
628 else
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
629 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
630 /* Get the NAND bank 3 register value */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
631 tmpr = Device->PATT3;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
632 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
633
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
634 /* Clear ATTSETx, ATTWAITx, ATTHOLDx and ATTHIZx bits */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff changeset
635 tmpr &= ((uint32_t)~(FSMC_PATT2_ATTSET2 | FSMC_PATT2_ATTWAIT2 | FSMC_PATT2_ATTHOLD2 | \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff changeset
636 FSMC_PATT2_ATTHIZ2));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
637
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
638 /* Set FSMC_NAND device timing parameters */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
639 tmpr |= (uint32_t)(Timing->SetupTime |\
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
640 ((Timing->WaitSetupTime) << 8U) |\
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
641 ((Timing->HoldSetupTime) << 16U) |\
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
642 ((Timing->HiZSetupTime) << 24U)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
643 );
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
644
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
645 if(Bank == FSMC_NAND_BANK2)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
646 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
647 /* NAND bank 2 registers configuration */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
648 Device->PATT2 = tmpr;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
649 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
650 else
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
651 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
652 /* NAND bank 3 registers configuration */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
653 Device->PATT3 = tmpr;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
654 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
655
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
656 return HAL_OK;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
657 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
658
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
659 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
660 * @brief DeInitializes the FSMC_NAND device
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
661 * @param Device Pointer to NAND device instance
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
662 * @param Bank NAND bank number
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
663 * @retval HAL status
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
664 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
665 HAL_StatusTypeDef FSMC_NAND_DeInit(FSMC_NAND_TypeDef *Device, uint32_t Bank)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
666 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
667 /* Disable the NAND Bank */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
668 __FSMC_NAND_DISABLE(Device, Bank);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
669
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
670 /* De-initialize the NAND Bank */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
671 if(Bank == FSMC_NAND_BANK2)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
672 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
673 /* Set the FSMC_NAND_BANK2 registers to their reset values */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
674 Device->PCR2 = 0x00000018U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
675 Device->SR2 = 0x00000040U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
676 Device->PMEM2 = 0xFCFCFCFCU;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
677 Device->PATT2 = 0xFCFCFCFCU;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
678 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
679 /* FSMC_Bank3_NAND */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
680 else
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
681 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
682 /* Set the FSMC_NAND_BANK3 registers to their reset values */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
683 Device->PCR3 = 0x00000018U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
684 Device->SR3 = 0x00000040U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
685 Device->PMEM3 = 0xFCFCFCFCU;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
686 Device->PATT3 = 0xFCFCFCFCU;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
687 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
688
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
689 return HAL_OK;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
690 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
691 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
692 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
693 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
694
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
695 /** @addtogroup FSMC_LL_NAND_Private_Functions_Group2
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
696 * @brief management functions
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
697 *
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
698 @verbatim
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
699 ==============================================================================
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
700 ##### FSMC_NAND Control functions #####
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
701 ==============================================================================
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
702 [..]
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
703 This subsection provides a set of functions allowing to control dynamically
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
704 the FSMC NAND interface.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
705
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
706 @endverbatim
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
707 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
708 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
709
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
710 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
711 * @brief Enables dynamically FSMC_NAND ECC feature.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
712 * @param Device Pointer to NAND device instance
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
713 * @param Bank NAND bank number
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
714 * @retval HAL status
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
715 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
716 HAL_StatusTypeDef FSMC_NAND_ECC_Enable(FSMC_NAND_TypeDef *Device, uint32_t Bank)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
717 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
718 /* Enable ECC feature */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
719 if(Bank == FSMC_NAND_BANK2)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
720 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
721 Device->PCR2 |= FSMC_PCR2_ECCEN;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
722 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
723 else
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
724 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
725 Device->PCR3 |= FSMC_PCR3_ECCEN;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
726 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
727
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
728 return HAL_OK;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
729 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
730
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
731 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
732 * @brief Disables dynamically FSMC_NAND ECC feature.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
733 * @param Device Pointer to NAND device instance
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
734 * @param Bank NAND bank number
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
735 * @retval HAL status
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
736 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
737 HAL_StatusTypeDef FSMC_NAND_ECC_Disable(FSMC_NAND_TypeDef *Device, uint32_t Bank)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
738 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
739 /* Disable ECC feature */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
740 if(Bank == FSMC_NAND_BANK2)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
741 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
742 Device->PCR2 &= ~FSMC_PCR2_ECCEN;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
743 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
744 else
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
745 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
746 Device->PCR3 &= ~FSMC_PCR3_ECCEN;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
747 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
748
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
749 return HAL_OK;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
750 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
751
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
752 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
753 * @brief Disables dynamically FSMC_NAND ECC feature.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
754 * @param Device Pointer to NAND device instance
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
755 * @param ECCval Pointer to ECC value
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
756 * @param Bank NAND bank number
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
757 * @param Timeout Timeout wait value
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
758 * @retval HAL status
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
759 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
760 HAL_StatusTypeDef FSMC_NAND_GetECC(FSMC_NAND_TypeDef *Device, uint32_t *ECCval, uint32_t Bank, uint32_t Timeout)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
761 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
762 uint32_t tickstart = 0U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
763
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
764 /* Check the parameters */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
765 assert_param(IS_FSMC_NAND_DEVICE(Device));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
766 assert_param(IS_FSMC_NAND_BANK(Bank));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
767
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
768 /* Get tick */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
769 tickstart = HAL_GetTick();
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
770
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
771 /* Wait until FIFO is empty */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
772 while(__FSMC_NAND_GET_FLAG(Device, Bank, FSMC_FLAG_FEMPT) == RESET)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
773 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
774 /* Check for the Timeout */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
775 if(Timeout != HAL_MAX_DELAY)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
776 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
777 if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
778 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
779 return HAL_TIMEOUT;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
780 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
781 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
782 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
783
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
784 if(Bank == FSMC_NAND_BANK2)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
785 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
786 /* Get the ECCR2 register value */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
787 *ECCval = (uint32_t)Device->ECCR2;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
788 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
789 else
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
790 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
791 /* Get the ECCR3 register value */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
792 *ECCval = (uint32_t)Device->ECCR3;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
793 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
794
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
795 return HAL_OK;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
796 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
797
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
798 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
799 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
800 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
801
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
802 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
803 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
804 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
805
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
806 /** @addtogroup FSMC_LL_PCCARD
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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807 * @brief PCCARD Controller functions
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
808 *
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
809 @verbatim
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
810 ==============================================================================
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
811 ##### How to use PCCARD device driver #####
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
812 ==============================================================================
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
813 [..]
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
814 This driver contains a set of APIs to interface with the FSMC PCCARD bank in order
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
815 to run the PCCARD/compact flash external devices.
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
816
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff changeset
817 (+) FSMC PCCARD bank reset using the function FSMC_PCCARD_DeInit()
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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818 (+) FSMC PCCARD bank control configuration using the function FSMC_PCCARD_Init()
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
819 (+) FSMC PCCARD bank common space timing configuration using the function
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
820 FSMC_PCCARD_CommonSpace_Timing_Init()
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
821 (+) FSMC PCCARD bank attribute space timing configuration using the function
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
822 FSMC_PCCARD_AttributeSpace_Timing_Init()
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
823 (+) FSMC PCCARD bank IO space timing configuration using the function
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
824 FSMC_PCCARD_IOSpace_Timing_Init()
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
825
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
826 @endverbatim
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
827 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
828 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
829
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
830 /** @addtogroup FSMC_LL_PCCARD_Private_Functions_Group1
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
831 * @brief Initialization and Configuration functions
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
832 *
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
833 @verbatim
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
834 ==============================================================================
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
835 ##### Initialization and de_initialization functions #####
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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836 ==============================================================================
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
837 [..]
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
838 This section provides functions allowing to:
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
839 (+) Initialize and configure the FSMC PCCARD interface
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
840 (+) De-initialize the FSMC PCCARD interface
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
841 (+) Configure the FSMC clock and associated GPIOs
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
842
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
843 @endverbatim
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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844 * @{
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
845 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
846
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
847 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
848 * @brief Initializes the FSMC_PCCARD device according to the specified
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
849 * control parameters in the FSMC_PCCARD_HandleTypeDef
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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850 * @param Device Pointer to PCCARD device instance
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
851 * @param Init Pointer to PCCARD Initialization structure
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
852 * @retval HAL status
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
853 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
854 HAL_StatusTypeDef FSMC_PCCARD_Init(FSMC_PCCARD_TypeDef *Device, FSMC_PCCARD_InitTypeDef *Init)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
855 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
856 uint32_t tmpr = 0U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
857
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
858 /* Check the parameters */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
859 assert_param(IS_FSMC_WAIT_FEATURE(Init->Waitfeature));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
860 assert_param(IS_FSMC_TCLR_TIME(Init->TCLRSetupTime));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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861 assert_param(IS_FSMC_TAR_TIME(Init->TARSetupTime));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
862
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
863 /* Get PCCARD control register value */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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864 tmpr = Device->PCR4;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
865
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
866 /* Clear TAR, TCLR, PWAITEN and PWID bits */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
867 tmpr &= ((uint32_t)~(FSMC_PCR4_TAR | FSMC_PCR4_TCLR | FSMC_PCR4_PWAITEN | \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
868 FSMC_PCR4_PWID | FSMC_PCR4_PTYP));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
869
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
870 /* Set FSMC_PCCARD device control parameters */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
871 tmpr |= (uint32_t)(Init->Waitfeature |\
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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872 FSMC_NAND_PCC_MEM_BUS_WIDTH_16 |\
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
873 (Init->TCLRSetupTime << 9U) |\
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff changeset
874 (Init->TARSetupTime << 13U));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
875
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
876 Device->PCR4 = tmpr;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
877
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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878 return HAL_OK;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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879 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
880
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
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881 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
882 * @brief Initializes the FSMC_PCCARD Common space Timing according to the specified
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
883 * parameters in the FSMC_NAND_PCC_TimingTypeDef
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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884 * @param Device Pointer to PCCARD device instance
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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885 * @param Timing Pointer to PCCARD timing structure
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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886 * @retval HAL status
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
887 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff changeset
888 HAL_StatusTypeDef FSMC_PCCARD_CommonSpace_Timing_Init(FSMC_PCCARD_TypeDef *Device, FSMC_NAND_PCC_TimingTypeDef *Timing)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff changeset
889 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff changeset
890 uint32_t tmpr = 0U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
891
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
892 /* Check the parameters */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
893 assert_param(IS_FSMC_SETUP_TIME(Timing->SetupTime));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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894 assert_param(IS_FSMC_WAIT_TIME(Timing->WaitSetupTime));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
895 assert_param(IS_FSMC_HOLD_TIME(Timing->HoldSetupTime));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
896 assert_param(IS_FSMC_HIZ_TIME(Timing->HiZSetupTime));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
897
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
898 /* Get PCCARD common space timing register value */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
899 tmpr = Device->PMEM4;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
900
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
901 /* Clear MEMSETx, MEMWAITx, MEMHOLDx and MEMHIZx bits */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
902 tmpr &= ((uint32_t)~(FSMC_PMEM4_MEMSET4 | FSMC_PMEM4_MEMWAIT4 | FSMC_PMEM4_MEMHOLD4 | \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
903 FSMC_PMEM4_MEMHIZ4));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
904 /* Set PCCARD timing parameters */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
905 tmpr |= (uint32_t)((Timing->SetupTime |\
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
906 ((Timing->WaitSetupTime) << 8U) |\
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
907 (Timing->HoldSetupTime) << 16U) |\
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
908 ((Timing->HiZSetupTime) << 24U));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
909
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
parents:
diff changeset
910 Device->PMEM4 = tmpr;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
911
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
912 return HAL_OK;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
913 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
914
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
915 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
916 * @brief Initializes the FSMC_PCCARD Attribute space Timing according to the specified
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
917 * parameters in the FSMC_NAND_PCC_TimingTypeDef
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
918 * @param Device Pointer to PCCARD device instance
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
919 * @param Timing Pointer to PCCARD timing structure
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
920 * @retval HAL status
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
921 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
922 HAL_StatusTypeDef FSMC_PCCARD_AttributeSpace_Timing_Init(FSMC_PCCARD_TypeDef *Device, FSMC_NAND_PCC_TimingTypeDef *Timing)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
923 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
924 uint32_t tmpr = 0U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
925
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
926 /* Check the parameters */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
927 assert_param(IS_FSMC_SETUP_TIME(Timing->SetupTime));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
928 assert_param(IS_FSMC_WAIT_TIME(Timing->WaitSetupTime));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff changeset
929 assert_param(IS_FSMC_HOLD_TIME(Timing->HoldSetupTime));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
930 assert_param(IS_FSMC_HIZ_TIME(Timing->HiZSetupTime));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
931
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
932 /* Get PCCARD timing parameters */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
933 tmpr = Device->PATT4;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
934
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
935 /* Clear ATTSETx, ATTWAITx, ATTHOLDx and ATTHIZx bits */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff changeset
936 tmpr &= ((uint32_t)~(FSMC_PATT4_ATTSET4 | FSMC_PATT4_ATTWAIT4 | FSMC_PATT4_ATTHOLD4 | \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
937 FSMC_PATT4_ATTHIZ4));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
938
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
939 /* Set PCCARD timing parameters */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
940 tmpr |= (uint32_t)(Timing->SetupTime |\
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
941 ((Timing->WaitSetupTime) << 8U) |\
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff changeset
942 ((Timing->HoldSetupTime) << 16U) |\
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
Ideenmodellierer
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diff changeset
943 ((Timing->HiZSetupTime) << 24U));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
944 Device->PATT4 = tmpr;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
945
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
946 return HAL_OK;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
947 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
948
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
949 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
950 * @brief Initializes the FSMC_PCCARD IO space Timing according to the specified
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
951 * parameters in the FSMC_NAND_PCC_TimingTypeDef
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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952 * @param Device Pointer to PCCARD device instance
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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953 * @param Timing Pointer to PCCARD timing structure
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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954 * @retval HAL status
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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955 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
956 HAL_StatusTypeDef FSMC_PCCARD_IOSpace_Timing_Init(FSMC_PCCARD_TypeDef *Device, FSMC_NAND_PCC_TimingTypeDef *Timing)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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957 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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958 uint32_t tmpr = 0U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
959
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
960 /* Check the parameters */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
961 assert_param(IS_FSMC_SETUP_TIME(Timing->SetupTime));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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962 assert_param(IS_FSMC_WAIT_TIME(Timing->WaitSetupTime));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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963 assert_param(IS_FSMC_HOLD_TIME(Timing->HoldSetupTime));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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964 assert_param(IS_FSMC_HIZ_TIME(Timing->HiZSetupTime));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
965
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
966 /* Get FSMC_PCCARD device timing parameters */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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967 tmpr = Device->PIO4;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
968
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
969 /* Clear IOSET4, IOWAIT4, IOHOLD4 and IOHIZ4 bits */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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970 tmpr &= ((uint32_t)~(FSMC_PIO4_IOSET4 | FSMC_PIO4_IOWAIT4 | FSMC_PIO4_IOHOLD4 | \
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
971 FSMC_PIO4_IOHIZ4));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
972
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
973 /* Set FSMC_PCCARD device timing parameters */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
974 tmpr |= (uint32_t)(Timing->SetupTime |\
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
975 ((Timing->WaitSetupTime) << 8U) |\
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
976 ((Timing->HoldSetupTime) << 16U) |\
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
977 ((Timing->HiZSetupTime) << 24U));
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
978
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
979 Device->PIO4 = tmpr;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
980
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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981 return HAL_OK;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
982 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
983
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
984 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
985 * @brief DeInitializes the FSMC_PCCARD device
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
986 * @param Device Pointer to PCCARD device instance
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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987 * @retval HAL status
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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988 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
989 HAL_StatusTypeDef FSMC_PCCARD_DeInit(FSMC_PCCARD_TypeDef *Device)
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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990 {
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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991 /* Disable the FSMC_PCCARD device */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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992 __FSMC_PCCARD_DISABLE(Device);
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
993
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
994 /* De-initialize the FSMC_PCCARD device */
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diff changeset
995 Device->PCR4 = 0x00000018U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
996 Device->SR4 = 0x00000000U;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
997 Device->PMEM4 = 0xFCFCFCFCU;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
998 Device->PATT4 = 0xFCFCFCFCU;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
999 Device->PIO4 = 0xFCFCFCFCU;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1000
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1001 return HAL_OK;
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1002 }
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1003 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1004 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1005 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1006
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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parents:
diff changeset
1007 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1008 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1009 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1010 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1011
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1012 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1013 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1014 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1015 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx || STM32F413xx || STM32F423xx */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1016 #endif /* HAL_SRAM_MODULE_ENABLED || HAL_NOR_MODULE_ENABLED || HAL_NAND_MODULE_ENABLED || HAL_PCCARD_MODULE_ENABLED */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1017
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1018 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1019 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1020 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1021
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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diff changeset
1022 /**
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1023 * @}
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1024 */
c78bcbd5deda Added current STM32 standandard libraries in version independend folder structure
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1025 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/